anywhere other than offset 0 within the EEPROM, so we have to put our
settings at 0x100 instead.

device.

Separated the mechanisms of non-volatile storage access and non-volatile
stored options.

that don't provide the full flexibility of a bit-bashing interface.

Temporarily hacked rtl8139.c to use the new interface.

period before updating to the new driver API (which can cope with
having TX packets in progress).

(This actually matters once you try using TCP, because you *will*
receive full-sized frames.)

Generic PCI code now handles 64-bit BARs correctly when setting
"membase"; drivers should need to call pci_bar_start() only if they want
to use BARs other than the first memory or I/O BAR.

Split rarely-used PCI functions out into pciextra.c.

Core PCI code is now 662 bytes (down from 1308 bytes in Etherboot 5.4).
284 bytes of this saving comes from the pci/pciextra split.

Cosmetic changes to lots of drivers (e.g. vendor_id->vendor in order to
match the names used in Linux).

I want to get to the point where any header in include/ reflects a
standard user-level header (e.g. a POSIX header), while everything that's
specific to gPXE lives in include/gpxe/.  Headers that reflect a Linux
header (e.g. if_ether.h) should also be in include/gpxe/, with the same
name as the Linux header and, preferably, the same names used for the
definitions.