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@@ -2878,10 +2878,10 @@ static int falcon_init_nic ( struct efab_nic *efab ) {
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2878
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2878
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}
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2879
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2879
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}
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2880
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2880
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2881
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- EFAB_LOG ( "NIC type: %s %dx%s\n",
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2882
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- efab->is_asic ? "ASIC" : "FPGA",
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2883
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- efab->is_dual ? 2 : 1,
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2884
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- efab->is_10g ? "10G" : "1G" );
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2881
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+ DBG ( "NIC type: %s %dx%s\n",
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2882
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+ efab->is_asic ? "ASIC" : "FPGA",
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2883
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+ efab->is_dual ? 2 : 1,
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2884
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+ efab->is_10g ? "10G" : "1G" );
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2885
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2885
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2886
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2886
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/* patch in MAC operations */
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2887
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2887
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if ( efab->is_10g )
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@@ -2904,9 +2904,9 @@ static int falcon_init_nic ( struct efab_nic *efab ) {
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2904
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2904
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efab->has_flash = EFAB_OWORD_FIELD ( reg, FCN_FLASH_PRESENT );
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2905
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2905
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efab->has_eeprom = EFAB_OWORD_FIELD ( reg, FCN_EEPROM_PRESENT);
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2906
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2906
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}
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2907
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- EFAB_LOG ( "flash is %s, EEPROM is %s\n",
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2908
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- ( efab->has_flash ? "present" : "absent" ),
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2909
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- ( efab->has_eeprom ? "present" : "absent" ) );
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2907
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+ DBG ( "flash is %s, EEPROM is %s\n",
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2908
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+ ( efab->has_flash ? "present" : "absent" ),
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2909
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+ ( efab->has_eeprom ? "present" : "absent" ) );
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2910
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2910
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falcon_init_spi ( efab );
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2911
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2911
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2912
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2912
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/* Set up TX and RX descriptor caches in SRAM */
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