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@@ -1,367 +1,339 @@
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-#include "stdint.h"
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-#include "string.h"
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-#include "console.h"
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-#include "nic.h"
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-#include <gpxe/pci.h>
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-
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/*
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- * pci_io.c may know how many buses we have, in which case it can
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- * overwrite this value.
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+ * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
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*
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- */
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-unsigned int pci_max_bus = 0xff;
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-
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-/*
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- * Increment a bus_loc structure to the next possible PCI location.
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- * Leave the structure zeroed and return 0 if there are no more valid
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- * locations.
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+ * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
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+ * Munro, in turn based on the Linux kernel's PCI implementation.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or any later version.
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*
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+ * This program is distributed in the hope that it will be useful, but
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+ * WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ * General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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-static int pci_next_location ( struct bus_loc *bus_loc ) {
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- struct pci_loc *pci_loc = ( struct pci_loc * ) bus_loc;
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-
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- /*
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- * Ensure that there is sufficient space in the shared bus
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- * structures for a struct pci_loc and a struct
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- * pci_dev, as mandated by bus.h.
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- *
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- */
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- BUS_LOC_CHECK ( struct pci_loc );
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- BUS_DEV_CHECK ( struct pci_device );
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- return ( ++pci_loc->busdevfn );
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-}
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+#include <stdint.h>
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+#include <string.h>
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+#include <errno.h>
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+#include <malloc.h>
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+#include <gpxe/tables.h>
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+#include <gpxe/device.h>
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+#include <gpxe/pci.h>
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-/*
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- * Fill in parameters (vendor & device ids, class, membase etc.) for a
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- * PCI device based on bus & devfn.
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+/** @file
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*
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- * Returns 1 if a device was found, 0 for no device present.
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+ * PCI bus
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*
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*/
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-static int pci_fill_device ( struct bus_dev *bus_dev,
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- struct bus_loc *bus_loc ) {
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- struct pci_loc *pci_loc = ( struct pci_loc * ) bus_loc;
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- struct pci_device *pci = ( struct pci_device * ) bus_dev;
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- uint16_t busdevfn = pci_loc->busdevfn;
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- static struct {
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- uint16_t busdevfn0;
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- int is_present;
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- } cache = { 0, 1 };
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- uint32_t l;
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- int reg;
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- /* Store busdevfn in struct pci_device and set default values */
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- pci->busdevfn = busdevfn;
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- pci->name = "?";
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+static struct pci_driver pci_drivers[0] __table_start ( pci_drivers );
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+static struct pci_driver pci_drivers_end[0] __table_end ( pci_drivers );
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- /* Check bus is within range */
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- if ( PCI_BUS ( busdevfn ) > pci_max_bus ) {
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- return 0;
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- }
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+static void pcibus_remove ( struct root_device *rootdev );
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40
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- /* Check to see if we've cached the result that this is a
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- * non-zero function on a non-existent card. This is done to
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- * increase scan speed by a factor of 8.
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- */
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- if ( ( PCI_FUNC ( busdevfn ) != 0 ) &&
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- ( PCI_FN0 ( busdevfn ) == cache.busdevfn0 ) &&
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- ( ! cache.is_present ) ) {
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- return 0;
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- }
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-
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- /* Check to see if there's anything physically present.
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- */
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- pci_read_config_dword ( pci, PCI_VENDOR_ID, &l );
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- /* some broken boards return 0 if a slot is empty: */
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- if ( ( l == 0xffffffff ) || ( l == 0x00000000 ) ) {
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- if ( PCI_FUNC ( busdevfn ) == 0 ) {
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- /* Don't look for subsequent functions if the
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- * card itself is not present.
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- */
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- cache.busdevfn0 = busdevfn;
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- cache.is_present = 0;
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- }
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- return 0;
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- }
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- pci->vendor_id = l & 0xffff;
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- pci->device_id = ( l >> 16 ) & 0xffff;
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-
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- /* Check that we're not a duplicate function on a
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- * non-multifunction device.
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- */
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- if ( PCI_FUNC ( busdevfn ) != 0 ) {
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- uint8_t header_type;
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-
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- pci->busdevfn &= PCI_FN0 ( busdevfn );
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- pci_read_config_byte ( pci, PCI_HEADER_TYPE, &header_type );
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- pci->busdevfn = busdevfn;
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-
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- if ( ! ( header_type & 0x80 ) ) {
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- return 0;
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- }
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- }
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-
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- /* Get device class */
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- pci_read_config_word ( pci, PCI_SUBCLASS_CODE, &pci->class );
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-
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- /* Get revision */
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- pci_read_config_byte ( pci, PCI_REVISION, &pci->revision );
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+/**
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+ * Maximum PCI bus number
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+ *
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+ * Architecture-specific code may know how many buses we have, in
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+ * which case it can overwrite this value.
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+ *
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+ */
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+unsigned int pci_max_bus = 0xff;
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- /* Get the "membase" */
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- pci_read_config_dword ( pci, PCI_BASE_ADDRESS_1, &pci->membase );
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-
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- /* Get the "ioaddr" */
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- pci->ioaddr = 0;
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- for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
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- pci_read_config_dword ( pci, reg, &pci->ioaddr );
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- if ( pci->ioaddr & PCI_BASE_ADDRESS_SPACE_IO ) {
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- pci->ioaddr &= PCI_BASE_ADDRESS_IO_MASK;
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- if ( pci->ioaddr ) {
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- break;
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+/**
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+ * Read PCI BAR
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+ *
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+ * @v pci PCI device
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+ * @v reg PCI register number
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+ * @ret bar Base address register
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+ *
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+ * Reads the specified PCI base address register, including the flags
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+ * portion. 64-bit BARs will be handled automatically. If the value
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+ * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
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+ * high dword is non-zero on a 32-bit platform), then the value
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+ * returned will be zero plus the flags for a 64-bit BAR. Unreachable
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+ * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
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+ */
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+static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
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+ uint32_t low;
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+ uint32_t high;
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+
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+ pci_read_config_dword ( pci, reg, &low );
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+ if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) )
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+ == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){
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+ pci_read_config_dword ( pci, reg + 4, &high );
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+ if ( high ) {
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+ if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
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+ return ( ( ( uint64_t ) high << 32 ) | low );
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+ } else {
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+ DBG ( "Unhandled 64-bit BAR %08x%08x\n",
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+ high, low );
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+ return PCI_BASE_ADDRESS_MEM_TYPE_64;
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}
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}
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- pci->ioaddr = 0;
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- }
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-
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- /* Get the irq */
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- pci_read_config_byte ( pci, PCI_INTERRUPT_PIN, &pci->irq );
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- if ( pci->irq ) {
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- pci_read_config_byte ( pci, PCI_INTERRUPT_LINE, &pci->irq );
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}
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-
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- DBG ( "PCI found device %hhx:%hhx.%d Class %hx: %hx:%hx (rev %hhx)\n",
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- PCI_BUS ( pci->busdevfn ), PCI_DEV ( pci->busdevfn ),
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- PCI_FUNC ( pci->busdevfn ), pci->class, pci->vendor_id,
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- pci->device_id, pci->revision );
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-
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- return 1;
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+ return low;
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}
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84
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141
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-/*
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- * Test whether or not a driver is capable of driving the device.
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+/**
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+ * Find the start of a PCI BAR
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+ *
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+ * @v pci PCI device
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+ * @v reg PCI register number
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+ * @ret start BAR start address
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+ *
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+ * Reads the specified PCI base address register, and returns the
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+ * address portion of the BAR (i.e. without the flags).
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*
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+ * If the address exceeds the size of an unsigned long (i.e. if a
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+ * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
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+ * return value will be zero.
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*/
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145
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-static int pci_check_driver ( struct bus_dev *bus_dev,
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- struct device_driver *device_driver ) {
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- struct pci_device *pci = ( struct pci_device * ) bus_dev;
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148
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- struct pci_driver *pci_driver
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- = ( struct pci_driver * ) device_driver->bus_driver_info;
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- unsigned int i;
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+unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
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+ unsigned long bar;
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151
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101
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152
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- /* If driver has a class, and class matches, use it */
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153
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- if ( pci_driver->class &&
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154
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- ( pci_driver->class == pci->class ) ) {
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155
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- DBG ( "PCI driver %s matches class %hx\n",
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- device_driver->name, pci_driver->class );
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- pci->name = device_driver->name;
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- return 1;
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- }
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160
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-
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161
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- /* If any of driver's IDs match, use it */
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162
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- for ( i = 0 ; i < pci_driver->id_count; i++ ) {
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163
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- struct pci_id *id = &pci_driver->ids[i];
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-
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- if ( ( pci->vendor_id == id->vendor_id ) &&
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166
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- ( pci->device_id == id->device_id ) ) {
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- DBG ( "PCI driver %s device %s matches ID %hx:%hx\n",
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- device_driver->name, id->name,
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- id->vendor_id, id->device_id );
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- pci->name = id->name;
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- return 1;
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172
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- }
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+ bar = pci_bar ( pci, reg );
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+ if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){
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+ return ( bar & PCI_BASE_ADDRESS_MEM_MASK );
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+ } else {
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+ return ( bar & PCI_BASE_ADDRESS_IO_MASK );
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173
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}
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174
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-
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- return 0;
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}
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177
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109
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178
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-/*
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179
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- * Describe a PCI device
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+/**
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111
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+ * Read membase and ioaddr for a PCI device
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180
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*
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+ * @v pci PCI device
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+ *
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+ * This scans through all PCI BARs on the specified device. The first
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+ * valid memory BAR is recorded as pci_device::membase, and the first
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+ * valid IO BAR is recorded as pci_device::ioaddr.
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+ *
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+ * 64-bit BARs are handled automatically. On a 32-bit platform, if a
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+ * 64-bit BAR has a non-zero high dword, it will be regarded as
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+ * invalid.
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181
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122
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*/
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182
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-static char * pci_describe_device ( struct bus_dev *bus_dev ) {
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183
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- struct pci_device *pci = ( struct pci_device * ) bus_dev;
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184
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- static char pci_description[] = "PCI 00:00.0";
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123
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+static void pci_read_bases ( struct pci_device *pci ) {
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124
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+ unsigned long bar;
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125
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+ int reg;
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185
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126
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186
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- sprintf ( pci_description + 4, "%hhx:%hhx.%d",
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187
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- PCI_BUS ( pci->busdevfn ), PCI_DEV ( pci->busdevfn ),
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188
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- PCI_FUNC ( pci->busdevfn ) );
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189
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- return pci_description;
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127
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+ for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
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128
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+ bar = pci_bar ( pci, reg );
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129
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+ if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
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130
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+ if ( ! pci->ioaddr )
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131
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+ pci->ioaddr =
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+ ( bar & PCI_BASE_ADDRESS_IO_MASK );
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133
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+ } else {
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134
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+ if ( ! pci->membase )
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135
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+ pci->membase =
|
|
|
136
|
+ ( bar & PCI_BASE_ADDRESS_MEM_MASK );
|
|
|
137
|
+ /* Skip next BAR if 64-bit */
|
|
|
138
|
+ if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
|
|
|
139
|
+ reg += 4;
|
|
|
140
|
+ }
|
|
|
141
|
+ }
|
|
190
|
142
|
}
|
|
191
|
143
|
|
|
192
|
|
-/*
|
|
193
|
|
- * Name a PCI device
|
|
|
144
|
+/**
|
|
|
145
|
+ * Enable PCI device
|
|
194
|
146
|
*
|
|
195
|
|
- */
|
|
196
|
|
-static const char * pci_name_device ( struct bus_dev *bus_dev ) {
|
|
197
|
|
- struct pci_device *pci = ( struct pci_device * ) bus_dev;
|
|
198
|
|
-
|
|
199
|
|
- return pci->name;
|
|
200
|
|
-}
|
|
201
|
|
-
|
|
202
|
|
-/*
|
|
203
|
|
- * PCI bus operations table
|
|
|
147
|
+ * @v pci PCI device
|
|
204
|
148
|
*
|
|
205
|
|
- */
|
|
206
|
|
-struct bus_driver pci_driver __bus_driver = {
|
|
207
|
|
- .name = "PCI",
|
|
208
|
|
- .next_location = pci_next_location,
|
|
209
|
|
- .fill_device = pci_fill_device,
|
|
210
|
|
- .check_driver = pci_check_driver,
|
|
211
|
|
- .describe_device = pci_describe_device,
|
|
212
|
|
- .name_device = pci_name_device,
|
|
213
|
|
-};
|
|
214
|
|
-
|
|
215
|
|
-/*
|
|
216
|
149
|
* Set device to be a busmaster in case BIOS neglected to do so. Also
|
|
217
|
150
|
* adjust PCI latency timer to a reasonable value, 32.
|
|
218
|
151
|
*/
|
|
219
|
152
|
void adjust_pci_device ( struct pci_device *pci ) {
|
|
220
|
|
- unsigned short new_command, pci_command;
|
|
221
|
|
- unsigned char pci_latency;
|
|
|
153
|
+ unsigned short new_command, pci_command;
|
|
|
154
|
+ unsigned char pci_latency;
|
|
222
|
155
|
|
|
223
|
156
|
pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
|
|
224
|
157
|
new_command = pci_command | PCI_COMMAND_MASTER | PCI_COMMAND_IO;
|
|
225
|
158
|
if ( pci_command != new_command ) {
|
|
226
|
|
- DBG ( "PCI BIOS has not enabled device %hhx:%hhx.%d! "
|
|
227
|
|
- "Updating PCI command %hX->%hX\n",
|
|
228
|
|
- PCI_BUS ( pci->busdevfn ), PCI_DEV ( pci->busdevfn ),
|
|
229
|
|
- PCI_FUNC ( pci->busdevfn ), pci_command, new_command );
|
|
|
159
|
+ DBG ( "PCI BIOS has not enabled device %02x:%02x.%x! "
|
|
|
160
|
+ "Updating PCI command %04x->%04x\n", pci->bus,
|
|
|
161
|
+ PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ),
|
|
|
162
|
+ pci_command, new_command );
|
|
230
|
163
|
pci_write_config_word ( pci, PCI_COMMAND, new_command );
|
|
231
|
164
|
}
|
|
|
165
|
+
|
|
232
|
166
|
pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
|
|
233
|
167
|
if ( pci_latency < 32 ) {
|
|
234
|
|
- DBG ( "PCI device %hhx:%hhx.%d latency timer is "
|
|
235
|
|
- "unreasonably low at %d. Setting to 32.\n",
|
|
236
|
|
- PCI_BUS ( pci->busdevfn ), PCI_DEV ( pci->busdevfn ),
|
|
237
|
|
- PCI_FUNC ( pci->busdevfn ), pci_latency );
|
|
|
168
|
+ DBG ( "PCI device %02x:%02x.%x latency timer is unreasonably "
|
|
|
169
|
+ "low at %d. Setting to 32.\n", pci->bus,
|
|
|
170
|
+ PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ),
|
|
|
171
|
+ pci_latency );
|
|
238
|
172
|
pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
|
|
239
|
173
|
}
|
|
240
|
174
|
}
|
|
241
|
175
|
|
|
242
|
|
-/*
|
|
243
|
|
- * Find the start of a pci resource.
|
|
|
176
|
+/**
|
|
|
177
|
+ * Register PCI device
|
|
|
178
|
+ *
|
|
|
179
|
+ * @v pci PCI device
|
|
|
180
|
+ * @ret rc Return status code
|
|
|
181
|
+ *
|
|
|
182
|
+ * Searches for a driver for the PCI device. If a driver is found,
|
|
|
183
|
+ * its probe() routine is called, and the device is added to the
|
|
|
184
|
+ * device hierarchy.
|
|
244
|
185
|
*/
|
|
245
|
|
-unsigned long pci_bar_start ( struct pci_device *pci, unsigned int index ) {
|
|
246
|
|
- uint32_t lo, hi;
|
|
247
|
|
- unsigned long bar;
|
|
248
|
|
-
|
|
249
|
|
- pci_read_config_dword ( pci, index, &lo );
|
|
250
|
|
- if ( lo & PCI_BASE_ADDRESS_SPACE_IO ) {
|
|
251
|
|
- bar = lo & PCI_BASE_ADDRESS_IO_MASK;
|
|
252
|
|
- } else {
|
|
253
|
|
- bar = 0;
|
|
254
|
|
- if ( ( lo & PCI_BASE_ADDRESS_MEM_TYPE_MASK ) ==
|
|
255
|
|
- PCI_BASE_ADDRESS_MEM_TYPE_64) {
|
|
256
|
|
- pci_read_config_dword ( pci, index + 4, &hi );
|
|
257
|
|
- if ( hi ) {
|
|
258
|
|
-#if ULONG_MAX > 0xffffffff
|
|
259
|
|
- bar = hi;
|
|
260
|
|
- bar <<= 32;
|
|
261
|
|
-#else
|
|
262
|
|
- printf ( "Unhandled 64bit BAR %08x:%08x\n",
|
|
263
|
|
- hi, lo );
|
|
264
|
|
- return -1UL;
|
|
265
|
|
-#endif
|
|
|
186
|
+static int register_pcidev ( struct pci_device *pci ) {
|
|
|
187
|
+ struct pci_driver *driver;
|
|
|
188
|
+ struct pci_device_id *id;
|
|
|
189
|
+ unsigned int i;
|
|
|
190
|
+ int rc;
|
|
|
191
|
+
|
|
|
192
|
+ DBG ( "Registering PCI device %02x:%02x.%x (%04x:%04x mem %lx "
|
|
|
193
|
+ "io %lx irq %d)\n", pci->bus, PCI_SLOT ( pci->devfn ),
|
|
|
194
|
+ PCI_FUNC ( pci->devfn ), pci->vendor, pci->device,
|
|
|
195
|
+ pci->membase, pci->ioaddr, pci->irq );
|
|
|
196
|
+
|
|
|
197
|
+ for ( driver = pci_drivers ; driver < pci_drivers_end ; driver++ ) {
|
|
|
198
|
+ for ( i = 0 ; i < driver->id_count ; i++ ) {
|
|
|
199
|
+ id = &driver->ids[i];
|
|
|
200
|
+ if ( ( id->vendor != pci->vendor ) ||
|
|
|
201
|
+ ( id->device != pci->device ) )
|
|
|
202
|
+ continue;
|
|
|
203
|
+ pci->driver = driver;
|
|
|
204
|
+ pci->name = id->name;
|
|
|
205
|
+ DBG ( "...using driver %s\n", pci->name );
|
|
|
206
|
+ if ( ( rc = driver->probe ( pci, id ) ) != 0 ) {
|
|
|
207
|
+ DBG ( "......probe failed\n" );
|
|
|
208
|
+ continue;
|
|
266
|
209
|
}
|
|
|
210
|
+ list_add ( &pci->dev.siblings,
|
|
|
211
|
+ &pci->dev.parent->children );
|
|
|
212
|
+ return 0;
|
|
267
|
213
|
}
|
|
268
|
|
- bar |= lo & PCI_BASE_ADDRESS_MEM_MASK;
|
|
269
|
214
|
}
|
|
270
|
|
- return bar + pci_bus_base ( pci );
|
|
271
|
|
-}
|
|
272
|
|
-
|
|
273
|
|
-/*
|
|
274
|
|
- * Find the size of a pci resource.
|
|
275
|
|
- */
|
|
276
|
|
-unsigned long pci_bar_size ( struct pci_device *pci, unsigned int bar ) {
|
|
277
|
|
- uint32_t start, size;
|
|
278
|
215
|
|
|
279
|
|
- /* Save the original bar */
|
|
280
|
|
- pci_read_config_dword ( pci, bar, &start );
|
|
281
|
|
- /* Compute which bits can be set */
|
|
282
|
|
- pci_write_config_dword ( pci, bar, ~0 );
|
|
283
|
|
- pci_read_config_dword ( pci, bar, &size );
|
|
284
|
|
- /* Restore the original size */
|
|
285
|
|
- pci_write_config_dword ( pci, bar, start );
|
|
286
|
|
- /* Find the significant bits */
|
|
287
|
|
- if ( start & PCI_BASE_ADDRESS_SPACE_IO ) {
|
|
288
|
|
- size &= PCI_BASE_ADDRESS_IO_MASK;
|
|
289
|
|
- } else {
|
|
290
|
|
- size &= PCI_BASE_ADDRESS_MEM_MASK;
|
|
291
|
|
- }
|
|
292
|
|
- /* Find the lowest bit set */
|
|
293
|
|
- size = size & ~( size - 1 );
|
|
294
|
|
- return size;
|
|
|
216
|
+ DBG ( "...no driver found\n" );
|
|
|
217
|
+ return -ENOTTY;
|
|
295
|
218
|
}
|
|
296
|
219
|
|
|
297
|
220
|
/**
|
|
298
|
|
- * pci_find_capability - query for devices' capabilities
|
|
299
|
|
- * @pci: PCI device to query
|
|
300
|
|
- * @cap: capability code
|
|
301
|
|
- *
|
|
302
|
|
- * Tell if a device supports a given PCI capability.
|
|
303
|
|
- * Returns the address of the requested capability structure within the
|
|
304
|
|
- * device's PCI configuration space or 0 in case the device does not
|
|
305
|
|
- * support it. Possible values for @cap:
|
|
306
|
|
- *
|
|
307
|
|
- * %PCI_CAP_ID_PM Power Management
|
|
308
|
|
- *
|
|
309
|
|
- * %PCI_CAP_ID_AGP Accelerated Graphics Port
|
|
|
221
|
+ * Unregister a PCI device
|
|
310
|
222
|
*
|
|
311
|
|
- * %PCI_CAP_ID_VPD Vital Product Data
|
|
|
223
|
+ * @v pci PCI device
|
|
312
|
224
|
*
|
|
313
|
|
- * %PCI_CAP_ID_SLOTID Slot Identification
|
|
|
225
|
+ * Calls the device's driver's remove() routine, and removes the
|
|
|
226
|
+ * device from the device hierarchy.
|
|
|
227
|
+ */
|
|
|
228
|
+static void unregister_pcidev ( struct pci_device *pci ) {
|
|
|
229
|
+ pci->driver->remove ( pci );
|
|
|
230
|
+ list_del ( &pci->dev.siblings );
|
|
|
231
|
+ DBG ( "Unregistered PCI device %02x:%02x.%x\n", pci->bus,
|
|
|
232
|
+ PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ) );
|
|
|
233
|
+}
|
|
|
234
|
+
|
|
|
235
|
+/**
|
|
|
236
|
+ * Probe PCI root bus
|
|
314
|
237
|
*
|
|
315
|
|
- * %PCI_CAP_ID_MSI Message Signalled Interrupts
|
|
|
238
|
+ * @v rootdev PCI bus root device
|
|
316
|
239
|
*
|
|
317
|
|
- * %PCI_CAP_ID_CHSWP CompactPCI HotSwap
|
|
|
240
|
+ * Scans the PCI bus for devices and registers all devices it can
|
|
|
241
|
+ * find.
|
|
318
|
242
|
*/
|
|
319
|
|
-int pci_find_capability ( struct pci_device *pci, int cap ) {
|
|
320
|
|
- uint16_t status;
|
|
321
|
|
- uint8_t pos, id;
|
|
322
|
|
- uint8_t hdr_type;
|
|
323
|
|
- int ttl = 48;
|
|
324
|
|
-
|
|
325
|
|
- pci_read_config_word ( pci, PCI_STATUS, &status );
|
|
326
|
|
- if ( ! ( status & PCI_STATUS_CAP_LIST ) )
|
|
327
|
|
- return 0;
|
|
|
243
|
+static int pcibus_probe ( struct root_device *rootdev ) {
|
|
|
244
|
+ struct pci_device *pci = NULL;
|
|
|
245
|
+ unsigned int bus;
|
|
|
246
|
+ unsigned int devfn;
|
|
|
247
|
+ uint8_t hdrtype;
|
|
|
248
|
+ uint32_t tmp;
|
|
|
249
|
+ int rc;
|
|
|
250
|
+
|
|
|
251
|
+ for ( bus = 0 ; bus <= pci_max_bus ; bus++ ) {
|
|
|
252
|
+ for ( devfn = 0 ; devfn <= 0xff ; devfn++ ) {
|
|
|
253
|
+
|
|
|
254
|
+ /* Allocate struct pci_device */
|
|
|
255
|
+ if ( ! pci )
|
|
|
256
|
+ pci = malloc ( sizeof ( *pci ) );
|
|
|
257
|
+ if ( ! pci ) {
|
|
|
258
|
+ rc = -ENOMEM;
|
|
|
259
|
+ goto err;
|
|
|
260
|
+ }
|
|
|
261
|
+ memset ( pci, 0, sizeof ( *pci ) );
|
|
|
262
|
+ pci->bus = bus;
|
|
|
263
|
+ pci->devfn = devfn;
|
|
|
264
|
+
|
|
|
265
|
+ /* Skip all but the first function on
|
|
|
266
|
+ * non-multifunction cards
|
|
|
267
|
+ */
|
|
|
268
|
+ if ( PCI_FUNC ( devfn ) == 0 ) {
|
|
|
269
|
+ pci_read_config_byte ( pci, PCI_HEADER_TYPE,
|
|
|
270
|
+ &hdrtype );
|
|
|
271
|
+ } else if ( ! ( hdrtype & 0x80 ) ) {
|
|
|
272
|
+ continue;
|
|
|
273
|
+ }
|
|
328
|
274
|
|
|
329
|
|
- pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdr_type );
|
|
330
|
|
- switch ( hdr_type & 0x7F ) {
|
|
331
|
|
- case PCI_HEADER_TYPE_NORMAL:
|
|
332
|
|
- case PCI_HEADER_TYPE_BRIDGE:
|
|
333
|
|
- default:
|
|
334
|
|
- pci_read_config_byte ( pci, PCI_CAPABILITY_LIST, &pos );
|
|
335
|
|
- break;
|
|
336
|
|
- case PCI_HEADER_TYPE_CARDBUS:
|
|
337
|
|
- pci_read_config_byte ( pci, PCI_CB_CAPABILITY_LIST, &pos );
|
|
338
|
|
- break;
|
|
339
|
|
- }
|
|
340
|
|
- while ( ttl-- && pos >= 0x40 ) {
|
|
341
|
|
- pos &= ~3;
|
|
342
|
|
- pci_read_config_byte ( pci, pos + PCI_CAP_LIST_ID, &id );
|
|
343
|
|
- DBG ( "PCI Capability: %d\n", id );
|
|
344
|
|
- if ( id == 0xff )
|
|
345
|
|
- break;
|
|
346
|
|
- if ( id == cap )
|
|
347
|
|
- return pos;
|
|
348
|
|
- pci_read_config_byte ( pci, pos + PCI_CAP_LIST_NEXT, &pos );
|
|
|
275
|
+ /* Check for physical device presence */
|
|
|
276
|
+ pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
|
|
|
277
|
+ if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
|
|
|
278
|
+ continue;
|
|
|
279
|
+
|
|
|
280
|
+ /* Populate struct pci_device */
|
|
|
281
|
+ pci->vendor = ( tmp & 0xffff );
|
|
|
282
|
+ pci->device = ( tmp >> 16 );
|
|
|
283
|
+ pci_read_config_dword ( pci, PCI_REVISION, &tmp );
|
|
|
284
|
+ pci->class = ( tmp >> 8 );
|
|
|
285
|
+ pci_read_config_byte ( pci, PCI_INTERRUPT_LINE,
|
|
|
286
|
+ &pci->irq );
|
|
|
287
|
+ pci_read_bases ( pci );
|
|
|
288
|
+ INIT_LIST_HEAD ( &pci->dev.children );
|
|
|
289
|
+ pci->dev.parent = &rootdev->dev;
|
|
|
290
|
+
|
|
|
291
|
+ /* Look for a driver */
|
|
|
292
|
+ if ( register_pcidev ( pci ) == 0 ) {
|
|
|
293
|
+ /* pcidev registered, we can drop our ref */
|
|
|
294
|
+ pci = NULL;
|
|
|
295
|
+ } else {
|
|
|
296
|
+ /* Not registered; re-use struct pci_device */
|
|
|
297
|
+ }
|
|
|
298
|
+ }
|
|
349
|
299
|
}
|
|
|
300
|
+
|
|
|
301
|
+ free ( pci );
|
|
350
|
302
|
return 0;
|
|
|
303
|
+
|
|
|
304
|
+ err:
|
|
|
305
|
+ free ( pci );
|
|
|
306
|
+ pcibus_remove ( rootdev );
|
|
|
307
|
+ return rc;
|
|
351
|
308
|
}
|
|
352
|
309
|
|
|
353
|
|
-/*
|
|
354
|
|
- * Fill in a nic structure
|
|
|
310
|
+/**
|
|
|
311
|
+ * Remove PCI root bus
|
|
355
|
312
|
*
|
|
|
313
|
+ * @v rootdev PCI bus root device
|
|
356
|
314
|
*/
|
|
357
|
|
-void pci_fill_nic ( struct nic *nic, struct pci_device *pci ) {
|
|
|
315
|
+static void pcibus_remove ( struct root_device *rootdev ) {
|
|
|
316
|
+ struct pci_device *pci;
|
|
|
317
|
+ struct pci_device *tmp;
|
|
|
318
|
+
|
|
|
319
|
+ list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
|
|
|
320
|
+ dev.siblings ) {
|
|
|
321
|
+ unregister_pcidev ( pci );
|
|
|
322
|
+ free ( pci );
|
|
|
323
|
+ }
|
|
|
324
|
+}
|
|
358
|
325
|
|
|
359
|
|
- /* Fill in ioaddr and irqno */
|
|
360
|
|
- nic->ioaddr = pci->ioaddr;
|
|
361
|
|
- nic->irqno = pci->irq;
|
|
|
326
|
+/** PCI bus root device driver */
|
|
|
327
|
+static struct root_driver pci_root_driver = {
|
|
|
328
|
+ .probe = pcibus_probe,
|
|
|
329
|
+ .remove = pcibus_remove,
|
|
|
330
|
+};
|
|
362
|
331
|
|
|
363
|
|
- /* Fill in DHCP device ID structure */
|
|
364
|
|
- nic->dhcp_dev_id.bus_type = PCI_BUS_TYPE;
|
|
365
|
|
- nic->dhcp_dev_id.vendor_id = htons ( pci->vendor_id );
|
|
366
|
|
- nic->dhcp_dev_id.device_id = htons ( pci->device_id );
|
|
367
|
|
-}
|
|
|
332
|
+/** PCI bus root device */
|
|
|
333
|
+struct root_device pci_root_device __root_device = {
|
|
|
334
|
+ .name = "PCI",
|
|
|
335
|
+ .driver = &pci_root_driver,
|
|
|
336
|
+ .dev = {
|
|
|
337
|
+ .children = LIST_HEAD_INIT ( pci_root_device.dev.children ),
|
|
|
338
|
+ },
|
|
|
339
|
+};
|