Browse Source

[pci] Add definitions for PCI Express function level reset (FLR)

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Michael Brown 9 years ago
parent
commit
ed18cd5678
2 changed files with 7 additions and 1 deletions
  1. 0
    1
      src/drivers/net/tg3/tg3.h
  2. 7
    0
      src/include/ipxe/pci.h

+ 0
- 1
src/drivers/net/tg3/tg3.h View File

52
 #define PCI_X_CMD			2       /* Modes & Features */
52
 #define PCI_X_CMD			2       /* Modes & Features */
53
 #define PCI_X_CMD_ERO			0x0002  /* Enable Relaxed Ordering */
53
 #define PCI_X_CMD_ERO			0x0002  /* Enable Relaxed Ordering */
54
 
54
 
55
-#define PCI_EXP_DEVCTL			8       /* Device Control */
56
 #define PCI_EXP_DEVCTL_RELAX_EN		0x0010 /* Enable relaxed ordering */
55
 #define PCI_EXP_DEVCTL_RELAX_EN		0x0010 /* Enable relaxed ordering */
57
 #define PCI_EXP_DEVCTL_NOSNOOP_EN	0x0800  /* Enable No Snoop */
56
 #define PCI_EXP_DEVCTL_NOSNOOP_EN	0x0800  /* Enable No Snoop */
58
 #define PCI_EXP_DEVCTL_PAYLOAD		0x00e0  /* Max_Payload_Size */
57
 #define PCI_EXP_DEVCTL_PAYLOAD		0x00e0  /* Max_Payload_Size */

+ 7
- 0
src/include/ipxe/pci.h View File

104
 #define PCI_PM_CTRL_PME_ENABLE		0x0100	/**< PME pin enable */
104
 #define PCI_PM_CTRL_PME_ENABLE		0x0100	/**< PME pin enable */
105
 #define PCI_PM_CTRL_PME_STATUS		0x8000	/**< PME pin status */
105
 #define PCI_PM_CTRL_PME_STATUS		0x8000	/**< PME pin status */
106
 
106
 
107
+/** PCI Express */
108
+#define PCI_EXP_DEVCTL		0x08
109
+#define PCI_EXP_DEVCTL_FLR		0x8000	/**< Function level reset */
110
+
107
 /** Uncorrectable error status */
111
 /** Uncorrectable error status */
108
 #define PCI_ERR_UNCOR_STATUS	0x04
112
 #define PCI_ERR_UNCOR_STATUS	0x04
109
 
113
 
128
 	( ( ( (base) & 0xff ) << 16 ) |	( ( (sub) & 0xff ) << 8 ) |	\
132
 	( ( ( (base) & 0xff ) << 16 ) |	( ( (sub) & 0xff ) << 8 ) |	\
129
 	  ( ( (progif) & 0xff) << 0 ) )
133
 	  ( ( (progif) & 0xff) << 0 ) )
130
 
134
 
135
+/** PCI Express function level reset delay (in ms) */
136
+#define PCI_EXP_FLR_DELAY_MS 100
137
+
131
 /** A PCI device ID list entry */
138
 /** A PCI device ID list entry */
132
 struct pci_device_id {
139
 struct pci_device_id {
133
 	/** Name */
140
 	/** Name */

Loading…
Cancel
Save