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[pci] Add definitions for PCI Express function level reset (FLR)

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Michael Brown hace 9 años
padre
commit
ed18cd5678
Se han modificado 2 ficheros con 7 adiciones y 1 borrados
  1. 0
    1
      src/drivers/net/tg3/tg3.h
  2. 7
    0
      src/include/ipxe/pci.h

+ 0
- 1
src/drivers/net/tg3/tg3.h Ver fichero

@@ -52,7 +52,6 @@
52 52
 #define PCI_X_CMD			2       /* Modes & Features */
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 #define PCI_X_CMD_ERO			0x0002  /* Enable Relaxed Ordering */
54 54
 
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-#define PCI_EXP_DEVCTL			8       /* Device Control */
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 #define PCI_EXP_DEVCTL_RELAX_EN		0x0010 /* Enable relaxed ordering */
57 56
 #define PCI_EXP_DEVCTL_NOSNOOP_EN	0x0800  /* Enable No Snoop */
58 57
 #define PCI_EXP_DEVCTL_PAYLOAD		0x00e0  /* Max_Payload_Size */

+ 7
- 0
src/include/ipxe/pci.h Ver fichero

@@ -104,6 +104,10 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
104 104
 #define PCI_PM_CTRL_PME_ENABLE		0x0100	/**< PME pin enable */
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 #define PCI_PM_CTRL_PME_STATUS		0x8000	/**< PME pin status */
106 106
 
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+/** PCI Express */
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+#define PCI_EXP_DEVCTL		0x08
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+#define PCI_EXP_DEVCTL_FLR		0x8000	/**< Function level reset */
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+
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 /** Uncorrectable error status */
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 #define PCI_ERR_UNCOR_STATUS	0x04
109 113
 
@@ -128,6 +132,9 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
128 132
 	( ( ( (base) & 0xff ) << 16 ) |	( ( (sub) & 0xff ) << 8 ) |	\
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 	  ( ( (progif) & 0xff) << 0 ) )
130 134
 
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+/** PCI Express function level reset delay (in ms) */
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+#define PCI_EXP_FLR_DELAY_MS 100
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+
131 138
 /** A PCI device ID list entry */
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 struct pci_device_id {
133 140
 	/** Name */

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