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rtl818x.h 9.7KB

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  1. /*
  2. * Definitions for RTL818x hardware
  3. *
  4. * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  5. * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
  6. *
  7. * Modified for iPXE, June 2009, by Joshua Oreman <oremanj@rwcr.net>
  8. *
  9. * Based on the r8187 driver, which is:
  10. * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #ifndef RTL818X_H
  17. #define RTL818X_H
  18. #include <ipxe/spi_bit.h>
  19. #include <ipxe/tables.h>
  20. #include <ipxe/net80211.h>
  21. FILE_LICENCE(GPL2_ONLY);
  22. struct rtl818x_csr {
  23. u8 MAC[6];
  24. u8 reserved_0[2];
  25. u32 MAR[2];
  26. u8 RX_FIFO_COUNT;
  27. u8 reserved_1;
  28. u8 TX_FIFO_COUNT;
  29. u8 BQREQ;
  30. u8 reserved_2[4];
  31. u32 TSFT[2];
  32. u32 TLPDA;
  33. u32 TNPDA;
  34. u32 THPDA;
  35. u16 BRSR;
  36. u8 BSSID[6];
  37. u8 RESP_RATE;
  38. u8 EIFS;
  39. u8 reserved_3[1];
  40. u8 CMD;
  41. #define RTL818X_CMD_TX_ENABLE (1 << 2)
  42. #define RTL818X_CMD_RX_ENABLE (1 << 3)
  43. #define RTL818X_CMD_RESET (1 << 4)
  44. u8 reserved_4[4];
  45. u16 INT_MASK;
  46. u16 INT_STATUS;
  47. #define RTL818X_INT_RX_OK (1 << 0)
  48. #define RTL818X_INT_RX_ERR (1 << 1)
  49. #define RTL818X_INT_TXL_OK (1 << 2)
  50. #define RTL818X_INT_TXL_ERR (1 << 3)
  51. #define RTL818X_INT_RX_DU (1 << 4)
  52. #define RTL818X_INT_RX_FO (1 << 5)
  53. #define RTL818X_INT_TXN_OK (1 << 6)
  54. #define RTL818X_INT_TXN_ERR (1 << 7)
  55. #define RTL818X_INT_TXH_OK (1 << 8)
  56. #define RTL818X_INT_TXH_ERR (1 << 9)
  57. #define RTL818X_INT_TXB_OK (1 << 10)
  58. #define RTL818X_INT_TXB_ERR (1 << 11)
  59. #define RTL818X_INT_ATIM (1 << 12)
  60. #define RTL818X_INT_BEACON (1 << 13)
  61. #define RTL818X_INT_TIME_OUT (1 << 14)
  62. #define RTL818X_INT_TX_FO (1 << 15)
  63. u32 TX_CONF;
  64. #define RTL818X_TX_CONF_LOOPBACK_MAC (1 << 17)
  65. #define RTL818X_TX_CONF_LOOPBACK_CONT (3 << 17)
  66. #define RTL818X_TX_CONF_NO_ICV (1 << 19)
  67. #define RTL818X_TX_CONF_DISCW (1 << 20)
  68. #define RTL818X_TX_CONF_SAT_HWPLCP (1 << 24)
  69. #define RTL818X_TX_CONF_R8180_ABCD (2 << 25)
  70. #define RTL818X_TX_CONF_R8180_F (3 << 25)
  71. #define RTL818X_TX_CONF_R8185_ABC (4 << 25)
  72. #define RTL818X_TX_CONF_R8185_D (5 << 25)
  73. #define RTL818X_TX_CONF_R8187vD (5 << 25)
  74. #define RTL818X_TX_CONF_R8187vD_B (6 << 25)
  75. #define RTL818X_TX_CONF_HWVER_MASK (7 << 25)
  76. #define RTL818X_TX_CONF_DISREQQSIZE (1 << 28)
  77. #define RTL818X_TX_CONF_PROBE_DTS (1 << 29)
  78. #define RTL818X_TX_CONF_HW_SEQNUM (1 << 30)
  79. #define RTL818X_TX_CONF_CW_MIN (1 << 31)
  80. u32 RX_CONF;
  81. #define RTL818X_RX_CONF_MONITOR (1 << 0)
  82. #define RTL818X_RX_CONF_NICMAC (1 << 1)
  83. #define RTL818X_RX_CONF_MULTICAST (1 << 2)
  84. #define RTL818X_RX_CONF_BROADCAST (1 << 3)
  85. #define RTL818X_RX_CONF_FCS (1 << 5)
  86. #define RTL818X_RX_CONF_DATA (1 << 18)
  87. #define RTL818X_RX_CONF_CTRL (1 << 19)
  88. #define RTL818X_RX_CONF_MGMT (1 << 20)
  89. #define RTL818X_RX_CONF_ADDR3 (1 << 21)
  90. #define RTL818X_RX_CONF_PM (1 << 22)
  91. #define RTL818X_RX_CONF_BSSID (1 << 23)
  92. #define RTL818X_RX_CONF_RX_AUTORESETPHY (1 << 28)
  93. #define RTL818X_RX_CONF_CSDM1 (1 << 29)
  94. #define RTL818X_RX_CONF_CSDM2 (1 << 30)
  95. #define RTL818X_RX_CONF_ONLYERLPKT (1 << 31)
  96. u32 INT_TIMEOUT;
  97. u32 TBDA;
  98. u8 EEPROM_CMD;
  99. #define RTL818X_EEPROM_CMD_READ (1 << 0)
  100. #define RTL818X_EEPROM_CMD_WRITE (1 << 1)
  101. #define RTL818X_EEPROM_CMD_CK (1 << 2)
  102. #define RTL818X_EEPROM_CMD_CS (1 << 3)
  103. #define RTL818X_EEPROM_CMD_NORMAL (0 << 6)
  104. #define RTL818X_EEPROM_CMD_LOAD (1 << 6)
  105. #define RTL818X_EEPROM_CMD_PROGRAM (2 << 6)
  106. #define RTL818X_EEPROM_CMD_CONFIG (3 << 6)
  107. u8 CONFIG0;
  108. u8 CONFIG1;
  109. u8 CONFIG2;
  110. #define RTL818X_CONFIG2_ANTENNA_DIV (1 << 6)
  111. u32 ANAPARAM;
  112. u8 MSR;
  113. #define RTL818X_MSR_NO_LINK (0 << 2)
  114. #define RTL818X_MSR_ADHOC (1 << 2)
  115. #define RTL818X_MSR_INFRA (2 << 2)
  116. #define RTL818X_MSR_MASTER (3 << 2)
  117. #define RTL818X_MSR_ENEDCA (4 << 2)
  118. u8 CONFIG3;
  119. #define RTL818X_CONFIG3_ANAPARAM_WRITE (1 << 6)
  120. #define RTL818X_CONFIG3_GNT_SELECT (1 << 7)
  121. u8 CONFIG4;
  122. #define RTL818X_CONFIG4_POWEROFF (1 << 6)
  123. #define RTL818X_CONFIG4_VCOOFF (1 << 7)
  124. u8 TESTR;
  125. u8 reserved_9[2];
  126. u8 PGSELECT;
  127. u8 SECURITY;
  128. u32 ANAPARAM2;
  129. u8 reserved_10[12];
  130. u16 BEACON_INTERVAL;
  131. u16 ATIM_WND;
  132. u16 BEACON_INTERVAL_TIME;
  133. u16 ATIMTR_INTERVAL;
  134. u8 PHY_DELAY;
  135. u8 CARRIER_SENSE_COUNTER;
  136. u8 reserved_11[2];
  137. u8 PHY[4];
  138. u16 RFPinsOutput;
  139. u16 RFPinsEnable;
  140. u16 RFPinsSelect;
  141. u16 RFPinsInput;
  142. u32 RF_PARA;
  143. u32 RF_TIMING;
  144. u8 GP_ENABLE;
  145. u8 GPIO;
  146. u8 reserved_12[2];
  147. u32 HSSI_PARA;
  148. u8 reserved_13[4];
  149. u8 TX_AGC_CTL;
  150. #define RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT (1 << 0)
  151. #define RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT (1 << 1)
  152. #define RTL818X_TX_AGC_CTL_FEEDBACK_ANT (1 << 2)
  153. u8 TX_GAIN_CCK;
  154. u8 TX_GAIN_OFDM;
  155. u8 TX_ANTENNA;
  156. u8 reserved_14[16];
  157. u8 WPA_CONF;
  158. u8 reserved_15[3];
  159. u8 SIFS;
  160. u8 DIFS;
  161. u8 SLOT;
  162. u8 reserved_16[5];
  163. u8 CW_CONF;
  164. #define RTL818X_CW_CONF_PERPACKET_CW_SHIFT (1 << 0)
  165. #define RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT (1 << 1)
  166. u8 CW_VAL;
  167. u8 RATE_FALLBACK;
  168. #define RTL818X_RATE_FALLBACK_ENABLE (1 << 7)
  169. u8 ACM_CONTROL;
  170. u8 reserved_17[24];
  171. u8 CONFIG5;
  172. u8 TX_DMA_POLLING;
  173. u8 reserved_18[2];
  174. u16 CWR;
  175. u8 RETRY_CTR;
  176. u8 reserved_19[3];
  177. u16 INT_MIG;
  178. /* RTL818X_R8187B_*: magic numbers from ioregisters */
  179. #define RTL818X_R8187B_B 0
  180. #define RTL818X_R8187B_D 1
  181. #define RTL818X_R8187B_E 2
  182. u32 RDSAR;
  183. u16 TID_AC_MAP;
  184. u8 reserved_20[4];
  185. u8 ANAPARAM3;
  186. u8 reserved_21[5];
  187. u16 FEMR;
  188. u8 reserved_22[4];
  189. u16 TALLY_CNT;
  190. u8 TALLY_SEL;
  191. } __attribute__((packed));
  192. #define MAX_RX_SIZE IEEE80211_MAX_FRAME_LEN
  193. #define RF_PARAM_ANALOGPHY (1 << 0)
  194. #define RF_PARAM_ANTBDEFAULT (1 << 1)
  195. #define RF_PARAM_CARRIERSENSE1 (1 << 2)
  196. #define RF_PARAM_CARRIERSENSE2 (1 << 3)
  197. #define BB_ANTATTEN_CHAN14 0x0C
  198. #define BB_ANTENNA_B 0x40
  199. #define BB_HOST_BANG (1 << 30)
  200. #define BB_HOST_BANG_EN (1 << 2)
  201. #define BB_HOST_BANG_CLK (1 << 1)
  202. #define BB_HOST_BANG_DATA 1
  203. #define ANAPARAM_TXDACOFF_SHIFT 27
  204. #define ANAPARAM_PWR0_SHIFT 28
  205. #define ANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT)
  206. #define ANAPARAM_PWR1_SHIFT 20
  207. #define ANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT)
  208. #define RTL818X_RX_RING_SIZE 8 /* doesn't have to be a power of 2 */
  209. #define RTL818X_TX_RING_SIZE 8 /* nor this [but 2^n is very slightly faster] */
  210. #define RTL818X_RING_ALIGN 256
  211. #define RTL818X_MAX_RETRIES 4
  212. enum rtl818x_tx_desc_flags {
  213. RTL818X_TX_DESC_FLAG_NO_ENC = (1 << 15),
  214. RTL818X_TX_DESC_FLAG_TX_OK = (1 << 15),
  215. RTL818X_TX_DESC_FLAG_SPLCP = (1 << 16),
  216. RTL818X_TX_DESC_FLAG_RX_UNDER = (1 << 16),
  217. RTL818X_TX_DESC_FLAG_MOREFRAG = (1 << 17),
  218. RTL818X_TX_DESC_FLAG_CTS = (1 << 18),
  219. RTL818X_TX_DESC_FLAG_RTS = (1 << 23),
  220. RTL818X_TX_DESC_FLAG_LS = (1 << 28),
  221. RTL818X_TX_DESC_FLAG_FS = (1 << 29),
  222. RTL818X_TX_DESC_FLAG_DMA = (1 << 30),
  223. RTL818X_TX_DESC_FLAG_OWN = (1 << 31)
  224. };
  225. struct rtl818x_tx_desc {
  226. u32 flags;
  227. u16 rts_duration;
  228. u16 plcp_len;
  229. u32 tx_buf;
  230. u32 frame_len;
  231. u32 next_tx_desc;
  232. u8 cw;
  233. u8 retry_limit;
  234. u8 agc;
  235. u8 flags2;
  236. u32 reserved[2];
  237. } __attribute__ ((packed));
  238. enum rtl818x_rx_desc_flags {
  239. RTL818X_RX_DESC_FLAG_ICV_ERR = (1 << 12),
  240. RTL818X_RX_DESC_FLAG_CRC32_ERR = (1 << 13),
  241. RTL818X_RX_DESC_FLAG_PM = (1 << 14),
  242. RTL818X_RX_DESC_FLAG_RX_ERR = (1 << 15),
  243. RTL818X_RX_DESC_FLAG_BCAST = (1 << 16),
  244. RTL818X_RX_DESC_FLAG_PAM = (1 << 17),
  245. RTL818X_RX_DESC_FLAG_MCAST = (1 << 18),
  246. RTL818X_RX_DESC_FLAG_QOS = (1 << 19), /* RTL8187(B) only */
  247. RTL818X_RX_DESC_FLAG_TRSW = (1 << 24), /* RTL8187(B) only */
  248. RTL818X_RX_DESC_FLAG_SPLCP = (1 << 25),
  249. RTL818X_RX_DESC_FLAG_FOF = (1 << 26),
  250. RTL818X_RX_DESC_FLAG_DMA_FAIL = (1 << 27),
  251. RTL818X_RX_DESC_FLAG_LS = (1 << 28),
  252. RTL818X_RX_DESC_FLAG_FS = (1 << 29),
  253. RTL818X_RX_DESC_FLAG_EOR = (1 << 30),
  254. RTL818X_RX_DESC_FLAG_OWN = (1 << 31)
  255. };
  256. struct rtl818x_rx_desc {
  257. u32 flags;
  258. u32 flags2;
  259. union {
  260. u32 rx_buf;
  261. u64 tsft;
  262. };
  263. } __attribute__ ((packed));
  264. struct rtl818x_priv {
  265. struct rtl818x_csr *map;
  266. const struct rtl818x_rf_ops *rf;
  267. int rf_flag; /* whatever RF driver wishes to use it for */
  268. int hw_rate;
  269. int hw_rtscts_rate;
  270. struct spi_bit_basher spibit;
  271. struct spi_device eeprom;
  272. struct rtl818x_rx_desc *rx_ring;
  273. u32 rx_ring_dma;
  274. unsigned int rx_idx; /* next desc to be filled by card */
  275. struct io_buffer *rx_buf[RTL818X_RX_RING_SIZE];
  276. struct rtl818x_tx_desc *tx_ring;
  277. u32 tx_ring_dma;
  278. unsigned int tx_cons; /* next desc to be filled by card */
  279. unsigned int tx_prod; /* next desc to be filled by driver */
  280. struct io_buffer *tx_buf[RTL818X_TX_RING_SIZE];
  281. struct pci_device *pdev;
  282. u32 rx_conf;
  283. u16 txpower[14];
  284. int r8185;
  285. u32 anaparam;
  286. u16 rfparam;
  287. u8 csthreshold;
  288. };
  289. void rtl818x_write_phy(struct net80211_device *dev, u8 addr, u32 data);
  290. void rtl818x_set_anaparam(struct rtl818x_priv *priv, u32 anaparam);
  291. static inline u8 rtl818x_ioread8(struct rtl818x_priv *priv __unused, u8 *addr)
  292. {
  293. return inb(addr);
  294. }
  295. static inline u16 rtl818x_ioread16(struct rtl818x_priv *priv __unused, u16 *addr)
  296. {
  297. return inw(addr);
  298. }
  299. static inline u32 rtl818x_ioread32(struct rtl818x_priv *priv __unused, u32 *addr)
  300. {
  301. return inl(addr);
  302. }
  303. static inline void rtl818x_iowrite8(struct rtl818x_priv *priv __unused,
  304. u8 *addr, u8 val)
  305. {
  306. outb(val, addr);
  307. }
  308. static inline void rtl818x_iowrite16(struct rtl818x_priv *priv __unused,
  309. u16 *addr, u16 val)
  310. {
  311. outw(val, addr);
  312. }
  313. static inline void rtl818x_iowrite32(struct rtl818x_priv *priv __unused,
  314. u32 *addr, u32 val)
  315. {
  316. outl(val, addr);
  317. }
  318. #define RTL818X_RF_DRIVERS __table(struct rtl818x_rf_ops, "rtl818x_rf_drivers")
  319. #define __rtl818x_rf_driver __table_entry(RTL818X_RF_DRIVERS, 01)
  320. struct rtl818x_rf_ops {
  321. char *name;
  322. u8 id; /* as identified in EEPROM */
  323. void (*init)(struct net80211_device *dev);
  324. void (*stop)(struct net80211_device *dev);
  325. void (*set_chan)(struct net80211_device *dev, struct net80211_channel *chan);
  326. void (*conf_erp)(struct net80211_device *dev); /* set based on dev->erp_flags */
  327. };
  328. extern int rtl818x_probe(struct pci_device *pdev );
  329. extern void rtl818x_remove(struct pci_device *pdev);
  330. #endif /* RTL818X_H */