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exanic.c 23KB

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  1. /*
  2. * Copyright (C) 2017 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of the
  7. * License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17. * 02110-1301, USA.
  18. *
  19. * You can also choose to distribute this program under the terms of
  20. * the Unmodified Binary Distribution Licence (as given in the file
  21. * COPYING.UBDL), provided that you have satisfied its requirements.
  22. */
  23. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  24. #include <stdint.h>
  25. #include <string.h>
  26. #include <strings.h>
  27. #include <unistd.h>
  28. #include <errno.h>
  29. #include <byteswap.h>
  30. #include <ipxe/netdevice.h>
  31. #include <ipxe/ethernet.h>
  32. #include <ipxe/if_ether.h>
  33. #include <ipxe/iobuf.h>
  34. #include <ipxe/malloc.h>
  35. #include <ipxe/umalloc.h>
  36. #include <ipxe/pci.h>
  37. #include "exanic.h"
  38. /** @file
  39. *
  40. * Exablaze ExaNIC driver
  41. *
  42. */
  43. /* Disambiguate the various error causes */
  44. #define EIO_ABORTED __einfo_error ( EINFO_EIO_ABORTED )
  45. #define EINFO_EIO_ABORTED \
  46. __einfo_uniqify ( EINFO_EIO, 0x01, "Frame aborted" )
  47. #define EIO_CORRUPT __einfo_error ( EINFO_EIO_CORRUPT )
  48. #define EINFO_EIO_CORRUPT \
  49. __einfo_uniqify ( EINFO_EIO, 0x02, "CRC incorrect" )
  50. #define EIO_HWOVFL __einfo_error ( EINFO_EIO_HWOVFL )
  51. #define EINFO_EIO_HWOVFL \
  52. __einfo_uniqify ( EINFO_EIO, 0x03, "Hardware overflow" )
  53. #define EIO_STATUS( status ) \
  54. EUNIQ ( EINFO_EIO, ( (status) & EXANIC_STATUS_ERROR_MASK ), \
  55. EIO_ABORTED, EIO_CORRUPT, EIO_HWOVFL )
  56. /**
  57. * Write DMA base address register
  58. *
  59. * @v addr DMA base address
  60. * @v reg Register
  61. */
  62. static void exanic_write_base ( physaddr_t addr, void *reg ) {
  63. uint32_t lo;
  64. uint32_t hi;
  65. /* Write high and low registers, setting flags as appropriate */
  66. lo = addr;
  67. if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
  68. /* 64-bit build; may be a 32-bit or 64-bit address */
  69. hi = ( ( ( uint64_t ) addr ) >> 32 );
  70. if ( ! hi )
  71. lo |= EXANIC_DMA_32_BIT;
  72. } else {
  73. /* 32-bit build; always a 32-bit address */
  74. hi = 0;
  75. lo |= EXANIC_DMA_32_BIT;
  76. }
  77. writel ( hi, ( reg + 0 ) );
  78. writel ( lo, ( reg + 4 ) );
  79. }
  80. /**
  81. * Clear DMA base address register
  82. *
  83. * @v reg Register
  84. */
  85. static inline void exanic_clear_base ( void *reg ) {
  86. /* Clear both high and low registers */
  87. writel ( 0, ( reg + 0 ) );
  88. writel ( 0, ( reg + 4 ) );
  89. }
  90. /******************************************************************************
  91. *
  92. * Device reset
  93. *
  94. ******************************************************************************
  95. */
  96. /**
  97. * Reset hardware
  98. *
  99. * @v exanic ExaNIC device
  100. */
  101. static void exanic_reset ( struct exanic *exanic ) {
  102. void *port_regs;
  103. unsigned int i;
  104. /* Disable all possible ports */
  105. for ( i = 0 ; i < EXANIC_MAX_PORTS ; i++ ) {
  106. port_regs = ( exanic->regs + EXANIC_PORT_REGS ( i ) );
  107. writel ( 0, ( port_regs + EXANIC_PORT_ENABLE ) );
  108. writel ( 0, ( port_regs + EXANIC_PORT_IRQ ) );
  109. exanic_clear_base ( port_regs + EXANIC_PORT_RX_BASE );
  110. }
  111. /* Disable transmit feedback */
  112. exanic_clear_base ( exanic->regs + EXANIC_TXF_BASE );
  113. }
  114. /******************************************************************************
  115. *
  116. * MAC address
  117. *
  118. ******************************************************************************
  119. */
  120. /**
  121. * Read I2C line status
  122. *
  123. * @v basher Bit-bashing interface
  124. * @v bit_id Bit number
  125. * @ret zero Input is a logic 0
  126. * @ret non-zero Input is a logic 1
  127. */
  128. static int exanic_i2c_read_bit ( struct bit_basher *basher,
  129. unsigned int bit_id ) {
  130. struct exanic *exanic =
  131. container_of ( basher, struct exanic, basher.basher );
  132. unsigned int shift;
  133. uint32_t i2c;
  134. /* Identify bit */
  135. assert ( bit_id == I2C_BIT_SDA );
  136. shift = exanic->i2cfg.getsda;
  137. /* Read I2C register */
  138. DBG_DISABLE ( DBGLVL_IO );
  139. i2c = readl ( exanic->regs + EXANIC_I2C );
  140. DBG_ENABLE ( DBGLVL_IO );
  141. return ( ( i2c >> shift ) & 1 );
  142. }
  143. /**
  144. * Write I2C line status
  145. *
  146. * @v basher Bit-bashing interface
  147. * @v bit_id Bit number
  148. * @v data Value to write
  149. */
  150. static void exanic_i2c_write_bit ( struct bit_basher *basher,
  151. unsigned int bit_id, unsigned long data ) {
  152. struct exanic *exanic =
  153. container_of ( basher, struct exanic, basher.basher );
  154. unsigned int shift;
  155. uint32_t mask;
  156. uint32_t i2c;
  157. /* Identify shift */
  158. assert ( ( bit_id == I2C_BIT_SCL ) || ( bit_id == I2C_BIT_SDA ) );
  159. shift = ( ( bit_id == I2C_BIT_SCL ) ?
  160. exanic->i2cfg.setscl : exanic->i2cfg.setsda );
  161. mask = ( 1UL << shift );
  162. /* Modify I2C register */
  163. DBG_DISABLE ( DBGLVL_IO );
  164. i2c = readl ( exanic->regs + EXANIC_I2C );
  165. i2c &= ~mask;
  166. if ( ! data )
  167. i2c |= mask;
  168. writel ( i2c, ( exanic->regs + EXANIC_I2C ) );
  169. DBG_ENABLE ( DBGLVL_IO );
  170. }
  171. /** I2C bit-bashing interface operations */
  172. static struct bit_basher_operations exanic_i2c_basher_ops = {
  173. .read = exanic_i2c_read_bit,
  174. .write = exanic_i2c_write_bit,
  175. };
  176. /** Possible I2C bus configurations */
  177. static struct exanic_i2c_config exanic_i2cfgs[] = {
  178. /* X2/X10 */
  179. { .setscl = 7, .setsda = 4, .getsda = 12 },
  180. /* X4 */
  181. { .setscl = 7, .setsda = 5, .getsda = 13 },
  182. };
  183. /**
  184. * Initialise EEPROM
  185. *
  186. * @v exanic ExaNIC device
  187. * @v i2cfg I2C bus configuration
  188. * @ret rc Return status code
  189. */
  190. static int exanic_try_init_eeprom ( struct exanic *exanic,
  191. struct exanic_i2c_config *i2cfg ) {
  192. int rc;
  193. /* Configure I2C bus */
  194. memcpy ( &exanic->i2cfg, i2cfg, sizeof ( exanic->i2cfg ) );
  195. /* Initialise I2C bus */
  196. if ( ( rc = init_i2c_bit_basher ( &exanic->basher,
  197. &exanic_i2c_basher_ops ) ) != 0 ) {
  198. DBGC2 ( exanic, "EXANIC %p found no I2C bus via %d/%d/%d\n",
  199. exanic, exanic->i2cfg.setscl,
  200. exanic->i2cfg.setsda, exanic->i2cfg.getsda );
  201. return rc;
  202. }
  203. /* Check for EEPROM presence */
  204. init_i2c_eeprom ( &exanic->eeprom, EXANIC_EEPROM_ADDRESS );
  205. if ( ( rc = i2c_check_presence ( &exanic->basher.i2c,
  206. &exanic->eeprom ) ) != 0 ) {
  207. DBGC2 ( exanic, "EXANIC %p found no EEPROM via %d/%d/%d\n",
  208. exanic, exanic->i2cfg.setscl,
  209. exanic->i2cfg.setsda, exanic->i2cfg.getsda );
  210. return rc;
  211. }
  212. DBGC ( exanic, "EXANIC %p found EEPROM via %d/%d/%d\n",
  213. exanic, exanic->i2cfg.setscl,
  214. exanic->i2cfg.setsda, exanic->i2cfg.getsda );
  215. return 0;
  216. }
  217. /**
  218. * Initialise EEPROM
  219. *
  220. * @v exanic ExaNIC device
  221. * @ret rc Return status code
  222. */
  223. static int exanic_init_eeprom ( struct exanic *exanic ) {
  224. struct exanic_i2c_config *i2cfg;
  225. unsigned int i;
  226. int rc;
  227. /* Try all possible bus configurations */
  228. for ( i = 0 ; i < ( sizeof ( exanic_i2cfgs ) /
  229. sizeof ( exanic_i2cfgs[0] ) ) ; i++ ) {
  230. i2cfg = &exanic_i2cfgs[i];
  231. if ( ( rc = exanic_try_init_eeprom ( exanic, i2cfg ) ) == 0 )
  232. return 0;
  233. }
  234. DBGC ( exanic, "EXANIC %p found no EEPROM\n", exanic );
  235. return -ENODEV;
  236. }
  237. /**
  238. * Fetch base MAC address
  239. *
  240. * @v exanic ExaNIC device
  241. * @ret rc Return status code
  242. */
  243. static int exanic_fetch_mac ( struct exanic *exanic ) {
  244. struct i2c_interface *i2c = &exanic->basher.i2c;
  245. int rc;
  246. /* Initialise EEPROM */
  247. if ( ( rc = exanic_init_eeprom ( exanic ) ) != 0 )
  248. return rc;
  249. /* Fetch base MAC address */
  250. if ( ( rc = i2c->read ( i2c, &exanic->eeprom, 0, exanic->mac,
  251. sizeof ( exanic->mac ) ) ) != 0 ) {
  252. DBGC ( exanic, "EXANIC %p could not read MAC address: %s\n",
  253. exanic, strerror ( rc ) );
  254. return rc;
  255. }
  256. return 0;
  257. }
  258. /******************************************************************************
  259. *
  260. * Link state
  261. *
  262. ******************************************************************************
  263. */
  264. /**
  265. * Check link state
  266. *
  267. * @v netdev Network device
  268. */
  269. static void exanic_check_link ( struct net_device *netdev ) {
  270. struct exanic_port *port = netdev->priv;
  271. uint32_t status;
  272. uint32_t speed;
  273. /* Report port status changes */
  274. status = readl ( port->regs + EXANIC_PORT_STATUS );
  275. speed = readl ( port->regs + EXANIC_PORT_SPEED );
  276. if ( status != port->status ) {
  277. DBGC ( port, "EXANIC %s port status %#08x speed %dMbps\n",
  278. netdev->name, status, speed );
  279. if ( status & EXANIC_PORT_STATUS_LINK ) {
  280. netdev_link_up ( netdev );
  281. } else {
  282. netdev_link_down ( netdev );
  283. }
  284. port->status = status;
  285. }
  286. }
  287. /**
  288. * Check link state periodically
  289. *
  290. * @v retry Link state check timer
  291. * @v over Failure indicator
  292. */
  293. static void exanic_expired ( struct retry_timer *timer, int over __unused ) {
  294. struct exanic_port *port =
  295. container_of ( timer, struct exanic_port, timer );
  296. struct net_device *netdev = port->netdev;
  297. static const uint32_t speeds[] = {
  298. 100, 1000, 10000, 40000, 100000,
  299. };
  300. unsigned int index;
  301. /* Restart timer */
  302. start_timer_fixed ( timer, EXANIC_LINK_INTERVAL );
  303. /* Check link state */
  304. exanic_check_link ( netdev );
  305. /* Do nothing further if link is already up */
  306. if ( netdev_link_ok ( netdev ) )
  307. return;
  308. /* Do nothing further unless we have a valid list of supported speeds */
  309. if ( ! port->speeds )
  310. return;
  311. /* Autonegotiation is not supported; try manually selecting
  312. * the next supported link speed.
  313. */
  314. do {
  315. if ( ! port->speed )
  316. port->speed = ( 8 * sizeof ( port->speeds ) );
  317. port->speed--;
  318. } while ( ! ( ( 1UL << port->speed ) & port->speeds ) );
  319. index = ( port->speed - ( ffs ( EXANIC_CAPS_SPEED_MASK ) - 1 ) );
  320. assert ( index < ( sizeof ( speeds ) / sizeof ( speeds[0] ) ) );
  321. /* Attempt the selected speed */
  322. DBGC ( netdev, "EXANIC %s attempting %dMbps\n",
  323. netdev->name, speeds[index] );
  324. writel ( speeds[index], ( port->regs + EXANIC_PORT_SPEED ) );
  325. }
  326. /******************************************************************************
  327. *
  328. * Network device interface
  329. *
  330. ******************************************************************************
  331. */
  332. /**
  333. * Open network device
  334. *
  335. * @v netdev Network device
  336. * @ret rc Return status code
  337. */
  338. static int exanic_open ( struct net_device *netdev ) {
  339. struct exanic_port *port = netdev->priv;
  340. struct exanic_tx_chunk *tx;
  341. unsigned int i;
  342. /* Reset transmit region contents */
  343. for ( i = 0 ; i < port->tx_count ; i++ ) {
  344. tx = ( port->tx + ( i * sizeof ( *tx ) ) );
  345. writew ( port->txf_slot, &tx->desc.txf_slot );
  346. writeb ( EXANIC_TYPE_RAW, &tx->desc.type );
  347. writeb ( 0, &tx->desc.flags );
  348. writew ( 0, &tx->pad );
  349. }
  350. /* Reset receive region contents */
  351. memset_user ( port->rx, 0, 0xff, EXANIC_RX_LEN );
  352. /* Reset transmit feedback region */
  353. *(port->txf) = 0;
  354. /* Reset counters */
  355. port->tx_prod = 0;
  356. port->tx_cons = 0;
  357. port->rx_cons = 0;
  358. /* Map receive region */
  359. exanic_write_base ( phys_to_bus ( user_to_phys ( port->rx, 0 ) ),
  360. ( port->regs + EXANIC_PORT_RX_BASE ) );
  361. /* Enable promiscuous mode */
  362. writel ( EXANIC_PORT_FLAGS_PROMISC,
  363. ( port->regs + EXANIC_PORT_FLAGS ) );
  364. /* Reset to default speed and clear cached status */
  365. writel ( port->default_speed, ( port->regs + EXANIC_PORT_SPEED ) );
  366. port->speed = 0;
  367. port->status = 0;
  368. /* Enable port */
  369. wmb();
  370. writel ( EXANIC_PORT_ENABLE_ENABLED,
  371. ( port->regs + EXANIC_PORT_ENABLE ) );
  372. /* Start link state timer */
  373. start_timer_fixed ( &port->timer, EXANIC_LINK_INTERVAL );
  374. return 0;
  375. }
  376. /**
  377. * Close network device
  378. *
  379. * @v netdev Network device
  380. */
  381. static void exanic_close ( struct net_device *netdev ) {
  382. struct exanic_port *port = netdev->priv;
  383. /* Stop link state timer */
  384. stop_timer ( &port->timer );
  385. /* Disable port */
  386. writel ( 0, ( port->regs + EXANIC_PORT_ENABLE ) );
  387. wmb();
  388. /* Clear receive region */
  389. exanic_clear_base ( port->regs + EXANIC_PORT_RX_BASE );
  390. /* Discard any in-progress receive */
  391. if ( port->rx_iobuf ) {
  392. netdev_rx_err ( netdev, port->rx_iobuf, -ECANCELED );
  393. port->rx_iobuf = NULL;
  394. }
  395. }
  396. /**
  397. * Transmit packet
  398. *
  399. * @v netdev Network device
  400. * @v iobuf I/O buffer
  401. * @ret rc Return status code
  402. */
  403. static int exanic_transmit ( struct net_device *netdev,
  404. struct io_buffer *iobuf ) {
  405. struct exanic_port *port = netdev->priv;
  406. struct exanic_tx_chunk *tx;
  407. unsigned int tx_fill;
  408. unsigned int tx_index;
  409. size_t offset;
  410. size_t len;
  411. uint8_t *src;
  412. uint8_t *dst;
  413. /* Sanity check */
  414. len = iob_len ( iobuf );
  415. if ( len > sizeof ( tx->data ) ) {
  416. DBGC ( port, "EXANIC %s transmit too large\n", netdev->name );
  417. return -ENOTSUP;
  418. }
  419. /* Get next transmit descriptor */
  420. tx_fill = ( port->tx_prod - port->tx_cons );
  421. if ( tx_fill >= port->tx_count ) {
  422. DBGC ( port, "EXANIC %s out of transmit descriptors\n",
  423. netdev->name );
  424. return -ENOBUFS;
  425. }
  426. tx_index = ( port->tx_prod & ( port->tx_count - 1 ) );
  427. offset = ( tx_index * sizeof ( *tx ) );
  428. tx = ( port->tx + offset );
  429. DBGC2 ( port, "EXANIC %s TX %04x at [%05zx,%05zx)\n",
  430. netdev->name, port->tx_prod, ( port->tx_offset + offset ),
  431. ( port->tx_offset + offset +
  432. offsetof ( typeof ( *tx ), data ) + len ) );
  433. port->tx_prod++;
  434. /* Populate transmit descriptor */
  435. writew ( port->tx_prod, &tx->desc.txf_id );
  436. writew ( ( sizeof ( tx->pad ) + len ), &tx->desc.len );
  437. /* Copy data to transmit region. There is no DMA on the
  438. * transmit data path.
  439. */
  440. src = iobuf->data;
  441. dst = tx->data;
  442. while ( len-- )
  443. writeb ( *(src++), dst++ );
  444. /* Send transmit command */
  445. wmb();
  446. writel ( ( port->tx_offset + offset ),
  447. ( port->regs + EXANIC_PORT_TX_COMMAND ) );
  448. return 0;
  449. }
  450. /**
  451. * Poll for completed packets
  452. *
  453. * @v netdev Network device
  454. */
  455. static void exanic_poll_tx ( struct net_device *netdev ) {
  456. struct exanic_port *port = netdev->priv;
  457. /* Report any completed packets */
  458. while ( port->tx_cons != *(port->txf) ) {
  459. DBGC2 ( port, "EXANIC %s TX %04x complete\n",
  460. netdev->name, port->tx_cons );
  461. netdev_tx_complete_next ( netdev );
  462. port->tx_cons++;
  463. }
  464. }
  465. /**
  466. * Poll for received packets
  467. *
  468. * @v netdev Network device
  469. */
  470. static void exanic_poll_rx ( struct net_device *netdev ) {
  471. struct exanic_port *port = netdev->priv;
  472. struct exanic_rx_chunk *rx;
  473. struct exanic_rx_descriptor desc;
  474. uint8_t current;
  475. uint8_t previous;
  476. size_t offset;
  477. size_t len;
  478. for ( ; ; port->rx_cons++ ) {
  479. /* Fetch descriptor */
  480. offset = ( ( port->rx_cons * sizeof ( *rx ) ) % EXANIC_RX_LEN );
  481. copy_from_user ( &desc, port->rx,
  482. ( offset + offsetof ( typeof ( *rx ), desc ) ),
  483. sizeof ( desc ) );
  484. /* Calculate generation */
  485. current = ( port->rx_cons / ( EXANIC_RX_LEN / sizeof ( *rx ) ));
  486. previous = ( current - 1 );
  487. /* Do nothing if no chunk is ready */
  488. if ( desc.generation == previous )
  489. break;
  490. /* Allocate I/O buffer if needed */
  491. if ( ! port->rx_iobuf ) {
  492. port->rx_iobuf = alloc_iob ( EXANIC_MAX_RX_LEN );
  493. if ( ! port->rx_iobuf ) {
  494. /* Wait for next poll */
  495. break;
  496. }
  497. port->rx_rc = 0;
  498. }
  499. /* Calculate chunk length */
  500. len = ( desc.len ? desc.len : sizeof ( rx->data ) );
  501. /* Append data to I/O buffer */
  502. if ( len <= iob_tailroom ( port->rx_iobuf ) ) {
  503. copy_from_user ( iob_put ( port->rx_iobuf, len ),
  504. port->rx,
  505. ( offset + offsetof ( typeof ( *rx ),
  506. data ) ), len );
  507. } else {
  508. DBGC ( port, "EXANIC %s RX too large\n",
  509. netdev->name );
  510. port->rx_rc = -ERANGE;
  511. }
  512. /* Check for overrun */
  513. rmb();
  514. copy_from_user ( &desc.generation, port->rx,
  515. ( offset + offsetof ( typeof ( *rx ),
  516. desc.generation ) ),
  517. sizeof ( desc.generation ) );
  518. if ( desc.generation != current ) {
  519. DBGC ( port, "EXANIC %s RX overrun\n", netdev->name );
  520. port->rx_rc = -ENOBUFS;
  521. continue;
  522. }
  523. /* Wait for end of packet */
  524. if ( ! desc.len )
  525. continue;
  526. /* Check for receive errors */
  527. if ( desc.status & EXANIC_STATUS_ERROR_MASK ) {
  528. port->rx_rc = -EIO_STATUS ( desc.status );
  529. DBGC ( port, "EXANIC %s RX %04x error: %s\n",
  530. netdev->name, port->rx_cons,
  531. strerror ( port->rx_rc ) );
  532. } else {
  533. DBGC2 ( port, "EXANIC %s RX %04x\n",
  534. netdev->name, port->rx_cons );
  535. }
  536. /* Hand off to network stack */
  537. if ( port->rx_rc ) {
  538. netdev_rx_err ( netdev, port->rx_iobuf, port->rx_rc );
  539. } else {
  540. iob_unput ( port->rx_iobuf, 4 /* strip CRC */ );
  541. netdev_rx ( netdev, port->rx_iobuf );
  542. }
  543. port->rx_iobuf = NULL;
  544. }
  545. }
  546. /**
  547. * Poll for completed and received packets
  548. *
  549. * @v netdev Network device
  550. */
  551. static void exanic_poll ( struct net_device *netdev ) {
  552. /* Poll for completed packets */
  553. exanic_poll_tx ( netdev );
  554. /* Poll for received packets */
  555. exanic_poll_rx ( netdev );
  556. }
  557. /** ExaNIC network device operations */
  558. static struct net_device_operations exanic_operations = {
  559. .open = exanic_open,
  560. .close = exanic_close,
  561. .transmit = exanic_transmit,
  562. .poll = exanic_poll,
  563. };
  564. /******************************************************************************
  565. *
  566. * PCI interface
  567. *
  568. ******************************************************************************
  569. */
  570. /**
  571. * Probe port
  572. *
  573. * @v exanic ExaNIC device
  574. * @v dev Parent device
  575. * @v index Port number
  576. * @ret rc Return status code
  577. */
  578. static int exanic_probe_port ( struct exanic *exanic, struct device *dev,
  579. unsigned int index ) {
  580. struct net_device *netdev;
  581. struct exanic_port *port;
  582. void *port_regs;
  583. uint32_t status;
  584. size_t tx_len;
  585. int rc;
  586. /* Do nothing if port is not physically present */
  587. port_regs = ( exanic->regs + EXANIC_PORT_REGS ( index ) );
  588. status = readl ( port_regs + EXANIC_PORT_STATUS );
  589. tx_len = readl ( port_regs + EXANIC_PORT_TX_LEN );
  590. if ( ( status & EXANIC_PORT_STATUS_ABSENT ) || ( tx_len == 0 ) ) {
  591. rc = 0;
  592. goto absent;
  593. }
  594. /* Allocate network device */
  595. netdev = alloc_etherdev ( sizeof ( *port ) );
  596. if ( ! netdev ) {
  597. rc = -ENOMEM;
  598. goto err_alloc_netdev;
  599. }
  600. netdev_init ( netdev, &exanic_operations );
  601. netdev->dev = dev;
  602. port = netdev->priv;
  603. memset ( port, 0, sizeof ( *port ) );
  604. exanic->port[index] = port;
  605. port->netdev = netdev;
  606. port->regs = port_regs;
  607. timer_init ( &port->timer, exanic_expired, &netdev->refcnt );
  608. /* Identify transmit region */
  609. port->tx_offset = readl ( port->regs + EXANIC_PORT_TX_OFFSET );
  610. if ( tx_len > EXANIC_MAX_TX_LEN )
  611. tx_len = EXANIC_MAX_TX_LEN;
  612. assert ( ! ( tx_len & ( tx_len - 1 ) ) );
  613. port->tx = ( exanic->tx + port->tx_offset );
  614. port->tx_count = ( tx_len / sizeof ( struct exanic_tx_chunk ) );
  615. /* Identify transmit feedback region */
  616. port->txf_slot = EXANIC_TXF_SLOT ( index );
  617. port->txf = ( exanic->txf +
  618. ( port->txf_slot * sizeof ( *(port->txf) ) ) );
  619. /* Allocate receive region (via umalloc()) */
  620. port->rx = umalloc ( EXANIC_RX_LEN );
  621. if ( ! port->rx ) {
  622. rc = -ENOMEM;
  623. goto err_alloc_rx;
  624. }
  625. /* Set MAC address */
  626. memcpy ( netdev->hw_addr, exanic->mac, ETH_ALEN );
  627. netdev->hw_addr[ ETH_ALEN - 1 ] += index;
  628. /* Record default link speed and supported speeds */
  629. port->default_speed = readl ( port->regs + EXANIC_PORT_SPEED );
  630. port->speeds = ( exanic->caps & EXANIC_CAPS_SPEED_MASK );
  631. /* Register network device */
  632. if ( ( rc = register_netdev ( netdev ) ) != 0 )
  633. goto err_register_netdev;
  634. DBGC ( port, "EXANIC %s port %d TX [%#05zx,%#05zx) TXF %#02x RX "
  635. "[%#lx,%#lx)\n", netdev->name, index, port->tx_offset,
  636. ( port->tx_offset + tx_len ), port->txf_slot,
  637. user_to_phys ( port->rx, 0 ),
  638. user_to_phys ( port->rx, EXANIC_RX_LEN ) );
  639. /* Set initial link state */
  640. exanic_check_link ( netdev );
  641. return 0;
  642. unregister_netdev ( netdev );
  643. err_register_netdev:
  644. ufree ( port->rx );
  645. err_alloc_rx:
  646. netdev_nullify ( netdev );
  647. netdev_put ( netdev );
  648. err_alloc_netdev:
  649. absent:
  650. return rc;
  651. }
  652. /**
  653. * Probe port
  654. *
  655. * @v exanic ExaNIC device
  656. * @v index Port number
  657. */
  658. static void exanic_remove_port ( struct exanic *exanic, unsigned int index ) {
  659. struct exanic_port *port;
  660. /* Do nothing if port is not physically present */
  661. port = exanic->port[index];
  662. if ( ! port )
  663. return;
  664. /* Unregister network device */
  665. unregister_netdev ( port->netdev );
  666. /* Free receive region */
  667. ufree ( port->rx );
  668. /* Free network device */
  669. netdev_nullify ( port->netdev );
  670. netdev_put ( port->netdev );
  671. }
  672. /**
  673. * Probe PCI device
  674. *
  675. * @v pci PCI device
  676. * @ret rc Return status code
  677. */
  678. static int exanic_probe ( struct pci_device *pci ) {
  679. struct exanic *exanic;
  680. unsigned long regs_bar_start;
  681. unsigned long tx_bar_start;
  682. size_t tx_bar_len;
  683. int i;
  684. int rc;
  685. /* Allocate and initialise structure */
  686. exanic = zalloc ( sizeof ( *exanic ) );
  687. if ( ! exanic ) {
  688. rc = -ENOMEM;
  689. goto err_alloc;
  690. }
  691. pci_set_drvdata ( pci, exanic );
  692. /* Fix up PCI device */
  693. adjust_pci_device ( pci );
  694. /* Map registers */
  695. regs_bar_start = pci_bar_start ( pci, EXANIC_REGS_BAR );
  696. exanic->regs = ioremap ( regs_bar_start, EXANIC_REGS_LEN );
  697. if ( ! exanic->regs ) {
  698. rc = -ENODEV;
  699. goto err_ioremap_regs;
  700. }
  701. /* Reset device */
  702. exanic_reset ( exanic );
  703. /* Read capabilities */
  704. exanic->caps = readl ( exanic->regs + EXANIC_CAPS );
  705. /* Power up PHYs */
  706. writel ( EXANIC_POWER_ON, ( exanic->regs + EXANIC_POWER ) );
  707. /* Fetch base MAC address */
  708. if ( ( rc = exanic_fetch_mac ( exanic ) ) != 0 )
  709. goto err_fetch_mac;
  710. DBGC ( exanic, "EXANIC %p capabilities %#08x base MAC %s\n",
  711. exanic, exanic->caps, eth_ntoa ( exanic->mac ) );
  712. /* Map transmit region */
  713. tx_bar_start = pci_bar_start ( pci, EXANIC_TX_BAR );
  714. tx_bar_len = pci_bar_size ( pci, EXANIC_TX_BAR );
  715. exanic->tx = ioremap ( tx_bar_start, tx_bar_len );
  716. if ( ! exanic->tx ) {
  717. rc = -ENODEV;
  718. goto err_ioremap_tx;
  719. }
  720. /* Allocate transmit feedback region (shared between all ports) */
  721. exanic->txf = malloc_dma ( EXANIC_TXF_LEN, EXANIC_ALIGN );
  722. if ( ! exanic->txf ) {
  723. rc = -ENOMEM;
  724. goto err_alloc_txf;
  725. }
  726. memset ( exanic->txf, 0, EXANIC_TXF_LEN );
  727. exanic_write_base ( virt_to_bus ( exanic->txf ),
  728. ( exanic->regs + EXANIC_TXF_BASE ) );
  729. /* Allocate and initialise per-port network devices */
  730. for ( i = 0 ; i < EXANIC_MAX_PORTS ; i++ ) {
  731. if ( ( rc = exanic_probe_port ( exanic, &pci->dev, i ) ) != 0 )
  732. goto err_probe_port;
  733. }
  734. return 0;
  735. i = EXANIC_MAX_PORTS;
  736. err_probe_port:
  737. for ( i-- ; i >= 0 ; i-- )
  738. exanic_remove_port ( exanic, i );
  739. exanic_reset ( exanic );
  740. free_dma ( exanic->txf, EXANIC_TXF_LEN );
  741. err_alloc_txf:
  742. iounmap ( exanic->tx );
  743. err_ioremap_tx:
  744. iounmap ( exanic->regs );
  745. err_fetch_mac:
  746. err_ioremap_regs:
  747. free ( exanic );
  748. err_alloc:
  749. return rc;
  750. }
  751. /**
  752. * Remove PCI device
  753. *
  754. * @v pci PCI device
  755. */
  756. static void exanic_remove ( struct pci_device *pci ) {
  757. struct exanic *exanic = pci_get_drvdata ( pci );
  758. unsigned int i;
  759. /* Remove all ports */
  760. for ( i = 0 ; i < EXANIC_MAX_PORTS ; i++ )
  761. exanic_remove_port ( exanic, i );
  762. /* Reset device */
  763. exanic_reset ( exanic );
  764. /* Free transmit feedback region */
  765. free_dma ( exanic->txf, EXANIC_TXF_LEN );
  766. /* Unmap transmit region */
  767. iounmap ( exanic->tx );
  768. /* Unmap registers */
  769. iounmap ( exanic->regs );
  770. /* Free device */
  771. free ( exanic );
  772. }
  773. /** ExaNIC PCI device IDs */
  774. static struct pci_device_id exanic_ids[] = {
  775. PCI_ROM ( 0x10ee, 0x2b00, "exanic-old", "ExaNIC (old)", 0 ),
  776. PCI_ROM ( 0x1ce4, 0x0001, "exanic-x4", "ExaNIC X4", 0 ),
  777. PCI_ROM ( 0x1ce4, 0x0002, "exanic-x2", "ExaNIC X2", 0 ),
  778. PCI_ROM ( 0x1ce4, 0x0003, "exanic-x10", "ExaNIC X10", 0 ),
  779. PCI_ROM ( 0x1ce4, 0x0004, "exanic-x10gm", "ExaNIC X10 GM", 0 ),
  780. PCI_ROM ( 0x1ce4, 0x0005, "exanic-x40", "ExaNIC X40", 0 ),
  781. PCI_ROM ( 0x1ce4, 0x0006, "exanic-x10hpt", "ExaNIC X10 HPT", 0 ),
  782. PCI_ROM ( 0x1ce4, 0x0007, "exanic-x40g", "ExaNIC X40", 0 ),
  783. };
  784. /** ExaNIC PCI driver */
  785. struct pci_driver exanic_driver __pci_driver = {
  786. .ids = exanic_ids,
  787. .id_count = ( sizeof ( exanic_ids ) / sizeof ( exanic_ids[0] ) ),
  788. .probe = exanic_probe,
  789. .remove = exanic_remove,
  790. };