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[tg3] Fix various tg3 issues

Modified-by: Michael Brown <mcb30@ipxe.org>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Kevin Tran 11 years ago
parent
commit
e27803e40f
2 changed files with 15 additions and 1 deletions
  1. 6
    0
      src/drivers/net/tg3/tg3.h
  2. 9
    1
      src/drivers/net/tg3/tg3_hw.c

+ 6
- 0
src/drivers/net/tg3/tg3.h View File

@@ -298,6 +298,7 @@
298 298
 #define   ASIC_REV_57780		 0x57780
299 299
 #define   ASIC_REV_5717			 0x5717
300 300
 #define   ASIC_REV_57765		 0x57785
301
+#define   ASIC_REV_57766		 0x57766
301 302
 #define   ASIC_REV_5719			 0x5719
302 303
 #define   ASIC_REV_5720			 0x5720
303 304
 #define  GET_CHIP_REV(CHIP_REV_ID)	((CHIP_REV_ID) >> 8)
@@ -1215,6 +1216,8 @@
1215 1216
 #define TG3_CPMU_LNK_AWARE_PWRMD	0x00003610
1216 1217
 #define  CPMU_LNK_AWARE_MACCLK_MASK	 0x001f0000
1217 1218
 #define  CPMU_LNK_AWARE_MACCLK_6_25	 0x00130000
1219
+
1220
+#define TG3_CPMU_D0_CLCK_POLICY		0x00003614
1218 1221
 /* 0x3614 --> 0x361c unused */
1219 1222
 
1220 1223
 #define TG3_CPMU_HST_ACC		0x0000361c
@@ -1225,6 +1228,9 @@
1225 1228
 #define TG3_CPMU_CLCK_ORIDE		0x00003624
1226 1229
 #define  CPMU_CLCK_ORIDE_MAC_ORIDE_EN	 0x80000000
1227 1230
 
1231
+#define TG3_CPMU_CLCK_ORIDE_EN		0x00003628
1232
+#define  CPMU_CLCK_ORIDE_MAC_CLCK_ORIDE_EN	 0x00002000
1233
+
1228 1234
 #define TG3_CPMU_CLCK_STAT		0x00003630
1229 1235
 #define  CPMU_CLCK_STAT_MAC_CLCK_MASK	 0x001f0000
1230 1236
 #define  CPMU_CLCK_STAT_MAC_CLCK_62_5	 0x00000000

+ 9
- 1
src/drivers/net/tg3/tg3_hw.c View File

@@ -322,7 +322,7 @@ static void tg3_get_eeprom_hw_cfg(struct tg3 *tp)
322 322
 		}
323 323
 
324 324
 		if ((nic_cfg & NIC_SRAM_DATA_CFG_APE_ENABLE) &&
325
-		    tg3_flag(tp, 5750_PLUS))
325
+		    tg3_flag(tp, ENABLE_ASF))
326 326
 			tg3_flag_set(tp, ENABLE_APE);
327 327
 
328 328
 		if (cfg2 & (1 << 17))
@@ -466,6 +466,7 @@ int tg3_get_invariants(struct tg3 *tp)
466 466
 		tg3_flag_set(tp, 5717_PLUS);
467 467
 
468 468
 	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765 ||
469
+	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57766 ||
469 470
 	    tg3_flag(tp, 5717_PLUS))
470 471
 		tg3_flag_set(tp, 57765_PLUS);
471 472
 
@@ -1465,6 +1466,13 @@ static int tg3_chip_reset(struct tg3 *tp)
1465 1466
 		tw32(TG3_CPMU_CLCK_ORIDE, val & ~CPMU_CLCK_ORIDE_MAC_ORIDE_EN);
1466 1467
 	}
1467 1468
 
1469
+	if (tg3_flag(tp, CPMU_PRESENT)) {
1470
+		tw32(TG3_CPMU_D0_CLCK_POLICY, 0);
1471
+		val = tr32(TG3_CPMU_CLCK_ORIDE_EN);
1472
+		tw32(TG3_CPMU_CLCK_ORIDE_EN,
1473
+		     val | CPMU_CLCK_ORIDE_MAC_CLCK_ORIDE_EN);
1474
+	}
1475
+
1468 1476
 	return 0;
1469 1477
 }
1470 1478
 

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