|  | @@ -1096,7 +1096,6 @@ static int intelxl_disable_ring ( struct intelxl_nic *intelxl,
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			| 1096 | 1096 |   */
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			| 1097 | 1097 |  static int intelxl_create_ring ( struct intelxl_nic *intelxl,
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			| 1098 | 1098 |  				 struct intelxl_ring *ring ) {
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			| 1099 |  | -	void *ring_regs = ( intelxl->regs + ring->reg );
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			| 1100 | 1099 |  	physaddr_t address;
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			| 1101 | 1100 |  	int rc;
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			| 1102 | 1101 |  
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			|  | @@ -1111,7 +1110,7 @@ static int intelxl_create_ring ( struct intelxl_nic *intelxl,
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			| 1111 | 1110 |  	memset ( ring->desc.raw, 0, ring->len );
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			| 1112 | 1111 |  
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			| 1113 | 1112 |  	/* Reset tail pointer */
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			| 1114 |  | -	writel ( 0, ( ring_regs + INTELXL_QXX_TAIL ) );
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			|  | 1113 | +	writel ( 0, ( intelxl->regs + ring->tail ) );
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			| 1115 | 1114 |  
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			| 1116 | 1115 |  	/* Program queue context */
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			| 1117 | 1116 |  	address = virt_to_bus ( ring->desc.raw );
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			|  | @@ -1127,7 +1126,8 @@ static int intelxl_create_ring ( struct intelxl_nic *intelxl,
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			| 1127 | 1126 |  	ring->cons = 0;
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			| 1128 | 1127 |  
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			| 1129 | 1128 |  	DBGC ( intelxl, "INTELXL %p ring %06x is at [%08llx,%08llx)\n",
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			| 1130 |  | -	       intelxl, ring->reg, ( ( unsigned long long ) address ),
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			|  | 1129 | +	       intelxl, ( ring->reg + ring->tail ),
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			|  | 1130 | +	       ( ( unsigned long long ) address ),
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			| 1131 | 1131 |  	       ( ( unsigned long long ) address + ring->len ) );
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			| 1132 | 1132 |  
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			| 1133 | 1133 |  	return 0;
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			|  | @@ -1207,8 +1207,7 @@ static void intelxl_refill_rx ( struct intelxl_nic *intelxl ) {
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			| 1207 | 1207 |  	if ( refilled ) {
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			| 1208 | 1208 |  		wmb();
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			| 1209 | 1209 |  		rx_tail = ( intelxl->rx.prod % INTELXL_RX_NUM_DESC );
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			| 1210 |  | -		writel ( rx_tail,
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			| 1211 |  | -			 ( intelxl->regs + intelxl->rx.reg + INTELXL_QXX_TAIL));
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			|  | 1210 | +		writel ( rx_tail, ( intelxl->regs + intelxl->rx.tail ) );
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			| 1212 | 1211 |  	}
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			| 1213 | 1212 |  }
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			| 1214 | 1213 |  
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			|  | @@ -1363,8 +1362,7 @@ static int intelxl_transmit ( struct net_device *netdev,
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			| 1363 | 1362 |  	wmb();
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			| 1364 | 1363 |  
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			| 1365 | 1364 |  	/* Notify card that there are packets ready to transmit */
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			| 1366 |  | -	writel ( tx_tail,
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			| 1367 |  | -		 ( intelxl->regs + intelxl->tx.reg + INTELXL_QXX_TAIL ) );
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			|  | 1365 | +	writel ( tx_tail, ( intelxl->regs + intelxl->tx.tail ) );
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			| 1368 | 1366 |  
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			| 1369 | 1367 |  	DBGC2 ( intelxl, "INTELXL %p TX %d is [%llx,%llx)\n", intelxl, tx_idx,
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			| 1370 | 1368 |  		( ( unsigned long long ) address ),
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			|  | @@ -1595,7 +1593,9 @@ static int intelxl_probe ( struct pci_device *pci ) {
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			| 1595 | 1593 |  
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			| 1596 | 1594 |  	/* Configure queue register addresses */
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			| 1597 | 1595 |  	intelxl->tx.reg = INTELXL_QTX ( intelxl->queue );
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			|  | 1596 | +	intelxl->tx.tail = ( intelxl->tx.reg + INTELXL_QXX_TAIL );
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			| 1598 | 1597 |  	intelxl->rx.reg = INTELXL_QRX ( intelxl->queue );
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			|  | 1598 | +	intelxl->rx.tail = ( intelxl->rx.reg + INTELXL_QXX_TAIL );
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			| 1599 | 1599 |  
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			| 1600 | 1600 |  	/* Configure interrupt causes */
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			| 1601 | 1601 |  	writel ( ( INTELXL_QINT_TQCTL_NEXTQ_INDX_NONE |
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