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@@ -146,7 +146,7 @@ struct qib7322 {
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146
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146
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* @v offset Register offset
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147
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147
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*/
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148
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148
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static void qib7322_readq ( struct qib7322 *qib7322, uint32_t *dwords,
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149
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- unsigned long offset ) {
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149
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+ unsigned long offset ) {
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150
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150
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void *addr = ( qib7322->regs + offset );
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151
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152
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152
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__asm__ __volatile__ ( "movq (%1), %%mm0\n\t"
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@@ -173,7 +173,7 @@ static void qib7322_readq ( struct qib7322 *qib7322, uint32_t *dwords,
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173
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173
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* @v offset Register offset
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174
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174
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*/
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175
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175
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static void qib7322_writeq ( struct qib7322 *qib7322, const uint32_t *dwords,
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176
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- unsigned long offset ) {
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176
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+ unsigned long offset ) {
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177
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177
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void *addr = ( qib7322->regs + offset );
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178
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179
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179
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DBGIO ( "[%08lx] <= %08x%08x\n",
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@@ -200,7 +200,7 @@ static void qib7322_writeq ( struct qib7322 *qib7322, const uint32_t *dwords,
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200
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200
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* @v offset Register offset
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201
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201
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*/
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202
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202
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static void qib7322_writel ( struct qib7322 *qib7322, uint32_t dword,
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203
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- unsigned long offset ) {
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203
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+ unsigned long offset ) {
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204
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204
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writel ( dword, ( qib7322->regs + offset ) );
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205
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205
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}
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206
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@@ -248,7 +248,7 @@ static void qib7322_link_state_changed ( struct ib_device *ibdev ) {
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248
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248
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249
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249
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/* Read link state */
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250
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250
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qib7322_readq_port ( qib7322, &ibcstatusa,
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251
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- QIB_7322_IBCStatusA_0_offset, port );
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251
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+ QIB_7322_IBCStatusA_0_offset, port );
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252
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252
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link_training_state = BIT_GET ( &ibcstatusa, LinkTrainingState );
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253
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253
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link_state = BIT_GET ( &ibcstatusa, LinkState );
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254
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254
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link_width = BIT_GET ( &ibcstatusa, LinkWidthActive );
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@@ -290,7 +290,7 @@ static void qib7322_link_state_changed ( struct ib_device *ibdev ) {
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290
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290
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* @ret rc Return status code
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291
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291
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*/
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292
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292
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static int qib7322_link_state_check ( struct ib_device *ibdev,
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293
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- unsigned int new_link_state ) {
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293
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+ unsigned int new_link_state ) {
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294
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294
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struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
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295
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295
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struct QIB_7322_IBCStatusA_0 ibcstatusa;
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296
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296
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unsigned int port = ( ibdev->port - QIB7322_PORT_BASE );
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@@ -299,7 +299,7 @@ static int qib7322_link_state_check ( struct ib_device *ibdev,
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299
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299
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300
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300
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for ( i = 0 ; i < QIB7322_LINK_STATE_MAX_WAIT_US ; i++ ) {
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301
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301
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qib7322_readq_port ( qib7322, &ibcstatusa,
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302
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- QIB_7322_IBCStatusA_0_offset, port );
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302
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+ QIB_7322_IBCStatusA_0_offset, port );
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303
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303
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link_state = BIT_GET ( &ibcstatusa, LinkState );
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304
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304
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if ( link_state == new_link_state )
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305
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305
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return 0;
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@@ -318,7 +318,7 @@ static int qib7322_link_state_check ( struct ib_device *ibdev,
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318
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318
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* @v mad Set port information MAD
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319
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319
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*/
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320
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320
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static int qib7322_set_port_info ( struct ib_device *ibdev,
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321
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- union ib_mad *mad ) {
|
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321
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+ union ib_mad *mad ) {
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322
|
322
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struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
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323
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323
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struct ib_port_info *port_info = &mad->smp.smp_data.port_info;
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324
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324
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struct QIB_7322_IBCCtrlA_0 ibcctrla;
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@@ -334,10 +334,10 @@ static int qib7322_set_port_info ( struct ib_device *ibdev,
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334
|
334
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qib7322, qib7322_link_state_text ( link_state ),
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335
|
335
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link_state );
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336
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336
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qib7322_readq_port ( qib7322, &ibcctrla,
|
337
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- QIB_7322_IBCCtrlA_0_offset, port );
|
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337
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+ QIB_7322_IBCCtrlA_0_offset, port );
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338
|
338
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BIT_SET ( &ibcctrla, LinkCmd, link_state );
|
339
|
339
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qib7322_writeq_port ( qib7322, &ibcctrla,
|
340
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- QIB_7322_IBCCtrlA_0_offset, port );
|
|
340
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+ QIB_7322_IBCCtrlA_0_offset, port );
|
341
|
341
|
|
342
|
342
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/* Wait for link state change to take effect. Ignore
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343
|
343
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* errors; the current link state will be returned via
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@@ -359,7 +359,7 @@ static int qib7322_set_port_info ( struct ib_device *ibdev,
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359
|
359
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* @v mad Set partition key table MAD
|
360
|
360
|
*/
|
361
|
361
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static int qib7322_set_pkey_table ( struct ib_device *ibdev __unused,
|
362
|
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- union ib_mad *mad __unused ) {
|
|
362
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+ union ib_mad *mad __unused ) {
|
363
|
363
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/* Nothing to do */
|
364
|
364
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return 0;
|
365
|
365
|
}
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@@ -379,7 +379,7 @@ static int qib7322_set_pkey_table ( struct ib_device *ibdev __unused,
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379
|
379
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* @ret rc Return status code
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380
|
380
|
*/
|
381
|
381
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static int qib7322_alloc_ctx ( struct ib_device *ibdev,
|
382
|
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- struct ib_queue_pair *qp ) {
|
|
382
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+ struct ib_queue_pair *qp ) {
|
383
|
383
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struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
384
|
384
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unsigned int port = ( ibdev->port - QIB7322_PORT_BASE );
|
385
|
385
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unsigned int ctx;
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@@ -408,7 +408,7 @@ static int qib7322_alloc_ctx ( struct ib_device *ibdev,
|
408
|
408
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* @ret ctx Context index
|
409
|
409
|
*/
|
410
|
410
|
static unsigned int qib7322_ctx ( struct ib_device *ibdev,
|
411
|
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- struct ib_queue_pair *qp ) {
|
|
411
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+ struct ib_queue_pair *qp ) {
|
412
|
412
|
return ( qp->qpn + ( ibdev->port - QIB7322_PORT_BASE ) );
|
413
|
413
|
}
|
414
|
414
|
|
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@@ -419,7 +419,7 @@ static unsigned int qib7322_ctx ( struct ib_device *ibdev,
|
419
|
419
|
* @v ctx Context index
|
420
|
420
|
*/
|
421
|
421
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static void qib7322_free_ctx ( struct ib_device *ibdev,
|
422
|
|
- struct ib_queue_pair *qp ) {
|
|
422
|
+ struct ib_queue_pair *qp ) {
|
423
|
423
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
424
|
424
|
unsigned int port = ( ibdev->port - QIB7322_PORT_BASE );
|
425
|
425
|
unsigned int ctx = qib7322_ctx ( ibdev, qp );
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|
@@ -456,8 +456,8 @@ static void qib7322_free_ctx ( struct ib_device *ibdev,
|
456
|
456
|
*/
|
457
|
457
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static struct qib7322_send_buffers *
|
458
|
458
|
qib7322_create_send_bufs ( struct qib7322 *qib7322, unsigned long base,
|
459
|
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- unsigned int size, unsigned int start,
|
460
|
|
- unsigned int count ) {
|
|
459
|
+ unsigned int size, unsigned int start,
|
|
460
|
+ unsigned int count ) {
|
461
|
461
|
struct qib7322_send_buffers *send_bufs;
|
462
|
462
|
unsigned int i;
|
463
|
463
|
|
|
@@ -488,8 +488,9 @@ qib7322_create_send_bufs ( struct qib7322 *qib7322, unsigned long base,
|
488
|
488
|
* @v qib7322 QIB7322 device
|
489
|
489
|
* @v send_bufs Send buffer set
|
490
|
490
|
*/
|
491
|
|
-static void qib7322_destroy_send_bufs ( struct qib7322 *qib7322 __unused,
|
492
|
|
- struct qib7322_send_buffers *send_bufs ){
|
|
491
|
+static void
|
|
492
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+qib7322_destroy_send_bufs ( struct qib7322 *qib7322 __unused,
|
|
493
|
+ struct qib7322_send_buffers *send_bufs ) {
|
493
|
494
|
free ( send_bufs );
|
494
|
495
|
}
|
495
|
496
|
|
|
@@ -501,7 +502,7 @@ static void qib7322_destroy_send_bufs ( struct qib7322 *qib7322 __unused,
|
501
|
502
|
* @ret send_buf Send buffer, or negative error
|
502
|
503
|
*/
|
503
|
504
|
static int qib7322_alloc_send_buf ( struct qib7322 *qib7322,
|
504
|
|
- struct qib7322_send_buffers *send_bufs ) {
|
|
505
|
+ struct qib7322_send_buffers *send_bufs ) {
|
505
|
506
|
unsigned int used;
|
506
|
507
|
unsigned int mask;
|
507
|
508
|
unsigned int send_buf;
|
|
@@ -527,8 +528,8 @@ static int qib7322_alloc_send_buf ( struct qib7322 *qib7322,
|
527
|
528
|
* @v send_buf Send buffer
|
528
|
529
|
*/
|
529
|
530
|
static void qib7322_free_send_buf ( struct qib7322 *qib7322 __unused,
|
530
|
|
- struct qib7322_send_buffers *send_bufs,
|
531
|
|
- unsigned int send_buf ) {
|
|
531
|
+ struct qib7322_send_buffers *send_bufs,
|
|
532
|
+ unsigned int send_buf ) {
|
532
|
533
|
unsigned int mask;
|
533
|
534
|
|
534
|
535
|
mask = ( send_bufs->count - 1 );
|
|
@@ -543,7 +544,7 @@ static void qib7322_free_send_buf ( struct qib7322 *qib7322 __unused,
|
543
|
544
|
* @ret in_use Send buffer is in use
|
544
|
545
|
*/
|
545
|
546
|
static int qib7322_send_buf_in_use ( struct qib7322 *qib7322,
|
546
|
|
- unsigned int send_buf ) {
|
|
547
|
+ unsigned int send_buf ) {
|
547
|
548
|
unsigned int send_idx;
|
548
|
549
|
unsigned int send_check;
|
549
|
550
|
unsigned int inusecheck;
|
|
@@ -567,8 +568,8 @@ static int qib7322_send_buf_in_use ( struct qib7322 *qib7322,
|
567
|
568
|
*/
|
568
|
569
|
static unsigned long
|
569
|
570
|
qib7322_send_buffer_offset ( struct qib7322 *qib7322 __unused,
|
570
|
|
- struct qib7322_send_buffers *send_bufs,
|
571
|
|
- unsigned int send_buf ) {
|
|
571
|
+ struct qib7322_send_buffers *send_bufs,
|
|
572
|
+ unsigned int send_buf ) {
|
572
|
573
|
unsigned int index;
|
573
|
574
|
|
574
|
575
|
index = ( ( send_buf & ~QIB7322_SEND_BUF_TOGGLE ) - send_bufs->start );
|
|
@@ -582,7 +583,7 @@ qib7322_send_buffer_offset ( struct qib7322 *qib7322 __unused,
|
582
|
583
|
* @v qp Queue pair
|
583
|
584
|
*/
|
584
|
585
|
static int qib7322_create_send_wq ( struct ib_device *ibdev,
|
585
|
|
- struct ib_queue_pair *qp ) {
|
|
586
|
+ struct ib_queue_pair *qp ) {
|
586
|
587
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
587
|
588
|
struct ib_work_queue *wq = &qp->send;
|
588
|
589
|
struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
|
@@ -601,7 +602,7 @@ static int qib7322_create_send_wq ( struct ib_device *ibdev,
|
601
|
602
|
|
602
|
603
|
/* Allocate space for send buffer usage list */
|
603
|
604
|
qib7322_wq->used = zalloc ( qp->send.num_wqes *
|
604
|
|
- sizeof ( qib7322_wq->used[0] ) );
|
|
605
|
+ sizeof ( qib7322_wq->used[0] ) );
|
605
|
606
|
if ( ! qib7322_wq->used )
|
606
|
607
|
return -ENOMEM;
|
607
|
608
|
|
|
@@ -619,7 +620,7 @@ static int qib7322_create_send_wq ( struct ib_device *ibdev,
|
619
|
620
|
* @v qp Queue pair
|
620
|
621
|
*/
|
621
|
622
|
static void qib7322_destroy_send_wq ( struct ib_device *ibdev __unused,
|
622
|
|
- struct ib_queue_pair *qp ) {
|
|
623
|
+ struct ib_queue_pair *qp ) {
|
623
|
624
|
struct ib_work_queue *wq = &qp->send;
|
624
|
625
|
struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
625
|
626
|
|
|
@@ -654,27 +655,27 @@ static int qib7322_init_send ( struct qib7322 *qib7322 ) {
|
654
|
655
|
QIB7322_VL15_PORT0_SEND_BUF_SIZE );
|
655
|
656
|
qib7322->send_bufs_small =
|
656
|
657
|
qib7322_create_send_bufs ( qib7322, baseaddr_smallpio,
|
657
|
|
- QIB7322_SMALL_SEND_BUF_SIZE,
|
658
|
|
- QIB7322_SMALL_SEND_BUF_START,
|
659
|
|
- QIB7322_SMALL_SEND_BUF_USED );
|
|
658
|
+ QIB7322_SMALL_SEND_BUF_SIZE,
|
|
659
|
+ QIB7322_SMALL_SEND_BUF_START,
|
|
660
|
+ QIB7322_SMALL_SEND_BUF_USED );
|
660
|
661
|
if ( ! qib7322->send_bufs_small ) {
|
661
|
662
|
rc = -ENOMEM;
|
662
|
663
|
goto err_create_send_bufs_small;
|
663
|
664
|
}
|
664
|
665
|
qib7322->send_bufs_vl15_port0 =
|
665
|
666
|
qib7322_create_send_bufs ( qib7322, baseaddr_vl15_port0,
|
666
|
|
- QIB7322_VL15_PORT0_SEND_BUF_SIZE,
|
667
|
|
- QIB7322_VL15_PORT0_SEND_BUF_START,
|
668
|
|
- QIB7322_VL15_PORT0_SEND_BUF_COUNT );
|
|
667
|
+ QIB7322_VL15_PORT0_SEND_BUF_SIZE,
|
|
668
|
+ QIB7322_VL15_PORT0_SEND_BUF_START,
|
|
669
|
+ QIB7322_VL15_PORT0_SEND_BUF_COUNT );
|
669
|
670
|
if ( ! qib7322->send_bufs_vl15_port0 ) {
|
670
|
671
|
rc = -ENOMEM;
|
671
|
672
|
goto err_create_send_bufs_vl15_port0;
|
672
|
673
|
}
|
673
|
674
|
qib7322->send_bufs_vl15_port1 =
|
674
|
675
|
qib7322_create_send_bufs ( qib7322, baseaddr_vl15_port1,
|
675
|
|
- QIB7322_VL15_PORT1_SEND_BUF_SIZE,
|
676
|
|
- QIB7322_VL15_PORT1_SEND_BUF_START,
|
677
|
|
- QIB7322_VL15_PORT1_SEND_BUF_COUNT );
|
|
676
|
+ QIB7322_VL15_PORT1_SEND_BUF_SIZE,
|
|
677
|
+ QIB7322_VL15_PORT1_SEND_BUF_START,
|
|
678
|
+ QIB7322_VL15_PORT1_SEND_BUF_COUNT );
|
678
|
679
|
if ( ! qib7322->send_bufs_vl15_port1 ) {
|
679
|
680
|
rc = -ENOMEM;
|
680
|
681
|
goto err_create_send_bufs_vl15_port1;
|
|
@@ -682,7 +683,7 @@ static int qib7322_init_send ( struct qib7322 *qib7322 ) {
|
682
|
683
|
|
683
|
684
|
/* Allocate space for the SendBufAvail array */
|
684
|
685
|
qib7322->sendbufavail = malloc_dma ( sizeof ( *qib7322->sendbufavail ),
|
685
|
|
- QIB7322_SENDBUFAVAIL_ALIGN );
|
|
686
|
+ QIB7322_SENDBUFAVAIL_ALIGN );
|
686
|
687
|
if ( ! qib7322->sendbufavail ) {
|
687
|
688
|
rc = -ENOMEM;
|
688
|
689
|
goto err_alloc_sendbufavail;
|
|
@@ -694,7 +695,7 @@ static int qib7322_init_send ( struct qib7322 *qib7322 ) {
|
694
|
695
|
BIT_FILL_1 ( &sendbufavailaddr, SendBufAvailAddr,
|
695
|
696
|
( virt_to_bus ( qib7322->sendbufavail ) >> 6 ) );
|
696
|
697
|
qib7322_writeq ( qib7322, &sendbufavailaddr,
|
697
|
|
- QIB_7322_SendBufAvailAddr_offset );
|
|
698
|
+ QIB_7322_SendBufAvailAddr_offset );
|
698
|
699
|
|
699
|
700
|
/* Enable sending */
|
700
|
701
|
memset ( &sendctrlp, 0, sizeof ( sendctrlp ) );
|
|
@@ -757,7 +758,7 @@ static void qib7322_fini_send ( struct qib7322 *qib7322 ) {
|
757
|
758
|
* @ret rc Return status code
|
758
|
759
|
*/
|
759
|
760
|
static int qib7322_create_recv_wq ( struct ib_device *ibdev,
|
760
|
|
- struct ib_queue_pair *qp ) {
|
|
761
|
+ struct ib_queue_pair *qp ) {
|
761
|
762
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
762
|
763
|
struct ib_work_queue *wq = &qp->recv;
|
763
|
764
|
struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
|
@@ -780,7 +781,7 @@ static int qib7322_create_recv_wq ( struct ib_device *ibdev,
|
780
|
781
|
|
781
|
782
|
/* Allocate receive header buffer */
|
782
|
783
|
qib7322_wq->header = malloc_dma ( QIB7322_RECV_HEADERS_SIZE,
|
783
|
|
- QIB7322_RECV_HEADERS_ALIGN );
|
|
784
|
+ QIB7322_RECV_HEADERS_ALIGN );
|
784
|
785
|
if ( ! qib7322_wq->header ) {
|
785
|
786
|
rc = -ENOMEM;
|
786
|
787
|
goto err_alloc_header;
|
|
@@ -791,25 +792,25 @@ static int qib7322_create_recv_wq ( struct ib_device *ibdev,
|
791
|
792
|
BIT_FILL_1 ( &rcvhdraddr, RcvHdrAddr,
|
792
|
793
|
( virt_to_bus ( qib7322_wq->header ) >> 2 ) );
|
793
|
794
|
qib7322_writeq_array8b ( qib7322, &rcvhdraddr,
|
794
|
|
- QIB_7322_RcvHdrAddr0_offset, ctx );
|
|
795
|
+ QIB_7322_RcvHdrAddr0_offset, ctx );
|
795
|
796
|
memset ( &rcvhdrtailaddr, 0, sizeof ( rcvhdrtailaddr ) );
|
796
|
797
|
BIT_FILL_1 ( &rcvhdrtailaddr, RcvHdrTailAddr,
|
797
|
798
|
( virt_to_bus ( &qib7322_wq->header_prod ) >> 2 ) );
|
798
|
799
|
qib7322_writeq_array8b ( qib7322, &rcvhdrtailaddr,
|
799
|
|
- QIB_7322_RcvHdrTailAddr0_offset, ctx );
|
|
800
|
+ QIB_7322_RcvHdrTailAddr0_offset, ctx );
|
800
|
801
|
memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
|
801
|
802
|
BIT_FILL_1 ( &rcvhdrhead, counter, 1 );
|
802
|
803
|
qib7322_writeq_array64k ( qib7322, &rcvhdrhead,
|
803
|
|
- QIB_7322_RcvHdrHead0_offset, ctx );
|
|
804
|
+ QIB_7322_RcvHdrHead0_offset, ctx );
|
804
|
805
|
memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
|
805
|
806
|
BIT_FILL_1 ( &rcvegrindexhead, Value, 1 );
|
806
|
807
|
qib7322_writeq_array64k ( qib7322, &rcvegrindexhead,
|
807
|
|
- QIB_7322_RcvEgrIndexHead0_offset, ctx );
|
|
808
|
+ QIB_7322_RcvEgrIndexHead0_offset, ctx );
|
808
|
809
|
qib7322_readq_port ( qib7322, &rcvctrlp,
|
809
|
|
- QIB_7322_RcvCtrl_0_offset, port );
|
|
810
|
+ QIB_7322_RcvCtrl_0_offset, port );
|
810
|
811
|
BIT_SET ( &rcvctrlp, ContextEnable[ctx], 1 );
|
811
|
812
|
qib7322_writeq_port ( qib7322, &rcvctrlp,
|
812
|
|
- QIB_7322_RcvCtrl_0_offset, port );
|
|
813
|
+ QIB_7322_RcvCtrl_0_offset, port );
|
813
|
814
|
qib7322_readq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
|
814
|
815
|
BIT_SET ( &rcvctrl, IntrAvail[ctx], 1 );
|
815
|
816
|
qib7322_writeq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
|
|
@@ -834,7 +835,7 @@ static int qib7322_create_recv_wq ( struct ib_device *ibdev,
|
834
|
835
|
* @v qp Queue pair
|
835
|
836
|
*/
|
836
|
837
|
static void qib7322_destroy_recv_wq ( struct ib_device *ibdev,
|
837
|
|
- struct ib_queue_pair *qp ) {
|
|
838
|
+ struct ib_queue_pair *qp ) {
|
838
|
839
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
839
|
840
|
struct ib_work_queue *wq = &qp->recv;
|
840
|
841
|
struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
|
@@ -845,10 +846,10 @@ static void qib7322_destroy_recv_wq ( struct ib_device *ibdev,
|
845
|
846
|
|
846
|
847
|
/* Disable context in hardware */
|
847
|
848
|
qib7322_readq_port ( qib7322, &rcvctrlp,
|
848
|
|
- QIB_7322_RcvCtrl_0_offset, port );
|
|
849
|
+ QIB_7322_RcvCtrl_0_offset, port );
|
849
|
850
|
BIT_SET ( &rcvctrlp, ContextEnable[ctx], 0 );
|
850
|
851
|
qib7322_writeq_port ( qib7322, &rcvctrlp,
|
851
|
|
- QIB_7322_RcvCtrl_0_offset, port );
|
|
852
|
+ QIB_7322_RcvCtrl_0_offset, port );
|
852
|
853
|
qib7322_readq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
|
853
|
854
|
BIT_SET ( &rcvctrl, IntrAvail[ctx], 0 );
|
854
|
855
|
qib7322_writeq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
|
|
@@ -937,14 +938,14 @@ static int qib7322_init_recv ( struct qib7322 *qib7322 ) {
|
937
|
938
|
RcvQPMapContext4, 8,
|
938
|
939
|
RcvQPMapContext5, 10 );
|
939
|
940
|
qib7322_writeq ( qib7322, &rcvqpmaptablea0,
|
940
|
|
- QIB_7322_RcvQPMapTableA_0_offset );
|
|
941
|
+ QIB_7322_RcvQPMapTableA_0_offset );
|
941
|
942
|
memset ( &rcvqpmaptableb0, 0, sizeof ( rcvqpmaptableb0 ) );
|
942
|
943
|
BIT_FILL_3 ( &rcvqpmaptableb0,
|
943
|
944
|
RcvQPMapContext6, 12,
|
944
|
945
|
RcvQPMapContext7, 14,
|
945
|
946
|
RcvQPMapContext8, 16 );
|
946
|
947
|
qib7322_writeq ( qib7322, &rcvqpmaptableb0,
|
947
|
|
- QIB_7322_RcvQPMapTableB_0_offset );
|
|
948
|
+ QIB_7322_RcvQPMapTableB_0_offset );
|
948
|
949
|
memset ( &rcvqpmaptablea1, 0, sizeof ( rcvqpmaptablea1 ) );
|
949
|
950
|
BIT_FILL_6 ( &rcvqpmaptablea1,
|
950
|
951
|
RcvQPMapContext0, 1,
|
|
@@ -954,24 +955,24 @@ static int qib7322_init_recv ( struct qib7322 *qib7322 ) {
|
954
|
955
|
RcvQPMapContext4, 9,
|
955
|
956
|
RcvQPMapContext5, 11 );
|
956
|
957
|
qib7322_writeq ( qib7322, &rcvqpmaptablea1,
|
957
|
|
- QIB_7322_RcvQPMapTableA_1_offset );
|
|
958
|
+ QIB_7322_RcvQPMapTableA_1_offset );
|
958
|
959
|
memset ( &rcvqpmaptableb1, 0, sizeof ( rcvqpmaptableb1 ) );
|
959
|
960
|
BIT_FILL_3 ( &rcvqpmaptableb1,
|
960
|
961
|
RcvQPMapContext6, 13,
|
961
|
962
|
RcvQPMapContext7, 15,
|
962
|
963
|
RcvQPMapContext8, 17 );
|
963
|
964
|
qib7322_writeq ( qib7322, &rcvqpmaptableb1,
|
964
|
|
- QIB_7322_RcvQPMapTableB_1_offset );
|
|
965
|
+ QIB_7322_RcvQPMapTableB_1_offset );
|
965
|
966
|
|
966
|
967
|
/* Map multicast QPNs to contexts */
|
967
|
968
|
memset ( &rcvqpmcastctx0, 0, sizeof ( rcvqpmcastctx0 ) );
|
968
|
969
|
BIT_FILL_1 ( &rcvqpmcastctx0, RcvQpMcContext, 0 );
|
969
|
970
|
qib7322_writeq ( qib7322, &rcvqpmcastctx0,
|
970
|
|
- QIB_7322_RcvQPMulticastContext_0_offset );
|
|
971
|
+ QIB_7322_RcvQPMulticastContext_0_offset );
|
971
|
972
|
memset ( &rcvqpmcastctx1, 0, sizeof ( rcvqpmcastctx1 ) );
|
972
|
973
|
BIT_FILL_1 ( &rcvqpmcastctx1, RcvQpMcContext, 1 );
|
973
|
974
|
qib7322_writeq ( qib7322, &rcvqpmcastctx1,
|
974
|
|
- QIB_7322_RcvQPMulticastContext_1_offset );
|
|
975
|
+ QIB_7322_RcvQPMulticastContext_1_offset );
|
975
|
976
|
|
976
|
977
|
/* Configure receive header buffer sizes */
|
977
|
978
|
memset ( &rcvhdrcnt, 0, sizeof ( rcvhdrcnt ) );
|
|
@@ -980,7 +981,7 @@ static int qib7322_init_recv ( struct qib7322 *qib7322 ) {
|
980
|
981
|
memset ( &rcvhdrentsize, 0, sizeof ( rcvhdrentsize ) );
|
981
|
982
|
BIT_FILL_1 ( &rcvhdrentsize, Value, ( QIB7322_RECV_HEADER_SIZE >> 2 ) );
|
982
|
983
|
qib7322_writeq ( qib7322, &rcvhdrentsize,
|
983
|
|
- QIB_7322_RcvHdrEntSize_offset );
|
|
984
|
+ QIB_7322_RcvHdrEntSize_offset );
|
984
|
985
|
|
985
|
986
|
/* Calculate eager array start addresses for each context */
|
986
|
987
|
qib7322_readq ( qib7322, &rcvegrbase, QIB_7322_RcvEgrBase_offset );
|
|
@@ -1014,14 +1015,14 @@ static int qib7322_init_recv ( struct qib7322 *qib7322 ) {
|
1014
|
1015
|
memset ( &rxcreditvl, 0, sizeof ( rxcreditvl ) );
|
1015
|
1016
|
BIT_FILL_1 ( &rxcreditvl, RxMaxCreditVL, QIB7322_MAX_CREDITS_VL0 );
|
1016
|
1017
|
qib7322_writeq_array8b ( qib7322, &rxcreditvl,
|
1017
|
|
- QIB_7322_RxCreditVL0_0_offset, 0 );
|
|
1018
|
+ QIB_7322_RxCreditVL0_0_offset, 0 );
|
1018
|
1019
|
qib7322_writeq_array8b ( qib7322, &rxcreditvl,
|
1019
|
|
- QIB_7322_RxCreditVL0_1_offset, 0 );
|
|
1020
|
+ QIB_7322_RxCreditVL0_1_offset, 0 );
|
1020
|
1021
|
BIT_FILL_1 ( &rxcreditvl, RxMaxCreditVL, QIB7322_MAX_CREDITS_VL15 );
|
1021
|
1022
|
qib7322_writeq_array8b ( qib7322, &rxcreditvl,
|
1022
|
|
- QIB_7322_RxCreditVL0_0_offset, 15 );
|
|
1023
|
+ QIB_7322_RxCreditVL0_0_offset, 15 );
|
1023
|
1024
|
qib7322_writeq_array8b ( qib7322, &rxcreditvl,
|
1024
|
|
- QIB_7322_RxCreditVL0_1_offset, 15 );
|
|
1025
|
+ QIB_7322_RxCreditVL0_1_offset, 15 );
|
1025
|
1026
|
|
1026
|
1027
|
return 0;
|
1027
|
1028
|
}
|
|
@@ -1052,7 +1053,7 @@ static void qib7322_fini_recv ( struct qib7322 *qib7322 __unused ) {
|
1052
|
1053
|
* @ret rc Return status code
|
1053
|
1054
|
*/
|
1054
|
1055
|
static int qib7322_create_cq ( struct ib_device *ibdev,
|
1055
|
|
- struct ib_completion_queue *cq ) {
|
|
1056
|
+ struct ib_completion_queue *cq ) {
|
1056
|
1057
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1057
|
1058
|
static int cqn;
|
1058
|
1059
|
|
|
@@ -1076,7 +1077,7 @@ static int qib7322_create_cq ( struct ib_device *ibdev,
|
1076
|
1077
|
* @v cq Completion queue
|
1077
|
1078
|
*/
|
1078
|
1079
|
static void qib7322_destroy_cq ( struct ib_device *ibdev,
|
1079
|
|
- struct ib_completion_queue *cq ) {
|
|
1080
|
+ struct ib_completion_queue *cq ) {
|
1080
|
1081
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1081
|
1082
|
|
1082
|
1083
|
/* Nothing to do */
|
|
@@ -1098,7 +1099,7 @@ static void qib7322_destroy_cq ( struct ib_device *ibdev,
|
1098
|
1099
|
* @ret rc Return status code
|
1099
|
1100
|
*/
|
1100
|
1101
|
static int qib7322_create_qp ( struct ib_device *ibdev,
|
1101
|
|
- struct ib_queue_pair *qp ) {
|
|
1102
|
+ struct ib_queue_pair *qp ) {
|
1102
|
1103
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1103
|
1104
|
unsigned int ctx;
|
1104
|
1105
|
int rc;
|
|
@@ -1139,7 +1140,7 @@ static int qib7322_create_qp ( struct ib_device *ibdev,
|
1139
|
1140
|
* @ret rc Return status code
|
1140
|
1141
|
*/
|
1141
|
1142
|
static int qib7322_modify_qp ( struct ib_device *ibdev,
|
1142
|
|
- struct ib_queue_pair *qp ) {
|
|
1143
|
+ struct ib_queue_pair *qp ) {
|
1143
|
1144
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1144
|
1145
|
|
1145
|
1146
|
/* Nothing to do; the hardware doesn't have a notion of queue
|
|
@@ -1156,7 +1157,7 @@ static int qib7322_modify_qp ( struct ib_device *ibdev,
|
1156
|
1157
|
* @v qp Queue pair
|
1157
|
1158
|
*/
|
1158
|
1159
|
static void qib7322_destroy_qp ( struct ib_device *ibdev,
|
1159
|
|
- struct ib_queue_pair *qp ) {
|
|
1160
|
+ struct ib_queue_pair *qp ) {
|
1160
|
1161
|
|
1161
|
1162
|
qib7322_destroy_send_wq ( ibdev, qp );
|
1162
|
1163
|
qib7322_destroy_recv_wq ( ibdev, qp );
|
|
@@ -1180,9 +1181,9 @@ static void qib7322_destroy_qp ( struct ib_device *ibdev,
|
1180
|
1181
|
* @ret rc Return status code
|
1181
|
1182
|
*/
|
1182
|
1183
|
static int qib7322_post_send ( struct ib_device *ibdev,
|
1183
|
|
- struct ib_queue_pair *qp,
|
1184
|
|
- struct ib_address_vector *av,
|
1185
|
|
- struct io_buffer *iobuf ) {
|
|
1184
|
+ struct ib_queue_pair *qp,
|
|
1185
|
+ struct ib_address_vector *av,
|
|
1186
|
+ struct io_buffer *iobuf ) {
|
1186
|
1187
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1187
|
1188
|
struct ib_work_queue *wq = &qp->send;
|
1188
|
1189
|
struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
|
@@ -1203,7 +1204,7 @@ static int qib7322_post_send ( struct ib_device *ibdev,
|
1203
|
1204
|
return send_buf;
|
1204
|
1205
|
start_offset = offset =
|
1205
|
1206
|
qib7322_send_buffer_offset ( qib7322, qib7322_wq->send_bufs,
|
1206
|
|
- send_buf );
|
|
1207
|
+ send_buf );
|
1207
|
1208
|
|
1208
|
1209
|
/* Store I/O buffer and send buffer index */
|
1209
|
1210
|
assert ( wq->iobufs[qib7322_wq->prod] == NULL );
|
|
@@ -1263,8 +1264,8 @@ static int qib7322_post_send ( struct ib_device *ibdev,
|
1263
|
1264
|
* @v wqe_idx Work queue entry index
|
1264
|
1265
|
*/
|
1265
|
1266
|
static void qib7322_complete_send ( struct ib_device *ibdev,
|
1266
|
|
- struct ib_queue_pair *qp,
|
1267
|
|
- unsigned int wqe_idx ) {
|
|
1267
|
+ struct ib_queue_pair *qp,
|
|
1268
|
+ unsigned int wqe_idx ) {
|
1268
|
1269
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1269
|
1270
|
struct ib_work_queue *wq = &qp->send;
|
1270
|
1271
|
struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
|
@@ -1293,7 +1294,7 @@ static void qib7322_complete_send ( struct ib_device *ibdev,
|
1293
|
1294
|
* @v qp Queue pair
|
1294
|
1295
|
*/
|
1295
|
1296
|
static void qib7322_poll_send_wq ( struct ib_device *ibdev,
|
1296
|
|
- struct ib_queue_pair *qp ) {
|
|
1297
|
+ struct ib_queue_pair *qp ) {
|
1297
|
1298
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1298
|
1299
|
struct ib_work_queue *wq = &qp->send;
|
1299
|
1300
|
struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
|
@@ -1312,7 +1313,7 @@ static void qib7322_poll_send_wq ( struct ib_device *ibdev,
|
1312
|
1313
|
|
1313
|
1314
|
/* Increment consumer counter */
|
1314
|
1315
|
qib7322_wq->cons = ( ( qib7322_wq->cons + 1 ) &
|
1315
|
|
- ( wq->num_wqes - 1 ) );
|
|
1316
|
+ ( wq->num_wqes - 1 ) );
|
1316
|
1317
|
}
|
1317
|
1318
|
}
|
1318
|
1319
|
|
|
@@ -1325,8 +1326,8 @@ static void qib7322_poll_send_wq ( struct ib_device *ibdev,
|
1325
|
1326
|
* @ret rc Return status code
|
1326
|
1327
|
*/
|
1327
|
1328
|
static int qib7322_post_recv ( struct ib_device *ibdev,
|
1328
|
|
- struct ib_queue_pair *qp,
|
1329
|
|
- struct io_buffer *iobuf ) {
|
|
1329
|
+ struct ib_queue_pair *qp,
|
|
1330
|
+ struct io_buffer *iobuf ) {
|
1330
|
1331
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1331
|
1332
|
struct ib_work_queue *wq = &qp->recv;
|
1332
|
1333
|
struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
|
@@ -1377,14 +1378,14 @@ static int qib7322_post_recv ( struct ib_device *ibdev,
|
1377
|
1378
|
Addr, ( addr >> 11 ),
|
1378
|
1379
|
BufSize, bufsize );
|
1379
|
1380
|
qib7322_writeq_array8b ( qib7322, &rcvegr, qib7322_wq->eager_array,
|
1380
|
|
- qib7322_wq->eager_prod );
|
|
1381
|
+ qib7322_wq->eager_prod );
|
1381
|
1382
|
DBGC2 ( qib7322, "QIB7322 %p QPN %ld RX egr %04x(%04x) posted "
|
1382
|
1383
|
"[%lx,%lx)\n", qib7322, qp->qpn, qib7322_wq->eager_prod,
|
1383
|
1384
|
wqe_idx, addr, ( addr + len ) );
|
1384
|
1385
|
|
1385
|
1386
|
/* Increment producer index */
|
1386
|
1387
|
qib7322_wq->eager_prod = ( ( qib7322_wq->eager_prod + 1 ) &
|
1387
|
|
- ( qib7322_wq->eager_entries - 1 ) );
|
|
1388
|
+ ( qib7322_wq->eager_entries - 1 ) );
|
1388
|
1389
|
|
1389
|
1390
|
/* Update head index */
|
1390
|
1391
|
memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
|
|
@@ -1392,7 +1393,7 @@ static int qib7322_post_recv ( struct ib_device *ibdev,
|
1392
|
1393
|
Value, ( ( qib7322_wq->eager_prod + 1 ) &
|
1393
|
1394
|
( qib7322_wq->eager_entries - 1 ) ) );
|
1394
|
1395
|
qib7322_writeq_array64k ( qib7322, &rcvegrindexhead,
|
1395
|
|
- QIB_7322_RcvEgrIndexHead0_offset, ctx );
|
|
1396
|
+ QIB_7322_RcvEgrIndexHead0_offset, ctx );
|
1396
|
1397
|
|
1397
|
1398
|
return 0;
|
1398
|
1399
|
}
|
|
@@ -1405,8 +1406,8 @@ static int qib7322_post_recv ( struct ib_device *ibdev,
|
1405
|
1406
|
* @v header_offs Header offset
|
1406
|
1407
|
*/
|
1407
|
1408
|
static void qib7322_complete_recv ( struct ib_device *ibdev,
|
1408
|
|
- struct ib_queue_pair *qp,
|
1409
|
|
- unsigned int header_offs ) {
|
|
1409
|
+ struct ib_queue_pair *qp,
|
|
1410
|
+ unsigned int header_offs ) {
|
1410
|
1411
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1411
|
1412
|
struct ib_work_queue *wq = &qp->recv;
|
1412
|
1413
|
struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
|
@@ -1542,12 +1543,12 @@ static void qib7322_complete_recv ( struct ib_device *ibdev,
|
1542
|
1543
|
/* Clear eager buffer */
|
1543
|
1544
|
memset ( &rcvegr, 0, sizeof ( rcvegr ) );
|
1544
|
1545
|
qib7322_writeq_array8b ( qib7322, &rcvegr,
|
1545
|
|
- qib7322_wq->eager_array,
|
1546
|
|
- qib7322_wq->eager_cons );
|
|
1546
|
+ qib7322_wq->eager_array,
|
|
1547
|
+ qib7322_wq->eager_cons );
|
1547
|
1548
|
|
1548
|
1549
|
/* Increment consumer index */
|
1549
|
1550
|
qib7322_wq->eager_cons = ( ( qib7322_wq->eager_cons + 1 ) &
|
1550
|
|
- ( qib7322_wq->eager_entries - 1 ) );
|
|
1551
|
+ ( qib7322_wq->eager_entries - 1 ) );
|
1551
|
1552
|
}
|
1552
|
1553
|
}
|
1553
|
1554
|
|
|
@@ -1558,7 +1559,7 @@ static void qib7322_complete_recv ( struct ib_device *ibdev,
|
1558
|
1559
|
* @v qp Queue pair
|
1559
|
1560
|
*/
|
1560
|
1561
|
static void qib7322_poll_recv_wq ( struct ib_device *ibdev,
|
1561
|
|
- struct ib_queue_pair *qp ) {
|
|
1562
|
+ struct ib_queue_pair *qp ) {
|
1562
|
1563
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1563
|
1564
|
struct ib_work_queue *wq = &qp->recv;
|
1564
|
1565
|
struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
|
|
@@ -1597,7 +1598,7 @@ static void qib7322_poll_recv_wq ( struct ib_device *ibdev,
|
1597
|
1598
|
RcvHeadPointer, ( qib7322_wq->header_cons >> 2 ),
|
1598
|
1599
|
counter, 1 );
|
1599
|
1600
|
qib7322_writeq_array64k ( qib7322, &rcvhdrhead,
|
1600
|
|
- QIB_7322_RcvHdrHead0_offset, ctx );
|
|
1601
|
+ QIB_7322_RcvHdrHead0_offset, ctx );
|
1601
|
1602
|
}
|
1602
|
1603
|
|
1603
|
1604
|
/**
|
|
@@ -1607,7 +1608,7 @@ static void qib7322_poll_recv_wq ( struct ib_device *ibdev,
|
1607
|
1608
|
* @v cq Completion queue
|
1608
|
1609
|
*/
|
1609
|
1610
|
static void qib7322_poll_cq ( struct ib_device *ibdev,
|
1610
|
|
- struct ib_completion_queue *cq ) {
|
|
1611
|
+ struct ib_completion_queue *cq ) {
|
1611
|
1612
|
struct ib_work_queue *wq;
|
1612
|
1613
|
|
1613
|
1614
|
/* Poll associated send and receive queues */
|
|
@@ -1640,12 +1641,12 @@ static void qib7322_poll_eq ( struct ib_device *ibdev ) {
|
1640
|
1641
|
/* Check for and clear status bits */
|
1641
|
1642
|
DBG_DISABLE ( DBGLVL_IO );
|
1642
|
1643
|
qib7322_readq_port ( qib7322, &errstatus,
|
1643
|
|
- QIB_7322_ErrStatus_0_offset, port );
|
|
1644
|
+ QIB_7322_ErrStatus_0_offset, port );
|
1644
|
1645
|
if ( errstatus.u.qwords[0] ) {
|
1645
|
1646
|
DBGC ( qib7322, "QIB7322 %p port %d status %08x%08x\n", qib7322,
|
1646
|
1647
|
port, errstatus.u.dwords[1], errstatus.u.dwords[0] );
|
1647
|
1648
|
qib7322_writeq_port ( qib7322, &errstatus,
|
1648
|
|
- QIB_7322_ErrClear_0_offset, port );
|
|
1649
|
+ QIB_7322_ErrClear_0_offset, port );
|
1649
|
1650
|
}
|
1650
|
1651
|
DBG_ENABLE ( DBGLVL_IO );
|
1651
|
1652
|
|
|
@@ -1668,7 +1669,7 @@ static void qib7322_poll_eq ( struct ib_device *ibdev ) {
|
1668
|
1669
|
* @ret supported Supported link speeds
|
1669
|
1670
|
*/
|
1670
|
1671
|
static unsigned int qib7322_link_speed_supported ( struct qib7322 *qib7322,
|
1671
|
|
- unsigned int port ) {
|
|
1672
|
+ unsigned int port ) {
|
1672
|
1673
|
struct QIB_7322_feature_mask features;
|
1673
|
1674
|
struct QIB_7322_Revision revision;
|
1674
|
1675
|
unsigned int supported;
|
|
@@ -1676,7 +1677,7 @@ static unsigned int qib7322_link_speed_supported ( struct qib7322 *qib7322,
|
1676
|
1677
|
|
1677
|
1678
|
/* Read the active feature mask */
|
1678
|
1679
|
qib7322_readq ( qib7322, &features,
|
1679
|
|
- QIB_7322_active_feature_mask_offset );
|
|
1680
|
+ QIB_7322_active_feature_mask_offset );
|
1680
|
1681
|
switch ( port ) {
|
1681
|
1682
|
case 0 :
|
1682
|
1683
|
supported = BIT_GET ( &features, Port0_Link_Speed_Supported );
|
|
@@ -1726,10 +1727,10 @@ static int qib7322_open ( struct ib_device *ibdev ) {
|
1726
|
1727
|
|
1727
|
1728
|
/* Enable link */
|
1728
|
1729
|
qib7322_readq_port ( qib7322, &ibcctrla,
|
1729
|
|
- QIB_7322_IBCCtrlA_0_offset, port );
|
|
1730
|
+ QIB_7322_IBCCtrlA_0_offset, port );
|
1730
|
1731
|
BIT_SET ( &ibcctrla, IBLinkEn, 1 );
|
1731
|
1732
|
qib7322_writeq_port ( qib7322, &ibcctrla,
|
1732
|
|
- QIB_7322_IBCCtrlA_0_offset, port );
|
|
1733
|
+ QIB_7322_IBCCtrlA_0_offset, port );
|
1733
|
1734
|
|
1734
|
1735
|
return 0;
|
1735
|
1736
|
}
|
|
@@ -1746,10 +1747,10 @@ static void qib7322_close ( struct ib_device *ibdev ) {
|
1746
|
1747
|
|
1747
|
1748
|
/* Disable link */
|
1748
|
1749
|
qib7322_readq_port ( qib7322, &ibcctrla,
|
1749
|
|
- QIB_7322_IBCCtrlA_0_offset, port );
|
|
1750
|
+ QIB_7322_IBCCtrlA_0_offset, port );
|
1750
|
1751
|
BIT_SET ( &ibcctrla, IBLinkEn, 0 );
|
1751
|
1752
|
qib7322_writeq_port ( qib7322, &ibcctrla,
|
1752
|
|
- QIB_7322_IBCCtrlA_0_offset, port );
|
|
1753
|
+ QIB_7322_IBCCtrlA_0_offset, port );
|
1753
|
1754
|
}
|
1754
|
1755
|
|
1755
|
1756
|
/***************************************************************************
|
|
@@ -1768,8 +1769,8 @@ static void qib7322_close ( struct ib_device *ibdev ) {
|
1768
|
1769
|
* @ret rc Return status code
|
1769
|
1770
|
*/
|
1770
|
1771
|
static int qib7322_mcast_attach ( struct ib_device *ibdev,
|
1771
|
|
- struct ib_queue_pair *qp,
|
1772
|
|
- struct ib_gid *gid ) {
|
|
1772
|
+ struct ib_queue_pair *qp,
|
|
1773
|
+ struct ib_gid *gid ) {
|
1773
|
1774
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1774
|
1775
|
|
1775
|
1776
|
( void ) qib7322;
|
|
@@ -1786,8 +1787,8 @@ static int qib7322_mcast_attach ( struct ib_device *ibdev,
|
1786
|
1787
|
* @v gid Multicast GID
|
1787
|
1788
|
*/
|
1788
|
1789
|
static void qib7322_mcast_detach ( struct ib_device *ibdev,
|
1789
|
|
- struct ib_queue_pair *qp,
|
1790
|
|
- struct ib_gid *gid ) {
|
|
1790
|
+ struct ib_queue_pair *qp,
|
|
1791
|
+ struct ib_gid *gid ) {
|
1791
|
1792
|
struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
|
1792
|
1793
|
|
1793
|
1794
|
( void ) qib7322;
|
|
@@ -1836,7 +1837,7 @@ static unsigned int qib7322_i2c_bits[] = {
|
1836
|
1837
|
* @ret non-zero Input is a logic 1
|
1837
|
1838
|
*/
|
1838
|
1839
|
static int qib7322_i2c_read_bit ( struct bit_basher *basher,
|
1839
|
|
- unsigned int bit_id ) {
|
|
1840
|
+ unsigned int bit_id ) {
|
1840
|
1841
|
struct qib7322 *qib7322 =
|
1841
|
1842
|
container_of ( basher, struct qib7322, i2c.basher );
|
1842
|
1843
|
struct QIB_7322_EXTStatus extstatus;
|
|
@@ -1860,7 +1861,7 @@ static int qib7322_i2c_read_bit ( struct bit_basher *basher,
|
1860
|
1861
|
* @v data Value to write
|
1861
|
1862
|
*/
|
1862
|
1863
|
static void qib7322_i2c_write_bit ( struct bit_basher *basher,
|
1863
|
|
- unsigned int bit_id, unsigned long data ) {
|
|
1864
|
+ unsigned int bit_id, unsigned long data ) {
|
1864
|
1865
|
struct qib7322 *qib7322 =
|
1865
|
1866
|
container_of ( basher, struct qib7322, i2c.basher );
|
1866
|
1867
|
struct QIB_7322_EXTCtrl extctrl;
|
|
@@ -2000,7 +2001,7 @@ static int qib7322_ahb_wait ( struct qib7322 *qib7322 ) {
|
2000
|
2001
|
/* Wait for Ready bit to be asserted */
|
2001
|
2002
|
for ( i = 0 ; i < QIB7322_AHB_MAX_WAIT_US ; i++ ) {
|
2002
|
2003
|
qib7322_readq ( qib7322, &transaction,
|
2003
|
|
- QIB_7322_ahb_transaction_reg_offset );
|
|
2004
|
+ QIB_7322_ahb_transaction_reg_offset );
|
2004
|
2005
|
if ( BIT_GET ( &transaction, ahb_rdy ) )
|
2005
|
2006
|
return 0;
|
2006
|
2007
|
udelay ( 1 );
|
|
@@ -2019,7 +2020,7 @@ static int qib7322_ahb_wait ( struct qib7322 *qib7322 ) {
|
2019
|
2020
|
* @ret rc Return status code
|
2020
|
2021
|
*/
|
2021
|
2022
|
static int qib7322_ahb_request ( struct qib7322 *qib7322,
|
2022
|
|
- unsigned int location ) {
|
|
2023
|
+ unsigned int location ) {
|
2023
|
2024
|
struct QIB_7322_ahb_access_ctrl access;
|
2024
|
2025
|
int rc;
|
2025
|
2026
|
|
|
@@ -2063,7 +2064,7 @@ static void qib7322_ahb_release ( struct qib7322 *qib7322 ) {
|
2063
|
2064
|
* You must have already acquired ownership of the AHB.
|
2064
|
2065
|
*/
|
2065
|
2066
|
static int qib7322_ahb_read ( struct qib7322 *qib7322, unsigned int location,
|
2066
|
|
- uint32_t *data ) {
|
|
2067
|
+ uint32_t *data ) {
|
2067
|
2068
|
struct QIB_7322_ahb_transaction_reg xact;
|
2068
|
2069
|
int rc;
|
2069
|
2070
|
|
|
@@ -2095,7 +2096,7 @@ static int qib7322_ahb_read ( struct qib7322 *qib7322, unsigned int location,
|
2095
|
2096
|
* You must have already acquired ownership of the AHB.
|
2096
|
2097
|
*/
|
2097
|
2098
|
static int qib7322_ahb_write ( struct qib7322 *qib7322, unsigned int location,
|
2098
|
|
- uint32_t data ) {
|
|
2099
|
+ uint32_t data ) {
|
2099
|
2100
|
struct QIB_7322_ahb_transaction_reg xact;
|
2100
|
2101
|
int rc;
|
2101
|
2102
|
|
|
@@ -2124,7 +2125,7 @@ static int qib7322_ahb_write ( struct qib7322 *qib7322, unsigned int location,
|
2124
|
2125
|
* @ret rc Return status code
|
2125
|
2126
|
*/
|
2126
|
2127
|
static int qib7322_ahb_mod_reg ( struct qib7322 *qib7322, unsigned int location,
|
2127
|
|
- uint32_t value, uint32_t mask ) {
|
|
2128
|
+ uint32_t value, uint32_t mask ) {
|
2128
|
2129
|
uint32_t old_value;
|
2129
|
2130
|
uint32_t new_value;
|
2130
|
2131
|
int rc;
|
|
@@ -2167,7 +2168,7 @@ static int qib7322_ahb_mod_reg ( struct qib7322 *qib7322, unsigned int location,
|
2167
|
2168
|
* @ret rc Return status code
|
2168
|
2169
|
*/
|
2169
|
2170
|
static int qib7322_ahb_mod_reg_all ( struct qib7322 *qib7322, unsigned int reg,
|
2170
|
|
- uint32_t value, uint32_t mask ) {
|
|
2171
|
+ uint32_t value, uint32_t mask ) {
|
2171
|
2172
|
unsigned int port;
|
2172
|
2173
|
unsigned int channel;
|
2173
|
2174
|
unsigned int location;
|
|
@@ -2177,7 +2178,7 @@ static int qib7322_ahb_mod_reg_all ( struct qib7322 *qib7322, unsigned int reg,
|
2177
|
2178
|
for ( channel = 0 ; channel < QIB7322_MAX_WIDTH ; channel++ ) {
|
2178
|
2179
|
location = QIB7322_AHB_LOCATION ( port, channel, reg );
|
2179
|
2180
|
if ( ( rc = qib7322_ahb_mod_reg ( qib7322, location,
|
2180
|
|
- value, mask ) ) != 0 )
|
|
2181
|
+ value, mask ) ) != 0 )
|
2181
|
2182
|
return rc;
|
2182
|
2183
|
}
|
2183
|
2184
|
}
|
|
@@ -2283,7 +2284,7 @@ static void qib7322_reset ( struct qib7322 *qib7322, struct pci_device *pci ) {
|
2283
|
2284
|
* @ret rc Return status code
|
2284
|
2285
|
*/
|
2285
|
2286
|
static int qib7322_probe ( struct pci_device *pci,
|
2286
|
|
- const struct pci_device_id *id __unused ) {
|
|
2287
|
+ const struct pci_device_id *id __unused ) {
|
2287
|
2288
|
struct qib7322 *qib7322;
|
2288
|
2289
|
struct QIB_7322_Revision revision;
|
2289
|
2290
|
struct ib_device *ibdev;
|