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[qib7322] Fix whitespace errors

Fix up the whitespace errors inadvertently introduced by the
last-minute rename from the internal QLogic codename to "qib7322".

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Michael Brown 14 years ago
parent
commit
74bc1b95bb
1 changed files with 108 additions and 107 deletions
  1. 108
    107
      src/drivers/infiniband/qib7322.c

+ 108
- 107
src/drivers/infiniband/qib7322.c View File

146
  * @v offset		Register offset
146
  * @v offset		Register offset
147
  */
147
  */
148
 static void qib7322_readq ( struct qib7322 *qib7322, uint32_t *dwords,
148
 static void qib7322_readq ( struct qib7322 *qib7322, uint32_t *dwords,
149
-			   unsigned long offset ) {
149
+			    unsigned long offset ) {
150
 	void *addr = ( qib7322->regs + offset );
150
 	void *addr = ( qib7322->regs + offset );
151
 
151
 
152
 	__asm__ __volatile__ ( "movq (%1), %%mm0\n\t"
152
 	__asm__ __volatile__ ( "movq (%1), %%mm0\n\t"
173
  * @v offset		Register offset
173
  * @v offset		Register offset
174
  */
174
  */
175
 static void qib7322_writeq ( struct qib7322 *qib7322, const uint32_t *dwords,
175
 static void qib7322_writeq ( struct qib7322 *qib7322, const uint32_t *dwords,
176
-			    unsigned long offset ) {
176
+			     unsigned long offset ) {
177
 	void *addr = ( qib7322->regs + offset );
177
 	void *addr = ( qib7322->regs + offset );
178
 
178
 
179
 	DBGIO ( "[%08lx] <= %08x%08x\n",
179
 	DBGIO ( "[%08lx] <= %08x%08x\n",
200
  * @v offset		Register offset
200
  * @v offset		Register offset
201
  */
201
  */
202
 static void qib7322_writel ( struct qib7322 *qib7322, uint32_t dword,
202
 static void qib7322_writel ( struct qib7322 *qib7322, uint32_t dword,
203
-			    unsigned long offset ) {
203
+			     unsigned long offset ) {
204
 	writel ( dword, ( qib7322->regs + offset ) );
204
 	writel ( dword, ( qib7322->regs + offset ) );
205
 }
205
 }
206
 
206
 
248
 
248
 
249
 	/* Read link state */
249
 	/* Read link state */
250
 	qib7322_readq_port ( qib7322, &ibcstatusa,
250
 	qib7322_readq_port ( qib7322, &ibcstatusa,
251
-			    QIB_7322_IBCStatusA_0_offset, port );
251
+			     QIB_7322_IBCStatusA_0_offset, port );
252
 	link_training_state = BIT_GET ( &ibcstatusa, LinkTrainingState );
252
 	link_training_state = BIT_GET ( &ibcstatusa, LinkTrainingState );
253
 	link_state = BIT_GET ( &ibcstatusa, LinkState );
253
 	link_state = BIT_GET ( &ibcstatusa, LinkState );
254
 	link_width = BIT_GET ( &ibcstatusa, LinkWidthActive );
254
 	link_width = BIT_GET ( &ibcstatusa, LinkWidthActive );
290
  * @ret rc		Return status code
290
  * @ret rc		Return status code
291
  */
291
  */
292
 static int qib7322_link_state_check ( struct ib_device *ibdev,
292
 static int qib7322_link_state_check ( struct ib_device *ibdev,
293
-				     unsigned int new_link_state ) {
293
+				      unsigned int new_link_state ) {
294
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
294
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
295
 	struct QIB_7322_IBCStatusA_0 ibcstatusa;
295
 	struct QIB_7322_IBCStatusA_0 ibcstatusa;
296
 	unsigned int port = ( ibdev->port - QIB7322_PORT_BASE );
296
 	unsigned int port = ( ibdev->port - QIB7322_PORT_BASE );
299
 
299
 
300
 	for ( i = 0 ; i < QIB7322_LINK_STATE_MAX_WAIT_US ; i++ ) {
300
 	for ( i = 0 ; i < QIB7322_LINK_STATE_MAX_WAIT_US ; i++ ) {
301
 		qib7322_readq_port ( qib7322, &ibcstatusa,
301
 		qib7322_readq_port ( qib7322, &ibcstatusa,
302
-				    QIB_7322_IBCStatusA_0_offset, port );
302
+				     QIB_7322_IBCStatusA_0_offset, port );
303
 		link_state = BIT_GET ( &ibcstatusa, LinkState );
303
 		link_state = BIT_GET ( &ibcstatusa, LinkState );
304
 		if ( link_state == new_link_state )
304
 		if ( link_state == new_link_state )
305
 			return 0;
305
 			return 0;
318
  * @v mad		Set port information MAD
318
  * @v mad		Set port information MAD
319
  */
319
  */
320
 static int qib7322_set_port_info ( struct ib_device *ibdev,
320
 static int qib7322_set_port_info ( struct ib_device *ibdev,
321
-				  union ib_mad *mad ) {
321
+				   union ib_mad *mad ) {
322
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
322
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
323
 	struct ib_port_info *port_info = &mad->smp.smp_data.port_info;
323
 	struct ib_port_info *port_info = &mad->smp.smp_data.port_info;
324
 	struct QIB_7322_IBCCtrlA_0 ibcctrla;
324
 	struct QIB_7322_IBCCtrlA_0 ibcctrla;
334
 		       qib7322, qib7322_link_state_text ( link_state ),
334
 		       qib7322, qib7322_link_state_text ( link_state ),
335
 		       link_state );
335
 		       link_state );
336
 		qib7322_readq_port ( qib7322, &ibcctrla,
336
 		qib7322_readq_port ( qib7322, &ibcctrla,
337
-				    QIB_7322_IBCCtrlA_0_offset, port );
337
+				     QIB_7322_IBCCtrlA_0_offset, port );
338
 		BIT_SET ( &ibcctrla, LinkCmd, link_state );
338
 		BIT_SET ( &ibcctrla, LinkCmd, link_state );
339
 		qib7322_writeq_port ( qib7322, &ibcctrla,
339
 		qib7322_writeq_port ( qib7322, &ibcctrla,
340
-				     QIB_7322_IBCCtrlA_0_offset, port );
340
+				      QIB_7322_IBCCtrlA_0_offset, port );
341
 
341
 
342
 		/* Wait for link state change to take effect.  Ignore
342
 		/* Wait for link state change to take effect.  Ignore
343
 		 * errors; the current link state will be returned via
343
 		 * errors; the current link state will be returned via
359
  * @v mad		Set partition key table MAD
359
  * @v mad		Set partition key table MAD
360
  */
360
  */
361
 static int qib7322_set_pkey_table ( struct ib_device *ibdev __unused,
361
 static int qib7322_set_pkey_table ( struct ib_device *ibdev __unused,
362
-				   union ib_mad *mad __unused ) {
362
+				    union ib_mad *mad __unused ) {
363
 	/* Nothing to do */
363
 	/* Nothing to do */
364
 	return 0;
364
 	return 0;
365
 }
365
 }
379
  * @ret rc		Return status code
379
  * @ret rc		Return status code
380
  */
380
  */
381
 static int qib7322_alloc_ctx ( struct ib_device *ibdev,
381
 static int qib7322_alloc_ctx ( struct ib_device *ibdev,
382
-			      struct ib_queue_pair *qp ) {
382
+			       struct ib_queue_pair *qp ) {
383
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
383
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
384
 	unsigned int port = ( ibdev->port - QIB7322_PORT_BASE );
384
 	unsigned int port = ( ibdev->port - QIB7322_PORT_BASE );
385
 	unsigned int ctx;
385
 	unsigned int ctx;
408
  * @ret ctx		Context index
408
  * @ret ctx		Context index
409
  */
409
  */
410
 static unsigned int qib7322_ctx ( struct ib_device *ibdev,
410
 static unsigned int qib7322_ctx ( struct ib_device *ibdev,
411
-				 struct ib_queue_pair *qp ) {
411
+				  struct ib_queue_pair *qp ) {
412
 	return ( qp->qpn + ( ibdev->port - QIB7322_PORT_BASE ) );
412
 	return ( qp->qpn + ( ibdev->port - QIB7322_PORT_BASE ) );
413
 }
413
 }
414
 
414
 
419
  * @v ctx		Context index
419
  * @v ctx		Context index
420
  */
420
  */
421
 static void qib7322_free_ctx ( struct ib_device *ibdev,
421
 static void qib7322_free_ctx ( struct ib_device *ibdev,
422
-			      struct ib_queue_pair *qp ) {
422
+			       struct ib_queue_pair *qp ) {
423
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
423
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
424
 	unsigned int port = ( ibdev->port - QIB7322_PORT_BASE );
424
 	unsigned int port = ( ibdev->port - QIB7322_PORT_BASE );
425
 	unsigned int ctx = qib7322_ctx ( ibdev, qp );
425
 	unsigned int ctx = qib7322_ctx ( ibdev, qp );
456
  */
456
  */
457
 static struct qib7322_send_buffers *
457
 static struct qib7322_send_buffers *
458
 qib7322_create_send_bufs ( struct qib7322 *qib7322, unsigned long base,
458
 qib7322_create_send_bufs ( struct qib7322 *qib7322, unsigned long base,
459
-			  unsigned int size, unsigned int start,
460
-			  unsigned int count ) {
459
+			   unsigned int size, unsigned int start,
460
+			   unsigned int count ) {
461
 	struct qib7322_send_buffers *send_bufs;
461
 	struct qib7322_send_buffers *send_bufs;
462
 	unsigned int i;
462
 	unsigned int i;
463
 
463
 
488
  * @v qib7322		QIB7322 device
488
  * @v qib7322		QIB7322 device
489
  * @v send_bufs		Send buffer set
489
  * @v send_bufs		Send buffer set
490
  */
490
  */
491
-static void qib7322_destroy_send_bufs ( struct qib7322 *qib7322 __unused,
492
-				       struct qib7322_send_buffers *send_bufs ){
491
+static void
492
+qib7322_destroy_send_bufs ( struct qib7322 *qib7322 __unused,
493
+			    struct qib7322_send_buffers *send_bufs ) {
493
 	free ( send_bufs );
494
 	free ( send_bufs );
494
 }
495
 }
495
 
496
 
501
  * @ret send_buf	Send buffer, or negative error
502
  * @ret send_buf	Send buffer, or negative error
502
  */
503
  */
503
 static int qib7322_alloc_send_buf ( struct qib7322 *qib7322,
504
 static int qib7322_alloc_send_buf ( struct qib7322 *qib7322,
504
-				   struct qib7322_send_buffers *send_bufs ) {
505
+				    struct qib7322_send_buffers *send_bufs ) {
505
 	unsigned int used;
506
 	unsigned int used;
506
 	unsigned int mask;
507
 	unsigned int mask;
507
 	unsigned int send_buf;
508
 	unsigned int send_buf;
527
  * @v send_buf		Send buffer
528
  * @v send_buf		Send buffer
528
  */
529
  */
529
 static void qib7322_free_send_buf ( struct qib7322 *qib7322 __unused,
530
 static void qib7322_free_send_buf ( struct qib7322 *qib7322 __unused,
530
-				   struct qib7322_send_buffers *send_bufs,
531
-				   unsigned int send_buf ) {
531
+				    struct qib7322_send_buffers *send_bufs,
532
+				    unsigned int send_buf ) {
532
 	unsigned int mask;
533
 	unsigned int mask;
533
 
534
 
534
 	mask = ( send_bufs->count - 1 );
535
 	mask = ( send_bufs->count - 1 );
543
  * @ret in_use		Send buffer is in use
544
  * @ret in_use		Send buffer is in use
544
  */
545
  */
545
 static int qib7322_send_buf_in_use ( struct qib7322 *qib7322,
546
 static int qib7322_send_buf_in_use ( struct qib7322 *qib7322,
546
-				    unsigned int send_buf ) {
547
+				     unsigned int send_buf ) {
547
 	unsigned int send_idx;
548
 	unsigned int send_idx;
548
 	unsigned int send_check;
549
 	unsigned int send_check;
549
 	unsigned int inusecheck;
550
 	unsigned int inusecheck;
567
  */
568
  */
568
 static unsigned long
569
 static unsigned long
569
 qib7322_send_buffer_offset ( struct qib7322 *qib7322 __unused,
570
 qib7322_send_buffer_offset ( struct qib7322 *qib7322 __unused,
570
-			    struct qib7322_send_buffers *send_bufs,
571
-			    unsigned int send_buf ) {
571
+			     struct qib7322_send_buffers *send_bufs,
572
+			     unsigned int send_buf ) {
572
 	unsigned int index;
573
 	unsigned int index;
573
 
574
 
574
 	index = ( ( send_buf & ~QIB7322_SEND_BUF_TOGGLE ) - send_bufs->start );
575
 	index = ( ( send_buf & ~QIB7322_SEND_BUF_TOGGLE ) - send_bufs->start );
582
  * @v qp		Queue pair
583
  * @v qp		Queue pair
583
  */
584
  */
584
 static int qib7322_create_send_wq ( struct ib_device *ibdev,
585
 static int qib7322_create_send_wq ( struct ib_device *ibdev,
585
-				   struct ib_queue_pair *qp ) {
586
+				    struct ib_queue_pair *qp ) {
586
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
587
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
587
 	struct ib_work_queue *wq = &qp->send;
588
 	struct ib_work_queue *wq = &qp->send;
588
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
589
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
601
 
602
 
602
 	/* Allocate space for send buffer usage list */
603
 	/* Allocate space for send buffer usage list */
603
 	qib7322_wq->used = zalloc ( qp->send.num_wqes *
604
 	qib7322_wq->used = zalloc ( qp->send.num_wqes *
604
-				   sizeof ( qib7322_wq->used[0] ) );
605
+				    sizeof ( qib7322_wq->used[0] ) );
605
 	if ( ! qib7322_wq->used )
606
 	if ( ! qib7322_wq->used )
606
 		return -ENOMEM;
607
 		return -ENOMEM;
607
 
608
 
619
  * @v qp		Queue pair
620
  * @v qp		Queue pair
620
  */
621
  */
621
 static void qib7322_destroy_send_wq ( struct ib_device *ibdev __unused,
622
 static void qib7322_destroy_send_wq ( struct ib_device *ibdev __unused,
622
-				     struct ib_queue_pair *qp ) {
623
+				      struct ib_queue_pair *qp ) {
623
 	struct ib_work_queue *wq = &qp->send;
624
 	struct ib_work_queue *wq = &qp->send;
624
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
625
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
625
 
626
 
654
 				QIB7322_VL15_PORT0_SEND_BUF_SIZE );
655
 				QIB7322_VL15_PORT0_SEND_BUF_SIZE );
655
 	qib7322->send_bufs_small =
656
 	qib7322->send_bufs_small =
656
 		qib7322_create_send_bufs ( qib7322, baseaddr_smallpio,
657
 		qib7322_create_send_bufs ( qib7322, baseaddr_smallpio,
657
-					  QIB7322_SMALL_SEND_BUF_SIZE,
658
-					  QIB7322_SMALL_SEND_BUF_START,
659
-					  QIB7322_SMALL_SEND_BUF_USED );
658
+					   QIB7322_SMALL_SEND_BUF_SIZE,
659
+					   QIB7322_SMALL_SEND_BUF_START,
660
+					   QIB7322_SMALL_SEND_BUF_USED );
660
 	if ( ! qib7322->send_bufs_small ) {
661
 	if ( ! qib7322->send_bufs_small ) {
661
 		rc = -ENOMEM;
662
 		rc = -ENOMEM;
662
 		goto err_create_send_bufs_small;
663
 		goto err_create_send_bufs_small;
663
 	}
664
 	}
664
 	qib7322->send_bufs_vl15_port0 =
665
 	qib7322->send_bufs_vl15_port0 =
665
 		qib7322_create_send_bufs ( qib7322, baseaddr_vl15_port0,
666
 		qib7322_create_send_bufs ( qib7322, baseaddr_vl15_port0,
666
-					  QIB7322_VL15_PORT0_SEND_BUF_SIZE,
667
-					  QIB7322_VL15_PORT0_SEND_BUF_START,
668
-					  QIB7322_VL15_PORT0_SEND_BUF_COUNT );
667
+					   QIB7322_VL15_PORT0_SEND_BUF_SIZE,
668
+					   QIB7322_VL15_PORT0_SEND_BUF_START,
669
+					   QIB7322_VL15_PORT0_SEND_BUF_COUNT );
669
 	if ( ! qib7322->send_bufs_vl15_port0 ) {
670
 	if ( ! qib7322->send_bufs_vl15_port0 ) {
670
 		rc = -ENOMEM;
671
 		rc = -ENOMEM;
671
 		goto err_create_send_bufs_vl15_port0;
672
 		goto err_create_send_bufs_vl15_port0;
672
 	}
673
 	}
673
 	qib7322->send_bufs_vl15_port1 =
674
 	qib7322->send_bufs_vl15_port1 =
674
 		qib7322_create_send_bufs ( qib7322, baseaddr_vl15_port1,
675
 		qib7322_create_send_bufs ( qib7322, baseaddr_vl15_port1,
675
-					  QIB7322_VL15_PORT1_SEND_BUF_SIZE,
676
-					  QIB7322_VL15_PORT1_SEND_BUF_START,
677
-					  QIB7322_VL15_PORT1_SEND_BUF_COUNT );
676
+					   QIB7322_VL15_PORT1_SEND_BUF_SIZE,
677
+					   QIB7322_VL15_PORT1_SEND_BUF_START,
678
+					   QIB7322_VL15_PORT1_SEND_BUF_COUNT );
678
 	if ( ! qib7322->send_bufs_vl15_port1 ) {
679
 	if ( ! qib7322->send_bufs_vl15_port1 ) {
679
 		rc = -ENOMEM;
680
 		rc = -ENOMEM;
680
 		goto err_create_send_bufs_vl15_port1;
681
 		goto err_create_send_bufs_vl15_port1;
682
 
683
 
683
 	/* Allocate space for the SendBufAvail array */
684
 	/* Allocate space for the SendBufAvail array */
684
 	qib7322->sendbufavail = malloc_dma ( sizeof ( *qib7322->sendbufavail ),
685
 	qib7322->sendbufavail = malloc_dma ( sizeof ( *qib7322->sendbufavail ),
685
-					    QIB7322_SENDBUFAVAIL_ALIGN );
686
+					     QIB7322_SENDBUFAVAIL_ALIGN );
686
 	if ( ! qib7322->sendbufavail ) {
687
 	if ( ! qib7322->sendbufavail ) {
687
 		rc = -ENOMEM;
688
 		rc = -ENOMEM;
688
 		goto err_alloc_sendbufavail;
689
 		goto err_alloc_sendbufavail;
694
 	BIT_FILL_1 ( &sendbufavailaddr, SendBufAvailAddr,
695
 	BIT_FILL_1 ( &sendbufavailaddr, SendBufAvailAddr,
695
 		     ( virt_to_bus ( qib7322->sendbufavail ) >> 6 ) );
696
 		     ( virt_to_bus ( qib7322->sendbufavail ) >> 6 ) );
696
 	qib7322_writeq ( qib7322, &sendbufavailaddr,
697
 	qib7322_writeq ( qib7322, &sendbufavailaddr,
697
-			QIB_7322_SendBufAvailAddr_offset );
698
+			 QIB_7322_SendBufAvailAddr_offset );
698
 
699
 
699
 	/* Enable sending */
700
 	/* Enable sending */
700
 	memset ( &sendctrlp, 0, sizeof ( sendctrlp ) );
701
 	memset ( &sendctrlp, 0, sizeof ( sendctrlp ) );
757
  * @ret rc		Return status code
758
  * @ret rc		Return status code
758
  */
759
  */
759
 static int qib7322_create_recv_wq ( struct ib_device *ibdev,
760
 static int qib7322_create_recv_wq ( struct ib_device *ibdev,
760
-				   struct ib_queue_pair *qp ) {
761
+				    struct ib_queue_pair *qp ) {
761
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
762
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
762
 	struct ib_work_queue *wq = &qp->recv;
763
 	struct ib_work_queue *wq = &qp->recv;
763
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
764
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
780
 
781
 
781
 	/* Allocate receive header buffer */
782
 	/* Allocate receive header buffer */
782
 	qib7322_wq->header = malloc_dma ( QIB7322_RECV_HEADERS_SIZE,
783
 	qib7322_wq->header = malloc_dma ( QIB7322_RECV_HEADERS_SIZE,
783
-					 QIB7322_RECV_HEADERS_ALIGN );
784
+					  QIB7322_RECV_HEADERS_ALIGN );
784
 	if ( ! qib7322_wq->header ) {
785
 	if ( ! qib7322_wq->header ) {
785
 		rc = -ENOMEM;
786
 		rc = -ENOMEM;
786
 		goto err_alloc_header;
787
 		goto err_alloc_header;
791
 	BIT_FILL_1 ( &rcvhdraddr, RcvHdrAddr,
792
 	BIT_FILL_1 ( &rcvhdraddr, RcvHdrAddr,
792
 		     ( virt_to_bus ( qib7322_wq->header ) >> 2 ) );
793
 		     ( virt_to_bus ( qib7322_wq->header ) >> 2 ) );
793
 	qib7322_writeq_array8b ( qib7322, &rcvhdraddr,
794
 	qib7322_writeq_array8b ( qib7322, &rcvhdraddr,
794
-				QIB_7322_RcvHdrAddr0_offset, ctx );
795
+				 QIB_7322_RcvHdrAddr0_offset, ctx );
795
 	memset ( &rcvhdrtailaddr, 0, sizeof ( rcvhdrtailaddr ) );
796
 	memset ( &rcvhdrtailaddr, 0, sizeof ( rcvhdrtailaddr ) );
796
 	BIT_FILL_1 ( &rcvhdrtailaddr, RcvHdrTailAddr,
797
 	BIT_FILL_1 ( &rcvhdrtailaddr, RcvHdrTailAddr,
797
 		     ( virt_to_bus ( &qib7322_wq->header_prod ) >> 2 ) );
798
 		     ( virt_to_bus ( &qib7322_wq->header_prod ) >> 2 ) );
798
 	qib7322_writeq_array8b ( qib7322, &rcvhdrtailaddr,
799
 	qib7322_writeq_array8b ( qib7322, &rcvhdrtailaddr,
799
-				QIB_7322_RcvHdrTailAddr0_offset, ctx );
800
+				 QIB_7322_RcvHdrTailAddr0_offset, ctx );
800
 	memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
801
 	memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
801
 	BIT_FILL_1 ( &rcvhdrhead, counter, 1 );
802
 	BIT_FILL_1 ( &rcvhdrhead, counter, 1 );
802
 	qib7322_writeq_array64k ( qib7322, &rcvhdrhead,
803
 	qib7322_writeq_array64k ( qib7322, &rcvhdrhead,
803
-				 QIB_7322_RcvHdrHead0_offset, ctx );
804
+				  QIB_7322_RcvHdrHead0_offset, ctx );
804
 	memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
805
 	memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
805
 	BIT_FILL_1 ( &rcvegrindexhead, Value, 1 );
806
 	BIT_FILL_1 ( &rcvegrindexhead, Value, 1 );
806
 	qib7322_writeq_array64k ( qib7322, &rcvegrindexhead,
807
 	qib7322_writeq_array64k ( qib7322, &rcvegrindexhead,
807
-				 QIB_7322_RcvEgrIndexHead0_offset, ctx );
808
+				  QIB_7322_RcvEgrIndexHead0_offset, ctx );
808
 	qib7322_readq_port ( qib7322, &rcvctrlp,
809
 	qib7322_readq_port ( qib7322, &rcvctrlp,
809
-			    QIB_7322_RcvCtrl_0_offset, port );
810
+			     QIB_7322_RcvCtrl_0_offset, port );
810
 	BIT_SET ( &rcvctrlp, ContextEnable[ctx], 1 );
811
 	BIT_SET ( &rcvctrlp, ContextEnable[ctx], 1 );
811
 	qib7322_writeq_port ( qib7322, &rcvctrlp,
812
 	qib7322_writeq_port ( qib7322, &rcvctrlp,
812
-			     QIB_7322_RcvCtrl_0_offset, port );
813
+			      QIB_7322_RcvCtrl_0_offset, port );
813
 	qib7322_readq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
814
 	qib7322_readq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
814
 	BIT_SET ( &rcvctrl, IntrAvail[ctx], 1 );
815
 	BIT_SET ( &rcvctrl, IntrAvail[ctx], 1 );
815
 	qib7322_writeq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
816
 	qib7322_writeq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
834
  * @v qp		Queue pair
835
  * @v qp		Queue pair
835
  */
836
  */
836
 static void qib7322_destroy_recv_wq ( struct ib_device *ibdev,
837
 static void qib7322_destroy_recv_wq ( struct ib_device *ibdev,
837
-				     struct ib_queue_pair *qp ) {
838
+				      struct ib_queue_pair *qp ) {
838
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
839
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
839
 	struct ib_work_queue *wq = &qp->recv;
840
 	struct ib_work_queue *wq = &qp->recv;
840
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
841
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
845
 
846
 
846
 	/* Disable context in hardware */
847
 	/* Disable context in hardware */
847
 	qib7322_readq_port ( qib7322, &rcvctrlp,
848
 	qib7322_readq_port ( qib7322, &rcvctrlp,
848
-			    QIB_7322_RcvCtrl_0_offset, port );
849
+			     QIB_7322_RcvCtrl_0_offset, port );
849
 	BIT_SET ( &rcvctrlp, ContextEnable[ctx], 0 );
850
 	BIT_SET ( &rcvctrlp, ContextEnable[ctx], 0 );
850
 	qib7322_writeq_port ( qib7322, &rcvctrlp,
851
 	qib7322_writeq_port ( qib7322, &rcvctrlp,
851
-			     QIB_7322_RcvCtrl_0_offset, port );
852
+			      QIB_7322_RcvCtrl_0_offset, port );
852
 	qib7322_readq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
853
 	qib7322_readq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
853
 	BIT_SET ( &rcvctrl, IntrAvail[ctx], 0 );
854
 	BIT_SET ( &rcvctrl, IntrAvail[ctx], 0 );
854
 	qib7322_writeq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
855
 	qib7322_writeq ( qib7322, &rcvctrl, QIB_7322_RcvCtrl_offset );
937
 		     RcvQPMapContext4, 8,
938
 		     RcvQPMapContext4, 8,
938
 		     RcvQPMapContext5, 10 );
939
 		     RcvQPMapContext5, 10 );
939
 	qib7322_writeq ( qib7322, &rcvqpmaptablea0,
940
 	qib7322_writeq ( qib7322, &rcvqpmaptablea0,
940
-			QIB_7322_RcvQPMapTableA_0_offset );
941
+			 QIB_7322_RcvQPMapTableA_0_offset );
941
 	memset ( &rcvqpmaptableb0, 0, sizeof ( rcvqpmaptableb0 ) );
942
 	memset ( &rcvqpmaptableb0, 0, sizeof ( rcvqpmaptableb0 ) );
942
 	BIT_FILL_3 ( &rcvqpmaptableb0,
943
 	BIT_FILL_3 ( &rcvqpmaptableb0,
943
 		     RcvQPMapContext6, 12,
944
 		     RcvQPMapContext6, 12,
944
 		     RcvQPMapContext7, 14,
945
 		     RcvQPMapContext7, 14,
945
 		     RcvQPMapContext8, 16 );
946
 		     RcvQPMapContext8, 16 );
946
 	qib7322_writeq ( qib7322, &rcvqpmaptableb0,
947
 	qib7322_writeq ( qib7322, &rcvqpmaptableb0,
947
-			QIB_7322_RcvQPMapTableB_0_offset );
948
+			 QIB_7322_RcvQPMapTableB_0_offset );
948
 	memset ( &rcvqpmaptablea1, 0, sizeof ( rcvqpmaptablea1 ) );
949
 	memset ( &rcvqpmaptablea1, 0, sizeof ( rcvqpmaptablea1 ) );
949
 	BIT_FILL_6 ( &rcvqpmaptablea1,
950
 	BIT_FILL_6 ( &rcvqpmaptablea1,
950
 		     RcvQPMapContext0, 1,
951
 		     RcvQPMapContext0, 1,
954
 		     RcvQPMapContext4, 9,
955
 		     RcvQPMapContext4, 9,
955
 		     RcvQPMapContext5, 11 );
956
 		     RcvQPMapContext5, 11 );
956
 	qib7322_writeq ( qib7322, &rcvqpmaptablea1,
957
 	qib7322_writeq ( qib7322, &rcvqpmaptablea1,
957
-			QIB_7322_RcvQPMapTableA_1_offset );
958
+			 QIB_7322_RcvQPMapTableA_1_offset );
958
 	memset ( &rcvqpmaptableb1, 0, sizeof ( rcvqpmaptableb1 ) );
959
 	memset ( &rcvqpmaptableb1, 0, sizeof ( rcvqpmaptableb1 ) );
959
 	BIT_FILL_3 ( &rcvqpmaptableb1,
960
 	BIT_FILL_3 ( &rcvqpmaptableb1,
960
 		     RcvQPMapContext6, 13,
961
 		     RcvQPMapContext6, 13,
961
 		     RcvQPMapContext7, 15,
962
 		     RcvQPMapContext7, 15,
962
 		     RcvQPMapContext8, 17 );
963
 		     RcvQPMapContext8, 17 );
963
 	qib7322_writeq ( qib7322, &rcvqpmaptableb1,
964
 	qib7322_writeq ( qib7322, &rcvqpmaptableb1,
964
-			QIB_7322_RcvQPMapTableB_1_offset );
965
+			 QIB_7322_RcvQPMapTableB_1_offset );
965
 
966
 
966
 	/* Map multicast QPNs to contexts */
967
 	/* Map multicast QPNs to contexts */
967
 	memset ( &rcvqpmcastctx0, 0, sizeof ( rcvqpmcastctx0 ) );
968
 	memset ( &rcvqpmcastctx0, 0, sizeof ( rcvqpmcastctx0 ) );
968
 	BIT_FILL_1 ( &rcvqpmcastctx0, RcvQpMcContext, 0 );
969
 	BIT_FILL_1 ( &rcvqpmcastctx0, RcvQpMcContext, 0 );
969
 	qib7322_writeq ( qib7322, &rcvqpmcastctx0,
970
 	qib7322_writeq ( qib7322, &rcvqpmcastctx0,
970
-			QIB_7322_RcvQPMulticastContext_0_offset );
971
+			 QIB_7322_RcvQPMulticastContext_0_offset );
971
 	memset ( &rcvqpmcastctx1, 0, sizeof ( rcvqpmcastctx1 ) );
972
 	memset ( &rcvqpmcastctx1, 0, sizeof ( rcvqpmcastctx1 ) );
972
 	BIT_FILL_1 ( &rcvqpmcastctx1, RcvQpMcContext, 1 );
973
 	BIT_FILL_1 ( &rcvqpmcastctx1, RcvQpMcContext, 1 );
973
 	qib7322_writeq ( qib7322, &rcvqpmcastctx1,
974
 	qib7322_writeq ( qib7322, &rcvqpmcastctx1,
974
-			QIB_7322_RcvQPMulticastContext_1_offset );
975
+			 QIB_7322_RcvQPMulticastContext_1_offset );
975
 
976
 
976
 	/* Configure receive header buffer sizes */
977
 	/* Configure receive header buffer sizes */
977
 	memset ( &rcvhdrcnt, 0, sizeof ( rcvhdrcnt ) );
978
 	memset ( &rcvhdrcnt, 0, sizeof ( rcvhdrcnt ) );
980
 	memset ( &rcvhdrentsize, 0, sizeof ( rcvhdrentsize ) );
981
 	memset ( &rcvhdrentsize, 0, sizeof ( rcvhdrentsize ) );
981
 	BIT_FILL_1 ( &rcvhdrentsize, Value, ( QIB7322_RECV_HEADER_SIZE >> 2 ) );
982
 	BIT_FILL_1 ( &rcvhdrentsize, Value, ( QIB7322_RECV_HEADER_SIZE >> 2 ) );
982
 	qib7322_writeq ( qib7322, &rcvhdrentsize,
983
 	qib7322_writeq ( qib7322, &rcvhdrentsize,
983
-			QIB_7322_RcvHdrEntSize_offset );
984
+			 QIB_7322_RcvHdrEntSize_offset );
984
 
985
 
985
 	/* Calculate eager array start addresses for each context */
986
 	/* Calculate eager array start addresses for each context */
986
 	qib7322_readq ( qib7322, &rcvegrbase, QIB_7322_RcvEgrBase_offset );
987
 	qib7322_readq ( qib7322, &rcvegrbase, QIB_7322_RcvEgrBase_offset );
1014
 	memset ( &rxcreditvl, 0, sizeof ( rxcreditvl ) );
1015
 	memset ( &rxcreditvl, 0, sizeof ( rxcreditvl ) );
1015
 	BIT_FILL_1 ( &rxcreditvl, RxMaxCreditVL, QIB7322_MAX_CREDITS_VL0 );
1016
 	BIT_FILL_1 ( &rxcreditvl, RxMaxCreditVL, QIB7322_MAX_CREDITS_VL0 );
1016
 	qib7322_writeq_array8b ( qib7322, &rxcreditvl,
1017
 	qib7322_writeq_array8b ( qib7322, &rxcreditvl,
1017
-				QIB_7322_RxCreditVL0_0_offset, 0 );
1018
+				 QIB_7322_RxCreditVL0_0_offset, 0 );
1018
 	qib7322_writeq_array8b ( qib7322, &rxcreditvl,
1019
 	qib7322_writeq_array8b ( qib7322, &rxcreditvl,
1019
-				QIB_7322_RxCreditVL0_1_offset, 0 );
1020
+				 QIB_7322_RxCreditVL0_1_offset, 0 );
1020
 	BIT_FILL_1 ( &rxcreditvl, RxMaxCreditVL, QIB7322_MAX_CREDITS_VL15 );
1021
 	BIT_FILL_1 ( &rxcreditvl, RxMaxCreditVL, QIB7322_MAX_CREDITS_VL15 );
1021
 	qib7322_writeq_array8b ( qib7322, &rxcreditvl,
1022
 	qib7322_writeq_array8b ( qib7322, &rxcreditvl,
1022
-				QIB_7322_RxCreditVL0_0_offset, 15 );
1023
+				 QIB_7322_RxCreditVL0_0_offset, 15 );
1023
 	qib7322_writeq_array8b ( qib7322, &rxcreditvl,
1024
 	qib7322_writeq_array8b ( qib7322, &rxcreditvl,
1024
-				QIB_7322_RxCreditVL0_1_offset, 15 );
1025
+				 QIB_7322_RxCreditVL0_1_offset, 15 );
1025
 
1026
 
1026
 	return 0;
1027
 	return 0;
1027
 }
1028
 }
1052
  * @ret rc		Return status code
1053
  * @ret rc		Return status code
1053
  */
1054
  */
1054
 static int qib7322_create_cq ( struct ib_device *ibdev,
1055
 static int qib7322_create_cq ( struct ib_device *ibdev,
1055
-			     struct ib_completion_queue *cq ) {
1056
+			       struct ib_completion_queue *cq ) {
1056
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1057
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1057
 	static int cqn;
1058
 	static int cqn;
1058
 
1059
 
1076
  * @v cq		Completion queue
1077
  * @v cq		Completion queue
1077
  */
1078
  */
1078
 static void qib7322_destroy_cq ( struct ib_device *ibdev,
1079
 static void qib7322_destroy_cq ( struct ib_device *ibdev,
1079
-			       struct ib_completion_queue *cq ) {
1080
+				 struct ib_completion_queue *cq ) {
1080
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1081
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1081
 
1082
 
1082
 	/* Nothing to do */
1083
 	/* Nothing to do */
1098
  * @ret rc		Return status code
1099
  * @ret rc		Return status code
1099
  */
1100
  */
1100
 static int qib7322_create_qp ( struct ib_device *ibdev,
1101
 static int qib7322_create_qp ( struct ib_device *ibdev,
1101
-			      struct ib_queue_pair *qp ) {
1102
+			       struct ib_queue_pair *qp ) {
1102
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1103
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1103
 	unsigned int ctx;
1104
 	unsigned int ctx;
1104
 	int rc;
1105
 	int rc;
1139
  * @ret rc		Return status code
1140
  * @ret rc		Return status code
1140
  */
1141
  */
1141
 static int qib7322_modify_qp ( struct ib_device *ibdev,
1142
 static int qib7322_modify_qp ( struct ib_device *ibdev,
1142
-			      struct ib_queue_pair *qp ) {
1143
+			       struct ib_queue_pair *qp ) {
1143
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1144
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1144
 
1145
 
1145
 	/* Nothing to do; the hardware doesn't have a notion of queue
1146
 	/* Nothing to do; the hardware doesn't have a notion of queue
1156
  * @v qp		Queue pair
1157
  * @v qp		Queue pair
1157
  */
1158
  */
1158
 static void qib7322_destroy_qp ( struct ib_device *ibdev,
1159
 static void qib7322_destroy_qp ( struct ib_device *ibdev,
1159
-				struct ib_queue_pair *qp ) {
1160
+				 struct ib_queue_pair *qp ) {
1160
 
1161
 
1161
 	qib7322_destroy_send_wq ( ibdev, qp );
1162
 	qib7322_destroy_send_wq ( ibdev, qp );
1162
 	qib7322_destroy_recv_wq ( ibdev, qp );
1163
 	qib7322_destroy_recv_wq ( ibdev, qp );
1180
  * @ret rc		Return status code
1181
  * @ret rc		Return status code
1181
  */
1182
  */
1182
 static int qib7322_post_send ( struct ib_device *ibdev,
1183
 static int qib7322_post_send ( struct ib_device *ibdev,
1183
-			      struct ib_queue_pair *qp,
1184
-			      struct ib_address_vector *av,
1185
-			      struct io_buffer *iobuf ) {
1184
+			       struct ib_queue_pair *qp,
1185
+			       struct ib_address_vector *av,
1186
+			       struct io_buffer *iobuf ) {
1186
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1187
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1187
 	struct ib_work_queue *wq = &qp->send;
1188
 	struct ib_work_queue *wq = &qp->send;
1188
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1189
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1203
 		return send_buf;
1204
 		return send_buf;
1204
 	start_offset = offset =
1205
 	start_offset = offset =
1205
 		qib7322_send_buffer_offset ( qib7322, qib7322_wq->send_bufs,
1206
 		qib7322_send_buffer_offset ( qib7322, qib7322_wq->send_bufs,
1206
-					    send_buf );
1207
+					     send_buf );
1207
 
1208
 
1208
 	/* Store I/O buffer and send buffer index */
1209
 	/* Store I/O buffer and send buffer index */
1209
 	assert ( wq->iobufs[qib7322_wq->prod] == NULL );
1210
 	assert ( wq->iobufs[qib7322_wq->prod] == NULL );
1263
  * @v wqe_idx		Work queue entry index
1264
  * @v wqe_idx		Work queue entry index
1264
  */
1265
  */
1265
 static void qib7322_complete_send ( struct ib_device *ibdev,
1266
 static void qib7322_complete_send ( struct ib_device *ibdev,
1266
-				   struct ib_queue_pair *qp,
1267
-				   unsigned int wqe_idx ) {
1267
+				    struct ib_queue_pair *qp,
1268
+				    unsigned int wqe_idx ) {
1268
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1269
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1269
 	struct ib_work_queue *wq = &qp->send;
1270
 	struct ib_work_queue *wq = &qp->send;
1270
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1271
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1293
  * @v qp		Queue pair
1294
  * @v qp		Queue pair
1294
  */
1295
  */
1295
 static void qib7322_poll_send_wq ( struct ib_device *ibdev,
1296
 static void qib7322_poll_send_wq ( struct ib_device *ibdev,
1296
-				  struct ib_queue_pair *qp ) {
1297
+				   struct ib_queue_pair *qp ) {
1297
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1298
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1298
 	struct ib_work_queue *wq = &qp->send;
1299
 	struct ib_work_queue *wq = &qp->send;
1299
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1300
 	struct qib7322_send_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1312
 
1313
 
1313
 		/* Increment consumer counter */
1314
 		/* Increment consumer counter */
1314
 		qib7322_wq->cons = ( ( qib7322_wq->cons + 1 ) &
1315
 		qib7322_wq->cons = ( ( qib7322_wq->cons + 1 ) &
1315
-				    ( wq->num_wqes - 1 ) );
1316
+				     ( wq->num_wqes - 1 ) );
1316
 	}
1317
 	}
1317
 }
1318
 }
1318
 
1319
 
1325
  * @ret rc		Return status code
1326
  * @ret rc		Return status code
1326
  */
1327
  */
1327
 static int qib7322_post_recv ( struct ib_device *ibdev,
1328
 static int qib7322_post_recv ( struct ib_device *ibdev,
1328
-			      struct ib_queue_pair *qp,
1329
-			      struct io_buffer *iobuf ) {
1329
+			       struct ib_queue_pair *qp,
1330
+			       struct io_buffer *iobuf ) {
1330
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1331
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1331
 	struct ib_work_queue *wq = &qp->recv;
1332
 	struct ib_work_queue *wq = &qp->recv;
1332
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1333
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1377
 		     Addr, ( addr >> 11 ),
1378
 		     Addr, ( addr >> 11 ),
1378
 		     BufSize, bufsize );
1379
 		     BufSize, bufsize );
1379
 	qib7322_writeq_array8b ( qib7322, &rcvegr, qib7322_wq->eager_array,
1380
 	qib7322_writeq_array8b ( qib7322, &rcvegr, qib7322_wq->eager_array,
1380
-				qib7322_wq->eager_prod );
1381
+				 qib7322_wq->eager_prod );
1381
 	DBGC2 ( qib7322, "QIB7322 %p QPN %ld RX egr %04x(%04x) posted "
1382
 	DBGC2 ( qib7322, "QIB7322 %p QPN %ld RX egr %04x(%04x) posted "
1382
 		"[%lx,%lx)\n", qib7322, qp->qpn, qib7322_wq->eager_prod,
1383
 		"[%lx,%lx)\n", qib7322, qp->qpn, qib7322_wq->eager_prod,
1383
 		wqe_idx, addr, ( addr + len ) );
1384
 		wqe_idx, addr, ( addr + len ) );
1384
 
1385
 
1385
 	/* Increment producer index */
1386
 	/* Increment producer index */
1386
 	qib7322_wq->eager_prod = ( ( qib7322_wq->eager_prod + 1 ) &
1387
 	qib7322_wq->eager_prod = ( ( qib7322_wq->eager_prod + 1 ) &
1387
-				 ( qib7322_wq->eager_entries - 1 ) );
1388
+				   ( qib7322_wq->eager_entries - 1 ) );
1388
 
1389
 
1389
 	/* Update head index */
1390
 	/* Update head index */
1390
 	memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
1391
 	memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
1392
 		     Value, ( ( qib7322_wq->eager_prod + 1 ) &
1393
 		     Value, ( ( qib7322_wq->eager_prod + 1 ) &
1393
 			      ( qib7322_wq->eager_entries - 1 ) ) );
1394
 			      ( qib7322_wq->eager_entries - 1 ) ) );
1394
 	qib7322_writeq_array64k ( qib7322, &rcvegrindexhead,
1395
 	qib7322_writeq_array64k ( qib7322, &rcvegrindexhead,
1395
-				QIB_7322_RcvEgrIndexHead0_offset, ctx );
1396
+				  QIB_7322_RcvEgrIndexHead0_offset, ctx );
1396
 
1397
 
1397
 	return 0;
1398
 	return 0;
1398
 }
1399
 }
1405
  * @v header_offs	Header offset
1406
  * @v header_offs	Header offset
1406
  */
1407
  */
1407
 static void qib7322_complete_recv ( struct ib_device *ibdev,
1408
 static void qib7322_complete_recv ( struct ib_device *ibdev,
1408
-				   struct ib_queue_pair *qp,
1409
-				   unsigned int header_offs ) {
1409
+				    struct ib_queue_pair *qp,
1410
+				    unsigned int header_offs ) {
1410
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1411
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1411
 	struct ib_work_queue *wq = &qp->recv;
1412
 	struct ib_work_queue *wq = &qp->recv;
1412
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1413
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1542
 		/* Clear eager buffer */
1543
 		/* Clear eager buffer */
1543
 		memset ( &rcvegr, 0, sizeof ( rcvegr ) );
1544
 		memset ( &rcvegr, 0, sizeof ( rcvegr ) );
1544
 		qib7322_writeq_array8b ( qib7322, &rcvegr,
1545
 		qib7322_writeq_array8b ( qib7322, &rcvegr,
1545
-					qib7322_wq->eager_array,
1546
-					qib7322_wq->eager_cons );
1546
+					 qib7322_wq->eager_array,
1547
+					 qib7322_wq->eager_cons );
1547
 
1548
 
1548
 		/* Increment consumer index */
1549
 		/* Increment consumer index */
1549
 		qib7322_wq->eager_cons = ( ( qib7322_wq->eager_cons + 1 ) &
1550
 		qib7322_wq->eager_cons = ( ( qib7322_wq->eager_cons + 1 ) &
1550
-					  ( qib7322_wq->eager_entries - 1 ) );
1551
+					   ( qib7322_wq->eager_entries - 1 ) );
1551
 	}
1552
 	}
1552
 }
1553
 }
1553
 
1554
 
1558
  * @v qp		Queue pair
1559
  * @v qp		Queue pair
1559
  */
1560
  */
1560
 static void qib7322_poll_recv_wq ( struct ib_device *ibdev,
1561
 static void qib7322_poll_recv_wq ( struct ib_device *ibdev,
1561
-				  struct ib_queue_pair *qp ) {
1562
+				   struct ib_queue_pair *qp ) {
1562
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1563
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1563
 	struct ib_work_queue *wq = &qp->recv;
1564
 	struct ib_work_queue *wq = &qp->recv;
1564
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1565
 	struct qib7322_recv_work_queue *qib7322_wq = ib_wq_get_drvdata ( wq );
1597
 		     RcvHeadPointer, ( qib7322_wq->header_cons >> 2 ),
1598
 		     RcvHeadPointer, ( qib7322_wq->header_cons >> 2 ),
1598
 		     counter, 1 );
1599
 		     counter, 1 );
1599
 	qib7322_writeq_array64k ( qib7322, &rcvhdrhead,
1600
 	qib7322_writeq_array64k ( qib7322, &rcvhdrhead,
1600
-				QIB_7322_RcvHdrHead0_offset, ctx );
1601
+				  QIB_7322_RcvHdrHead0_offset, ctx );
1601
 }
1602
 }
1602
 
1603
 
1603
 /**
1604
 /**
1607
  * @v cq		Completion queue
1608
  * @v cq		Completion queue
1608
  */
1609
  */
1609
 static void qib7322_poll_cq ( struct ib_device *ibdev,
1610
 static void qib7322_poll_cq ( struct ib_device *ibdev,
1610
-			     struct ib_completion_queue *cq ) {
1611
+			      struct ib_completion_queue *cq ) {
1611
 	struct ib_work_queue *wq;
1612
 	struct ib_work_queue *wq;
1612
 
1613
 
1613
 	/* Poll associated send and receive queues */
1614
 	/* Poll associated send and receive queues */
1640
 	/* Check for and clear status bits */
1641
 	/* Check for and clear status bits */
1641
 	DBG_DISABLE ( DBGLVL_IO );
1642
 	DBG_DISABLE ( DBGLVL_IO );
1642
 	qib7322_readq_port ( qib7322, &errstatus,
1643
 	qib7322_readq_port ( qib7322, &errstatus,
1643
-			    QIB_7322_ErrStatus_0_offset, port );
1644
+			     QIB_7322_ErrStatus_0_offset, port );
1644
 	if ( errstatus.u.qwords[0] ) {
1645
 	if ( errstatus.u.qwords[0] ) {
1645
 		DBGC ( qib7322, "QIB7322 %p port %d status %08x%08x\n", qib7322,
1646
 		DBGC ( qib7322, "QIB7322 %p port %d status %08x%08x\n", qib7322,
1646
 		       port, errstatus.u.dwords[1],  errstatus.u.dwords[0] );
1647
 		       port, errstatus.u.dwords[1],  errstatus.u.dwords[0] );
1647
 		qib7322_writeq_port ( qib7322, &errstatus,
1648
 		qib7322_writeq_port ( qib7322, &errstatus,
1648
-				     QIB_7322_ErrClear_0_offset, port );
1649
+				      QIB_7322_ErrClear_0_offset, port );
1649
 	}
1650
 	}
1650
 	DBG_ENABLE ( DBGLVL_IO );
1651
 	DBG_ENABLE ( DBGLVL_IO );
1651
 
1652
 
1668
  * @ret supported	Supported link speeds
1669
  * @ret supported	Supported link speeds
1669
  */
1670
  */
1670
 static unsigned int qib7322_link_speed_supported ( struct qib7322 *qib7322,
1671
 static unsigned int qib7322_link_speed_supported ( struct qib7322 *qib7322,
1671
-						  unsigned int port ) {
1672
+						   unsigned int port ) {
1672
 	struct QIB_7322_feature_mask features;
1673
 	struct QIB_7322_feature_mask features;
1673
 	struct QIB_7322_Revision revision;
1674
 	struct QIB_7322_Revision revision;
1674
 	unsigned int supported;
1675
 	unsigned int supported;
1676
 
1677
 
1677
 	/* Read the active feature mask */
1678
 	/* Read the active feature mask */
1678
 	qib7322_readq ( qib7322, &features,
1679
 	qib7322_readq ( qib7322, &features,
1679
-		       QIB_7322_active_feature_mask_offset );
1680
+			QIB_7322_active_feature_mask_offset );
1680
 	switch ( port ) {
1681
 	switch ( port ) {
1681
 	case 0 :
1682
 	case 0 :
1682
 		supported = BIT_GET ( &features, Port0_Link_Speed_Supported );
1683
 		supported = BIT_GET ( &features, Port0_Link_Speed_Supported );
1726
 
1727
 
1727
 	/* Enable link */
1728
 	/* Enable link */
1728
 	qib7322_readq_port ( qib7322, &ibcctrla,
1729
 	qib7322_readq_port ( qib7322, &ibcctrla,
1729
-			    QIB_7322_IBCCtrlA_0_offset, port );
1730
+			     QIB_7322_IBCCtrlA_0_offset, port );
1730
 	BIT_SET ( &ibcctrla, IBLinkEn, 1 );
1731
 	BIT_SET ( &ibcctrla, IBLinkEn, 1 );
1731
 	qib7322_writeq_port ( qib7322, &ibcctrla,
1732
 	qib7322_writeq_port ( qib7322, &ibcctrla,
1732
-			     QIB_7322_IBCCtrlA_0_offset, port );
1733
+			      QIB_7322_IBCCtrlA_0_offset, port );
1733
 
1734
 
1734
 	return 0;
1735
 	return 0;
1735
 }
1736
 }
1746
 
1747
 
1747
 	/* Disable link */
1748
 	/* Disable link */
1748
 	qib7322_readq_port ( qib7322, &ibcctrla,
1749
 	qib7322_readq_port ( qib7322, &ibcctrla,
1749
-			    QIB_7322_IBCCtrlA_0_offset, port );
1750
+			     QIB_7322_IBCCtrlA_0_offset, port );
1750
 	BIT_SET ( &ibcctrla, IBLinkEn, 0 );
1751
 	BIT_SET ( &ibcctrla, IBLinkEn, 0 );
1751
 	qib7322_writeq_port ( qib7322, &ibcctrla,
1752
 	qib7322_writeq_port ( qib7322, &ibcctrla,
1752
-			     QIB_7322_IBCCtrlA_0_offset, port );
1753
+			      QIB_7322_IBCCtrlA_0_offset, port );
1753
 }
1754
 }
1754
 
1755
 
1755
 /***************************************************************************
1756
 /***************************************************************************
1768
  * @ret rc		Return status code
1769
  * @ret rc		Return status code
1769
  */
1770
  */
1770
 static int qib7322_mcast_attach ( struct ib_device *ibdev,
1771
 static int qib7322_mcast_attach ( struct ib_device *ibdev,
1771
-				struct ib_queue_pair *qp,
1772
-				struct ib_gid *gid ) {
1772
+				  struct ib_queue_pair *qp,
1773
+				  struct ib_gid *gid ) {
1773
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1774
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1774
 
1775
 
1775
 	( void ) qib7322;
1776
 	( void ) qib7322;
1786
  * @v gid		Multicast GID
1787
  * @v gid		Multicast GID
1787
  */
1788
  */
1788
 static void qib7322_mcast_detach ( struct ib_device *ibdev,
1789
 static void qib7322_mcast_detach ( struct ib_device *ibdev,
1789
-				 struct ib_queue_pair *qp,
1790
-				 struct ib_gid *gid ) {
1790
+				   struct ib_queue_pair *qp,
1791
+				   struct ib_gid *gid ) {
1791
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1792
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
1792
 
1793
 
1793
 	( void ) qib7322;
1794
 	( void ) qib7322;
1836
  * @ret non-zero	Input is a logic 1
1837
  * @ret non-zero	Input is a logic 1
1837
  */
1838
  */
1838
 static int qib7322_i2c_read_bit ( struct bit_basher *basher,
1839
 static int qib7322_i2c_read_bit ( struct bit_basher *basher,
1839
-				 unsigned int bit_id ) {
1840
+				  unsigned int bit_id ) {
1840
 	struct qib7322 *qib7322 =
1841
 	struct qib7322 *qib7322 =
1841
 		container_of ( basher, struct qib7322, i2c.basher );
1842
 		container_of ( basher, struct qib7322, i2c.basher );
1842
 	struct QIB_7322_EXTStatus extstatus;
1843
 	struct QIB_7322_EXTStatus extstatus;
1860
  * @v data		Value to write
1861
  * @v data		Value to write
1861
  */
1862
  */
1862
 static void qib7322_i2c_write_bit ( struct bit_basher *basher,
1863
 static void qib7322_i2c_write_bit ( struct bit_basher *basher,
1863
-				   unsigned int bit_id, unsigned long data ) {
1864
+				    unsigned int bit_id, unsigned long data ) {
1864
 	struct qib7322 *qib7322 =
1865
 	struct qib7322 *qib7322 =
1865
 		container_of ( basher, struct qib7322, i2c.basher );
1866
 		container_of ( basher, struct qib7322, i2c.basher );
1866
 	struct QIB_7322_EXTCtrl extctrl;
1867
 	struct QIB_7322_EXTCtrl extctrl;
2000
 	/* Wait for Ready bit to be asserted */
2001
 	/* Wait for Ready bit to be asserted */
2001
 	for ( i = 0 ; i < QIB7322_AHB_MAX_WAIT_US ; i++ ) {
2002
 	for ( i = 0 ; i < QIB7322_AHB_MAX_WAIT_US ; i++ ) {
2002
 		qib7322_readq ( qib7322, &transaction,
2003
 		qib7322_readq ( qib7322, &transaction,
2003
-			       QIB_7322_ahb_transaction_reg_offset );
2004
+				QIB_7322_ahb_transaction_reg_offset );
2004
 		if ( BIT_GET ( &transaction, ahb_rdy ) )
2005
 		if ( BIT_GET ( &transaction, ahb_rdy ) )
2005
 			return 0;
2006
 			return 0;
2006
 		udelay ( 1 );
2007
 		udelay ( 1 );
2019
  * @ret rc		Return status code
2020
  * @ret rc		Return status code
2020
  */
2021
  */
2021
 static int qib7322_ahb_request ( struct qib7322 *qib7322,
2022
 static int qib7322_ahb_request ( struct qib7322 *qib7322,
2022
-				unsigned int location ) {
2023
+				 unsigned int location ) {
2023
 	struct QIB_7322_ahb_access_ctrl access;
2024
 	struct QIB_7322_ahb_access_ctrl access;
2024
 	int rc;
2025
 	int rc;
2025
 
2026
 
2063
  * You must have already acquired ownership of the AHB.
2064
  * You must have already acquired ownership of the AHB.
2064
  */
2065
  */
2065
 static int qib7322_ahb_read ( struct qib7322 *qib7322, unsigned int location,
2066
 static int qib7322_ahb_read ( struct qib7322 *qib7322, unsigned int location,
2066
-			     uint32_t *data ) {
2067
+			      uint32_t *data ) {
2067
 	struct QIB_7322_ahb_transaction_reg xact;
2068
 	struct QIB_7322_ahb_transaction_reg xact;
2068
 	int rc;
2069
 	int rc;
2069
 
2070
 
2095
  * You must have already acquired ownership of the AHB.
2096
  * You must have already acquired ownership of the AHB.
2096
  */
2097
  */
2097
 static int qib7322_ahb_write ( struct qib7322 *qib7322, unsigned int location,
2098
 static int qib7322_ahb_write ( struct qib7322 *qib7322, unsigned int location,
2098
-			      uint32_t data ) {
2099
+			       uint32_t data ) {
2099
 	struct QIB_7322_ahb_transaction_reg xact;
2100
 	struct QIB_7322_ahb_transaction_reg xact;
2100
 	int rc;
2101
 	int rc;
2101
 
2102
 
2124
  * @ret rc		Return status code
2125
  * @ret rc		Return status code
2125
  */
2126
  */
2126
 static int qib7322_ahb_mod_reg ( struct qib7322 *qib7322, unsigned int location,
2127
 static int qib7322_ahb_mod_reg ( struct qib7322 *qib7322, unsigned int location,
2127
-				uint32_t value, uint32_t mask ) {
2128
+				 uint32_t value, uint32_t mask ) {
2128
 	uint32_t old_value;
2129
 	uint32_t old_value;
2129
 	uint32_t new_value;
2130
 	uint32_t new_value;
2130
 	int rc;
2131
 	int rc;
2167
  * @ret rc		Return status code
2168
  * @ret rc		Return status code
2168
  */
2169
  */
2169
 static int qib7322_ahb_mod_reg_all ( struct qib7322 *qib7322, unsigned int reg,
2170
 static int qib7322_ahb_mod_reg_all ( struct qib7322 *qib7322, unsigned int reg,
2170
-				    uint32_t value, uint32_t mask ) {
2171
+				     uint32_t value, uint32_t mask ) {
2171
 	unsigned int port;
2172
 	unsigned int port;
2172
 	unsigned int channel;
2173
 	unsigned int channel;
2173
 	unsigned int location;
2174
 	unsigned int location;
2177
 		for ( channel = 0 ; channel < QIB7322_MAX_WIDTH ; channel++ ) {
2178
 		for ( channel = 0 ; channel < QIB7322_MAX_WIDTH ; channel++ ) {
2178
 			location = QIB7322_AHB_LOCATION ( port, channel, reg );
2179
 			location = QIB7322_AHB_LOCATION ( port, channel, reg );
2179
 			if ( ( rc = qib7322_ahb_mod_reg ( qib7322, location,
2180
 			if ( ( rc = qib7322_ahb_mod_reg ( qib7322, location,
2180
-							 value, mask ) ) != 0 )
2181
+							  value, mask ) ) != 0 )
2181
 				return rc;
2182
 				return rc;
2182
 		}
2183
 		}
2183
 	}
2184
 	}
2283
  * @ret rc		Return status code
2284
  * @ret rc		Return status code
2284
  */
2285
  */
2285
 static int qib7322_probe ( struct pci_device *pci,
2286
 static int qib7322_probe ( struct pci_device *pci,
2286
-			  const struct pci_device_id *id __unused ) {
2287
+			   const struct pci_device_id *id __unused ) {
2287
 	struct qib7322 *qib7322;
2288
 	struct qib7322 *qib7322;
2288
 	struct QIB_7322_Revision revision;
2289
 	struct QIB_7322_Revision revision;
2289
 	struct ib_device *ibdev;
2290
 	struct ib_device *ibdev;

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