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Synced across updates from Etherboot 5.4 tree

tags/v0.9.3
Michael Brown 19 years ago
parent
commit
4e87543c74

+ 6
- 0
src/arch/armnommu/Config View File

@@ -17,6 +17,12 @@ CFLAGS+= -DRAWADDR=0x40100000
17 17
 # NIC Debug Outputs
18 18
 #CFLAGS+= -DDEBUG_NIC
19 19
 
20
+# Reduced Media Independent Interface
21
+# MAZBR LPEC2001: MII	(Intel LXT971ALE at 0..1)
22
+# Elmeg D@VOS   : RMII	(Altima AC104-QF at 4..7)
23
+# Telekom XI521 : RMII	(Altima AC104-QF at 4..7)
24
+#CFLAGS+= -DRMII
25
+
20 26
 # Fixed MAC address
21 27
 # p2001_eth has no flash and fixed mac address
22 28
 #CFLAGS+=	-DMAC_HW_ADDR_DRV="'H','Y','L','N','X','1'"

+ 2
- 2
src/arch/armnommu/core/serial.c View File

@@ -17,7 +17,7 @@ void serial_putc(int ch)
17 17
 {
18 18
 	/* wait for room in the 32 byte tx FIFO */
19 19
 	while ((P2001_UART->r.STATUS & 0x3f) > /* 30 */ 0) ;
20
-	P2001_UART->w.TX1 = ch & 0xff;
20
+	P2001_UART->w.TX[0] = ch & 0xff;
21 21
 }
22 22
 
23 23
 /*
@@ -27,7 +27,7 @@ void serial_putc(int ch)
27 27
 int serial_getc(void)
28 28
 {
29 29
 	while (((P2001_UART->r.STATUS >> 6) & 0x3f) == 0) ;
30
-	return P2001_UART->r.RX1 & 0xff;
30
+	return P2001_UART->r.RX[0] & 0xff;
31 31
 }
32 32
 
33 33
 /*

+ 216
- 149
src/arch/armnommu/drivers/net/p2001_eth.c View File

@@ -1,10 +1,10 @@
1 1
 /**************************************************************************
2
-Etherboot -  BOOTP/TFTP Bootstrap Program
3
-P2001 NIC driver for Etherboot
4
-***************************************************************************/
2
+ * Etherboot -  BOOTP/TFTP Bootstrap Program
3
+ * P2001 NIC driver for Etherboot
4
+ **************************************************************************/
5 5
 
6 6
 /*
7
- *  Copyright (C) 2004 Tobias Lorenz
7
+ *  Copyright (C) 2005 Tobias Lorenz
8 8
  *
9 9
  * This program is free software; you can redistribute it and/or modify
10 10
  * it under the terms of the GNU General Public License version 2 as
@@ -19,7 +19,7 @@ P2001 NIC driver for Etherboot
19 19
 #include "isa.h"
20 20
 
21 21
 #include "hardware.h"
22
-#include "lxt971a.h"
22
+#include "mii.h"
23 23
 #include "timer.h"
24 24
 
25 25
 
@@ -31,25 +31,20 @@ static unsigned char MAC_HW_ADDR[6]={MAC_HW_ADDR_DRV};
31 31
 #define DMA_BUF_SIZE	2048	/* Buffer size */
32 32
 static DMA_DSC txd              __attribute__ ((__section__(".dma.desc")));
33 33
 static DMA_DSC rxd[NUM_RX_DESC] __attribute__ ((__section__(".dma.desc")));
34
-static unsigned char rxb[NUM_RX_DESC * DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
35
-static unsigned char txb[              DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
34
+static char rxb[NUM_RX_DESC * DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
35
+static char txb[              DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
36 36
 static unsigned int cur_rx;
37 37
 
38 38
 /* Device selectors */
39 39
 static unsigned int cur_channel;	// DMA channel    : 0..3
40 40
 static unsigned int cur_phy;		// PHY Address    : 0..31
41 41
 static P2001_ETH_regs_ptr EU;		// Ethernet Unit  : 0x0018_000 with _=0..3
42
-static P2001_ETH_regs_ptr MU;		// Management Unit: 0x00180000
43 42
 
44
-#define MDIO_MAXCOUNT 1000			/* mdio abort */
45
-static unsigned int mdio_error;			/* mdio error */
46
-
47
-/* Function prototypes */
48
-static void         p2001_eth_mdio_init ();
49
-static void         p2001_eth_mdio_write(unsigned int phyadr, unsigned int regadr, unsigned int data);
50
-static unsigned int p2001_eth_mdio_read (unsigned int phyadr, unsigned int regadr);
51
-extern unsigned int p2001_eth_mdio_error;
43
+/* mdio handling */
44
+static int          p2001_eth_mdio_read (int phy_id, int location);
45
+static void         p2001_eth_mdio_write(int phy_id, int location, int val);
52 46
 
47
+/* net_device functions */
53 48
 static int          p2001_eth_poll      (struct nic *nic, int retrieve);
54 49
 static void         p2001_eth_transmit  (struct nic *nic, const char *d,
55 50
 					unsigned int t, unsigned int s, const char *p);
@@ -60,103 +55,107 @@ static void         p2001_eth_init      ();
60 55
 static void         p2001_eth_disable   (struct dev *dev);
61 56
 
62 57
 static int          p2001_eth_check_link(unsigned int phy);
58
+static int          link;
59
+static void         p2001_eth_phyreset  ();
63 60
 static int          p2001_eth_probe     (struct dev *dev, unsigned short *probe_addrs __unused);
64 61
 
62
+/* Supported MII list */
63
+static struct mii_chip_info {
64
+	const char * name;
65
+	unsigned int physid;	// (MII_PHYSID2 << 16) | MII_PHYSID1
66
+} mii_chip_table[] = {
67
+	{ "Intel LXT971A",	0x78e20013 },
68
+	{ "Altima AC104-QF",	0x55410022 },
69
+	{NULL,0},
70
+};
71
+
72
+
65 73
 
66 74
 /**************************************************************************
67
-PHY MANAGEMENT UNIT - Read/write
68
-***************************************************************************/
69
-static void p2001_eth_mdio_init()
75
+ * PHY MANAGEMENT UNIT - Read/write
76
+ **************************************************************************/
77
+
78
+/**
79
+ *	mdio_read - read MII PHY register
80
+ *	@dev: the net device to read
81
+ *	@regadr: the phy register id to read
82
+ *
83
+ *	Read MII registers through MDIO and MDC
84
+ *	using MDIO management frame structure and protocol(defined by ISO/IEC).
85
+ */
86
+static int p2001_eth_mdio_read(int phy_id, int location)
70 87
 {
71
-	/* reset ethernet PHYs */
72
-	printf("Resetting PHYs...\n");
88
+	int result, boguscnt = 1000;
73 89
 
74
-	/* GPIO24/25: TX_ER2/TX_ER0 */
75
-	/* GPIO26/27: PHY_RESET/TX_ER1 */
76
-	P2001_GPIO->PIN_MUX |= 0x0018;
77
-	// 31-16: 0000 1111 0000 0000
78
-	P2001_GPIO->GPIO2_En |= 0x0400;
90
+	do {
91
+		/* Warten bis Hardware inaktiv (MIU = "0") */
92
+		while (P2001_MU->MU_CNTL & 0x8000)
93
+			barrier();
79 94
 
80
-	P2001_GPIO->GPIO2_Out |= 0x04000000;
81
-	P2001_GPIO->GPIO2_Out &= ~0x0400;
82
-	mdelay(500);
83
-	P2001_GPIO->GPIO2_Out |= 0x0400;
95
+		/* Schreiben MU_CNTL */
96
+		P2001_MU->MU_CNTL = location + (phy_id<<5) + (2<<10);
84 97
 
85
-	/* set management unit clock divisor */
86
-	// max. MDIO CLK = 2.048 MHz (EU.doc)
87
-	// max. MDIO CLK = 8.000 MHz (LXT971A)
88
-	// sysclk/(2*(n+1)) = MDIO CLK <= 2.048 MHz
89
-	// n >= sysclk/4.096 MHz - 1
90
-#if SYSCLK == 73728000
91
-	P2001_MU->MU_DIV = 17;	// 73.728 MHZ =17=> 2.020 MHz
92
-#else
93
-	//MU->MU_DIV = (SYSCLK/4.096)-1;
94
-#error "Please define a proper MDIO CLK divisor for that sysclk."
95
-#endif
96
-	asm("nop \n nop");
98
+		/* Warten bis Hardware aktiv (MIU = "1") */
99
+		while ((P2001_MU->MU_CNTL & 0x8000) == 0)
100
+			barrier();
101
+		//asm("nop \r\n nop");
102
+
103
+		/* Warten bis Hardware inaktiv (MIU = "0") */
104
+		while (P2001_MU->MU_CNTL & 0x8000)
105
+			barrier();
106
+
107
+		/* Fehler, wenn MDIO Read Error (MRE = "1") */
108
+	} while ((P2001_MU->MU_CNTL & 0x4000) && (--boguscnt > 0));
109
+
110
+	/* Lesen MU_DATA */
111
+	result = P2001_MU->MU_DATA;
112
+
113
+	if (boguscnt == 0)
114
+		return 0;
115
+	if ((result & 0xffff) == 0xffff)
116
+		return 0;
117
+
118
+	return result & 0xffff;
97 119
 }
98 120
 
99
-static void p2001_eth_mdio_write(unsigned int phyadr, unsigned int regadr, unsigned int data)
100
-{
101
-	static unsigned int count;
102
-	count = 0;
103 121
 
122
+/**
123
+ *	mdio_write - write MII PHY register
124
+ *	@dev: the net device to write
125
+ *	@regadr: the phy register id to write
126
+ *	@value: the register value to write with
127
+ *
128
+ *	Write MII registers with @value through MDIO and MDC
129
+ *	using MDIO management frame structure and protocol(defined by ISO/IEC)
130
+ */
131
+static void p2001_eth_mdio_write(int phy_id, int location, int val)
132
+{
104 133
 	/* Warten bis Hardware inaktiv (MIU = "0") */
105
-	while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
106
-		count++;
134
+	while (P2001_MU->MU_CNTL & 0x8000)
135
+		barrier();
107 136
 
108 137
 	/* Schreiben MU_DATA */
109
-	MU->MU_DATA = data;
138
+	P2001_MU->MU_DATA = val;
110 139
 
111 140
 	/* Schreiben MU_CNTL */
112
-	MU->MU_CNTL = regadr + (phyadr<<5) + (1<<10);
141
+	P2001_MU->MU_CNTL = location + (phy_id<<5) + (1<<10);
113 142
 
114 143
 	/* Warten bis Hardware aktiv (MIU = "1") */
115
-	while (((MU->MU_CNTL & 0x8000) == 0) && (count < MDIO_MAXCOUNT))
116
-		count++;
144
+	while ((P2001_MU->MU_CNTL & 0x8000) == 0)
145
+		barrier();
117 146
 	//asm("nop \r\n nop");
118 147
 
119 148
 	/* Warten bis Hardware inaktiv (MIU = "0") */
120
-	while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
121
-		count++;
122
-
123
-	mdio_error = (count >= MDIO_MAXCOUNT);
149
+	while (P2001_MU->MU_CNTL & 0x8000)
150
+		barrier();
124 151
 }
125 152
 
126
-static unsigned int p2001_eth_mdio_read(unsigned int phyadr, unsigned int regadr)
127
-{
128
-	static unsigned int count;
129
-	count = 0;
130
-
131
-	do {
132
-		/* Warten bis Hardware inaktiv (MIU = "0") */
133
-		while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
134
-			count++;
135
-
136
-		/* Schreiben MU_CNTL */
137
-		MU->MU_CNTL = regadr + (phyadr<<5) + (2<<10);
138
-
139
-		/* Warten bis Hardware aktiv (MIU = "1") */
140
-		while (((MU->MU_CNTL & 0x8000) == 0) && (count < MDIO_MAXCOUNT))
141
-			count++;
142
-		//asm("nop \r\n nop");
143
-
144
-		/* Warten bis Hardware inaktiv (MIU = "0") */
145
-		while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
146
-			count++;
147
-
148
-		/* Fehler, wenn MDIO Read Error (MRE = "1") */
149
-	} while ((MU->MU_CNTL & 0x4000) && (count < MDIO_MAXCOUNT));
150
-
151
-	/* Lesen MU_DATA */
152
-	mdio_error = (count >= MDIO_MAXCOUNT);
153
-	return MU->MU_DATA;
154
-}
155 153
 
156 154
 
157 155
 /**************************************************************************
158
-POLL - Wait for a frame
159
-***************************************************************************/
156
+ * POLL - Wait for a frame
157
+ **************************************************************************/
158
+
160 159
 /* Function: p2001_eth_poll
161 160
  *
162 161
  * Description: checks for a received packet and returns it if found.
@@ -231,9 +230,11 @@ static int p2001_eth_poll(struct nic *nic, int retrieve)
231 230
 }
232 231
 
233 232
 
233
+
234 234
 /**************************************************************************
235
-TRANSMIT - Transmit a frame
236
-***************************************************************************/
235
+ * TRANSMIT - Transmit a frame
236
+ **************************************************************************/
237
+
237 238
 /* Function: p2001_eth_transmit
238 239
  *
239 240
  * Description: transmits a packet and waits for completion or timeout.
@@ -271,7 +272,7 @@ static void p2001_eth_transmit(
271 272
 	// TMAC_CNTL.ATP does the same
272 273
 
273 274
 #ifdef DEBUG_NIC
274
-	printf("p2001_eth_transmit: packet from %! to %! sent\n", txb+ETH_ALEN, txb);
275
+	printf("p2001_eth_transmit: packet from %! to %! sent (size: %d)\n", txb+ETH_ALEN, txb, s);
275 276
 #endif
276 277
 
277 278
 	/* configure descriptor */
@@ -281,12 +282,12 @@ static void p2001_eth_transmit(
281 282
 
282 283
 	/* restart the transmitter */
283 284
 	EU->TMAC_DMA_EN = 0x01;		/* set run bit */
284
-	while(EU->TMAC_DMA_EN & 0x01) ;	/* wait */
285
+	while(EU->TMAC_DMA_EN & 0x01);	/* wait */
285 286
 
286 287
 #ifdef DEBUG_NIC
287 288
 	/* check status */
288 289
 	status = EU->TMAC_DMA_STAT;
289
-	if (status & ~(0x40))
290
+	if (status & ~(0x40))	// not END
290 291
 		printf("p2001_eth_transmit: dma status=0x%hx\n", status);
291 292
 
292 293
 	printf("TMAC_MIB6..7: %d:%d\n", EU->TMAC_MIB6, EU->TMAC_MIB7);
@@ -294,9 +295,11 @@ static void p2001_eth_transmit(
294 295
 }
295 296
 
296 297
 
298
+
297 299
 /**************************************************************************
298
-IRQ - Enable, Disable or Force Interrupts
299
-***************************************************************************/
300
+ * IRQ - Enable, Disable or Force Interrupts
301
+ **************************************************************************/
302
+
300 303
 /* Function: p2001_eth_irq
301 304
  *
302 305
  * Description: Enable, Disable, or Force, interrupts
@@ -321,9 +324,11 @@ p2001_eth_irq(struct nic *nic __unused, irq_action_t action __unused)
321 324
 }
322 325
 
323 326
 
327
+
324 328
 /**************************************************************************
325
-INIT - Initialize device
326
-***************************************************************************/
329
+ * INIT - Initialize device
330
+ **************************************************************************/
331
+
327 332
 /* Function: p2001_init
328 333
  *
329 334
  * Description: resets the ethernet controller chip and various
@@ -335,6 +340,23 @@ static void p2001_eth_init()
335 340
 {
336 341
 	static int i;
337 342
 
343
+	/* activate MII 3 */
344
+	if (cur_channel == 3)
345
+		P2001_GPIO->PIN_MUX |= (1<<8);	// MII_3_en = 1
346
+
347
+#ifdef RMII
348
+	/* RMII init sequence */
349
+	if (link & LPA_100) {
350
+		EU->CONF_RMII = (1<<2) | (1<<1);		// softres | 100Mbit
351
+		EU->CONF_RMII = (1<<2) | (1<<1) | (1<<0);	// softres | 100Mbit | RMII
352
+		EU->CONF_RMII = (1<<1) | (1<<0);		// 100 Mbit | RMII
353
+	} else {
354
+		EU->CONF_RMII = (1<<2);				// softres
355
+		EU->CONF_RMII = (1<<2) | (1<<0);		// softres | RMII
356
+		EU->CONF_RMII = (1<<0);				// RMII
357
+	}
358
+#endif
359
+
338 360
 	/* disable transceiver */
339 361
 //	EU->TMAC_DMA_EN = 0;		/* clear run bit */
340 362
 //	EU->RMAC_DMA_EN = 0;		/* clear run bit */
@@ -353,7 +375,7 @@ static void p2001_eth_init()
353 375
 //	txd.stat = (1<<31) | (1<<30) | (1<<29);			// DSC0 OWN|START|END
354 376
 //	txd.cntl = cur_channel << 16;				// DSC1 CHANNEL
355 377
 //	txd.cntl |= DMA_BUF_SIZE;				// DSC1 LEN
356
-	txd.buf = &txb;						// DSC2 BUFFER
378
+	txd.buf = (char *)&txb;					// DSC2 BUFFER
357 379
 	txd.next = &txd;					// DSC3 NEXTDSC @self
358 380
 	EU->TMAC_DMA_DESC = &txd;
359 381
 
@@ -371,9 +393,12 @@ static void p2001_eth_init()
371 393
 	EU->RMAC_DMA_DESC = &rxd[0];
372 394
 
373 395
 	/* set transmitter mode */
374
-	EU->TMAC_CNTL = (1<<4) |	/* COI: Collision ignore */
375
-			//(1<<3) |	/* CSI: Carrier Sense ignore */
376
-			(1<<2);		/* ATP: Automatic Transmit Padding */
396
+	if (link & LPA_DUPLEX)
397
+		EU->TMAC_CNTL =	(1<<4) |	/* COI: Collision ignore */
398
+				(1<<3) |	/* CSI: Carrier Sense ignore */
399
+				(1<<2);		/* ATP: Automatic Transmit Padding */
400
+	else
401
+		EU->TMAC_CNTL =	(1<<2);		/* ATP: Automatic Transmit Padding */
377 402
 
378 403
 	/* set receive mode */
379 404
 	EU->RMAC_CNTL = (1<<3) |	/* BROAD: Broadcast packets */
@@ -384,9 +409,10 @@ static void p2001_eth_init()
384 409
 }
385 410
 
386 411
 
412
+
387 413
 /**************************************************************************
388
-DISABLE - Turn off ethernet interface
389
-***************************************************************************/
414
+ * DISABLE - Turn off ethernet interface
415
+ **************************************************************************/
390 416
 static void p2001_eth_disable(struct dev *dev __unused)
391 417
 {
392 418
 	/* put the card in its initial state */
@@ -408,40 +434,52 @@ static void p2001_eth_disable(struct dev *dev __unused)
408 434
 }
409 435
 
410 436
 
437
+
411 438
 /**************************************************************************
412
-LINK - Check for valid link
413
-***************************************************************************/
439
+ * LINK - Check for valid link
440
+ **************************************************************************/
414 441
 static int p2001_eth_check_link(unsigned int phy)
415 442
 {
416 443
 	static int status;
417
-	static unsigned int count;
418
-	count = 0;
444
+	static unsigned int i, physid;
445
+
446
+	/* print some information about out PHY */
447
+	physid = (p2001_eth_mdio_read(phy, MII_PHYSID2) << 16) |
448
+		  p2001_eth_mdio_read(phy, MII_PHYSID1);
449
+	printf("PHY %d, ID 0x%x ", phy, physid);
450
+	for (i = 0; mii_chip_table[i].physid; i++)
451
+		if (mii_chip_table[i].physid == physid) {
452
+			printf("(%s).\n", mii_chip_table[i].name);
453
+			break;
454
+		}
455
+	if (!mii_chip_table[i].physid)
456
+		printf("(unknown).\n");
419 457
 
420 458
 	/* Use 0x3300 for restarting NWay */
421 459
 	printf("Starting auto-negotiation... ");
422
-	p2001_eth_mdio_write(phy, Adr_LXT971A_Control, 0x3300);
423
-	if (mdio_error)
424
-		goto failed;
460
+	p2001_eth_mdio_write(phy, MII_BMCR, 0x3300);
425 461
 
426
-	/* Bits 1.5 and 17.7 are set to 1 once the Auto-Negotiation process to completed. */
462
+	/* Bit 1.5 is set once the Auto-Negotiation process is completed. */
463
+	i = 0;
427 464
 	do {
428 465
 		mdelay(500);
429
-		status = p2001_eth_mdio_read(phy, Adr_LXT971A_Status1);
430
-		if (mdio_error || (count++ > 6))	// 6*500ms = 3s timeout
466
+		status = p2001_eth_mdio_read(phy, MII_BMSR);
467
+		if (!status || (i++ > 6))	// 6*500ms = 3s timeout
431 468
 			goto failed;
432
-	} while (!(status & 0x20));
433
-	
434
-	/* Bits 1.2 and 17.10 are set to 1 once the link is established. */
435
-	if (p2001_eth_mdio_read(phy, Adr_LXT971A_Status1) & 0x04) {
436
-		/* Bits 17.14 and 17.9 can be used to determine the link operation conditions (speed and duplex). */
437
-		printf("Valid link, operating at: %sMb-%s\n",
438
-			(p2001_eth_mdio_read(phy, Adr_LXT971A_Status2) & 0x4000) ? "100" : "10",
439
-			(p2001_eth_mdio_read(phy, Adr_LXT971A_Status2) & 0x0200) ? "FD" : "HD");
440
-			return 1;
469
+	} while (!(status & BMSR_ANEGCOMPLETE));
470
+
471
+	/* Bits 1.2 is set once the link is established. */
472
+	if ((status = p2001_eth_mdio_read(phy, MII_BMSR)) & BMSR_LSTATUS) {
473
+		link = p2001_eth_mdio_read(phy, MII_ADVERTISE) &
474
+		       p2001_eth_mdio_read(phy, MII_LPA);
475
+		printf("  Valid link, operating at: %sMb-%s\n",
476
+			(link & LPA_100) ? "100" : "10",
477
+			(link & LPA_DUPLEX) ? "FD" : "HD");
478
+		return 1;
441 479
 	}
442 480
 
443 481
 failed:
444
-	if (mdio_error)
482
+	if (!status)
445 483
 		printf("Failed\n");
446 484
 	else
447 485
 		printf("No valid link\n");
@@ -449,49 +487,79 @@ failed:
449 487
 }
450 488
 
451 489
 
490
+
491
+/**************************************************************************
492
+ * PHYRESET - hardware reset all MII PHYs
493
+ **************************************************************************/
494
+
495
+/**
496
+ *	p2001_eth_phyreset - hardware reset all MII PHYs
497
+ */
498
+static void p2001_eth_phyreset()
499
+{
500
+	/* GPIO24/25: TX_ER2/TX_ER0 */
501
+	/* GPIO26/27: PHY_RESET/TX_ER1 */
502
+	P2001_GPIO->PIN_MUX |= 0x0018;
503
+	// 31-16: 0000 1111 0000 0000
504
+	P2001_GPIO->GPIO2_En |= 0x0400;
505
+
506
+	P2001_GPIO->GPIO2_Out |= 0x04000000;
507
+	P2001_GPIO->GPIO2_Out &= ~0x0400;
508
+	mdelay(500);
509
+	P2001_GPIO->GPIO2_Out |= 0x0400;
510
+
511
+#ifdef RMII
512
+	/* RMII_clk_sel = 0xxb  no RMII (default) */
513
+	/* RMII_clk_sel = 100b	COL_0 */
514
+	/* RMII_clk_sel = 101b	COL_1 */
515
+	/* RMII_clk_sel = 110b	COL_2 */
516
+	/* RMII_clk_sel = 111b	COL_3 */
517
+	P2001_GPIO->PIN_MUX |= (4 << 13);
518
+#endif
519
+}
520
+
521
+
522
+
452 523
 /**************************************************************************
453
-PROBE - Look for an adapter, this routine's visible to the outside
454
-***************************************************************************/
524
+ * PROBE - Look for an adapter, this routine's visible to the outside
525
+ **************************************************************************/
526
+
455 527
 static int p2001_eth_probe(struct dev *dev, unsigned short *probe_addrs __unused)
456 528
 {
457 529
 	struct nic *nic = (struct nic *)dev;
458 530
 	/* if probe_addrs is 0, then routine can use a hardwired default */
459
-	static int board_found;
460
-	static int valid_link;
461 531
 
462 532
 	/* reset phys and configure mdio clk */
463
-	p2001_eth_mdio_init();
533
+	printf("Resetting PHYs...\n");
534
+	p2001_eth_phyreset();
535
+
536
+	/* set management unit clock divisor */
537
+	// max. MDIO CLK = 2.048 MHz (EU.doc)
538
+	P2001_MU->MU_DIV = (SYSCLK/4096000)-1;	// 2.048 MHz
539
+	//asm("nop \n nop");
464 540
 
465 541
 	/* find the correct PHY/DMA/MAC combination */
466
-	MU = P2001_MU;	// MU for all PHYs is only in EU0
467 542
 	printf("Searching for P2001 NICs...\n");
543
+	cur_phy = -1;
468 544
 	for (cur_channel=0; cur_channel<4; cur_channel++) {
469
-		switch(cur_channel) {
470
-			case 0:
471
-				EU = P2001_EU0;
472
-				cur_phy = 0;
473
-				break;
474
-			case 1:
475
-				EU = P2001_EU1;
476
-				cur_phy = 1;
477
-				break;
478
-			case 2:
479
-				EU = P2001_EU2;
480
-				cur_phy = 2;
481
-				break;
482
-			case 3:
483
-				EU = P2001_EU3;
484
-				cur_phy = 3;
545
+		EU = P2001_EU(cur_channel);
546
+
547
+		/* find next phy */
548
+		while (++cur_phy < 16) {
549
+			//printf("phy detect %d\n", cur_phy);
550
+			if (p2001_eth_mdio_read(cur_phy, MII_BMSR) != 0)
485 551
 				break;
486 552
 		}
553
+		if (cur_phy == 16) {
554
+			printf("no more MII PHYs found\n");
555
+			break;
556
+		}
487 557
 
488 558
 		/* first a non destructive test for initial value RMAC_TLEN=1518 */
489
-		board_found = (EU->RMAC_TLEN == 1518);
490
-		if (board_found) {
559
+		if (EU->RMAC_TLEN == 1518) {
491 560
 			printf("Checking EU%d...\n", cur_channel);
492 561
 
493
-			valid_link = p2001_eth_check_link(cur_phy);
494
-			if (valid_link) {
562
+			if (p2001_eth_check_link(cur_phy)) {
495 563
 				/* initialize device */
496 564
 				p2001_eth_init(nic);
497 565
 
@@ -507,7 +575,6 @@ static int p2001_eth_probe(struct dev *dev, unsigned short *probe_addrs __unused
507 575
 
508 576
 				/* Report the ISA pnp id of the board */
509 577
 				dev->devid.vendor_id = htons(GENERIC_ISAPNP_VENDOR);
510
-				dev->devid.vendor_id = htons(0x1234);
511 578
 				return 1;
512 579
 			}
513 580
 		}

+ 4
- 13
src/arch/armnommu/include/hardware.h View File

@@ -100,10 +100,7 @@ typedef struct {					// 0x00130000U
100 100
 
101 101
 typedef union {						// 0x00140000U
102 102
 	struct {	// write
103
-		volatile unsigned int TX1;		// 0x00000000U
104
-		volatile unsigned int TX2;		// 0x00000004U
105
-		volatile unsigned int TX3;		// 0x00000008U
106
-		volatile unsigned int TX4;		// 0x0000000CU
103
+		volatile unsigned int TX[4];		// 0x00000000-0x000CU
107 104
 		volatile unsigned int Baudrate;		// 0x00000010U
108 105
 		volatile unsigned int reserved1[0x3];
109 106
 		volatile unsigned int Config;		// 0x00000020U
@@ -113,10 +110,7 @@ typedef union {						// 0x00140000U
113 110
 	} w;		// write
114 111
 	
115 112
 	struct {	// read
116
-		volatile unsigned int RX1;		// 0x00000000U
117
-		volatile unsigned int RX2;		// 0x00000004U
118
-		volatile unsigned int RX3;		// 0x00000008U
119
-		volatile unsigned int RX4;		// 0x0000000CU
113
+		volatile unsigned int RX[4];		// 0x00000000-0x000CU
120 114
 		volatile unsigned int reserved1[0x4];
121 115
 		volatile unsigned int PRE_STATUS;	// 0x00000020U
122 116
 		volatile unsigned int STATUS;		// 0x00000024U
@@ -168,11 +162,8 @@ typedef struct {				// 0x0018_000U _=0,1,2,3
168 162
 	volatile unsigned int TMAC_DMA_DATA;	// 0x00000FF8U
169 163
 	volatile unsigned int TMAC_DMA_ADR;	// 0x00000FFCU
170 164
 } *P2001_ETH_regs_ptr;
171
-#define P2001_EU0 ((volatile P2001_ETH_regs_ptr) 0x00180000)
172
-#define P2001_EU1 ((volatile P2001_ETH_regs_ptr) 0x00181000)
173
-#define P2001_EU2 ((volatile P2001_ETH_regs_ptr) 0x00182000)
174
-#define P2001_EU3 ((volatile P2001_ETH_regs_ptr) 0x00183000)
175
-#define P2001_MU  P2001_EU0
165
+#define P2001_EU(x) ((volatile P2001_ETH_regs_ptr) ((unsigned int) 0x00180000UL+(0x1000UL*(x)))) /* x = 0..3 */
166
+#define P2001_MU  P2001_EU(0)
176 167
 
177 168
 #endif
178 169
 

+ 0
- 30
src/arch/armnommu/include/lxt971a.h View File

@@ -1,30 +0,0 @@
1
-/*
2
- *  Copyright (C) 2004 Tobias Lorenz
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 as
6
- * published by the Free Software Foundation.
7
- */
8
-
9
-/*
10
- * Intel LXT971ALE (MII-compatible PHY)
11
- */
12
-
13
-#define Adr_LXT971A_Control		0	/* Control Register */
14
-#define Adr_LXT971A_Status1		1	/* MII Status Register #1 */
15
-#define Adr_LXT971A_PHY_ID1		2	/* PHY Identification Register 1 */
16
-#define Adr_LXT971A_PHY_ID2		3	/* PHY Identification Register 2 */
17
-#define Adr_LXT971A_AN_Advertise	4	/* Auto Negotiation Advertisement Register */
18
-#define Adr_LXT971A_AN_Link_Ability	5	/* Auto Negotiation Link Partner Base Page Ability Register */
19
-#define Adr_LXT971A_AN_Expansion	6	/* Auto Negotiation Expansion */
20
-#define Adr_LXT971A_AN_Next_Page_Txmit	7	/* Auto Negotiation Next Page Transmit Register */
21
-#define Adr_LXT971A_AN_Link_Next_Page	8	/* Auto Negotiation Link Partner Next Page Receive Register */
22
-#define Adr_LXT971A_Fast_Control	9	/* Not Implemented */
23
-#define Adr_LXT971A_Fast_Status		10	/* Not Implemented */
24
-#define Adr_LXT971A_Extended_Status	15	/* Not Implemented */
25
-#define Adr_LXT971A_Port_Config		16	/* Configuration Register */
26
-#define Adr_LXT971A_Status2		17	/* Status Register #2 */
27
-#define Adr_LXT971A_Interrupt_Enable	18	/* Interrupt Enable Register */
28
-#define Adr_LXT971A_Interrupt_Status	19	/* Interrupt Status Register */
29
-#define Adr_LXT971A_LED_Config		20	/* LED Configuration Register */
30
-#define Adr_LXT971A_Transmit_Control	30	/* Transmit Control Register */

+ 12
- 0
src/arch/armnommu/include/stdint.h View File

@@ -20,4 +20,16 @@ typedef signed short       int16_t;
20 20
 typedef signed int         int32_t;
21 21
 typedef signed long long   int64_t;
22 22
 
23
+typedef signed char        s8;
24
+typedef unsigned char      u8;
25
+
26
+typedef signed short       s16;
27
+typedef unsigned short     u16;
28
+
29
+typedef signed long        s32;
30
+typedef unsigned int       u32;
31
+
32
+typedef signed long long   s64;
33
+typedef unsigned long long u64;
34
+
23 35
 #endif /* STDINT_H */

+ 12
- 0
src/arch/e1/include/stdint.h View File

@@ -13,4 +13,16 @@ typedef signed short       int16_t;
13 13
 typedef signed int         int32_t;
14 14
 typedef signed long long   int64_t;
15 15
 
16
+typedef signed char        s8;
17
+typedef unsigned char      u8;
18
+
19
+typedef signed short       s16;
20
+typedef unsigned short     u16;
21
+
22
+typedef signed long        s32;
23
+typedef unsigned int       u32;
24
+
25
+typedef signed long long   s64;
26
+typedef unsigned long long u64;
27
+
16 28
 #endif /* STDINT_H */

+ 3
- 3
src/arch/i386/core/freebsd_loader.c View File

@@ -216,7 +216,7 @@ static int elf_freebsd_debug_loader(unsigned int offset)
216 216
 					estate.toread, estate.curaddr);
217 217
 #endif
218 218
 				/* Save where we are loading this... */
219
-				symtab_load = phys_to_virt(estate.curaddr);
219
+				symtab_load = estate.curaddr;
220 220
 				
221 221
 				*((long *)phys_to_virt(estate.curaddr)) = estate.toread;
222 222
 				estate.curaddr += sizeof(long);
@@ -244,7 +244,7 @@ static int elf_freebsd_debug_loader(unsigned int offset)
244 244
 					estate.toread, estate.curaddr);
245 245
 #endif
246 246
 				/* Save where we are loading this... */
247
-				symstr_load = phys_to_virt(estate.curaddr);
247
+				symstr_load = estate.curaddr;
248 248
 				
249 249
 				*((long *)phys_to_virt(estate.curaddr)) = estate.toread;
250 250
 				estate.curaddr += sizeof(long);
@@ -290,7 +290,7 @@ static void elf_freebsd_boot(unsigned long entry)
290 290
 		/* Assumes size of long is a power of 2... */
291 291
 		bsdinfo.bi_esymtab = (symstr_load +
292 292
 			sizeof(long) +
293
-			*((long *)symstr_load) +
293
+			*((long *)phys_to_virt(symstr_load)) +
294 294
 			sizeof(long) - 1) & ~(sizeof(long) - 1);
295 295
 		
296 296
 		/* Where we will build the meta data... */

+ 12
- 0
src/arch/i386/include/stdint.h View File

@@ -16,4 +16,16 @@ typedef signed long long	int64_t;
16 16
 
17 17
 typedef unsigned long		physaddr_t;
18 18
 
19
+typedef signed char	   s8;
20
+typedef unsigned char      u8;
21
+
22
+typedef signed short       s16;
23
+typedef unsigned short     u16;
24
+
25
+typedef signed int         s32;
26
+typedef unsigned int       u32;
27
+
28
+typedef signed long long   s64;
29
+typedef unsigned long long u64;
30
+
19 31
 #endif /* STDINT_H */

+ 12
- 0
src/arch/ia64/include/stdint.h View File

@@ -13,4 +13,16 @@ typedef signed short       int16_t;
13 13
 typedef signed int         int32_t;
14 14
 typedef signed long        int64_t;
15 15
 
16
+typedef signed char        s8;
17
+typedef unsigned char      u8;
18
+
19
+typedef signed short       s16;
20
+typedef unsigned short     u16;
21
+
22
+typedef signed int         s32;
23
+typedef unsigned int       u32;
24
+
25
+typedef signed long	   s64;
26
+typedef unsigned long      u64;
27
+
16 28
 #endif /* STDINT_H */

+ 3
- 0
src/core/config.c View File

@@ -74,6 +74,9 @@ void print_config ( void ) {
74 74
 #ifdef DOWNLOAD_PROTO_TFTP
75 75
 		"TFTP "
76 76
 #endif
77
+#ifdef  DOWNLOAD_PROTO_FSP
78
+		"FSP "
79
+#endif				
77 80
 #ifdef  DOWNLOAD_PROTO_NFS
78 81
 		"NFS "
79 82
 #endif

+ 0
- 4
src/drivers/net/3c515.c View File

@@ -61,10 +61,6 @@ static void t3c515_wait(unsigned int nticks)
61 61
 
62 62
 /* TJL definations */
63 63
 #define HZ      100
64
-#define u16 unsigned short
65
-#define u32 unsigned long
66
-#define s16 signed short
67
-#define s32 signed long
68 64
 static int if_port;
69 65
 static struct corkscrew_private *vp;
70 66
 /* Brought directly from 3c515.c by Becker */

+ 0
- 7
src/drivers/net/davicom.c View File

@@ -50,13 +50,6 @@
50 50
 
51 51
 #define TX_TIME_OUT       2*TICKS_PER_SEC
52 52
 
53
-typedef unsigned char  u8;
54
-typedef   signed char  s8;
55
-typedef unsigned short u16;
56
-typedef   signed short s16;
57
-typedef unsigned int   u32;
58
-typedef   signed int   s32;
59
-
60 53
 /* Register offsets for davicom device */
61 54
 enum davicom_offsets {
62 55
    CSR0=0,     CSR1=0x08,  CSR2=0x10,  CSR3=0x18,  CSR4=0x20,  CSR5=0x28,

+ 0
- 7
src/drivers/net/depca.c View File

@@ -413,13 +413,6 @@ static char *adapter_name[] = {
413 413
 #define ALIGN8      ((u32)8 - 1)       /* 2 longword (quadword) align */
414 414
 #define ALIGN         ALIGN8              /* Keep the LANCE happy... */
415 415
 
416
-typedef	long		s32;
417
-typedef	unsigned long	u32;
418
-typedef	short		s16;
419
-typedef	unsigned short	u16;
420
-typedef	char		s8;
421
-typedef	unsigned char	u8;
422
-
423 416
 /*
424 417
 ** The DEPCA Rx and Tx ring descriptors. 
425 418
 */

+ 0
- 7
src/drivers/net/dmfe.c View File

@@ -51,13 +51,6 @@
51 51
 #define dprintf(x)
52 52
 #endif
53 53
 
54
-typedef unsigned char u8;
55
-typedef signed char s8;
56
-typedef unsigned short u16;
57
-typedef signed short s16;
58
-typedef unsigned int u32;
59
-typedef signed int s32;
60
-
61 54
 /* Condensed operations for readability. */
62 55
 #define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
63 56
 #define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))

+ 21
- 9
src/drivers/net/eepro.c View File

@@ -18,6 +18,12 @@ Be careful with seating the EPROM as the socket on my board actually
18 18
 has 34 pins, the top row of 2 are not used.
19 19
 ***************************************************************************/
20 20
 
21
+/*
22
+
23
+ timlegge	2005-05-18	remove the relocation changes cards that 
24
+				write directly to the hardware don't need it
25
+*/
26
+
21 27
 /*
22 28
  * This program is free software; you can redistribute it and/or
23 29
  * modify it under the terms of the GNU General Public License as
@@ -257,8 +263,8 @@ static unsigned eeprom_reg = EEPROM_REG_PRO;
257 263
 #define eeprom_delay() { udelay(40); }
258 264
 #define EE_READ_CMD (6 << 6)
259 265
 
260
-/* do a full reset */
261
-#define eepro_full_reset(ioaddr)	outb(RESET_CMD, ioaddr); udelay(40);
266
+/* do a full reset; data sheet asks for 250us delay */
267
+#define eepro_full_reset(ioaddr)	outb(RESET_CMD, ioaddr); udelay(255);
262 268
 
263 269
 /* do a nice reset */
264 270
 #define eepro_sel_reset(ioaddr) 	{ \
@@ -320,13 +326,15 @@ static void eepro_reset(struct nic *nic)
320 326
 	eepro_sw2bank0(nic->ioaddr);	/* Switch back to bank 0 */
321 327
 	eepro_clear_int(nic->ioaddr);
322 328
 	/* Initialise RCV */
323
-	rx_start = (unsigned int)bus_to_virt(RCV_LOWER_LIMIT << 8);
324
-	outw(RCV_LOWER_LIMIT << 8, nic->ioaddr + RCV_BAR);
329
+	outw(rx_start = (RCV_LOWER_LIMIT << 8), nic->ioaddr + RCV_BAR);
325 330
 	outw(((RCV_UPPER_LIMIT << 8) | 0xFE), nic->ioaddr + RCV_STOP);
331
+ 	/* Make sure 1st poll won't find a valid packet header */
332
+ 	outw((RCV_LOWER_LIMIT << 8), nic->ioaddr + HOST_ADDRESS_REG);
333
+ 	outw(0,                      nic->ioaddr + IO_PORT);
326 334
 	/* Intialise XMT */
327 335
 	outw((XMT_LOWER_LIMIT << 8), nic->ioaddr + xmt_bar);
328 336
 	eepro_sel_reset(nic->ioaddr);
329
-	tx_start = tx_end = (unsigned int)bus_to_virt(XMT_LOWER_LIMIT << 8);
337
+	tx_start = tx_end = (XMT_LOWER_LIMIT << 8);
330 338
 	tx_last = 0;
331 339
 	eepro_en_rx(nic->ioaddr);
332 340
 }
@@ -336,7 +344,7 @@ POLL - Wait for a frame
336 344
 ***************************************************************************/
337 345
 static int eepro_poll(struct nic *nic, int retrieve)
338 346
 {
339
-	unsigned int	rcv_car = virt_to_bus((void *)rx_start);
347
+	unsigned int	rcv_car = rx_start;
340 348
 	unsigned int	rcv_event, rcv_status, rcv_next_frame, rcv_size;
341 349
 
342 350
 	/* return true if there's an ethernet packet ready to read */
@@ -380,8 +388,12 @@ static int eepro_poll(struct nic *nic, int retrieve)
380 388
 }
381 389
 #endif
382 390
 	nic->packetlen = rcv_size;
383
-	rcv_car  = virt_to_bus((void *) (rx_start + RCV_HEADER + rcv_size));
384
-	rx_start = (unsigned int)bus_to_virt(rcv_next_frame << 8);
391
+	rcv_car  = (rx_start + RCV_HEADER + rcv_size);
392
+	rx_start = rcv_next_frame;
393
+/* 
394
+	hex_dump(rcv_car, nic->packetlen); 
395
+*/
396
+
385 397
 	if (rcv_car == 0)
386 398
 		rcv_car = ((RCV_UPPER_LIMIT << 8) | 0xff);
387 399
 	outw(rcv_car - 1, nic->ioaddr + RCV_STOP);
@@ -455,7 +467,7 @@ static void eepro_disable ( struct nic *nic, struct isa_device *isa __unused ) {
455 467
 	eepro_sw2bank0(nic->ioaddr);	/* Switch to bank 0 */
456 468
 	/* Flush the Tx and disable Rx */
457 469
 	outb(STOP_RCV_CMD, nic->ioaddr);
458
-	tx_start = tx_end = (unsigned int) (bus_to_virt(XMT_LOWER_LIMIT << 8));
470
+	tx_start = tx_end = (XMT_LOWER_LIMIT << 8);
459 471
 	tx_last = 0;
460 472
 	/* Reset the 82595 */
461 473
 	eepro_full_reset(nic->ioaddr);

+ 0
- 7
src/drivers/net/eepro100.c View File

@@ -110,13 +110,6 @@
110 110
 
111 111
 static int ioaddr;
112 112
 
113
-typedef unsigned char  u8;
114
-typedef   signed char  s8;
115
-typedef unsigned short u16;
116
-typedef   signed short s16;
117
-typedef unsigned int   u32;
118
-typedef   signed int   s32;
119
-
120 113
 enum speedo_offsets {
121 114
   SCBStatus = 0, SCBCmd = 2,      /* Rx/Command Unit command and status. */
122 115
   SCBPointer = 4,                 /* General purpose pointer. */

+ 605
- 206
src/drivers/net/forcedeth.c
File diff suppressed because it is too large
View File


+ 0
- 7
src/drivers/net/mtd80x.c View File

@@ -30,13 +30,6 @@
30 30
 /* to get the PCI support functions, if this is a PCI NIC */
31 31
 #include "pci.h"
32 32
 
33
-typedef unsigned char u8;
34
-typedef signed char s8;
35
-typedef unsigned short u16;
36
-typedef signed short s16;
37
-typedef unsigned int u32;
38
-typedef signed int s32;
39
-
40 33
 /* Condensed operations for readability. */
41 34
 #define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
42 35
 #define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))

+ 0
- 7
src/drivers/net/natsemi.c View File

@@ -71,13 +71,6 @@
71 71
 
72 72
 #define NUM_RX_DESC    4              /* Number of Rx descriptor registers. */
73 73
 
74
-typedef uint8_t    u8;
75
-typedef int8_t     s8;
76
-typedef uint16_t   u16;
77
-typedef int16_t    s16;
78
-typedef uint32_t   u32;
79
-typedef int32_t    s32;
80
-
81 74
 /* helpful macroes if on a big_endian machine for changing byte order.
82 75
    not strictly needed on Intel */
83 76
 #define get_unaligned(ptr) (*(ptr))

+ 0
- 7
src/drivers/net/ns83820.c View File

@@ -53,13 +53,6 @@
53 53
 #define dprintf(x)
54 54
 #endif
55 55
 
56
-typedef unsigned char u8;
57
-typedef signed char s8;
58
-typedef unsigned short u16;
59
-typedef signed short s16;
60
-typedef unsigned int u32;
61
-typedef signed int s32;
62
-
63 56
 #define HZ 100
64 57
 
65 58
 /* Condensed operations for readability. */

+ 0
- 7
src/drivers/net/pcnet32.c View File

@@ -54,13 +54,6 @@
54 54
 #define drv_version "v1.3"
55 55
 #define drv_date "03-29-2004"
56 56
 
57
-typedef unsigned char u8;
58
-typedef signed char s8;
59
-typedef unsigned short u16;
60
-typedef signed short s16;
61
-typedef unsigned int u32;
62
-typedef signed int s32;
63
-
64 57
 static u32 ioaddr;		/* Globally used for the card's io address */
65 58
 static struct nic_operations pcnet32_operations;
66 59
 static struct pci_driver pcnet32_driver;

+ 0
- 7
src/drivers/net/r8169.c View File

@@ -52,13 +52,6 @@
52 52
 #define drv_version "v1.6"
53 53
 #define drv_date "03-27-2004"
54 54
 
55
-typedef unsigned char u8;
56
-typedef signed char s8;
57
-typedef unsigned short u16;
58
-typedef signed short s16;
59
-typedef unsigned int u32;
60
-typedef signed int s32;
61
-
62 55
 #define HZ 1000
63 56
 
64 57
 static u32 ioaddr;

+ 0
- 7
src/drivers/net/sis900.h View File

@@ -363,13 +363,6 @@ enum sis630_revision_id {
363 363
 
364 364
 #define NUM_RX_DESC     4              /* Number of Rx descriptor registers. */
365 365
 
366
-typedef unsigned char  u8;
367
-typedef   signed char  s8;
368
-typedef unsigned short u16;
369
-typedef   signed short s16;
370
-typedef unsigned int   u32;
371
-typedef   signed int   s32;
372
-
373 366
 /* Time in ticks before concluding the transmitter is hung. */
374 367
 #define TX_TIMEOUT       (4*TICKS_PER_SEC)
375 368
 

+ 0
- 7
src/drivers/net/sundance.c View File

@@ -52,13 +52,6 @@
52 52
 #define drv_version "v1.12"
53 53
 #define drv_date "2004-03-21"
54 54
 
55
-typedef unsigned char u8;
56
-typedef signed char s8;
57
-typedef unsigned short u16;
58
-typedef signed short s16;
59
-typedef unsigned int u32;
60
-typedef signed int s32;
61
-
62 55
 #define HZ 100
63 56
 
64 57
 /* Condensed operations for readability. */

+ 4
- 0
src/drivers/net/tg3.c View File

@@ -9,6 +9,7 @@
9 9
 /* 11-13-2003	timlegge	Fix Issue with NetGear GA302T 
10 10
  * 11-18-2003   ebiederm        Generalize NetGear Fix to what the code was supposed to be.
11 11
  * 01-06-2005   Alf (Frederic Olivie) Add Dell bcm 5751 (0x1677) support
12
+ * 04-15-2005   Martin Vogt Add Fujitsu Siemens Computer (FSC) 0x1734 bcm 5751 0x105d support
12 13
  */
13 14
 
14 15
 #include "etherboot.h"
@@ -2413,6 +2414,9 @@ static struct subsys_tbl_ent subsys_id_to_phy_id[] = {
2413 2414
 	{ PCI_VENDOR_ID_DELL, 0x0109, PHY_ID_BCM5411 }, /* MERLOT */
2414 2415
 	{ PCI_VENDOR_ID_DELL, 0x010a, PHY_ID_BCM5411 }, /* SLIM_MERLOT */
2415 2416
 	{ PCI_VENDOR_ID_DELL, 0x0179, PHY_ID_BCM5751 }, /* EtherXpress */
2417
+	
2418
+	/* Fujitsu Siemens Computer */
2419
+	{ PCI_VENDOR_ID_FSC, 0x105d, PHY_ID_BCM5751 }, /* Futro C200 */	
2416 2420
 
2417 2421
 	/* Compaq boards. */
2418 2422
 	{ PCI_VENDOR_ID_COMPAQ, 0x007c, PHY_ID_BCM5701 }, /* BANSHEE */

+ 1
- 1
src/drivers/net/tg3.h View File

@@ -2156,7 +2156,7 @@ struct tg3 {
2156 2156
 	((X) == PHY_ID_BCM5400 || (X) == PHY_ID_BCM5401 || \
2157 2157
 	 (X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \
2158 2158
 	 (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
2159
-	 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5751 || \
2159
+	 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || (X) == PHY_ID_BCM5751 || \
2160 2160
 	 (X) == PHY_ID_BCM8002 || (X) == PHY_ID_SERDES)
2161 2161
 
2162 2162
 	unsigned long			regs;

+ 4
- 16
src/drivers/net/tlan.h View File

@@ -34,22 +34,10 @@
34 34
 * Indent Style: indent -kr -i8
35 35
 ***************************************************************************/
36 36
 
37
-/*
38
-#include <asm/io.h>
39
-#include <asm/types.h>
40
-#include <linux/netdevice.h>
41
-*/
42
-
43
-typedef unsigned char u8;
44
-typedef signed char s8;
45
-typedef unsigned short u16;
46
-typedef signed short s16;
47
-typedef unsigned int u32;
48
-typedef signed int s32;
49
-	/*****************************************************************
50
-	 * TLan Definitions
51
-	 *
52
-	 ****************************************************************/
37
+/*****************************************************************
38
+* TLan Definitions
39
+*
40
+****************************************************************/
53 41
 
54 42
 #define FALSE			0
55 43
 #define TRUE			1

+ 7
- 9
src/drivers/net/tulip.c View File

@@ -48,6 +48,8 @@
48 48
 /*********************************************************************/
49 49
 
50 50
 /*
51
+  08 Feb 2005  Ramesh Chander chhabaramesh at yahoo.co.in added table entries
52
+               for SGThomson STE10/100A
51 53
   07 Sep 2003  timlegge	Multicast Support Added
52 54
   11 Apr 2001  mdc     [patch to etherboot 4.7.24]
53 55
      Major rewrite to include Linux tulip driver media detection
@@ -118,13 +120,6 @@ static int tulip_debug = 2;             /* 1 normal messages, 0 quiet .. 7 verbo
118 120
 
119 121
 #define TX_TIME_OUT       2*TICKS_PER_SEC
120 122
 
121
-typedef uint8_t    u8;
122
-typedef  int8_t    s8;
123
-typedef uint16_t   u16;
124
-typedef  int16_t   s16;
125
-typedef uint32_t   u32;
126
-typedef  int32_t   s32;
127
-
128 123
 /* helpful macros if on a big_endian machine for changing byte order.
129 124
    not strictly needed on Intel */
130 125
 #define get_unaligned(ptr) (*(ptr))
@@ -157,7 +152,7 @@ static const char * const medianame[32] = {
157 152
 enum tulip_chips {
158 153
     DC21040=0, DC21041=1, DC21140=2, DC21142=3, DC21143=3,
159 154
     LC82C168, MX98713, MX98715, MX98725, AX88141, AX88140, PNIC2, COMET,
160
-    COMPEX9881, I21145, XIRCOM
155
+    COMPEX9881, I21145, XIRCOM, SGThomson,	/*Ramesh Chander*/
161 156
 };
162 157
 
163 158
 enum pci_id_flags_bits {
@@ -233,6 +228,8 @@ static const struct pci_id_info pci_id_tbl[] = {
233 228
       TULIP_IOTYPE, 256, MX98715 },
234 229
     { "3Com 3cSOHO100B-TX (ADMtek Centuar)", { 0x930010b7, 0xffffffff, 0, 0, 0, 0 },
235 230
       TULIP_IOTYPE, TULIP_SIZE, COMET },
231
+    { "SG Thomson STE10/100A", { 0x2774104a, 0xffffffff, 0, 0, 0, 0 },
232
+      TULIP_IOTYPE, 256, COMET },	/*Ramesh Chander*/
236 233
     { 0, { 0, 0, 0, 0, 0, 0 }, 0, 0, 0 },
237 234
 };
238 235
 
@@ -268,6 +265,7 @@ static struct tulip_chip_table {
268 265
       | HAS_PWRDWN | HAS_NWAY },
269 266
     { "Xircom tulip work-alike", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII 
270 267
       | HAS_PWRDWN | HAS_NWAY },
268
+    { "SGThomson STE10/100A", HAS_MII | MC_HASH_ONLY },	/*Ramesh Chander*/   
271 269
     { 0, 0 },
272 270
 };
273 271
 
@@ -2068,7 +2066,7 @@ PCI_ROM(0x125b, 0x1400, "ax88140",     "ASIX AX88140"),
2068 2066
 PCI_ROM(0x11f6, 0x9881, "rl100tx",     "Compex RL100-TX"),
2069 2067
 PCI_ROM(0x115d, 0x0003, "xircomtulip", "Xircom Tulip"),
2070 2068
 PCI_ROM(0x104a, 0x0981, "tulip-0981",  "Tulip 0x104a 0x0981"),
2071
-PCI_ROM(0x104a, 0x2774, "tulip-2774",  "Tulip 0x104a 0x2774"),
2069
+PCI_ROM(0x104a, 0x2774, "SGThomson-STE10100A", "Tulip 0x104a 0x2774"),	/*Modified by Ramesh Chander*/
2072 2070
 PCI_ROM(0x1113, 0x9511, "tulip-9511",  "Tulip 0x1113 0x9511"),
2073 2071
 PCI_ROM(0x1186, 0x1561, "tulip-1561",  "Tulip 0x1186 0x1561"),
2074 2072
 PCI_ROM(0x1259, 0xa120, "tulip-a120",  "Tulip 0x1259 0xa120"),

+ 0
- 7
src/drivers/net/w89c840.c View File

@@ -84,13 +84,6 @@
84 84
 
85 85
 static const char *w89c840_version = "driver Version 0.94 - December 12, 2003";
86 86
 
87
-typedef unsigned char  u8;
88
-typedef   signed char  s8;
89
-typedef unsigned short u16;
90
-typedef   signed short s16;
91
-typedef unsigned int   u32;
92
-typedef   signed int   s32;
93
-
94 87
 /* Linux support functions */
95 88
 #define virt_to_le32desc(addr)  virt_to_bus(addr)
96 89
 #define le32desc_to_virt(addr)  bus_to_virt(addr)

+ 1
- 0
src/include/pci_ids.h View File

@@ -319,6 +319,7 @@
319 319
 #define PCI_VENDOR_ID_MORETON		0x15aa
320 320
 #define PCI_VENDOR_ID_ZOLTRIX		0x15b0
321 321
 #define PCI_VENDOR_ID_PDC		0x15e9
322
+#define PCI_VENDOR_ID_FSC		0x1734
322 323
 #define PCI_VENDOR_ID_SYMPHONY		0x1c1c
323 324
 #define PCI_VENDOR_ID_TEKRAM		0x1de1
324 325
 #define PCI_VENDOR_ID_3DLABS		0x3d3d

+ 15
- 13
src/util/makerom.pl View File

@@ -157,7 +157,7 @@ sub makerom () {
157 157
 	# If PXE image, just fill the length field and write it out
158 158
 	if ($opts{'x'}) {
159 159
 		substr($rom, 2, 1) = chr((length($rom) + 511) / 512);
160
-		&writerom($ARGV[0], \$rom);
160
+		writerom($ARGV[0], \$rom);
161 161
 		return;
162 162
 	}
163 163
 	# Size specified with -s overrides value in 3rd byte in image
@@ -168,7 +168,7 @@ sub makerom () {
168 168
 			$romsize = ($filesize + 511) & ~511
169 169
 		}
170 170
 	} else {
171
-		$romsize = &getromsize(\$rom);
171
+		$romsize = getromsize(\$rom);
172 172
 		# 0 put there by *loader.S means makerom should pick the size
173 173
 		if ($romsize == 0) {
174 174
 			# Shrink romsize down to the smallest power of two that will do
@@ -190,14 +190,16 @@ sub makerom () {
190 190
 	}
191 191
 	substr($rom, 2, 1) = chr(($romsize / 512) % 256);
192 192
 	print "ROM size is $romsize\n" if $opts{'v'};
193
-	my $identoffset = &addident(\$rom);
194
-	&pcipnpheaders(\$rom, $identoffset);
195
-	&undiheaders(\$rom);
193
+	# set the product string only if we don't have one yet
194
+	my $pnp_hdr_offset = unpack('v', substr($rom, PNP_PTR_LOC, 2));
195
+	my $identoffset = substr($rom, $pnp_hdr_offset+PNP_DEVICE_OFF, 2) eq "\0\0" ? addident(\$rom) : undef;
196
+	pcipnpheaders(\$rom, $identoffset);
197
+	undiheaders(\$rom);
196 198
 	# 3c503 requires last two bytes to be 0x80
197 199
 	substr($rom, MINROMSIZE-2, 2) = "\x80\x80"
198 200
 		if ($opts{'3'} and $romsize == MINROMSIZE);
199
-	&checksum(\$rom);
200
-	&writerom($ARGV[0], \$rom);
201
+	checksum(\$rom);
202
+	writerom($ARGV[0], \$rom);
201 203
 }
202 204
 
203 205
 sub modrom () {
@@ -211,16 +213,16 @@ sub modrom () {
211 213
 	close(R);
212 214
 	defined($filesize) and $filesize >= 3 or die "Cannot get first 3 bytes of file\n";
213 215
 	print "$filesize bytes read\n" if $opts{'v'};
214
-	&pcipnpheaders(\$rom);
215
-	&undiheaders(\$rom);
216
-	&checksum(\$rom);
217
-	&writerom($ARGV[0], \$rom);
216
+	pcipnpheaders(\$rom, undef);
217
+	undiheaders(\$rom);
218
+	checksum(\$rom);
219
+	writerom($ARGV[0], \$rom);
218 220
 }
219 221
 
220 222
 # Main routine. See how we were called and behave accordingly
221 223
 if ($0 =~ m:modrom(\.pl)?$:) {
222
-	&modrom();
224
+	modrom();
223 225
 } else {
224
-	&makerom();
226
+	makerom();
225 227
 }
226 228
 exit(0);

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