Synced across updates from Etherboot 5.4 tree

src/arch/armnommu/Config

 # NIC Debug Outputs
 #CFLAGS+= -DDEBUG_NIC
 
+# Reduced Media Independent Interface
+# MAZBR LPEC2001: MII	(Intel LXT971ALE at 0..1)
+# Elmeg D@VOS   : RMII	(Altima AC104-QF at 4..7)
+# Telekom XI521 : RMII	(Altima AC104-QF at 4..7)
+#CFLAGS+= -DRMII
+
 # Fixed MAC address
 # p2001_eth has no flash and fixed mac address
 #CFLAGS+=	-DMAC_HW_ADDR_DRV="'H','Y','L','N','X','1'"

src/arch/armnommu/core/serial.c

 {
 	/* wait for room in the 32 byte tx FIFO */
 	while ((P2001_UART->r.STATUS & 0x3f) > /* 30 */ 0) ;
-	P2001_UART->w.TX1 = ch & 0xff;
+	P2001_UART->w.TX[0] = ch & 0xff;
 }
 
 /*
 int serial_getc(void)
 {
 	while (((P2001_UART->r.STATUS >> 6) & 0x3f) == 0) ;
-	return P2001_UART->r.RX1 & 0xff;
+	return P2001_UART->r.RX[0] & 0xff;
 }
 
 /*

src/arch/armnommu/drivers/net/p2001_eth.c

 /**************************************************************************
-Etherboot -  BOOTP/TFTP Bootstrap Program
-P2001 NIC driver for Etherboot
-***************************************************************************/
+ * Etherboot -  BOOTP/TFTP Bootstrap Program
+ * P2001 NIC driver for Etherboot
+ **************************************************************************/
 
 /*
- *  Copyright (C) 2004 Tobias Lorenz
+ *  Copyright (C) 2005 Tobias Lorenz
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
 #include "isa.h"
 
 #include "hardware.h"
-#include "lxt971a.h"
+#include "mii.h"
 #include "timer.h"
 
 
 #define DMA_BUF_SIZE	2048	/* Buffer size */
 static DMA_DSC txd              __attribute__ ((__section__(".dma.desc")));
 static DMA_DSC rxd[NUM_RX_DESC] __attribute__ ((__section__(".dma.desc")));
-static unsigned char rxb[NUM_RX_DESC * DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
-static unsigned char txb[              DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
+static char rxb[NUM_RX_DESC * DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
+static char txb[              DMA_BUF_SIZE] __attribute__ ((__section__(".dma.buffer")));
 static unsigned int cur_rx;
 
 /* Device selectors */
 static unsigned int cur_channel;	// DMA channel    : 0..3
 static unsigned int cur_phy;		// PHY Address    : 0..31
 static P2001_ETH_regs_ptr EU;		// Ethernet Unit  : 0x0018_000 with _=0..3
-static P2001_ETH_regs_ptr MU;		// Management Unit: 0x00180000
 
-#define MDIO_MAXCOUNT 1000			/* mdio abort */
-static unsigned int mdio_error;			/* mdio error */
-
-/* Function prototypes */
-static void         p2001_eth_mdio_init ();
-static void         p2001_eth_mdio_write(unsigned int phyadr, unsigned int regadr, unsigned int data);
-static unsigned int p2001_eth_mdio_read (unsigned int phyadr, unsigned int regadr);
-extern unsigned int p2001_eth_mdio_error;
+/* mdio handling */
+static int          p2001_eth_mdio_read (int phy_id, int location);
+static void         p2001_eth_mdio_write(int phy_id, int location, int val);
 
+/* net_device functions */
 static int          p2001_eth_poll      (struct nic *nic, int retrieve);
 static void         p2001_eth_transmit  (struct nic *nic, const char *d,
 					unsigned int t, unsigned int s, const char *p);
 static void         p2001_eth_disable   (struct dev *dev);
 
 static int          p2001_eth_check_link(unsigned int phy);
+static int          link;
+static void         p2001_eth_phyreset  ();
 static int          p2001_eth_probe     (struct dev *dev, unsigned short *probe_addrs __unused);
 
+/* Supported MII list */
+static struct mii_chip_info {
+	const char * name;
+	unsigned int physid;	// (MII_PHYSID2 << 16) | MII_PHYSID1
+} mii_chip_table[] = {
+	{ "Intel LXT971A",	0x78e20013 },
+	{ "Altima AC104-QF",	0x55410022 },
+	{NULL,0},
+};
+
+
 
 /**************************************************************************
-PHY MANAGEMENT UNIT - Read/write
-***************************************************************************/
-static void p2001_eth_mdio_init()
+ * PHY MANAGEMENT UNIT - Read/write
+ **************************************************************************/
+
+/**
+ *	mdio_read - read MII PHY register
+ *	@dev: the net device to read
+ *	@regadr: the phy register id to read
+ *
+ *	Read MII registers through MDIO and MDC
+ *	using MDIO management frame structure and protocol(defined by ISO/IEC).
+ */
+static int p2001_eth_mdio_read(int phy_id, int location)
 {
-	/* reset ethernet PHYs */
-	printf("Resetting PHYs...\n");
+	int result, boguscnt = 1000;
 
-	/* GPIO24/25: TX_ER2/TX_ER0 */
-	/* GPIO26/27: PHY_RESET/TX_ER1 */
-	P2001_GPIO->PIN_MUX |= 0x0018;
-	// 31-16: 0000 1111 0000 0000
-	P2001_GPIO->GPIO2_En |= 0x0400;
+	do {
+		/* Warten bis Hardware inaktiv (MIU = "0") */
+		while (P2001_MU->MU_CNTL & 0x8000)
+			barrier();
 
-	P2001_GPIO->GPIO2_Out |= 0x04000000;
-	P2001_GPIO->GPIO2_Out &= ~0x0400;
-	mdelay(500);
-	P2001_GPIO->GPIO2_Out |= 0x0400;
+		/* Schreiben MU_CNTL */
+		P2001_MU->MU_CNTL = location + (phy_id<<5) + (2<<10);
 
-	/* set management unit clock divisor */
-	// max. MDIO CLK = 2.048 MHz (EU.doc)
-	// max. MDIO CLK = 8.000 MHz (LXT971A)
-	// sysclk/(2*(n+1)) = MDIO CLK <= 2.048 MHz
-	// n >= sysclk/4.096 MHz - 1
-#if SYSCLK == 73728000
-	P2001_MU->MU_DIV = 17;	// 73.728 MHZ =17=> 2.020 MHz
-#else
-	//MU->MU_DIV = (SYSCLK/4.096)-1;
-#error "Please define a proper MDIO CLK divisor for that sysclk."
-#endif
-	asm("nop \n nop");
+		/* Warten bis Hardware aktiv (MIU = "1") */
+		while ((P2001_MU->MU_CNTL & 0x8000) == 0)
+			barrier();
+		//asm("nop \r\n nop");
+
+		/* Warten bis Hardware inaktiv (MIU = "0") */
+		while (P2001_MU->MU_CNTL & 0x8000)
+			barrier();
+
+		/* Fehler, wenn MDIO Read Error (MRE = "1") */
+	} while ((P2001_MU->MU_CNTL & 0x4000) && (--boguscnt > 0));
+
+	/* Lesen MU_DATA */
+	result = P2001_MU->MU_DATA;
+
+	if (boguscnt == 0)
+		return 0;
+	if ((result & 0xffff) == 0xffff)
+		return 0;
+
+	return result & 0xffff;
 }
 
-static void p2001_eth_mdio_write(unsigned int phyadr, unsigned int regadr, unsigned int data)
-{
-	static unsigned int count;
-	count = 0;
 
+/**
+ *	mdio_write - write MII PHY register
+ *	@dev: the net device to write
+ *	@regadr: the phy register id to write
+ *	@value: the register value to write with
+ *
+ *	Write MII registers with @value through MDIO and MDC
+ *	using MDIO management frame structure and protocol(defined by ISO/IEC)
+ */
+static void p2001_eth_mdio_write(int phy_id, int location, int val)
+{
 	/* Warten bis Hardware inaktiv (MIU = "0") */
-	while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
-		count++;
+	while (P2001_MU->MU_CNTL & 0x8000)
+		barrier();
 
 	/* Schreiben MU_DATA */
-	MU->MU_DATA = data;
+	P2001_MU->MU_DATA = val;
 
 	/* Schreiben MU_CNTL */
-	MU->MU_CNTL = regadr + (phyadr<<5) + (1<<10);
+	P2001_MU->MU_CNTL = location + (phy_id<<5) + (1<<10);
 
 	/* Warten bis Hardware aktiv (MIU = "1") */
-	while (((MU->MU_CNTL & 0x8000) == 0) && (count < MDIO_MAXCOUNT))
-		count++;
+	while ((P2001_MU->MU_CNTL & 0x8000) == 0)
+		barrier();
 	//asm("nop \r\n nop");
 
 	/* Warten bis Hardware inaktiv (MIU = "0") */
-	while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
-		count++;
-
-	mdio_error = (count >= MDIO_MAXCOUNT);
+	while (P2001_MU->MU_CNTL & 0x8000)
+		barrier();
 }
 
-static unsigned int p2001_eth_mdio_read(unsigned int phyadr, unsigned int regadr)
-{
-	static unsigned int count;
-	count = 0;
-
-	do {
-		/* Warten bis Hardware inaktiv (MIU = "0") */
-		while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
-			count++;
-
-		/* Schreiben MU_CNTL */
-		MU->MU_CNTL = regadr + (phyadr<<5) + (2<<10);
-
-		/* Warten bis Hardware aktiv (MIU = "1") */
-		while (((MU->MU_CNTL & 0x8000) == 0) && (count < MDIO_MAXCOUNT))
-			count++;
-		//asm("nop \r\n nop");
-
-		/* Warten bis Hardware inaktiv (MIU = "0") */
-		while ((MU->MU_CNTL & 0x8000) && (count < MDIO_MAXCOUNT))
-			count++;
-
-		/* Fehler, wenn MDIO Read Error (MRE = "1") */
-	} while ((MU->MU_CNTL & 0x4000) && (count < MDIO_MAXCOUNT));
-
-	/* Lesen MU_DATA */
-	mdio_error = (count >= MDIO_MAXCOUNT);
-	return MU->MU_DATA;
-}
 
 
 /**************************************************************************
-POLL - Wait for a frame
-***************************************************************************/
+ * POLL - Wait for a frame
+ **************************************************************************/
+
 /* Function: p2001_eth_poll
  *
  * Description: checks for a received packet and returns it if found.
 }
 
 
+
 /**************************************************************************
-TRANSMIT - Transmit a frame
-***************************************************************************/
+ * TRANSMIT - Transmit a frame
+ **************************************************************************/
+
 /* Function: p2001_eth_transmit
  *
  * Description: transmits a packet and waits for completion or timeout.
 	// TMAC_CNTL.ATP does the same
 
 #ifdef DEBUG_NIC
-	printf("p2001_eth_transmit: packet from %! to %! sent\n", txb+ETH_ALEN, txb);
+	printf("p2001_eth_transmit: packet from %! to %! sent (size: %d)\n", txb+ETH_ALEN, txb, s);
 #endif
 
 	/* configure descriptor */
 
 	/* restart the transmitter */
 	EU->TMAC_DMA_EN = 0x01;		/* set run bit */
-	while(EU->TMAC_DMA_EN & 0x01) ;	/* wait */
+	while(EU->TMAC_DMA_EN & 0x01);	/* wait */
 
 #ifdef DEBUG_NIC
 	/* check status */
 	status = EU->TMAC_DMA_STAT;
-	if (status & ~(0x40))
+	if (status & ~(0x40))	// not END
 		printf("p2001_eth_transmit: dma status=0x%hx\n", status);
 
 	printf("TMAC_MIB6..7: %d:%d\n", EU->TMAC_MIB6, EU->TMAC_MIB7);
 }
 
 
+
 /**************************************************************************
-IRQ - Enable, Disable or Force Interrupts
-***************************************************************************/
+ * IRQ - Enable, Disable or Force Interrupts
+ **************************************************************************/
+
 /* Function: p2001_eth_irq
  *
  * Description: Enable, Disable, or Force, interrupts
 }
 
 
+
 /**************************************************************************
-INIT - Initialize device
-***************************************************************************/
+ * INIT - Initialize device
+ **************************************************************************/
+
 /* Function: p2001_init
  *
  * Description: resets the ethernet controller chip and various
 {
 	static int i;
 
+	/* activate MII 3 */
+	if (cur_channel == 3)
+		P2001_GPIO->PIN_MUX |= (1<<8);	// MII_3_en = 1
+
+#ifdef RMII
+	/* RMII init sequence */
+	if (link & LPA_100) {
+		EU->CONF_RMII = (1<<2) | (1<<1);		// softres | 100Mbit
+		EU->CONF_RMII = (1<<2) | (1<<1) | (1<<0);	// softres | 100Mbit | RMII
+		EU->CONF_RMII = (1<<1) | (1<<0);		// 100 Mbit | RMII
+	} else {
+		EU->CONF_RMII = (1<<2);				// softres
+		EU->CONF_RMII = (1<<2) | (1<<0);		// softres | RMII
+		EU->CONF_RMII = (1<<0);				// RMII
+	}
+#endif
+
 	/* disable transceiver */
 //	EU->TMAC_DMA_EN = 0;		/* clear run bit */
 //	EU->RMAC_DMA_EN = 0;		/* clear run bit */
 //	txd.stat = (1<<31) | (1<<30) | (1<<29);			// DSC0 OWN|START|END
 //	txd.cntl = cur_channel << 16;				// DSC1 CHANNEL
 //	txd.cntl |= DMA_BUF_SIZE;				// DSC1 LEN
-	txd.buf = &txb;						// DSC2 BUFFER
+	txd.buf = (char *)&txb;					// DSC2 BUFFER
 	txd.next = &txd;					// DSC3 NEXTDSC @self
 	EU->TMAC_DMA_DESC = &txd;
 
 	EU->RMAC_DMA_DESC = &rxd[0];
 
 	/* set transmitter mode */
-	EU->TMAC_CNTL = (1<<4) |	/* COI: Collision ignore */
-			//(1<<3) |	/* CSI: Carrier Sense ignore */
-			(1<<2);		/* ATP: Automatic Transmit Padding */
+	if (link & LPA_DUPLEX)
+		EU->TMAC_CNTL =	(1<<4) |	/* COI: Collision ignore */
+				(1<<3) |	/* CSI: Carrier Sense ignore */
+				(1<<2);		/* ATP: Automatic Transmit Padding */
+	else
+		EU->TMAC_CNTL =	(1<<2);		/* ATP: Automatic Transmit Padding */
 
 	/* set receive mode */
 	EU->RMAC_CNTL = (1<<3) |	/* BROAD: Broadcast packets */
 }
 
 
+
 /**************************************************************************
-DISABLE - Turn off ethernet interface
-***************************************************************************/
+ * DISABLE - Turn off ethernet interface
+ **************************************************************************/
 static void p2001_eth_disable(struct dev *dev __unused)
 {
 	/* put the card in its initial state */
 }
 
 
+
 /**************************************************************************
-LINK - Check for valid link
-***************************************************************************/
+ * LINK - Check for valid link
+ **************************************************************************/
 static int p2001_eth_check_link(unsigned int phy)
 {
 	static int status;
-	static unsigned int count;
-	count = 0;
+	static unsigned int i, physid;
+
+	/* print some information about out PHY */
+	physid = (p2001_eth_mdio_read(phy, MII_PHYSID2) << 16) |
+		  p2001_eth_mdio_read(phy, MII_PHYSID1);
+	printf("PHY %d, ID 0x%x ", phy, physid);
+	for (i = 0; mii_chip_table[i].physid; i++)
+		if (mii_chip_table[i].physid == physid) {
+			printf("(%s).\n", mii_chip_table[i].name);
+			break;
+		}
+	if (!mii_chip_table[i].physid)
+		printf("(unknown).\n");
 
 	/* Use 0x3300 for restarting NWay */
 	printf("Starting auto-negotiation... ");
-	p2001_eth_mdio_write(phy, Adr_LXT971A_Control, 0x3300);
-	if (mdio_error)
-		goto failed;
+	p2001_eth_mdio_write(phy, MII_BMCR, 0x3300);
 
-	/* Bits 1.5 and 17.7 are set to 1 once the Auto-Negotiation process to completed. */
+	/* Bit 1.5 is set once the Auto-Negotiation process is completed. */
+	i = 0;
 	do {
 		mdelay(500);
-		status = p2001_eth_mdio_read(phy, Adr_LXT971A_Status1);
-		if (mdio_error || (count++ > 6))	// 6*500ms = 3s timeout
+		status = p2001_eth_mdio_read(phy, MII_BMSR);
+		if (!status || (i++ > 6))	// 6*500ms = 3s timeout
 			goto failed;
-	} while (!(status & 0x20));
-	
-	/* Bits 1.2 and 17.10 are set to 1 once the link is established. */
-	if (p2001_eth_mdio_read(phy, Adr_LXT971A_Status1) & 0x04) {
-		/* Bits 17.14 and 17.9 can be used to determine the link operation conditions (speed and duplex). */
-		printf("Valid link, operating at: %sMb-%s\n",
-			(p2001_eth_mdio_read(phy, Adr_LXT971A_Status2) & 0x4000) ? "100" : "10",
-			(p2001_eth_mdio_read(phy, Adr_LXT971A_Status2) & 0x0200) ? "FD" : "HD");
-			return 1;
+	} while (!(status & BMSR_ANEGCOMPLETE));
+
+	/* Bits 1.2 is set once the link is established. */
+	if ((status = p2001_eth_mdio_read(phy, MII_BMSR)) & BMSR_LSTATUS) {
+		link = p2001_eth_mdio_read(phy, MII_ADVERTISE) &
+		       p2001_eth_mdio_read(phy, MII_LPA);
+		printf("  Valid link, operating at: %sMb-%s\n",
+			(link & LPA_100) ? "100" : "10",
+			(link & LPA_DUPLEX) ? "FD" : "HD");
+		return 1;
 	}
 
 failed:
-	if (mdio_error)
+	if (!status)
 		printf("Failed\n");
 	else
 		printf("No valid link\n");
 }
 
 
+
+/**************************************************************************
+ * PHYRESET - hardware reset all MII PHYs
+ **************************************************************************/
+
+/**
+ *	p2001_eth_phyreset - hardware reset all MII PHYs
+ */
+static void p2001_eth_phyreset()
+{
+	/* GPIO24/25: TX_ER2/TX_ER0 */
+	/* GPIO26/27: PHY_RESET/TX_ER1 */
+	P2001_GPIO->PIN_MUX |= 0x0018;
+	// 31-16: 0000 1111 0000 0000
+	P2001_GPIO->GPIO2_En |= 0x0400;
+
+	P2001_GPIO->GPIO2_Out |= 0x04000000;
+	P2001_GPIO->GPIO2_Out &= ~0x0400;
+	mdelay(500);
+	P2001_GPIO->GPIO2_Out |= 0x0400;
+
+#ifdef RMII
+	/* RMII_clk_sel = 0xxb  no RMII (default) */
+	/* RMII_clk_sel = 100b	COL_0 */
+	/* RMII_clk_sel = 101b	COL_1 */
+	/* RMII_clk_sel = 110b	COL_2 */
+	/* RMII_clk_sel = 111b	COL_3 */
+	P2001_GPIO->PIN_MUX |= (4 << 13);
+#endif
+}
+
+
+
 /**************************************************************************
-PROBE - Look for an adapter, this routine's visible to the outside
-***************************************************************************/
+ * PROBE - Look for an adapter, this routine's visible to the outside
+ **************************************************************************/
+
 static int p2001_eth_probe(struct dev *dev, unsigned short *probe_addrs __unused)
 {
 	struct nic *nic = (struct nic *)dev;
 	/* if probe_addrs is 0, then routine can use a hardwired default */
-	static int board_found;
-	static int valid_link;
 
 	/* reset phys and configure mdio clk */
-	p2001_eth_mdio_init();
+	printf("Resetting PHYs...\n");
+	p2001_eth_phyreset();
+
+	/* set management unit clock divisor */
+	// max. MDIO CLK = 2.048 MHz (EU.doc)
+	P2001_MU->MU_DIV = (SYSCLK/4096000)-1;	// 2.048 MHz
+	//asm("nop \n nop");
 
 	/* find the correct PHY/DMA/MAC combination */
-	MU = P2001_MU;	// MU for all PHYs is only in EU0
 	printf("Searching for P2001 NICs...\n");
+	cur_phy = -1;
 	for (cur_channel=0; cur_channel<4; cur_channel++) {
-		switch(cur_channel) {
-			case 0:
-				EU = P2001_EU0;
-				cur_phy = 0;
-				break;
-			case 1:
-				EU = P2001_EU1;
-				cur_phy = 1;
-				break;
-			case 2:
-				EU = P2001_EU2;
-				cur_phy = 2;
-				break;
-			case 3:
-				EU = P2001_EU3;
-				cur_phy = 3;
+		EU = P2001_EU(cur_channel);
+
+		/* find next phy */
+		while (++cur_phy < 16) {
+			//printf("phy detect %d\n", cur_phy);
+			if (p2001_eth_mdio_read(cur_phy, MII_BMSR) != 0)
 				break;
 		}
+		if (cur_phy == 16) {
+			printf("no more MII PHYs found\n");
+			break;
+		}
 
 		/* first a non destructive test for initial value RMAC_TLEN=1518 */
-		board_found = (EU->RMAC_TLEN == 1518);
-		if (board_found) {
+		if (EU->RMAC_TLEN == 1518) {
 			printf("Checking EU%d...\n", cur_channel);
 
-			valid_link = p2001_eth_check_link(cur_phy);
-			if (valid_link) {
+			if (p2001_eth_check_link(cur_phy)) {
 				/* initialize device */
 				p2001_eth_init(nic);
 
 
 				/* Report the ISA pnp id of the board */
 				dev->devid.vendor_id = htons(GENERIC_ISAPNP_VENDOR);
-				dev->devid.vendor_id = htons(0x1234);
 				return 1;
 			}
 		}

src/arch/armnommu/include/hardware.h

 
 typedef union {						// 0x00140000U
 	struct {	// write
-		volatile unsigned int TX1;		// 0x00000000U
-		volatile unsigned int TX2;		// 0x00000004U
-		volatile unsigned int TX3;		// 0x00000008U
-		volatile unsigned int TX4;		// 0x0000000CU
+		volatile unsigned int TX[4];		// 0x00000000-0x000CU
 		volatile unsigned int Baudrate;		// 0x00000010U
 		volatile unsigned int reserved1[0x3];
 		volatile unsigned int Config;		// 0x00000020U
 	} w;		// write
 	
 	struct {	// read
-		volatile unsigned int RX1;		// 0x00000000U
-		volatile unsigned int RX2;		// 0x00000004U
-		volatile unsigned int RX3;		// 0x00000008U
-		volatile unsigned int RX4;		// 0x0000000CU
+		volatile unsigned int RX[4];		// 0x00000000-0x000CU
 		volatile unsigned int reserved1[0x4];
 		volatile unsigned int PRE_STATUS;	// 0x00000020U
 		volatile unsigned int STATUS;		// 0x00000024U
 	volatile unsigned int TMAC_DMA_DATA;	// 0x00000FF8U
 	volatile unsigned int TMAC_DMA_ADR;	// 0x00000FFCU
 } *P2001_ETH_regs_ptr;
-#define P2001_EU0 ((volatile P2001_ETH_regs_ptr) 0x00180000)
-#define P2001_EU1 ((volatile P2001_ETH_regs_ptr) 0x00181000)
-#define P2001_EU2 ((volatile P2001_ETH_regs_ptr) 0x00182000)
-#define P2001_EU3 ((volatile P2001_ETH_regs_ptr) 0x00183000)
-#define P2001_MU  P2001_EU0
+#define P2001_EU(x) ((volatile P2001_ETH_regs_ptr) ((unsigned int) 0x00180000UL+(0x1000UL*(x)))) /* x = 0..3 */
+#define P2001_MU  P2001_EU(0)
 
 #endif
 

src/arch/armnommu/include/lxt971a.h

-/*
- *  Copyright (C) 2004 Tobias Lorenz
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/*
- * Intel LXT971ALE (MII-compatible PHY)
- */
-
-#define Adr_LXT971A_Control		0	/* Control Register */
-#define Adr_LXT971A_Status1		1	/* MII Status Register #1 */
-#define Adr_LXT971A_PHY_ID1		2	/* PHY Identification Register 1 */
-#define Adr_LXT971A_PHY_ID2		3	/* PHY Identification Register 2 */
-#define Adr_LXT971A_AN_Advertise	4	/* Auto Negotiation Advertisement Register */
-#define Adr_LXT971A_AN_Link_Ability	5	/* Auto Negotiation Link Partner Base Page Ability Register */
-#define Adr_LXT971A_AN_Expansion	6	/* Auto Negotiation Expansion */
-#define Adr_LXT971A_AN_Next_Page_Txmit	7	/* Auto Negotiation Next Page Transmit Register */
-#define Adr_LXT971A_AN_Link_Next_Page	8	/* Auto Negotiation Link Partner Next Page Receive Register */
-#define Adr_LXT971A_Fast_Control	9	/* Not Implemented */
-#define Adr_LXT971A_Fast_Status		10	/* Not Implemented */
-#define Adr_LXT971A_Extended_Status	15	/* Not Implemented */
-#define Adr_LXT971A_Port_Config		16	/* Configuration Register */
-#define Adr_LXT971A_Status2		17	/* Status Register #2 */
-#define Adr_LXT971A_Interrupt_Enable	18	/* Interrupt Enable Register */
-#define Adr_LXT971A_Interrupt_Status	19	/* Interrupt Status Register */
-#define Adr_LXT971A_LED_Config		20	/* LED Configuration Register */
-#define Adr_LXT971A_Transmit_Control	30	/* Transmit Control Register */

src/arch/armnommu/include/stdint.h

 typedef signed int         int32_t;
 typedef signed long long   int64_t;
 
+typedef signed char        s8;
+typedef unsigned char      u8;
+
+typedef signed short       s16;
+typedef unsigned short     u16;
+
+typedef signed long        s32;
+typedef unsigned int       u32;
+
+typedef signed long long   s64;
+typedef unsigned long long u64;
+
 #endif /* STDINT_H */

src/arch/e1/include/stdint.h

 typedef signed int         int32_t;
 typedef signed long long   int64_t;
 
+typedef signed char        s8;
+typedef unsigned char      u8;
+
+typedef signed short       s16;
+typedef unsigned short     u16;
+
+typedef signed long        s32;
+typedef unsigned int       u32;
+
+typedef signed long long   s64;
+typedef unsigned long long u64;
+
 #endif /* STDINT_H */

src/arch/i386/core/freebsd_loader.c

 					estate.toread, estate.curaddr);
 #endif
 				/* Save where we are loading this... */
-				symtab_load = phys_to_virt(estate.curaddr);
+				symtab_load = estate.curaddr;
 				
 				*((long *)phys_to_virt(estate.curaddr)) = estate.toread;
 				estate.curaddr += sizeof(long);
 					estate.toread, estate.curaddr);
 #endif
 				/* Save where we are loading this... */
-				symstr_load = phys_to_virt(estate.curaddr);
+				symstr_load = estate.curaddr;
 				
 				*((long *)phys_to_virt(estate.curaddr)) = estate.toread;
 				estate.curaddr += sizeof(long);
 		/* Assumes size of long is a power of 2... */
 		bsdinfo.bi_esymtab = (symstr_load +
 			sizeof(long) +
-			*((long *)symstr_load) +
+			*((long *)phys_to_virt(symstr_load)) +
 			sizeof(long) - 1) & ~(sizeof(long) - 1);
 		
 		/* Where we will build the meta data... */

src/arch/i386/include/stdint.h

 
 typedef unsigned long		physaddr_t;
 
+typedef signed char	   s8;
+typedef unsigned char      u8;
+
+typedef signed short       s16;
+typedef unsigned short     u16;
+
+typedef signed int         s32;
+typedef unsigned int       u32;
+
+typedef signed long long   s64;
+typedef unsigned long long u64;
+
 #endif /* STDINT_H */

src/arch/ia64/include/stdint.h

 typedef signed int         int32_t;
 typedef signed long        int64_t;
 
+typedef signed char        s8;
+typedef unsigned char      u8;
+
+typedef signed short       s16;
+typedef unsigned short     u16;
+
+typedef signed int         s32;
+typedef unsigned int       u32;
+
+typedef signed long	   s64;
+typedef unsigned long      u64;
+
 #endif /* STDINT_H */

src/core/config.c

 #ifdef DOWNLOAD_PROTO_TFTP
 		"TFTP "
 #endif
+#ifdef  DOWNLOAD_PROTO_FSP
+		"FSP "
+#endif				
 #ifdef  DOWNLOAD_PROTO_NFS
 		"NFS "
 #endif

src/drivers/net/3c515.c

 
 /* TJL definations */
 #define HZ      100
-#define u16 unsigned short
-#define u32 unsigned long
-#define s16 signed short
-#define s32 signed long
 static int if_port;
 static struct corkscrew_private *vp;
 /* Brought directly from 3c515.c by Becker */

src/drivers/net/davicom.c

 
 #define TX_TIME_OUT       2*TICKS_PER_SEC
 
-typedef unsigned char  u8;
-typedef   signed char  s8;
-typedef unsigned short u16;
-typedef   signed short s16;
-typedef unsigned int   u32;
-typedef   signed int   s32;
-
 /* Register offsets for davicom device */
 enum davicom_offsets {
    CSR0=0,     CSR1=0x08,  CSR2=0x10,  CSR3=0x18,  CSR4=0x20,  CSR5=0x28,

src/drivers/net/depca.c

 #define ALIGN8      ((u32)8 - 1)       /* 2 longword (quadword) align */
 #define ALIGN         ALIGN8              /* Keep the LANCE happy... */
 
-typedef	long		s32;
-typedef	unsigned long	u32;
-typedef	short		s16;
-typedef	unsigned short	u16;
-typedef	char		s8;
-typedef	unsigned char	u8;
-
 /*
 ** The DEPCA Rx and Tx ring descriptors. 
 */

src/drivers/net/dmfe.c

 #define dprintf(x)
 #endif
 
-typedef unsigned char u8;
-typedef signed char s8;
-typedef unsigned short u16;
-typedef signed short s16;
-typedef unsigned int u32;
-typedef signed int s32;
-
 /* Condensed operations for readability. */
 #define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
 #define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))

src/drivers/net/eepro.c

 has 34 pins, the top row of 2 are not used.
 ***************************************************************************/
 
+/*
+
+ timlegge	2005-05-18	remove the relocation changes cards that 
+				write directly to the hardware don't need it
+*/
+
 /*
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
 #define eeprom_delay() { udelay(40); }
 #define EE_READ_CMD (6 << 6)
 
-/* do a full reset */
-#define eepro_full_reset(ioaddr)	outb(RESET_CMD, ioaddr); udelay(40);
+/* do a full reset; data sheet asks for 250us delay */
+#define eepro_full_reset(ioaddr)	outb(RESET_CMD, ioaddr); udelay(255);
 
 /* do a nice reset */
 #define eepro_sel_reset(ioaddr) 	{ \
 	eepro_sw2bank0(nic->ioaddr);	/* Switch back to bank 0 */
 	eepro_clear_int(nic->ioaddr);
 	/* Initialise RCV */
-	rx_start = (unsigned int)bus_to_virt(RCV_LOWER_LIMIT << 8);
-	outw(RCV_LOWER_LIMIT << 8, nic->ioaddr + RCV_BAR);
+	outw(rx_start = (RCV_LOWER_LIMIT << 8), nic->ioaddr + RCV_BAR);
 	outw(((RCV_UPPER_LIMIT << 8) | 0xFE), nic->ioaddr + RCV_STOP);
+ 	/* Make sure 1st poll won't find a valid packet header */
+ 	outw((RCV_LOWER_LIMIT << 8), nic->ioaddr + HOST_ADDRESS_REG);
+ 	outw(0,                      nic->ioaddr + IO_PORT);
 	/* Intialise XMT */
 	outw((XMT_LOWER_LIMIT << 8), nic->ioaddr + xmt_bar);
 	eepro_sel_reset(nic->ioaddr);
-	tx_start = tx_end = (unsigned int)bus_to_virt(XMT_LOWER_LIMIT << 8);
+	tx_start = tx_end = (XMT_LOWER_LIMIT << 8);
 	tx_last = 0;
 	eepro_en_rx(nic->ioaddr);
 }
 ***************************************************************************/
 static int eepro_poll(struct nic *nic, int retrieve)
 {
-	unsigned int	rcv_car = virt_to_bus((void *)rx_start);
+	unsigned int	rcv_car = rx_start;
 	unsigned int	rcv_event, rcv_status, rcv_next_frame, rcv_size;
 
 	/* return true if there's an ethernet packet ready to read */
 }
 #endif
 	nic->packetlen = rcv_size;
-	rcv_car  = virt_to_bus((void *) (rx_start + RCV_HEADER + rcv_size));
-	rx_start = (unsigned int)bus_to_virt(rcv_next_frame << 8);
+	rcv_car  = (rx_start + RCV_HEADER + rcv_size);
+	rx_start = rcv_next_frame;
+/* 
+	hex_dump(rcv_car, nic->packetlen); 
+*/
+
 	if (rcv_car == 0)
 		rcv_car = ((RCV_UPPER_LIMIT << 8) | 0xff);
 	outw(rcv_car - 1, nic->ioaddr + RCV_STOP);
 	eepro_sw2bank0(nic->ioaddr);	/* Switch to bank 0 */
 	/* Flush the Tx and disable Rx */
 	outb(STOP_RCV_CMD, nic->ioaddr);
-	tx_start = tx_end = (unsigned int) (bus_to_virt(XMT_LOWER_LIMIT << 8));
+	tx_start = tx_end = (XMT_LOWER_LIMIT << 8);
 	tx_last = 0;
 	/* Reset the 82595 */
 	eepro_full_reset(nic->ioaddr);

src/drivers/net/eepro100.c

 
 static int ioaddr;
 
-typedef unsigned char  u8;
-typedef   signed char  s8;
-typedef unsigned short u16;
-typedef   signed short s16;
-typedef unsigned int   u32;
-typedef   signed int   s32;
-
 enum speedo_offsets {
   SCBStatus = 0, SCBCmd = 2,      /* Rx/Command Unit command and status. */
   SCBPointer = 4,                 /* General purpose pointer. */

src/drivers/net/mtd80x.c

 /* to get the PCI support functions, if this is a PCI NIC */
 #include "pci.h"
 
-typedef unsigned char u8;
-typedef signed char s8;
-typedef unsigned short u16;
-typedef signed short s16;
-typedef unsigned int u32;
-typedef signed int s32;
-
 /* Condensed operations for readability. */
 #define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
 #define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))

src/drivers/net/natsemi.c

 
 #define NUM_RX_DESC    4              /* Number of Rx descriptor registers. */
 
-typedef uint8_t    u8;
-typedef int8_t     s8;
-typedef uint16_t   u16;
-typedef int16_t    s16;
-typedef uint32_t   u32;
-typedef int32_t    s32;
-
 /* helpful macroes if on a big_endian machine for changing byte order.
    not strictly needed on Intel */
 #define get_unaligned(ptr) (*(ptr))

src/drivers/net/ns83820.c

 #define dprintf(x)
 #endif
 
-typedef unsigned char u8;
-typedef signed char s8;
-typedef unsigned short u16;
-typedef signed short s16;
-typedef unsigned int u32;
-typedef signed int s32;
-
 #define HZ 100
 
 /* Condensed operations for readability. */

src/drivers/net/pcnet32.c

 #define drv_version "v1.3"
 #define drv_date "03-29-2004"
 
-typedef unsigned char u8;
-typedef signed char s8;
-typedef unsigned short u16;
-typedef signed short s16;
-typedef unsigned int u32;
-typedef signed int s32;
-
 static u32 ioaddr;		/* Globally used for the card's io address */
 static struct nic_operations pcnet32_operations;
 static struct pci_driver pcnet32_driver;

src/drivers/net/r8169.c

 #define drv_version "v1.6"
 #define drv_date "03-27-2004"
 
-typedef unsigned char u8;
-typedef signed char s8;
-typedef unsigned short u16;
-typedef signed short s16;
-typedef unsigned int u32;
-typedef signed int s32;
-
 #define HZ 1000
 
 static u32 ioaddr;

src/drivers/net/sis900.h

 
 #define NUM_RX_DESC     4              /* Number of Rx descriptor registers. */
 
-typedef unsigned char  u8;
-typedef   signed char  s8;
-typedef unsigned short u16;
-typedef   signed short s16;
-typedef unsigned int   u32;
-typedef   signed int   s32;
-
 /* Time in ticks before concluding the transmitter is hung. */
 #define TX_TIMEOUT       (4*TICKS_PER_SEC)
 

src/drivers/net/sundance.c

 #define drv_version "v1.12"
 #define drv_date "2004-03-21"
 
-typedef unsigned char u8;
-typedef signed char s8;
-typedef unsigned short u16;
-typedef signed short s16;
-typedef unsigned int u32;
-typedef signed int s32;
-
 #define HZ 100
 
 /* Condensed operations for readability. */

src/drivers/net/tg3.c

 /* 11-13-2003	timlegge	Fix Issue with NetGear GA302T 
  * 11-18-2003   ebiederm        Generalize NetGear Fix to what the code was supposed to be.
  * 01-06-2005   Alf (Frederic Olivie) Add Dell bcm 5751 (0x1677) support
+ * 04-15-2005   Martin Vogt Add Fujitsu Siemens Computer (FSC) 0x1734 bcm 5751 0x105d support
  */
 
 #include "etherboot.h"
 	{ PCI_VENDOR_ID_DELL, 0x0109, PHY_ID_BCM5411 }, /* MERLOT */
 	{ PCI_VENDOR_ID_DELL, 0x010a, PHY_ID_BCM5411 }, /* SLIM_MERLOT */
 	{ PCI_VENDOR_ID_DELL, 0x0179, PHY_ID_BCM5751 }, /* EtherXpress */
+	
+	/* Fujitsu Siemens Computer */
+	{ PCI_VENDOR_ID_FSC, 0x105d, PHY_ID_BCM5751 }, /* Futro C200 */	
 
 	/* Compaq boards. */
 	{ PCI_VENDOR_ID_COMPAQ, 0x007c, PHY_ID_BCM5701 }, /* BANSHEE */

src/drivers/net/tg3.h

 	((X) == PHY_ID_BCM5400 || (X) == PHY_ID_BCM5401 || \
 	 (X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \
 	 (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
-	 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5751 || \
+	 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || (X) == PHY_ID_BCM5751 || \
 	 (X) == PHY_ID_BCM8002 || (X) == PHY_ID_SERDES)
 
 	unsigned long			regs;

src/drivers/net/tlan.h

 * Indent Style: indent -kr -i8
 ***************************************************************************/
 
-/*
-#include <asm/io.h>
-#include <asm/types.h>
-#include <linux/netdevice.h>
-*/
-
-typedef unsigned char u8;
-typedef signed char s8;
-typedef unsigned short u16;
-typedef signed short s16;
-typedef unsigned int u32;
-typedef signed int s32;
-	/*****************************************************************
-	 * TLan Definitions
-	 *
-	 ****************************************************************/
+/*****************************************************************
+* TLan Definitions
+*
+****************************************************************/
 
 #define FALSE			0
 #define TRUE			1

src/drivers/net/tulip.c

 /*********************************************************************/
 
 /*
+  08 Feb 2005  Ramesh Chander chhabaramesh at yahoo.co.in added table entries
+               for SGThomson STE10/100A
   07 Sep 2003  timlegge	Multicast Support Added
   11 Apr 2001  mdc     [patch to etherboot 4.7.24]
      Major rewrite to include Linux tulip driver media detection
 
 #define TX_TIME_OUT       2*TICKS_PER_SEC
 
-typedef uint8_t    u8;
-typedef  int8_t    s8;
-typedef uint16_t   u16;
-typedef  int16_t   s16;
-typedef uint32_t   u32;
-typedef  int32_t   s32;
-
 /* helpful macros if on a big_endian machine for changing byte order.
    not strictly needed on Intel */
 #define get_unaligned(ptr) (*(ptr))
 enum tulip_chips {
     DC21040=0, DC21041=1, DC21140=2, DC21142=3, DC21143=3,
     LC82C168, MX98713, MX98715, MX98725, AX88141, AX88140, PNIC2, COMET,
-    COMPEX9881, I21145, XIRCOM
+    COMPEX9881, I21145, XIRCOM, SGThomson,	/*Ramesh Chander*/
 };
 
 enum pci_id_flags_bits {
       TULIP_IOTYPE, 256, MX98715 },
     { "3Com 3cSOHO100B-TX (ADMtek Centuar)", { 0x930010b7, 0xffffffff, 0, 0, 0, 0 },
       TULIP_IOTYPE, TULIP_SIZE, COMET },
+    { "SG Thomson STE10/100A", { 0x2774104a, 0xffffffff, 0, 0, 0, 0 },
+      TULIP_IOTYPE, 256, COMET },	/*Ramesh Chander*/
     { 0, { 0, 0, 0, 0, 0, 0 }, 0, 0, 0 },
 };
 
       | HAS_PWRDWN | HAS_NWAY },
     { "Xircom tulip work-alike", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII 
       | HAS_PWRDWN | HAS_NWAY },
+    { "SGThomson STE10/100A", HAS_MII | MC_HASH_ONLY },	/*Ramesh Chander*/   
     { 0, 0 },
 };
 
 PCI_ROM(0x11f6, 0x9881, "rl100tx",     "Compex RL100-TX"),
 PCI_ROM(0x115d, 0x0003, "xircomtulip", "Xircom Tulip"),
 PCI_ROM(0x104a, 0x0981, "tulip-0981",  "Tulip 0x104a 0x0981"),
-PCI_ROM(0x104a, 0x2774, "tulip-2774",  "Tulip 0x104a 0x2774"),
+PCI_ROM(0x104a, 0x2774, "SGThomson-STE10100A", "Tulip 0x104a 0x2774"),	/*Modified by Ramesh Chander*/
 PCI_ROM(0x1113, 0x9511, "tulip-9511",  "Tulip 0x1113 0x9511"),
 PCI_ROM(0x1186, 0x1561, "tulip-1561",  "Tulip 0x1186 0x1561"),
 PCI_ROM(0x1259, 0xa120, "tulip-a120",  "Tulip 0x1259 0xa120"),

src/drivers/net/w89c840.c

 
 static const char *w89c840_version = "driver Version 0.94 - December 12, 2003";
 
-typedef unsigned char  u8;
-typedef   signed char  s8;
-typedef unsigned short u16;
-typedef   signed short s16;
-typedef unsigned int   u32;
-typedef   signed int   s32;
-
 /* Linux support functions */
 #define virt_to_le32desc(addr)  virt_to_bus(addr)
 #define le32desc_to_virt(addr)  bus_to_virt(addr)

src/include/pci_ids.h

 #define PCI_VENDOR_ID_MORETON		0x15aa
 #define PCI_VENDOR_ID_ZOLTRIX		0x15b0
 #define PCI_VENDOR_ID_PDC		0x15e9
+#define PCI_VENDOR_ID_FSC		0x1734
 #define PCI_VENDOR_ID_SYMPHONY		0x1c1c
 #define PCI_VENDOR_ID_TEKRAM		0x1de1
 #define PCI_VENDOR_ID_3DLABS		0x3d3d

src/util/makerom.pl

 	# If PXE image, just fill the length field and write it out
 	if ($opts{'x'}) {
 		substr($rom, 2, 1) = chr((length($rom) + 511) / 512);
-		&writerom($ARGV[0], \$rom);
+		writerom($ARGV[0], \$rom);
 		return;
 	}
 	# Size specified with -s overrides value in 3rd byte in image
 			$romsize = ($filesize + 511) & ~511
 		}
 	} else {
-		$romsize = &getromsize(\$rom);
+		$romsize = getromsize(\$rom);
 		# 0 put there by *loader.S means makerom should pick the size
 		if ($romsize == 0) {
 			# Shrink romsize down to the smallest power of two that will do
 	}
 	substr($rom, 2, 1) = chr(($romsize / 512) % 256);
 	print "ROM size is $romsize\n" if $opts{'v'};
-	my $identoffset = &addident(\$rom);
-	&pcipnpheaders(\$rom, $identoffset);
-	&undiheaders(\$rom);
+	# set the product string only if we don't have one yet
+	my $pnp_hdr_offset = unpack('v', substr($rom, PNP_PTR_LOC, 2));
+	my $identoffset = substr($rom, $pnp_hdr_offset+PNP_DEVICE_OFF, 2) eq "\0\0" ? addident(\$rom) : undef;
+	pcipnpheaders(\$rom, $identoffset);
+	undiheaders(\$rom);
 	# 3c503 requires last two bytes to be 0x80
 	substr($rom, MINROMSIZE-2, 2) = "\x80\x80"
 		if ($opts{'3'} and $romsize == MINROMSIZE);
-	&checksum(\$rom);
-	&writerom($ARGV[0], \$rom);
+	checksum(\$rom);
+	writerom($ARGV[0], \$rom);
 }
 
 sub modrom () {
 	close(R);
 	defined($filesize) and $filesize >= 3 or die "Cannot get first 3 bytes of file\n";
 	print "$filesize bytes read\n" if $opts{'v'};
-	&pcipnpheaders(\$rom);
-	&undiheaders(\$rom);
-	&checksum(\$rom);
-	&writerom($ARGV[0], \$rom);
+	pcipnpheaders(\$rom, undef);
+	undiheaders(\$rom);
+	checksum(\$rom);
+	writerom($ARGV[0], \$rom);
 }
 
 # Main routine. See how we were called and behave accordingly
 if ($0 =~ m:modrom(\.pl)?$:) {
-	&modrom();
+	modrom();
 } else {
-	&makerom();
+	makerom();
 }
 exit(0);