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uhci.c 38KB

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  1. /*
  2. * Copyright (C) 2015 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of the
  7. * License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17. * 02110-1301, USA.
  18. *
  19. * You can also choose to distribute this program under the terms of
  20. * the Unmodified Binary Distribution Licence (as given in the file
  21. * COPYING.UBDL), provided that you have satisfied its requirements.
  22. */
  23. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  24. #include <strings.h>
  25. #include <unistd.h>
  26. #include <errno.h>
  27. #include <byteswap.h>
  28. #include <ipxe/malloc.h>
  29. #include <ipxe/pci.h>
  30. #include <ipxe/usb.h>
  31. #include "ehci.h"
  32. #include "uhci.h"
  33. /** @file
  34. *
  35. * USB Universal Host Controller Interface (UHCI) driver
  36. *
  37. */
  38. /******************************************************************************
  39. *
  40. * Register access
  41. *
  42. ******************************************************************************
  43. */
  44. /**
  45. * Check that address is reachable
  46. *
  47. * @v addr Address
  48. * @v len Length
  49. * @ret rc Return status code
  50. */
  51. static inline __attribute__ (( always_inline)) int
  52. uhci_reachable ( void *addr, size_t len ) {
  53. physaddr_t phys = virt_to_phys ( addr );
  54. /* Always reachable in a 32-bit build */
  55. if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
  56. return 0;
  57. /* Reachable if below 4GB */
  58. if ( ( ( phys + len - 1 ) & ~0xffffffffULL ) == 0 )
  59. return 0;
  60. return -ENOTSUP;
  61. }
  62. /******************************************************************************
  63. *
  64. * Run / stop / reset
  65. *
  66. ******************************************************************************
  67. */
  68. /**
  69. * Start UHCI device
  70. *
  71. * @v uhci UHCI device
  72. */
  73. static void uhci_run ( struct uhci_device *uhci ) {
  74. uint16_t usbcmd;
  75. /* Set run/stop bit */
  76. usbcmd = inw ( uhci->regs + UHCI_USBCMD );
  77. usbcmd |= ( UHCI_USBCMD_RUN | UHCI_USBCMD_MAX64 );
  78. outw ( usbcmd, uhci->regs + UHCI_USBCMD );
  79. }
  80. /**
  81. * Stop UHCI device
  82. *
  83. * @v uhci UHCI device
  84. * @ret rc Return status code
  85. */
  86. static int uhci_stop ( struct uhci_device *uhci ) {
  87. uint16_t usbcmd;
  88. uint16_t usbsts;
  89. unsigned int i;
  90. /* Clear run/stop bit */
  91. usbcmd = inw ( uhci->regs + UHCI_USBCMD );
  92. usbcmd &= ~UHCI_USBCMD_RUN;
  93. outw ( usbcmd, uhci->regs + UHCI_USBCMD );
  94. /* Wait for device to stop */
  95. for ( i = 0 ; i < UHCI_STOP_MAX_WAIT_MS ; i++ ) {
  96. /* Check if device is stopped */
  97. usbsts = inw ( uhci->regs + UHCI_USBSTS );
  98. if ( usbsts & UHCI_USBSTS_HCHALTED )
  99. return 0;
  100. /* Delay */
  101. mdelay ( 1 );
  102. }
  103. DBGC ( uhci, "UHCI %s timed out waiting for stop\n", uhci->name );
  104. return -ETIMEDOUT;
  105. }
  106. /**
  107. * Reset UHCI device
  108. *
  109. * @v uhci UHCI device
  110. * @ret rc Return status code
  111. */
  112. static int uhci_reset ( struct uhci_device *uhci ) {
  113. uint16_t usbcmd;
  114. unsigned int i;
  115. int rc;
  116. /* The UHCI specification states that resetting a running
  117. * device may result in undefined behaviour, so try stopping
  118. * it first.
  119. */
  120. if ( ( rc = uhci_stop ( uhci ) ) != 0 ) {
  121. /* Ignore errors and attempt to reset the device anyway */
  122. }
  123. /* Reset device */
  124. outw ( UHCI_USBCMD_HCRESET, uhci->regs + UHCI_USBCMD );
  125. /* Wait for reset to complete */
  126. for ( i = 0 ; i < UHCI_RESET_MAX_WAIT_MS ; i++ ) {
  127. /* Check if reset is complete */
  128. usbcmd = inw ( uhci->regs + UHCI_USBCMD );
  129. if ( ! ( usbcmd & UHCI_USBCMD_HCRESET ) )
  130. return 0;
  131. /* Delay */
  132. mdelay ( 1 );
  133. }
  134. DBGC ( uhci, "UHCI %s timed out waiting for reset\n", uhci->name );
  135. return -ETIMEDOUT;
  136. }
  137. /******************************************************************************
  138. *
  139. * Transfer descriptor rings
  140. *
  141. ******************************************************************************
  142. */
  143. /**
  144. * Allocate transfer ring
  145. *
  146. * @v ring Transfer ring
  147. * @ret rc Return status code
  148. */
  149. static int uhci_ring_alloc ( struct uhci_ring *ring ) {
  150. int rc;
  151. /* Initialise structure */
  152. memset ( ring, 0, sizeof ( *ring ) );
  153. /* Allocate queue head */
  154. ring->head = malloc_dma ( sizeof ( *ring->head ), UHCI_ALIGN );
  155. if ( ! ring->head ) {
  156. rc = -ENOMEM;
  157. goto err_alloc;
  158. }
  159. if ( ( rc = uhci_reachable ( ring->head,
  160. sizeof ( *ring->head ) ) ) != 0 )
  161. goto err_unreachable;
  162. /* Initialise queue head */
  163. ring->head->current = cpu_to_le32 ( UHCI_LINK_TERMINATE );
  164. return 0;
  165. err_unreachable:
  166. free_dma ( ring->head, sizeof ( *ring->head ) );
  167. err_alloc:
  168. return rc;
  169. }
  170. /**
  171. * Free transfer ring
  172. *
  173. * @v ring Transfer ring
  174. */
  175. static void uhci_ring_free ( struct uhci_ring *ring ) {
  176. unsigned int i;
  177. /* Sanity checks */
  178. assert ( uhci_ring_fill ( ring ) == 0 );
  179. for ( i = 0 ; i < UHCI_RING_COUNT ; i++ )
  180. assert ( ring->xfer[i] == NULL );
  181. /* Free queue head */
  182. free_dma ( ring->head, sizeof ( *ring->head ) );
  183. }
  184. /**
  185. * Enqueue new transfer
  186. *
  187. * @v ring Transfer ring
  188. * @v iobuf I/O buffer
  189. * @v count Number of descriptors
  190. * @ret rc Return status code
  191. */
  192. static int uhci_enqueue ( struct uhci_ring *ring, struct io_buffer *iobuf,
  193. unsigned int count ) {
  194. struct uhci_transfer *xfer;
  195. struct uhci_transfer *end;
  196. struct uhci_transfer_descriptor *desc;
  197. unsigned int index = ( ring->prod % UHCI_RING_COUNT );
  198. uint32_t link;
  199. size_t len;
  200. int rc;
  201. /* Sanity check */
  202. assert ( count > 0 );
  203. assert ( iobuf != NULL );
  204. /* Check for space in ring */
  205. if ( ! uhci_ring_remaining ( ring ) ) {
  206. rc = -ENOBUFS;
  207. goto err_ring_full;
  208. }
  209. /* Check for reachability of I/O buffer */
  210. if ( ( rc = uhci_reachable ( iobuf->data, iob_len ( iobuf ) ) ) != 0 )
  211. goto err_unreachable_iobuf;
  212. /* Allocate transfer */
  213. xfer = malloc ( sizeof ( *xfer ) );
  214. if ( ! xfer ) {
  215. rc = -ENOMEM;
  216. goto err_alloc_xfer;
  217. }
  218. /* Initialise transfer */
  219. xfer->prod = 0;
  220. xfer->cons = 0;
  221. xfer->len = 0;
  222. xfer->iobuf = iobuf;
  223. /* Allocate transfer descriptors */
  224. len = ( count * sizeof ( xfer->desc[0] ) );
  225. xfer->desc = malloc_dma ( len, UHCI_ALIGN );
  226. if ( ! xfer->desc ) {
  227. rc = -ENOMEM;
  228. goto err_alloc_desc;
  229. }
  230. if ( ( rc = uhci_reachable ( xfer->desc, len ) ) != 0 )
  231. goto err_unreachable_desc;
  232. /* Initialise transfer descriptors */
  233. memset ( xfer->desc, 0, len );
  234. desc = xfer->desc;
  235. for ( ; --count ; desc++ ) {
  236. link = ( virt_to_phys ( desc + 1 ) | UHCI_LINK_DEPTH_FIRST );
  237. desc->link = cpu_to_le32 ( link );
  238. desc->flags = ring->flags;
  239. }
  240. desc->link = cpu_to_le32 ( UHCI_LINK_TERMINATE );
  241. desc->flags = ( ring->flags | UHCI_FL_IOC );
  242. /* Add to ring */
  243. wmb();
  244. link = virt_to_phys ( xfer->desc );
  245. if ( uhci_ring_fill ( ring ) > 0 ) {
  246. end = ring->end;
  247. end->desc[ end->prod - 1 ].link = cpu_to_le32 ( link );
  248. } else {
  249. ring->head->current = cpu_to_le32 ( link );
  250. }
  251. assert ( ring->xfer[index] == NULL );
  252. ring->xfer[index] = xfer;
  253. ring->end = xfer;
  254. ring->prod++;
  255. return 0;
  256. err_unreachable_desc:
  257. free_dma ( xfer->desc, len );
  258. err_alloc_desc:
  259. free ( xfer );
  260. err_alloc_xfer:
  261. err_unreachable_iobuf:
  262. err_ring_full:
  263. return rc;
  264. }
  265. /**
  266. * Describe transfer
  267. *
  268. * @v ring Transfer ring
  269. * @v data Data
  270. * @v len Length of data
  271. * @v pid Packet ID
  272. */
  273. static void uhci_describe ( struct uhci_ring *ring, void *data,
  274. size_t len, uint8_t pid ) {
  275. struct uhci_transfer *xfer = ring->end;
  276. struct uhci_transfer_descriptor *desc;
  277. size_t frag_len;
  278. uint32_t control;
  279. do {
  280. /* Calculate fragment length */
  281. frag_len = len;
  282. if ( frag_len > ring->mtu )
  283. frag_len = ring->mtu;
  284. /* Populate descriptor */
  285. desc = &xfer->desc[xfer->prod++];
  286. if ( pid == USB_PID_IN )
  287. desc->flags |= UHCI_FL_SPD;
  288. control = ( ring->control | UHCI_CONTROL_PID ( pid ) |
  289. UHCI_CONTROL_LEN ( frag_len ) );
  290. desc->control = cpu_to_le32 ( control );
  291. if ( data )
  292. desc->data = virt_to_phys ( data );
  293. wmb();
  294. desc->status = UHCI_STATUS_ACTIVE;
  295. /* Update data toggle */
  296. ring->control ^= UHCI_CONTROL_TOGGLE;
  297. /* Move to next descriptor */
  298. data += frag_len;
  299. len -= frag_len;
  300. } while ( len );
  301. }
  302. /**
  303. * Dequeue transfer
  304. *
  305. * @v ring Transfer ring
  306. * @ret iobuf I/O buffer
  307. */
  308. static struct io_buffer * uhci_dequeue ( struct uhci_ring *ring ) {
  309. unsigned int index = ( ring->cons % UHCI_RING_COUNT );
  310. struct io_buffer *iobuf;
  311. struct uhci_transfer *xfer;
  312. size_t len;
  313. /* Sanity checks */
  314. assert ( uhci_ring_fill ( ring ) > 0 );
  315. /* Consume transfer */
  316. xfer = ring->xfer[index];
  317. assert ( xfer != NULL );
  318. assert ( xfer->desc != NULL );
  319. iobuf = xfer->iobuf;
  320. assert ( iobuf != NULL );
  321. ring->xfer[index] = NULL;
  322. ring->cons++;
  323. /* Free transfer descriptors */
  324. len = ( xfer->prod * sizeof ( xfer->desc[0] ) );
  325. free_dma ( xfer->desc, len );
  326. /* Free transfer */
  327. free ( xfer );
  328. return iobuf;
  329. }
  330. /**
  331. * Restart ring
  332. *
  333. * @v ring Transfer ring
  334. * @v toggle Expected data toggle for next descriptor
  335. */
  336. static void uhci_restart ( struct uhci_ring *ring, uint32_t toggle ) {
  337. struct uhci_transfer *xfer;
  338. struct uhci_transfer_descriptor *desc;
  339. struct uhci_transfer_descriptor *first;
  340. uint32_t link;
  341. unsigned int i;
  342. unsigned int j;
  343. /* Sanity check */
  344. assert ( ring->head->current == cpu_to_le32 ( UHCI_LINK_TERMINATE ) );
  345. /* If ring is empty, then just update the data toggle for the
  346. * next descriptor.
  347. */
  348. if ( uhci_ring_fill ( ring ) == 0 ) {
  349. ring->control &= ~UHCI_CONTROL_TOGGLE;
  350. ring->control |= toggle;
  351. return;
  352. }
  353. /* If expected toggle does not match the toggle in the first
  354. * unconsumed descriptor, then invert all toggles.
  355. */
  356. xfer = ring->xfer[ ring->cons % UHCI_RING_COUNT ];
  357. assert ( xfer != NULL );
  358. assert ( xfer->cons == 0 );
  359. first = &xfer->desc[0];
  360. if ( ( le32_to_cpu ( first->control ) ^ toggle ) & UHCI_CONTROL_TOGGLE){
  361. /* Invert toggle on all unconsumed transfer descriptors */
  362. for ( i = ring->cons ; i != ring->prod ; i++ ) {
  363. xfer = ring->xfer[ i % UHCI_RING_COUNT ];
  364. assert ( xfer != NULL );
  365. assert ( xfer->cons == 0 );
  366. for ( j = 0 ; j < xfer->prod ; j++ ) {
  367. desc = &xfer->desc[j];
  368. desc->control ^=
  369. cpu_to_le32 ( UHCI_CONTROL_TOGGLE );
  370. }
  371. }
  372. /* Invert toggle for next descriptor to be enqueued */
  373. ring->control ^= UHCI_CONTROL_TOGGLE;
  374. }
  375. /* Restart ring at first unconsumed transfer */
  376. link = virt_to_phys ( first );
  377. wmb();
  378. ring->head->current = cpu_to_le32 ( link );
  379. }
  380. /******************************************************************************
  381. *
  382. * Schedule management
  383. *
  384. ******************************************************************************
  385. */
  386. /**
  387. * Get link value for a queue head
  388. *
  389. * @v queue Queue head
  390. * @ret link Link value
  391. */
  392. static inline uint32_t uhci_link_qh ( struct uhci_queue_head *queue ) {
  393. return ( virt_to_phys ( queue ) | UHCI_LINK_TYPE_QH );
  394. }
  395. /**
  396. * (Re)build asynchronous schedule
  397. *
  398. * @v uhci UHCI device
  399. */
  400. static void uhci_async_schedule ( struct uhci_device *uhci ) {
  401. struct uhci_endpoint *endpoint;
  402. struct uhci_queue_head *queue;
  403. uint32_t end;
  404. uint32_t link;
  405. /* Build schedule in reverse order of execution. Provided
  406. * that we only ever add or remove single endpoints, this can
  407. * safely run concurrently with hardware execution of the
  408. * schedule.
  409. */
  410. link = end = uhci_link_qh ( uhci->head );
  411. list_for_each_entry_reverse ( endpoint, &uhci->async, schedule ) {
  412. queue = endpoint->ring.head;
  413. queue->link = cpu_to_le32 ( link );
  414. wmb();
  415. link = uhci_link_qh ( queue );
  416. }
  417. if ( link == end )
  418. link = UHCI_LINK_TERMINATE;
  419. uhci->head->link = cpu_to_le32 ( link );
  420. wmb();
  421. }
  422. /**
  423. * Add endpoint to asynchronous schedule
  424. *
  425. * @v endpoint Endpoint
  426. */
  427. static void uhci_async_add ( struct uhci_endpoint *endpoint ) {
  428. struct uhci_device *uhci = endpoint->uhci;
  429. /* Add to end of schedule */
  430. list_add_tail ( &endpoint->schedule, &uhci->async );
  431. /* Rebuild schedule */
  432. uhci_async_schedule ( uhci );
  433. }
  434. /**
  435. * Remove endpoint from asynchronous schedule
  436. *
  437. * @v endpoint Endpoint
  438. */
  439. static void uhci_async_del ( struct uhci_endpoint *endpoint ) {
  440. struct uhci_device *uhci = endpoint->uhci;
  441. /* Remove from schedule */
  442. list_check_contains_entry ( endpoint, &uhci->async, schedule );
  443. list_del ( &endpoint->schedule );
  444. /* Rebuild schedule */
  445. uhci_async_schedule ( uhci );
  446. /* Delay for a whole USB frame (with a 100% safety margin) */
  447. mdelay ( 2 );
  448. }
  449. /**
  450. * (Re)build periodic schedule
  451. *
  452. * @v uhci UHCI device
  453. */
  454. static void uhci_periodic_schedule ( struct uhci_device *uhci ) {
  455. struct uhci_endpoint *endpoint;
  456. struct uhci_queue_head *queue;
  457. uint32_t link;
  458. uint32_t end;
  459. unsigned int max_interval;
  460. unsigned int i;
  461. /* Build schedule in reverse order of execution. Provided
  462. * that we only ever add or remove single endpoints, this can
  463. * safely run concurrently with hardware execution of the
  464. * schedule.
  465. */
  466. DBGCP ( uhci, "UHCI %s periodic schedule: ", uhci->name );
  467. link = end = uhci_link_qh ( uhci->head );
  468. list_for_each_entry_reverse ( endpoint, &uhci->periodic, schedule ) {
  469. queue = endpoint->ring.head;
  470. queue->link = cpu_to_le32 ( link );
  471. wmb();
  472. DBGCP ( uhci, "%s%d", ( ( link == end ) ? "" : "<-" ),
  473. endpoint->ep->interval );
  474. link = uhci_link_qh ( queue );
  475. }
  476. DBGCP ( uhci, "\n" );
  477. /* Populate periodic frame list */
  478. DBGCP ( uhci, "UHCI %s periodic frame list:", uhci->name );
  479. for ( i = 0 ; i < UHCI_FRAMES ; i++ ) {
  480. /* Calculate maximum interval (in microframes) which
  481. * may appear as part of this frame list.
  482. */
  483. if ( i == 0 ) {
  484. /* Start of list: include all endpoints */
  485. max_interval = -1U;
  486. } else {
  487. /* Calculate highest power-of-two frame interval */
  488. max_interval = ( 1 << ( ffs ( i ) - 1 ) );
  489. /* Convert to microframes */
  490. max_interval <<= 3;
  491. /* Round up to nearest 2^n-1 */
  492. max_interval = ( ( max_interval << 1 ) - 1 );
  493. }
  494. /* Find first endpoint in schedule satisfying this
  495. * maximum interval constraint.
  496. */
  497. link = uhci_link_qh ( uhci->head );
  498. list_for_each_entry ( endpoint, &uhci->periodic, schedule ) {
  499. if ( endpoint->ep->interval <= max_interval ) {
  500. queue = endpoint->ring.head;
  501. link = uhci_link_qh ( queue );
  502. DBGCP ( uhci, " %d:%d",
  503. i, endpoint->ep->interval );
  504. break;
  505. }
  506. }
  507. uhci->frame->link[i] = cpu_to_le32 ( link );
  508. }
  509. wmb();
  510. DBGCP ( uhci, "\n" );
  511. }
  512. /**
  513. * Add endpoint to periodic schedule
  514. *
  515. * @v endpoint Endpoint
  516. */
  517. static void uhci_periodic_add ( struct uhci_endpoint *endpoint ) {
  518. struct uhci_device *uhci = endpoint->uhci;
  519. struct uhci_endpoint *before;
  520. unsigned int interval = endpoint->ep->interval;
  521. /* Find first endpoint with a smaller interval */
  522. list_for_each_entry ( before, &uhci->periodic, schedule ) {
  523. if ( before->ep->interval < interval )
  524. break;
  525. }
  526. list_add_tail ( &endpoint->schedule, &before->schedule );
  527. /* Rebuild schedule */
  528. uhci_periodic_schedule ( uhci );
  529. }
  530. /**
  531. * Remove endpoint from periodic schedule
  532. *
  533. * @v endpoint Endpoint
  534. */
  535. static void uhci_periodic_del ( struct uhci_endpoint *endpoint ) {
  536. struct uhci_device *uhci = endpoint->uhci;
  537. /* Remove from schedule */
  538. list_check_contains_entry ( endpoint, &uhci->periodic, schedule );
  539. list_del ( &endpoint->schedule );
  540. /* Rebuild schedule */
  541. uhci_periodic_schedule ( uhci );
  542. /* Delay for a whole USB frame (with a 100% safety margin) */
  543. mdelay ( 2 );
  544. }
  545. /**
  546. * Add endpoint to appropriate schedule
  547. *
  548. * @v endpoint Endpoint
  549. */
  550. static void uhci_schedule_add ( struct uhci_endpoint *endpoint ) {
  551. struct usb_endpoint *ep = endpoint->ep;
  552. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  553. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  554. uhci_periodic_add ( endpoint );
  555. } else {
  556. uhci_async_add ( endpoint );
  557. }
  558. }
  559. /**
  560. * Remove endpoint from appropriate schedule
  561. *
  562. * @v endpoint Endpoint
  563. */
  564. static void uhci_schedule_del ( struct uhci_endpoint *endpoint ) {
  565. struct usb_endpoint *ep = endpoint->ep;
  566. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  567. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  568. uhci_periodic_del ( endpoint );
  569. } else {
  570. uhci_async_del ( endpoint );
  571. }
  572. }
  573. /******************************************************************************
  574. *
  575. * Endpoint operations
  576. *
  577. ******************************************************************************
  578. */
  579. /**
  580. * Open endpoint
  581. *
  582. * @v ep USB endpoint
  583. * @ret rc Return status code
  584. */
  585. static int uhci_endpoint_open ( struct usb_endpoint *ep ) {
  586. struct usb_device *usb = ep->usb;
  587. struct uhci_device *uhci = usb_get_hostdata ( usb );
  588. struct uhci_endpoint *endpoint;
  589. int rc;
  590. /* Allocate and initialise structure */
  591. endpoint = zalloc ( sizeof ( *endpoint ) );
  592. if ( ! endpoint ) {
  593. rc = -ENOMEM;
  594. goto err_alloc;
  595. }
  596. endpoint->uhci = uhci;
  597. endpoint->ep = ep;
  598. usb_endpoint_set_hostdata ( ep, endpoint );
  599. /* Initialise descriptor ring */
  600. if ( ( rc = uhci_ring_alloc ( &endpoint->ring ) ) != 0 )
  601. goto err_ring_alloc;
  602. endpoint->ring.mtu = ep->mtu;
  603. endpoint->ring.flags = UHCI_FL_CERR_MAX;
  604. if ( usb->port->speed < USB_SPEED_FULL )
  605. endpoint->ring.flags |= UHCI_FL_LS;
  606. endpoint->ring.control = ( UHCI_CONTROL_DEVICE ( usb->address ) |
  607. UHCI_CONTROL_ENDPOINT ( ep->address ) );
  608. /* Add to list of endpoints */
  609. list_add_tail ( &endpoint->list, &uhci->endpoints );
  610. /* Add to schedule */
  611. uhci_schedule_add ( endpoint );
  612. return 0;
  613. uhci_ring_free ( &endpoint->ring );
  614. err_ring_alloc:
  615. free ( endpoint );
  616. err_alloc:
  617. return rc;
  618. }
  619. /**
  620. * Close endpoint
  621. *
  622. * @v ep USB endpoint
  623. */
  624. static void uhci_endpoint_close ( struct usb_endpoint *ep ) {
  625. struct uhci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  626. struct io_buffer *iobuf;
  627. /* Remove from schedule */
  628. uhci_schedule_del ( endpoint );
  629. /* Cancel any incomplete transfers */
  630. while ( uhci_ring_fill ( &endpoint->ring ) ) {
  631. iobuf = uhci_dequeue ( &endpoint->ring );
  632. if ( iobuf )
  633. usb_complete_err ( ep, iobuf, -ECANCELED );
  634. }
  635. /* Remove from list of endpoints */
  636. list_del ( &endpoint->list );
  637. /* Free descriptor ring */
  638. uhci_ring_free ( &endpoint->ring );
  639. /* Free endpoint */
  640. free ( endpoint );
  641. }
  642. /**
  643. * Reset endpoint
  644. *
  645. * @v ep USB endpoint
  646. * @ret rc Return status code
  647. */
  648. static int uhci_endpoint_reset ( struct usb_endpoint *ep ) {
  649. struct uhci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  650. struct uhci_ring *ring = &endpoint->ring;
  651. /* Restart ring */
  652. uhci_restart ( ring, 0 );
  653. return 0;
  654. }
  655. /**
  656. * Update MTU
  657. *
  658. * @v ep USB endpoint
  659. * @ret rc Return status code
  660. */
  661. static int uhci_endpoint_mtu ( struct usb_endpoint *ep ) {
  662. struct uhci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  663. /* Update endpoint MTU */
  664. endpoint->ring.mtu = ep->mtu;
  665. return 0;
  666. }
  667. /**
  668. * Enqueue message transfer
  669. *
  670. * @v ep USB endpoint
  671. * @v iobuf I/O buffer
  672. * @ret rc Return status code
  673. */
  674. static int uhci_endpoint_message ( struct usb_endpoint *ep,
  675. struct io_buffer *iobuf ) {
  676. struct uhci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  677. struct uhci_ring *ring = &endpoint->ring;
  678. struct usb_setup_packet *packet;
  679. unsigned int count;
  680. size_t len;
  681. int input;
  682. int rc;
  683. /* Calculate number of descriptors */
  684. assert ( iob_len ( iobuf ) >= sizeof ( *packet ) );
  685. len = ( iob_len ( iobuf ) - sizeof ( *packet ) );
  686. count = ( 1 /* setup stage */ +
  687. ( ( len + ring->mtu - 1 ) / ring->mtu ) /* data stage */ +
  688. 1 /* status stage */ );
  689. /* Enqueue transfer */
  690. if ( ( rc = uhci_enqueue ( ring, iobuf, count ) ) != 0 )
  691. return rc;
  692. /* Describe setup stage */
  693. packet = iobuf->data;
  694. ring->control &= ~UHCI_CONTROL_TOGGLE;
  695. uhci_describe ( ring, packet, sizeof ( *packet ), USB_PID_SETUP );
  696. iob_pull ( iobuf, sizeof ( *packet ) );
  697. /* Describe data stage, if applicable */
  698. assert ( ring->control & UHCI_CONTROL_TOGGLE );
  699. input = ( packet->request & cpu_to_le16 ( USB_DIR_IN ) );
  700. if ( len ) {
  701. uhci_describe ( ring, iobuf->data, len,
  702. ( input ? USB_PID_IN : USB_PID_OUT ) );
  703. }
  704. /* Describe status stage */
  705. ring->control |= UHCI_CONTROL_TOGGLE;
  706. uhci_describe ( ring, NULL, 0,
  707. ( ( len && input ) ? USB_PID_OUT : USB_PID_IN ) );
  708. /* Sanity check */
  709. assert ( ring->end->prod == count );
  710. return 0;
  711. }
  712. /**
  713. * Enqueue stream transfer
  714. *
  715. * @v ep USB endpoint
  716. * @v iobuf I/O buffer
  717. * @v terminate Terminate using a short packet
  718. * @ret rc Return status code
  719. */
  720. static int uhci_endpoint_stream ( struct usb_endpoint *ep,
  721. struct io_buffer *iobuf, int terminate ) {
  722. struct uhci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  723. struct uhci_ring *ring = &endpoint->ring;
  724. unsigned int count;
  725. size_t len;
  726. int input;
  727. int zlp;
  728. int rc;
  729. /* Calculate number of descriptors */
  730. len = iob_len ( iobuf );
  731. zlp = ( terminate && ( ( len & ( ring->mtu - 1 ) ) == 0 ) );
  732. count = ( ( ( len + ring->mtu - 1 ) / ring->mtu ) + ( zlp ? 1 : 0 ) );
  733. /* Enqueue transfer */
  734. if ( ( rc = uhci_enqueue ( ring, iobuf, count ) ) != 0 )
  735. return rc;
  736. /* Describe data packet */
  737. input = ( ep->address & USB_DIR_IN );
  738. uhci_describe ( ring, iobuf->data, len,
  739. ( input ? USB_PID_IN : USB_PID_OUT ) );
  740. /* Describe zero-length packet, if applicable */
  741. if ( zlp )
  742. uhci_describe ( ring, NULL, 0, USB_PID_OUT );
  743. /* Sanity check */
  744. assert ( ring->end->prod == count );
  745. return 0;
  746. }
  747. /**
  748. * Check if transfer is a message transfer
  749. *
  750. * @v xfer UHCI transfer
  751. * @ret is_message Transfer is a message transfer
  752. */
  753. static inline int uhci_is_message ( struct uhci_transfer *xfer ) {
  754. struct uhci_transfer_descriptor *desc = &xfer->desc[0];
  755. return ( ( desc->control & cpu_to_le32 ( UHCI_CONTROL_PID_MASK ) ) ==
  756. cpu_to_le32 ( UHCI_CONTROL_PID ( USB_PID_SETUP ) ) );
  757. }
  758. /**
  759. * Poll for completions
  760. *
  761. * @v endpoint Endpoint
  762. */
  763. static void uhci_endpoint_poll ( struct uhci_endpoint *endpoint ) {
  764. struct uhci_ring *ring = &endpoint->ring;
  765. struct uhci_device *uhci = endpoint->uhci;
  766. struct usb_endpoint *ep = endpoint->ep;
  767. struct usb_device *usb = ep->usb;
  768. struct uhci_transfer *xfer;
  769. struct uhci_transfer_descriptor *desc;
  770. struct io_buffer *iobuf;
  771. unsigned int index;
  772. uint32_t link;
  773. uint32_t toggle;
  774. uint32_t control;
  775. uint16_t actual;
  776. size_t len;
  777. /* Consume all completed descriptors */
  778. while ( uhci_ring_fill ( ring ) ) {
  779. /* Stop if we reach an uncompleted descriptor */
  780. index = ( ring->cons % UHCI_RING_COUNT );
  781. xfer = ring->xfer[index];
  782. assert ( xfer != NULL );
  783. assert ( xfer->cons < xfer->prod );
  784. desc = &xfer->desc[xfer->cons];
  785. rmb();
  786. if ( desc->status & UHCI_STATUS_ACTIVE )
  787. break;
  788. control = le32_to_cpu ( desc->control );
  789. actual = le16_to_cpu ( desc->actual );
  790. /* Update data length, if applicable */
  791. if ( UHCI_DATA_PACKET ( control ) )
  792. xfer->len += UHCI_ACTUAL_LEN ( actual );
  793. /* If we have encountered an error, then deactivate
  794. * the queue head (to prevent further hardware
  795. * accesses to this transfer), consume the transfer,
  796. * and report the error to the USB core.
  797. */
  798. if ( desc->status & UHCI_STATUS_STALLED ) {
  799. DBGC ( uhci, "UHCI %s %s completion %d.%d failed "
  800. "(status %02x)\n", usb->name,
  801. usb_endpoint_name ( ep ), index,
  802. xfer->cons, desc->status );
  803. link = UHCI_LINK_TERMINATE;
  804. ring->head->current = cpu_to_le32 ( link );
  805. wmb();
  806. iobuf = uhci_dequeue ( ring );
  807. usb_complete_err ( ep, iobuf, -EIO );
  808. break;
  809. }
  810. /* Consume this descriptor */
  811. xfer->cons++;
  812. /* Check for short packets */
  813. if ( UHCI_SHORT_PACKET ( control, actual ) ) {
  814. /* Sanity checks */
  815. assert ( desc->flags & UHCI_FL_SPD );
  816. link = virt_to_phys ( desc );
  817. assert ( ( le32_to_cpu ( ring->head->current ) &
  818. ~( UHCI_ALIGN - 1 ) ) == link );
  819. /* If this is a message transfer, then restart
  820. * at the status stage.
  821. */
  822. if ( uhci_is_message ( xfer ) ) {
  823. xfer->cons = ( xfer->prod - 1 );
  824. link = virt_to_phys ( &xfer->desc[xfer->cons] );
  825. ring->head->current = cpu_to_le32 ( link );
  826. break;
  827. }
  828. /* Otherwise, this is a stream transfer.
  829. * First, prevent further hardware access to
  830. * this transfer.
  831. */
  832. link = UHCI_LINK_TERMINATE;
  833. ring->head->current = cpu_to_le32 ( link );
  834. wmb();
  835. /* Determine expected data toggle for next descriptor */
  836. toggle = ( ( control ^ UHCI_CONTROL_TOGGLE ) &
  837. UHCI_CONTROL_TOGGLE );
  838. /* Consume this transfer */
  839. len = xfer->len;
  840. iobuf = uhci_dequeue ( ring );
  841. /* Update packet length */
  842. assert ( len <= iob_len ( iobuf ) );
  843. iob_unput ( iobuf, ( iob_len ( iobuf ) - len ) );
  844. /* Restart ring */
  845. uhci_restart ( ring, toggle );
  846. } else if ( xfer->cons == xfer->prod ) {
  847. /* Completed a transfer: consume it */
  848. len = xfer->len;
  849. iobuf = uhci_dequeue ( ring );
  850. assert ( len == iob_len ( iobuf ) );
  851. } else {
  852. /* Not a short packet and not yet complete:
  853. * continue processing.
  854. */
  855. continue;
  856. }
  857. /* Report completion to USB core */
  858. usb_complete ( ep, iobuf );
  859. }
  860. }
  861. /******************************************************************************
  862. *
  863. * Device operations
  864. *
  865. ******************************************************************************
  866. */
  867. /**
  868. * Open device
  869. *
  870. * @v usb USB device
  871. * @ret rc Return status code
  872. */
  873. static int uhci_device_open ( struct usb_device *usb ) {
  874. struct uhci_device *uhci = usb_bus_get_hostdata ( usb->port->hub->bus );
  875. usb_set_hostdata ( usb, uhci );
  876. return 0;
  877. }
  878. /**
  879. * Close device
  880. *
  881. * @v usb USB device
  882. */
  883. static void uhci_device_close ( struct usb_device *usb ) {
  884. struct uhci_device *uhci = usb_get_hostdata ( usb );
  885. struct usb_bus *bus = uhci->bus;
  886. /* Free device address, if assigned */
  887. if ( usb->address )
  888. usb_free_address ( bus, usb->address );
  889. }
  890. /**
  891. * Assign device address
  892. *
  893. * @v usb USB device
  894. * @ret rc Return status code
  895. */
  896. static int uhci_device_address ( struct usb_device *usb ) {
  897. struct uhci_device *uhci = usb_get_hostdata ( usb );
  898. struct usb_bus *bus = uhci->bus;
  899. struct usb_endpoint *ep0 = usb_endpoint ( usb, USB_EP0_ADDRESS );
  900. struct uhci_endpoint *endpoint0 = usb_endpoint_get_hostdata ( ep0 );
  901. int address;
  902. int rc;
  903. /* Sanity checks */
  904. assert ( usb->address == 0 );
  905. assert ( ep0 != NULL );
  906. /* Allocate device address */
  907. address = usb_alloc_address ( bus );
  908. if ( address < 0 ) {
  909. rc = address;
  910. DBGC ( uhci, "UHCI %s could not allocate address: %s\n",
  911. usb->name, strerror ( rc ) );
  912. goto err_alloc_address;
  913. }
  914. /* Set address */
  915. if ( ( rc = usb_set_address ( usb, address ) ) != 0 )
  916. goto err_set_address;
  917. /* Update device address */
  918. usb->address = address;
  919. endpoint0->ring.control |= UHCI_CONTROL_DEVICE ( address );
  920. return 0;
  921. err_set_address:
  922. usb_free_address ( bus, address );
  923. err_alloc_address:
  924. return rc;
  925. }
  926. /******************************************************************************
  927. *
  928. * Hub operations
  929. *
  930. ******************************************************************************
  931. */
  932. /**
  933. * Open hub
  934. *
  935. * @v hub USB hub
  936. * @ret rc Return status code
  937. */
  938. static int uhci_hub_open ( struct usb_hub *hub __unused ) {
  939. /* Nothing to do */
  940. return 0;
  941. }
  942. /**
  943. * Close hub
  944. *
  945. * @v hub USB hub
  946. */
  947. static void uhci_hub_close ( struct usb_hub *hub __unused ) {
  948. /* Nothing to do */
  949. }
  950. /******************************************************************************
  951. *
  952. * Root hub operations
  953. *
  954. ******************************************************************************
  955. */
  956. /**
  957. * Open root hub
  958. *
  959. * @v hub USB hub
  960. * @ret rc Return status code
  961. */
  962. static int uhci_root_open ( struct usb_hub *hub ) {
  963. struct usb_bus *bus = hub->bus;
  964. struct uhci_device *uhci = usb_bus_get_hostdata ( bus );
  965. /* Record hub driver private data */
  966. usb_hub_set_drvdata ( hub, uhci );
  967. return 0;
  968. }
  969. /**
  970. * Close root hub
  971. *
  972. * @v hub USB hub
  973. */
  974. static void uhci_root_close ( struct usb_hub *hub ) {
  975. /* Clear hub driver private data */
  976. usb_hub_set_drvdata ( hub, NULL );
  977. }
  978. /**
  979. * Enable port
  980. *
  981. * @v hub USB hub
  982. * @v port USB port
  983. * @ret rc Return status code
  984. */
  985. static int uhci_root_enable ( struct usb_hub *hub, struct usb_port *port ) {
  986. struct uhci_device *uhci = usb_hub_get_drvdata ( hub );
  987. uint16_t portsc;
  988. unsigned int i;
  989. /* Reset port */
  990. portsc = inw ( uhci->regs + UHCI_PORTSC ( port->address ) );
  991. portsc |= UHCI_PORTSC_PR;
  992. outw ( portsc, uhci->regs + UHCI_PORTSC ( port->address ) );
  993. mdelay ( USB_RESET_DELAY_MS );
  994. portsc &= ~UHCI_PORTSC_PR;
  995. outw ( portsc, uhci->regs + UHCI_PORTSC ( port->address ) );
  996. mdelay ( USB_RESET_RECOVER_DELAY_MS );
  997. /* Enable port */
  998. portsc |= UHCI_PORTSC_PED;
  999. outw ( portsc, uhci->regs + UHCI_PORTSC ( port->address ) );
  1000. mdelay ( USB_RESET_RECOVER_DELAY_MS );
  1001. /* Wait for port to become enabled */
  1002. for ( i = 0 ; i < UHCI_PORT_ENABLE_MAX_WAIT_MS ; i++ ) {
  1003. /* Check port status */
  1004. portsc = inw ( uhci->regs + UHCI_PORTSC ( port->address ) );
  1005. if ( portsc & UHCI_PORTSC_PED )
  1006. return 0;
  1007. /* Delay */
  1008. mdelay ( 1 );
  1009. }
  1010. DBGC ( uhci, "UHCI %s-%d timed out waiting for port to enable "
  1011. "(status %04x)\n", uhci->name, port->address, portsc );
  1012. return -ETIMEDOUT;
  1013. }
  1014. /**
  1015. * Disable port
  1016. *
  1017. * @v hub USB hub
  1018. * @v port USB port
  1019. * @ret rc Return status code
  1020. */
  1021. static int uhci_root_disable ( struct usb_hub *hub, struct usb_port *port ) {
  1022. struct uhci_device *uhci = usb_hub_get_drvdata ( hub );
  1023. uint16_t portsc;
  1024. /* Disable port */
  1025. portsc = inw ( uhci->regs + UHCI_PORTSC ( port->address ) );
  1026. portsc &= ~UHCI_PORTSC_PED;
  1027. outw ( portsc, uhci->regs + UHCI_PORTSC ( port->address ) );
  1028. return 0;
  1029. }
  1030. /**
  1031. * Update root hub port speed
  1032. *
  1033. * @v hub USB hub
  1034. * @v port USB port
  1035. * @ret rc Return status code
  1036. */
  1037. static int uhci_root_speed ( struct usb_hub *hub, struct usb_port *port ) {
  1038. struct uhci_device *uhci = usb_hub_get_drvdata ( hub );
  1039. struct pci_device pci;
  1040. uint16_t portsc;
  1041. unsigned int speed;
  1042. /* Read port status */
  1043. portsc = inw ( uhci->regs + UHCI_PORTSC ( port->address ) );
  1044. if ( ! ( portsc & UHCI_PORTSC_CCS ) ) {
  1045. /* Port not connected */
  1046. speed = USB_SPEED_NONE;
  1047. } else if ( uhci->companion &&
  1048. ! find_usb_bus_by_location ( BUS_TYPE_PCI,
  1049. uhci->companion ) ) {
  1050. /* Defer connection detection until companion
  1051. * controller has been enumerated.
  1052. */
  1053. pci_init ( &pci, uhci->companion );
  1054. DBGC ( uhci, "UHCI %s-%d deferring for companion " PCI_FMT "\n",
  1055. uhci->name, port->address, PCI_ARGS ( &pci ) );
  1056. speed = USB_SPEED_NONE;
  1057. } else if ( portsc & UHCI_PORTSC_LS ) {
  1058. /* Low-speed device */
  1059. speed = USB_SPEED_LOW;
  1060. } else {
  1061. /* Full-speed device */
  1062. speed = USB_SPEED_FULL;
  1063. }
  1064. port->speed = speed;
  1065. /* Record disconnections and clear changes */
  1066. port->disconnected |= ( portsc & UHCI_PORTSC_CSC );
  1067. outw ( portsc, uhci->regs + UHCI_PORTSC ( port->address ) );
  1068. return 0;
  1069. }
  1070. /**
  1071. * Clear transaction translator buffer
  1072. *
  1073. * @v hub USB hub
  1074. * @v port USB port
  1075. * @v ep USB endpoint
  1076. * @ret rc Return status code
  1077. */
  1078. static int uhci_root_clear_tt ( struct usb_hub *hub, struct usb_port *port,
  1079. struct usb_endpoint *ep ) {
  1080. struct uhci_device *uhci = usb_hub_get_drvdata ( hub );
  1081. /* Should never be called; this is a root hub */
  1082. DBGC ( uhci, "UHCI %s-%d nonsensical CLEAR_TT for %s %s\n", uhci->name,
  1083. port->address, ep->usb->name, usb_endpoint_name ( ep ) );
  1084. return -ENOTSUP;
  1085. }
  1086. /**
  1087. * Poll for port status changes
  1088. *
  1089. * @v hub USB hub
  1090. * @v port USB port
  1091. */
  1092. static void uhci_root_poll ( struct usb_hub *hub, struct usb_port *port ) {
  1093. struct uhci_device *uhci = usb_hub_get_drvdata ( hub );
  1094. uint16_t portsc;
  1095. uint16_t change;
  1096. /* Do nothing unless something has changed */
  1097. portsc = inw ( uhci->regs + UHCI_PORTSC ( port->address ) );
  1098. change = ( portsc & UHCI_PORTSC_CHANGE );
  1099. if ( ! change )
  1100. return;
  1101. /* Record disconnections and clear changes */
  1102. port->disconnected |= ( portsc & UHCI_PORTSC_CSC );
  1103. outw ( portsc, uhci->regs + UHCI_PORTSC ( port->address ) );
  1104. /* Report port status change */
  1105. usb_port_changed ( port );
  1106. }
  1107. /******************************************************************************
  1108. *
  1109. * Bus operations
  1110. *
  1111. ******************************************************************************
  1112. */
  1113. /**
  1114. * Open USB bus
  1115. *
  1116. * @v bus USB bus
  1117. * @ret rc Return status code
  1118. */
  1119. static int uhci_bus_open ( struct usb_bus *bus ) {
  1120. struct uhci_device *uhci = usb_bus_get_hostdata ( bus );
  1121. int rc;
  1122. /* Sanity checks */
  1123. assert ( list_empty ( &uhci->async ) );
  1124. assert ( list_empty ( &uhci->periodic ) );
  1125. /* Allocate and initialise asynchronous queue head */
  1126. uhci->head = malloc_dma ( sizeof ( *uhci->head ), UHCI_ALIGN );
  1127. if ( ! uhci->head ) {
  1128. rc = -ENOMEM;
  1129. goto err_alloc_head;
  1130. }
  1131. if ( ( rc = uhci_reachable ( uhci->head, sizeof ( *uhci->head ) ) ) !=0)
  1132. goto err_unreachable_head;
  1133. memset ( uhci->head, 0, sizeof ( *uhci->head ) );
  1134. uhci->head->current = cpu_to_le32 ( UHCI_LINK_TERMINATE );
  1135. uhci_async_schedule ( uhci );
  1136. /* Allocate periodic frame list */
  1137. uhci->frame = malloc_dma ( sizeof ( *uhci->frame ),
  1138. sizeof ( *uhci->frame ) );
  1139. if ( ! uhci->frame ) {
  1140. rc = -ENOMEM;
  1141. goto err_alloc_frame;
  1142. }
  1143. if ( ( rc = uhci_reachable ( uhci->frame,
  1144. sizeof ( *uhci->frame ) ) ) != 0 )
  1145. goto err_unreachable_frame;
  1146. uhci_periodic_schedule ( uhci );
  1147. outl ( virt_to_phys ( uhci->frame ), uhci->regs + UHCI_FLBASEADD );
  1148. /* Start controller */
  1149. uhci_run ( uhci );
  1150. return 0;
  1151. uhci_stop ( uhci );
  1152. err_unreachable_frame:
  1153. free_dma ( uhci->frame, sizeof ( *uhci->frame ) );
  1154. err_alloc_frame:
  1155. err_unreachable_head:
  1156. free_dma ( uhci->head, sizeof ( *uhci->head ) );
  1157. err_alloc_head:
  1158. return rc;
  1159. }
  1160. /**
  1161. * Close USB bus
  1162. *
  1163. * @v bus USB bus
  1164. */
  1165. static void uhci_bus_close ( struct usb_bus *bus ) {
  1166. struct uhci_device *uhci = usb_bus_get_hostdata ( bus );
  1167. /* Sanity checks */
  1168. assert ( list_empty ( &uhci->async ) );
  1169. assert ( list_empty ( &uhci->periodic ) );
  1170. /* Stop controller */
  1171. uhci_stop ( uhci );
  1172. /* Free periodic frame list */
  1173. free_dma ( uhci->frame, sizeof ( *uhci->frame ) );
  1174. /* Free asynchronous schedule */
  1175. free_dma ( uhci->head, sizeof ( *uhci->head ) );
  1176. }
  1177. /**
  1178. * Poll USB bus
  1179. *
  1180. * @v bus USB bus
  1181. */
  1182. static void uhci_bus_poll ( struct usb_bus *bus ) {
  1183. struct uhci_device *uhci = usb_bus_get_hostdata ( bus );
  1184. struct usb_hub *hub = bus->hub;
  1185. struct uhci_endpoint *endpoint;
  1186. unsigned int i;
  1187. /* UHCI defers interrupts (including short packet detection)
  1188. * until the end of the frame. This can result in bulk IN
  1189. * endpoints remaining halted for much of the time, waiting
  1190. * for software action to reset the data toggles. We
  1191. * therefore ignore USBSTS and unconditionally poll all
  1192. * endpoints for completed transfer descriptors.
  1193. *
  1194. * As with EHCI, we trust that completion handlers are minimal
  1195. * and will not do anything that could plausibly affect the
  1196. * endpoint list itself.
  1197. */
  1198. list_for_each_entry ( endpoint, &uhci->endpoints, list )
  1199. uhci_endpoint_poll ( endpoint );
  1200. /* UHCI provides no single bit to indicate that a port status
  1201. * change has occurred. We therefore unconditionally iterate
  1202. * over all ports looking for status changes.
  1203. */
  1204. for ( i = 1 ; i <= UHCI_PORTS ; i++ )
  1205. uhci_root_poll ( hub, usb_port ( hub, i ) );
  1206. }
  1207. /******************************************************************************
  1208. *
  1209. * PCI interface
  1210. *
  1211. ******************************************************************************
  1212. */
  1213. /** USB host controller operations */
  1214. static struct usb_host_operations uhci_operations = {
  1215. .endpoint = {
  1216. .open = uhci_endpoint_open,
  1217. .close = uhci_endpoint_close,
  1218. .reset = uhci_endpoint_reset,
  1219. .mtu = uhci_endpoint_mtu,
  1220. .message = uhci_endpoint_message,
  1221. .stream = uhci_endpoint_stream,
  1222. },
  1223. .device = {
  1224. .open = uhci_device_open,
  1225. .close = uhci_device_close,
  1226. .address = uhci_device_address,
  1227. },
  1228. .bus = {
  1229. .open = uhci_bus_open,
  1230. .close = uhci_bus_close,
  1231. .poll = uhci_bus_poll,
  1232. },
  1233. .hub = {
  1234. .open = uhci_hub_open,
  1235. .close = uhci_hub_close,
  1236. },
  1237. .root = {
  1238. .open = uhci_root_open,
  1239. .close = uhci_root_close,
  1240. .enable = uhci_root_enable,
  1241. .disable = uhci_root_disable,
  1242. .speed = uhci_root_speed,
  1243. .clear_tt = uhci_root_clear_tt,
  1244. },
  1245. };
  1246. /**
  1247. * Locate EHCI companion controller (when no EHCI support is present)
  1248. *
  1249. * @v pci PCI device
  1250. * @ret busdevfn EHCI companion controller bus:dev.fn (if any)
  1251. */
  1252. __weak unsigned int ehci_companion ( struct pci_device *pci __unused ) {
  1253. return 0;
  1254. }
  1255. /**
  1256. * Probe PCI device
  1257. *
  1258. * @v pci PCI device
  1259. * @ret rc Return status code
  1260. */
  1261. static int uhci_probe ( struct pci_device *pci ) {
  1262. struct uhci_device *uhci;
  1263. struct usb_port *port;
  1264. unsigned int i;
  1265. int rc;
  1266. /* Allocate and initialise structure */
  1267. uhci = zalloc ( sizeof ( *uhci ) );
  1268. if ( ! uhci ) {
  1269. rc = -ENOMEM;
  1270. goto err_alloc;
  1271. }
  1272. uhci->name = pci->dev.name;
  1273. INIT_LIST_HEAD ( &uhci->endpoints );
  1274. INIT_LIST_HEAD ( &uhci->async );
  1275. INIT_LIST_HEAD ( &uhci->periodic );
  1276. /* Fix up PCI device */
  1277. adjust_pci_device ( pci );
  1278. /* Identify EHCI companion controller, if any */
  1279. uhci->companion = ehci_companion ( pci );
  1280. /* Claim ownership from BIOS. (There is no release mechanism
  1281. * for UHCI.)
  1282. */
  1283. pci_write_config_word ( pci, UHCI_USBLEGSUP, UHCI_USBLEGSUP_DEFAULT );
  1284. /* Map registers */
  1285. uhci->regs = pci->ioaddr;
  1286. if ( ! uhci->regs ) {
  1287. rc = -ENODEV;
  1288. goto err_ioremap;
  1289. }
  1290. /* Reset device */
  1291. if ( ( rc = uhci_reset ( uhci ) ) != 0 )
  1292. goto err_reset;
  1293. /* Allocate USB bus */
  1294. uhci->bus = alloc_usb_bus ( &pci->dev, UHCI_PORTS, UHCI_MTU,
  1295. &uhci_operations );
  1296. if ( ! uhci->bus ) {
  1297. rc = -ENOMEM;
  1298. goto err_alloc_bus;
  1299. }
  1300. usb_bus_set_hostdata ( uhci->bus, uhci );
  1301. usb_hub_set_drvdata ( uhci->bus->hub, uhci );
  1302. /* Set port protocols */
  1303. for ( i = 1 ; i <= UHCI_PORTS ; i++ ) {
  1304. port = usb_port ( uhci->bus->hub, i );
  1305. port->protocol = USB_PROTO_2_0;
  1306. }
  1307. /* Register USB bus */
  1308. if ( ( rc = register_usb_bus ( uhci->bus ) ) != 0 )
  1309. goto err_register;
  1310. pci_set_drvdata ( pci, uhci );
  1311. return 0;
  1312. unregister_usb_bus ( uhci->bus );
  1313. err_register:
  1314. free_usb_bus ( uhci->bus );
  1315. err_alloc_bus:
  1316. uhci_reset ( uhci );
  1317. err_reset:
  1318. err_ioremap:
  1319. free ( uhci );
  1320. err_alloc:
  1321. return rc;
  1322. }
  1323. /**
  1324. * Remove PCI device
  1325. *
  1326. * @v pci PCI device
  1327. */
  1328. static void uhci_remove ( struct pci_device *pci ) {
  1329. struct uhci_device *uhci = pci_get_drvdata ( pci );
  1330. struct usb_bus *bus = uhci->bus;
  1331. unregister_usb_bus ( bus );
  1332. assert ( list_empty ( &uhci->async ) );
  1333. assert ( list_empty ( &uhci->periodic ) );
  1334. free_usb_bus ( bus );
  1335. uhci_reset ( uhci );
  1336. free ( uhci );
  1337. }
  1338. /** UHCI PCI device IDs */
  1339. static struct pci_device_id uhci_ids[] = {
  1340. PCI_ROM ( 0xffff, 0xffff, "uhci", "UHCI", 0 ),
  1341. };
  1342. /** UHCI PCI driver */
  1343. struct pci_driver uhci_driver __pci_driver = {
  1344. .ids = uhci_ids,
  1345. .id_count = ( sizeof ( uhci_ids ) / sizeof ( uhci_ids[0] ) ),
  1346. .class = PCI_CLASS_ID ( PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB,
  1347. PCI_CLASS_SERIAL_USB_UHCI ),
  1348. .probe = uhci_probe,
  1349. .remove = uhci_remove,
  1350. };