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eepro100.c 32KB

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  1. /*
  2. * eepro100.c -- This is a driver for Intel Fast Ethernet Controllers
  3. * (ifec).
  4. *
  5. * Originally written for Etherboot by:
  6. *
  7. * Copyright (C) AW Computer Systems.
  8. * written by R.E.Wolff -- R.E.Wolff@BitWizard.nl
  9. *
  10. * AW Computer Systems is contributing to the free software community
  11. * by paying for this driver and then putting the result under GPL.
  12. *
  13. * If you need a Linux device driver, please contact BitWizard for a
  14. * quote.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation; either version 2, or (at
  19. * your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  24. * General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  29. * 02110-1301, USA.
  30. *
  31. *
  32. * date version by what
  33. * Written: May 29 1997 V0.10 REW Initial revision.
  34. * changes: May 31 1997 V0.90 REW Works!
  35. * Jun 1 1997 V0.91 REW Cleanup
  36. * Jun 2 1997 V0.92 REW Add some code documentation
  37. * Jul 25 1997 V1.00 REW Tested by AW to work in a PROM
  38. * Cleanup for publication
  39. * Dez 11 2004 V1.10 Kiszka Add RX ring buffer support
  40. * Jun 2008 v2.0 mdeck Updated to iPXE. Changed much.
  41. *
  42. * Cleanups and fixes by Thomas Miletich<thomas.miletich@gmail.com>
  43. *
  44. * This is the etherboot intel etherexpress Pro/100B driver.
  45. *
  46. * It was written from scratch, with Donald Beckers eepro100.c kernel
  47. * driver as a guideline. Mostly the 82557 related definitions and the
  48. * lower level routines have been cut-and-pasted into this source.
  49. *
  50. * The driver was finished before Intel got the NDA out of the closet.
  51. *
  52. * Datasheet is now published and available from
  53. * ftp://download.intel.com/design/network/manuals/8255X_OpenSDM.pdf
  54. * - Michael Brown
  55. * */
  56. FILE_LICENCE ( GPL2_OR_LATER );
  57. /*
  58. * General Theory of Operation
  59. *
  60. * Initialization
  61. *
  62. * ifec_pci_probe() is called by iPXE during initialization. Typical NIC
  63. * initialization is performed. EEPROM data is read.
  64. *
  65. * Network Boot
  66. *
  67. * ifec_net_open() is called by iPXE before attempting to network boot from the
  68. * card. Here, the Command Unit & Receive Unit are initialized. The tx & rx
  69. * rings are setup. The MAC address is programmed and the card is configured.
  70. *
  71. * Transmit
  72. *
  73. * ifec_net_transmit() enqueues a packet in the tx ring - active::tcbs[] The tx
  74. * ring is composed of TCBs linked to each other into a ring. A tx request
  75. * fills out the next available TCB with a pointer to the packet data.
  76. * The last enqueued tx is always at active::tcb_head. Thus, a tx request fills
  77. * out the TCB following tcb_head.
  78. * active::tcb_tail points to the TCB we're awaiting completion of.
  79. * ifec_tx_process() checks tcb_tail, and once complete,
  80. * blindly increments tcb_tail to the next ring TCB.
  81. *
  82. * Receive
  83. *
  84. * priv::rfds[] is an array of Receive Frame Descriptors. The RFDs are linked
  85. * together to form a ring.
  86. * ifec_net_poll() calls ifec_rx_process(), which checks the next RFD for
  87. * data. If we received a packet, we allocate a new io_buffer and copy the
  88. * packet data into it. If alloc_iob() fails, we don't touch the RFD and try
  89. * again on the next poll.
  90. */
  91. /*
  92. * Debugging levels:
  93. * - DBG() is for any errors, i.e. failed alloc_iob(), malloc_dma(),
  94. * TX overflow, corrupted packets, ...
  95. * - DBG2() is for successful events, like packet received,
  96. * packet transmitted, and other general notifications.
  97. * - DBGP() prints the name of each called function on entry
  98. */
  99. #include <stdint.h>
  100. #include <byteswap.h>
  101. #include <errno.h>
  102. #include <stdio.h>
  103. #include <unistd.h>
  104. #include <ipxe/ethernet.h>
  105. #include <ipxe/if_ether.h>
  106. #include <ipxe/iobuf.h>
  107. #include <ipxe/malloc.h>
  108. #include <ipxe/pci.h>
  109. #include <ipxe/spi_bit.h>
  110. #include <ipxe/timer.h>
  111. #include <ipxe/nvs.h>
  112. #include <ipxe/threewire.h>
  113. #include <ipxe/netdevice.h>
  114. #include "eepro100.h"
  115. /****************************** Global data **********************************/
  116. /*
  117. * This is the default configuration command data. The values were copied from
  118. * the Linux kernel initialization for the eepro100.
  119. */
  120. static struct ifec_cfg ifec_cfg = {
  121. .status = 0,
  122. .command = CmdConfigure | CmdSuspend,
  123. .link = 0, /* Filled in later */
  124. .byte = { 22, /* How many bytes in this array */
  125. ( TX_FIFO << 4 ) | RX_FIFO, /* Rx & Tx FIFO limits */
  126. 0, 0, /* Adaptive Interframe Spacing */
  127. RX_DMA_COUNT, /* Rx DMA max byte count */
  128. TX_DMA_COUNT + 0x80, /* Tx DMA max byte count */
  129. 0x32, /* Many bits. */
  130. 0x03, /* Discard short receive & Underrun retries */
  131. 1, /* 1=Use MII 0=Use AUI */
  132. 0,
  133. 0x2E, /* NSAI, Preamble length, & Loopback*/
  134. 0, /* Linear priority */
  135. 0x60, /* L PRI MODE & Interframe spacing */
  136. 0, 0xf2,
  137. 0x48, /* Promiscuous, Broadcast disable, CRS & CDT */
  138. 0, 0x40,
  139. 0xf2, /* Stripping, Padding, Receive CRC Transfer */
  140. 0x80, /* 0x40=Force full-duplex, 0x80=Allowfull-duplex*/
  141. 0x3f, /* Multiple IA */
  142. 0x0D } /* Multicast all */
  143. };
  144. static struct net_device_operations ifec_operations = {
  145. .open = ifec_net_open,
  146. .close = ifec_net_close,
  147. .transmit = ifec_net_transmit,
  148. .poll = ifec_net_poll,
  149. .irq = ifec_net_irq
  150. };
  151. /******************* iPXE PCI Device Driver API functions ********************/
  152. /*
  153. * Initialize the PCI device.
  154. *
  155. * @v pci The device's associated pci_device structure.
  156. * @v id The PCI device + vendor id.
  157. * @ret rc Returns zero if successfully initialized.
  158. *
  159. * This function is called very early on, while iPXE is initializing.
  160. * This is a iPXE PCI Device Driver API function.
  161. */
  162. static int ifec_pci_probe ( struct pci_device *pci )
  163. {
  164. struct net_device *netdev;
  165. struct ifec_private *priv;
  166. int rc;
  167. DBGP ( "ifec_pci_probe: " );
  168. if ( pci->ioaddr == 0 )
  169. return -EINVAL;
  170. netdev = alloc_etherdev ( sizeof(*priv) );
  171. if ( !netdev )
  172. return -ENOMEM;
  173. netdev_init ( netdev, &ifec_operations );
  174. priv = netdev->priv;
  175. pci_set_drvdata ( pci, netdev );
  176. netdev->dev = &pci->dev;
  177. /* enable bus master, etc */
  178. adjust_pci_device( pci );
  179. DBGP ( "pci " );
  180. memset ( priv, 0, sizeof(*priv) );
  181. priv->ioaddr = pci->ioaddr;
  182. ifec_reset ( netdev );
  183. DBGP ( "reset " );
  184. ifec_init_eeprom ( netdev );
  185. /* read MAC address */
  186. nvs_read ( &priv->eeprom.nvs, EEPROM_ADDR_MAC_0, netdev->hw_addr,
  187. ETH_ALEN );
  188. /* read mdio_register */
  189. nvs_read ( &priv->eeprom.nvs, EEPROM_ADDR_MDIO_REGISTER,
  190. &priv->mdio_register, 2 );
  191. if ( ( rc = register_netdev ( netdev ) ) != 0 )
  192. goto error;
  193. netdev_link_up ( netdev );
  194. DBGP ( "ints\n" );
  195. return 0;
  196. error:
  197. ifec_reset ( netdev );
  198. netdev_nullify ( netdev );
  199. netdev_put ( netdev );
  200. return rc;
  201. }
  202. /*
  203. * Remove a device from the PCI device list.
  204. *
  205. * @v pci PCI device to remove.
  206. *
  207. * This is a PCI Device Driver API function.
  208. */
  209. static void ifec_pci_remove ( struct pci_device *pci )
  210. {
  211. struct net_device *netdev = pci_get_drvdata ( pci );
  212. DBGP ( "ifec_pci_remove\n" );
  213. unregister_netdev ( netdev );
  214. ifec_reset ( netdev );
  215. netdev_nullify ( netdev );
  216. netdev_put ( netdev );
  217. }
  218. /****************** iPXE Network Device Driver API functions *****************/
  219. /*
  220. * Close a network device.
  221. *
  222. * @v netdev Device to close.
  223. *
  224. * This is a iPXE Network Device Driver API function.
  225. */
  226. static void ifec_net_close ( struct net_device *netdev )
  227. {
  228. struct ifec_private *priv = netdev->priv;
  229. unsigned long ioaddr = priv->ioaddr;
  230. unsigned short intr_status;
  231. DBGP ( "ifec_net_close\n" );
  232. /* disable interrupts */
  233. ifec_net_irq ( netdev, 0 );
  234. /* Ack & clear ints */
  235. intr_status = inw ( ioaddr + SCBStatus );
  236. outw ( intr_status, ioaddr + SCBStatus );
  237. inw ( ioaddr + SCBStatus );
  238. ifec_reset ( netdev );
  239. /* Free any resources */
  240. ifec_free ( netdev );
  241. }
  242. /* Interrupts to be masked */
  243. #define INTERRUPT_MASK ( SCBMaskEarlyRx | SCBMaskFlowCtl )
  244. /*
  245. * Enable or disable IRQ masking.
  246. *
  247. * @v netdev Device to control.
  248. * @v enable Zero to mask off IRQ, non-zero to enable IRQ.
  249. *
  250. * This is a iPXE Network Driver API function.
  251. */
  252. static void ifec_net_irq ( struct net_device *netdev, int enable )
  253. {
  254. struct ifec_private *priv = netdev->priv;
  255. unsigned long ioaddr = priv->ioaddr;
  256. DBGP ( "ifec_net_irq\n" );
  257. outw ( enable ? INTERRUPT_MASK : SCBMaskAll, ioaddr + SCBCmd );
  258. }
  259. /*
  260. * Opens a network device.
  261. *
  262. * @v netdev Device to be opened.
  263. * @ret rc Non-zero if failed to open.
  264. *
  265. * This enables tx and rx on the device.
  266. * This is a iPXE Network Device Driver API function.
  267. */
  268. static int ifec_net_open ( struct net_device *netdev )
  269. {
  270. struct ifec_private *priv = netdev->priv;
  271. struct ifec_ias *ias = NULL;
  272. struct ifec_cfg *cfg = NULL;
  273. int i, options;
  274. int rc = -ENOMEM;
  275. DBGP ( "ifec_net_open: " );
  276. /* Ensure interrupts are disabled. */
  277. ifec_net_irq ( netdev, 0 );
  278. /* Initialize Command Unit and Receive Unit base addresses. */
  279. ifec_scb_cmd ( netdev, 0, RUAddrLoad );
  280. ifec_scb_cmd ( netdev, virt_to_bus ( &priv->stats ), CUStatsAddr );
  281. ifec_scb_cmd ( netdev, 0, CUCmdBase );
  282. /* Initialize both rings */
  283. if ( ( rc = ifec_rx_setup ( netdev ) ) != 0 )
  284. goto error;
  285. if ( ( rc = ifec_tx_setup ( netdev ) ) != 0 )
  286. goto error;
  287. /* Initialize MDIO */
  288. options = 0x00; /* 0x40 = 10mbps half duplex, 0x00 = Autosense */
  289. ifec_mdio_setup ( netdev, options );
  290. /* Prepare MAC address w/ Individual Address Setup (ias) command.*/
  291. ias = malloc_dma ( sizeof ( *ias ), CB_ALIGN );
  292. if ( !ias ) {
  293. rc = -ENOMEM;
  294. goto error;
  295. }
  296. ias->command = CmdIASetup;
  297. ias->status = 0;
  298. memcpy ( ias->ia, netdev->ll_addr, ETH_ALEN );
  299. /* Prepare operating parameters w/ a configure command. */
  300. cfg = malloc_dma ( sizeof ( *cfg ), CB_ALIGN );
  301. if ( !cfg ) {
  302. rc = -ENOMEM;
  303. goto error;
  304. }
  305. memcpy ( cfg, &ifec_cfg, sizeof ( *cfg ) );
  306. cfg->link = virt_to_bus ( priv->tcbs );
  307. cfg->byte[19] = ( options & 0x10 ) ? 0xC0 : 0x80;
  308. ias->link = virt_to_bus ( cfg );
  309. /* Issue the ias and configure commands. */
  310. ifec_scb_cmd ( netdev, virt_to_bus ( ias ), CUStart );
  311. ifec_scb_cmd_wait ( netdev );
  312. priv->configured = 1;
  313. /* Wait up to 10 ms for configuration to initiate */
  314. for ( i = 10; i && !cfg->status; i-- )
  315. mdelay ( 1 );
  316. if ( ! cfg->status ) {
  317. DBG ( "Failed to initiate!\n" );
  318. goto error;
  319. }
  320. free_dma ( ias, sizeof ( *ias ) );
  321. free_dma ( cfg, sizeof ( *cfg ) );
  322. DBG2 ( "cfg " );
  323. /* Enable rx by sending ring address to card */
  324. if ( priv->rfds[0] != NULL ) {
  325. ifec_scb_cmd ( netdev, virt_to_bus( priv->rfds[0] ), RUStart );
  326. ifec_scb_cmd_wait ( netdev );
  327. }
  328. DBG2 ( "rx_start\n" );
  329. return 0;
  330. error:
  331. free_dma ( cfg, sizeof ( *cfg ) );
  332. free_dma ( ias, sizeof ( *ias ) );
  333. ifec_free ( netdev );
  334. ifec_reset ( netdev );
  335. return rc;
  336. }
  337. /*
  338. * This function allows a driver to process events during operation.
  339. *
  340. * @v netdev Device being polled.
  341. *
  342. * This is called periodically by iPXE to let the driver check the status of
  343. * transmitted packets and to allow the driver to check for received packets.
  344. * This is a iPXE Network Device Driver API function.
  345. */
  346. static void ifec_net_poll ( struct net_device *netdev )
  347. {
  348. struct ifec_private *priv = netdev->priv;
  349. unsigned short intr_status;
  350. DBGP ( "ifec_net_poll\n" );
  351. /* acknowledge interrupts ASAP */
  352. intr_status = inw ( priv->ioaddr + SCBStatus );
  353. outw ( intr_status, priv->ioaddr + SCBStatus );
  354. inw ( priv->ioaddr + SCBStatus );
  355. DBG2 ( "poll - status: 0x%04X\n", intr_status );
  356. /* anything to do here? */
  357. if ( ( intr_status & ( ~INTERRUPT_MASK ) ) == 0 )
  358. return;
  359. /* process received and transmitted packets */
  360. ifec_tx_process ( netdev );
  361. ifec_rx_process ( netdev );
  362. ifec_check_ru_status ( netdev, intr_status );
  363. return;
  364. }
  365. /*
  366. * This transmits a packet.
  367. *
  368. * @v netdev Device to transmit from.
  369. * @v iobuf Data to transmit.
  370. * @ret rc Non-zero if failed to transmit.
  371. *
  372. * This is a iPXE Network Driver API function.
  373. */
  374. static int ifec_net_transmit ( struct net_device *netdev,
  375. struct io_buffer *iobuf )
  376. {
  377. struct ifec_private *priv = netdev->priv;
  378. struct ifec_tcb *tcb = priv->tcb_head->next;
  379. unsigned long ioaddr = priv->ioaddr;
  380. DBGP ( "ifec_net_transmit\n" );
  381. /* Wait for TCB to become available. */
  382. if ( tcb->status || tcb->iob ) {
  383. DBG ( "TX overflow\n" );
  384. return -ENOBUFS;
  385. }
  386. DBG2 ( "transmitting packet (%zd bytes). status = %hX, cmd=%hX\n",
  387. iob_len ( iobuf ), tcb->status, inw ( ioaddr + SCBCmd ) );
  388. tcb->command = CmdSuspend | CmdTx | CmdTxFlex;
  389. tcb->count = 0x01208000;
  390. tcb->tbd_addr0 = virt_to_bus ( iobuf->data );
  391. tcb->tbd_size0 = 0x3FFF & iob_len ( iobuf );
  392. tcb->iob = iobuf;
  393. ifec_tx_wake ( netdev );
  394. /* Append to end of ring. */
  395. priv->tcb_head = tcb;
  396. return 0;
  397. }
  398. /*************************** Local support functions *************************/
  399. /* Define what each GPIO Pin does */
  400. static const uint16_t ifec_ee_bits[] = {
  401. [SPI_BIT_SCLK] = EE_SHIFT_CLK,
  402. [SPI_BIT_MOSI] = EE_DATA_WRITE,
  403. [SPI_BIT_MISO] = EE_DATA_READ,
  404. [SPI_BIT_SS(0)] = EE_ENB,
  405. };
  406. /*
  407. * Read a single bit from the GPIO pins used for SPI.
  408. * should be called by SPI bitbash functions only
  409. *
  410. * @v basher Bitbash device
  411. * @v bit_id Line to be read
  412. */
  413. static int ifec_spi_read_bit ( struct bit_basher *basher,
  414. unsigned int bit_id )
  415. {
  416. struct ifec_private *priv =
  417. container_of ( basher, struct ifec_private, spi.basher );
  418. unsigned long ee_addr = priv->ioaddr + CSREeprom;
  419. unsigned int ret = 0;
  420. uint16_t mask;
  421. DBGP ( "ifec_spi_read_bit\n" );
  422. mask = ifec_ee_bits[bit_id];
  423. ret = inw (ee_addr);
  424. return ( ret & mask ) ? 1 : 0;
  425. }
  426. /*
  427. * Write a single bit to the GPIO pins used for SPI.
  428. * should be called by SPI bitbash functions only
  429. *
  430. * @v basher Bitbash device
  431. * @v bit_id Line to write to
  432. * @v data Value to write
  433. */
  434. static void ifec_spi_write_bit ( struct bit_basher *basher,
  435. unsigned int bit_id,
  436. unsigned long data )
  437. {
  438. struct ifec_private *priv =
  439. container_of ( basher, struct ifec_private, spi.basher );
  440. unsigned long ee_addr = priv->ioaddr + CSREeprom;
  441. short val;
  442. uint16_t mask = ifec_ee_bits[bit_id];
  443. DBGP ( "ifec_spi_write_bit\n" );
  444. val = inw ( ee_addr );
  445. val &= ~mask;
  446. val |= data & mask;
  447. outw ( val, ee_addr );
  448. }
  449. /* set function pointer to SPI read- and write-bit functions */
  450. static struct bit_basher_operations ifec_basher_ops = {
  451. .read = ifec_spi_read_bit,
  452. .write = ifec_spi_write_bit,
  453. };
  454. /*
  455. * Initialize the eeprom stuff
  456. *
  457. * @v netdev Network device
  458. */
  459. static void ifec_init_eeprom ( struct net_device *netdev )
  460. {
  461. struct ifec_private *priv = netdev->priv;
  462. DBGP ( "ifec_init_eeprom\n" );
  463. priv->spi.basher.op = &ifec_basher_ops;
  464. priv->spi.bus.mode = SPI_MODE_THREEWIRE;
  465. init_spi_bit_basher ( &priv->spi );
  466. priv->eeprom.bus = &priv->spi.bus;
  467. /* init as 93c46(93c14 compatible) first, to set the command len,
  468. * block size and word len. Needs to be set for address len detection.
  469. */
  470. init_at93c46 ( &priv->eeprom, 16 );
  471. /* detect address length, */
  472. threewire_detect_address_len ( &priv->eeprom );
  473. /* address len == 8 means 93c66 instead of 93c46 */
  474. if ( priv->eeprom.address_len == 8 )
  475. init_at93c66 ( &priv->eeprom, 16 );
  476. }
  477. /*
  478. * Support function: ifec_mdio_read
  479. *
  480. * This probably reads a register in the "physical media interface chip".
  481. * -- REW
  482. */
  483. static int ifec_mdio_read ( struct net_device *netdev, int phy_id,
  484. int location )
  485. {
  486. struct ifec_private *priv = netdev->priv;
  487. unsigned long ioaddr = priv->ioaddr;
  488. int val;
  489. int boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
  490. DBGP ( "ifec_mdio_read\n" );
  491. outl ( 0x08000000 | ( location << 16 ) | ( phy_id << 21 ),
  492. ioaddr + CSRCtrlMDI );
  493. do {
  494. udelay ( 16 );
  495. val = inl ( ioaddr + CSRCtrlMDI );
  496. if ( --boguscnt < 0 ) {
  497. DBG ( " ifec_mdio_read() time out with val = %X.\n",
  498. val );
  499. break;
  500. }
  501. } while (! ( val & 0x10000000 ) );
  502. return val & 0xffff;
  503. }
  504. /*
  505. * Initializes MDIO.
  506. *
  507. * @v netdev Network device
  508. * @v options MDIO options
  509. */
  510. static void ifec_mdio_setup ( struct net_device *netdev, int options )
  511. {
  512. struct ifec_private *priv = netdev->priv;
  513. unsigned short mdio_register = priv->mdio_register;
  514. DBGP ( "ifec_mdio_setup\n" );
  515. if ( ( (mdio_register>>8) & 0x3f ) == DP83840
  516. || ( (mdio_register>>8) & 0x3f ) == DP83840A ) {
  517. int mdi_reg23 = ifec_mdio_read ( netdev, mdio_register
  518. & 0x1f, 23 ) | 0x0422;
  519. if (CONGENB)
  520. mdi_reg23 |= 0x0100;
  521. DBG2 ( "DP83840 specific setup, setting register 23 to "
  522. "%hX.\n", mdi_reg23 );
  523. ifec_mdio_write ( netdev, mdio_register & 0x1f, 23, mdi_reg23 );
  524. }
  525. DBG2 ( "dp83840 " );
  526. if ( options != 0 ) {
  527. ifec_mdio_write ( netdev, mdio_register & 0x1f, 0,
  528. ( (options & 0x20) ? 0x2000 : 0 ) |
  529. ( (options & 0x10) ? 0x0100 : 0 ) );
  530. DBG2 ( "set mdio_register. " );
  531. }
  532. }
  533. /*
  534. * Support function: ifec_mdio_write
  535. *
  536. * This probably writes to the "physical media interface chip".
  537. * -- REW
  538. */
  539. static int ifec_mdio_write ( struct net_device *netdev,
  540. int phy_id, int location, int value )
  541. {
  542. struct ifec_private *priv = netdev->priv;
  543. unsigned long ioaddr = priv->ioaddr;
  544. int val;
  545. int boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
  546. DBGP ( "ifec_mdio_write\n" );
  547. outl ( 0x04000000 | ( location << 16 ) | ( phy_id << 21 ) | value,
  548. ioaddr + CSRCtrlMDI );
  549. do {
  550. udelay ( 16 );
  551. val = inl ( ioaddr + CSRCtrlMDI );
  552. if ( --boguscnt < 0 ) {
  553. DBG ( " ifec_mdio_write() time out with val = %X.\n",
  554. val );
  555. break;
  556. }
  557. } while (! ( val & 0x10000000 ) );
  558. return val & 0xffff;
  559. }
  560. /*
  561. * Resets the hardware.
  562. *
  563. * @v netdev Network device
  564. */
  565. static void ifec_reset ( struct net_device *netdev )
  566. {
  567. struct ifec_private *priv = netdev->priv;
  568. unsigned long ioaddr = priv->ioaddr;
  569. DBGP ( "ifec_reset\n" );
  570. /* do partial reset first */
  571. outl ( PortPartialReset, ioaddr + CSRPort );
  572. inw ( ioaddr + SCBStatus );
  573. udelay ( 20 );
  574. /* full reset */
  575. outl ( PortReset, ioaddr + CSRPort );
  576. inw ( ioaddr + SCBStatus );
  577. udelay ( 20 );
  578. /* disable interrupts again */
  579. ifec_net_irq ( netdev, 0 );
  580. }
  581. /*
  582. * free()s the tx/rx rings.
  583. *
  584. * @v netdev Network device
  585. */
  586. static void ifec_free ( struct net_device *netdev )
  587. {
  588. struct ifec_private *priv = netdev_priv ( netdev );
  589. int i;
  590. DBGP ( "ifec_free\n" );
  591. /* free all allocated receive io_buffers */
  592. for ( i = 0; i < RFD_COUNT; i++ ) {
  593. free_iob ( priv->rx_iobs[i] );
  594. priv->rx_iobs[i] = NULL;
  595. priv->rfds[i] = NULL;
  596. }
  597. /* free TX ring buffer */
  598. free_dma ( priv->tcbs, TX_RING_BYTES );
  599. priv->tcbs = NULL;
  600. }
  601. /*
  602. * Initializes an RFD.
  603. *
  604. * @v rfd RFD struct to initialize
  605. * @v command Command word
  606. * @v link Link value
  607. */
  608. static void ifec_rfd_init ( struct ifec_rfd *rfd, s16 command, u32 link )
  609. {
  610. DBGP ( "ifec_rfd_init\n" );
  611. rfd->status = 0;
  612. rfd->command = command;
  613. rfd->rx_buf_addr = 0xFFFFFFFF;
  614. rfd->count = 0;
  615. rfd->size = RFD_PACKET_LEN;
  616. rfd->link = link;
  617. }
  618. /*
  619. * Send address of new RFD to card
  620. *
  621. * @v netdev Network device
  622. */
  623. static void ifec_reprime_ru ( struct net_device *netdev )
  624. {
  625. struct ifec_private *priv = netdev->priv;
  626. int cur_rx = priv->cur_rx;
  627. DBGP ( "ifec_reprime_ru\n" );
  628. if ( priv->rfds[cur_rx] != NULL ) {
  629. ifec_scb_cmd ( netdev, virt_to_bus ( priv->rfds[cur_rx] ),
  630. RUStart );
  631. ifec_scb_cmd_wait ( netdev );
  632. }
  633. }
  634. /*
  635. * Check if reprime of RU needed
  636. *
  637. * @v netdev Network device
  638. */
  639. static void ifec_check_ru_status ( struct net_device *netdev,
  640. unsigned short intr_status )
  641. {
  642. struct ifec_private *priv = netdev->priv;
  643. DBGP ( "ifec_check_ru_status\n" );
  644. /*
  645. * The chip may have suspended reception for various reasons.
  646. * Check for that, and re-prime it should this be the case.
  647. */
  648. switch ( ( intr_status >> 2 ) & 0xf ) {
  649. case 0: /* Idle */
  650. case 4: /* Ready */
  651. break;
  652. case 1: /* Suspended */
  653. case 2: /* No resources (RFDs) */
  654. case 9: /* Suspended with no more RBDs */
  655. case 10: /* No resources due to no RBDs */
  656. case 12: /* Ready with no RBDs */
  657. DBG ( "ifec_net_poll: RU reprimed.\n" );
  658. ifec_reprime_ru ( netdev );
  659. break;
  660. default:
  661. /* reserved values */
  662. DBG ( "ifec_net_poll: RU state anomaly: %i\n",
  663. ( inw ( priv->ioaddr + SCBStatus ) >> 2 ) & 0xf );
  664. break;
  665. }
  666. }
  667. #define RFD_STATUS ( RFD_OK | RFDRxCol | RFDRxErr | RFDShort | \
  668. RFDDMAOverrun | RFDNoBufs | RFDCRCError )
  669. /*
  670. * Looks for received packets in the rx ring, reports success or error to
  671. * the core accordingly. Starts reallocation of rx ring.
  672. *
  673. * @v netdev Network device
  674. */
  675. static void ifec_rx_process ( struct net_device *netdev )
  676. {
  677. struct ifec_private *priv = netdev->priv;
  678. int cur_rx = priv->cur_rx;
  679. struct io_buffer *iob = priv->rx_iobs[cur_rx];
  680. struct ifec_rfd *rfd = priv->rfds[cur_rx];
  681. unsigned int rx_len;
  682. s16 status;
  683. DBGP ( "ifec_rx_process\n" );
  684. /* Process any received packets */
  685. while ( iob && rfd && ( status = rfd->status ) ) {
  686. rx_len = rfd->count & RFDMaskCount;
  687. DBG2 ( "Got a packet: Len = %d, cur_rx = %d.\n", rx_len,
  688. cur_rx );
  689. DBGIO_HD ( (void*)rfd->packet, 0x30 );
  690. if ( ( status & ( RFD_STATUS & ~RFDShort ) ) != RFD_OK ) {
  691. DBG ( "Corrupted packet received. "
  692. "Status = %#08hx\n", status );
  693. netdev_rx_err ( netdev, iob, -EINVAL );
  694. } else {
  695. /* Hand off the packet to the network subsystem */
  696. iob_put ( iob, rx_len );
  697. DBG2 ( "Received packet: %p, len: %d\n", iob, rx_len );
  698. netdev_rx ( netdev, iob );
  699. }
  700. /* make sure we don't reuse this RFD */
  701. priv->rx_iobs[cur_rx] = NULL;
  702. priv->rfds[cur_rx] = NULL;
  703. /* Next RFD */
  704. priv->cur_rx = ( cur_rx + 1 ) % RFD_COUNT;
  705. cur_rx = priv->cur_rx;
  706. iob = priv->rx_iobs[cur_rx];
  707. rfd = priv->rfds[cur_rx];
  708. }
  709. ifec_refill_rx_ring ( netdev );
  710. }
  711. /*
  712. * Allocates io_buffer, set pointers in ifec_private structure accordingly,
  713. * reserves space for RFD header in io_buffer.
  714. *
  715. * @v netdev Network device
  716. * @v cur Descriptor number to work on
  717. * @v cmd Value to set cmd field in RFD to
  718. * @v link Pointer to ned RFD
  719. * @ret rc 0 on success, negative on failure
  720. */
  721. static int ifec_get_rx_desc ( struct net_device *netdev, int cur, int cmd,
  722. int link )
  723. {
  724. struct ifec_private *priv = netdev->priv;
  725. struct ifec_rfd *rfd = priv->rfds[cur];
  726. DBGP ( "ifec_get_rx_desc\n" );
  727. priv->rx_iobs[cur] = alloc_iob ( sizeof ( *rfd ) );
  728. if ( ! priv->rx_iobs[cur] ) {
  729. DBG ( "alloc_iob failed. desc. nr: %d\n", cur );
  730. priv->rfds[cur] = NULL;
  731. return -ENOMEM;
  732. }
  733. /* Initialize new tail. */
  734. priv->rfds[cur] = priv->rx_iobs[cur]->data;
  735. ifec_rfd_init ( priv->rfds[cur], cmd, link );
  736. iob_reserve ( priv->rx_iobs[cur], RFD_HEADER_LEN );
  737. return 0;
  738. }
  739. /*
  740. * Allocate new descriptor entries and initialize them if needed
  741. *
  742. * @v netdev Network device
  743. */
  744. static void ifec_refill_rx_ring ( struct net_device *netdev )
  745. {
  746. struct ifec_private *priv = netdev->priv;
  747. int i, cur_rx;
  748. unsigned short intr_status;
  749. DBGP ( "ifec_refill_rx_ring\n" );
  750. for ( i = 0; i < RFD_COUNT; i++ ) {
  751. cur_rx = ( priv->cur_rx + i ) % RFD_COUNT;
  752. /* only refill if empty */
  753. if ( priv->rfds[cur_rx] != NULL ||
  754. priv->rx_iobs[cur_rx] != NULL )
  755. continue;
  756. DBG2 ( "refilling RFD %d\n", cur_rx );
  757. if ( ifec_get_rx_desc ( netdev, cur_rx,
  758. CmdSuspend | CmdEndOfList, 0 ) == 0 ) {
  759. if ( i > 0 ) {
  760. int prev_rx = ( ( ( cur_rx + RFD_COUNT ) - 1 )
  761. % RFD_COUNT );
  762. struct ifec_rfd *rfd = priv->rfds[prev_rx];
  763. rfd->command = 0;
  764. rfd->link = virt_to_bus ( priv->rfds[cur_rx] );
  765. }
  766. }
  767. }
  768. intr_status = inw ( priv->ioaddr + SCBStatus );
  769. ifec_check_ru_status ( netdev, intr_status );
  770. }
  771. /*
  772. * Initial allocation & initialization of the rx ring.
  773. *
  774. * @v netdev Device of rx ring.
  775. * @ret rc Non-zero if error occurred
  776. */
  777. static int ifec_rx_setup ( struct net_device *netdev )
  778. {
  779. struct ifec_private *priv = netdev->priv;
  780. int i;
  781. DBGP ( "ifec_rx_setup\n" );
  782. priv->cur_rx = 0;
  783. /* init values for ifec_refill_rx_ring() */
  784. for ( i = 0; i < RFD_COUNT; i++ ) {
  785. priv->rfds[i] = NULL;
  786. priv->rx_iobs[i] = NULL;
  787. }
  788. ifec_refill_rx_ring ( netdev );
  789. return 0;
  790. }
  791. /*
  792. * Initiates a SCB command.
  793. *
  794. * @v netdev Network device
  795. * @v ptr General pointer value for command.
  796. * @v cmd Command to issue.
  797. * @ret rc Non-zero if command not issued.
  798. */
  799. static int ifec_scb_cmd ( struct net_device *netdev, u32 ptr, u8 cmd )
  800. {
  801. struct ifec_private *priv = netdev->priv;
  802. unsigned long ioaddr = priv->ioaddr;
  803. int rc;
  804. DBGP ( "ifec_scb_cmd\n" );
  805. rc = ifec_scb_cmd_wait ( netdev ); /* Wait until ready */
  806. if ( !rc ) {
  807. outl ( ptr, ioaddr + SCBPointer );
  808. outb ( cmd, ioaddr + SCBCmd ); /* Issue command */
  809. }
  810. return rc;
  811. }
  812. /*
  813. * Wait for command unit to accept a command.
  814. *
  815. * @v cmd_ioaddr I/O address of command register.
  816. * @ret rc Non-zero if command timed out.
  817. */
  818. static int ifec_scb_cmd_wait ( struct net_device *netdev )
  819. {
  820. struct ifec_private *priv = netdev->priv;
  821. unsigned long cmd_ioaddr = priv->ioaddr + SCBCmd;
  822. int rc, wait = CU_CMD_TIMEOUT;
  823. DBGP ( "ifec_scb_cmd_wait\n" );
  824. for ( ; wait && ( rc = inb ( cmd_ioaddr ) ); wait-- )
  825. udelay ( 1 );
  826. if ( !wait )
  827. DBG ( "ifec_scb_cmd_wait timeout!\n" );
  828. return rc;
  829. }
  830. /*
  831. * Check status of transmitted packets & perform tx completions.
  832. *
  833. * @v netdev Network device.
  834. */
  835. static void ifec_tx_process ( struct net_device *netdev )
  836. {
  837. struct ifec_private *priv = netdev->priv;
  838. struct ifec_tcb *tcb = priv->tcb_tail;
  839. s16 status;
  840. DBGP ( "ifec_tx_process\n" );
  841. /* Check status of transmitted packets */
  842. while ( ( status = tcb->status ) && tcb->iob ) {
  843. if ( status & TCB_U ) {
  844. /* report error to iPXE */
  845. DBG ( "ifec_tx_process : tx error!\n " );
  846. netdev_tx_complete_err ( netdev, tcb->iob, -EINVAL );
  847. } else {
  848. /* report successful transmit */
  849. netdev_tx_complete ( netdev, tcb->iob );
  850. }
  851. DBG2 ( "tx completion\n" );
  852. tcb->iob = NULL;
  853. tcb->status = 0;
  854. priv->tcb_tail = tcb->next; /* Next TCB */
  855. tcb = tcb->next;
  856. }
  857. }
  858. /*
  859. * Allocates & initialize tx resources.
  860. *
  861. * @v netdev Network device.
  862. * @ret rc Non-zero if error occurred.
  863. */
  864. static int ifec_tx_setup ( struct net_device *netdev )
  865. {
  866. struct ifec_private *priv = netdev->priv;
  867. struct ifec_tcb *tcb;
  868. int i;
  869. DBGP ( "ifec_tx_setup\n" );
  870. /* allocate tx ring */
  871. priv->tcbs = malloc_dma ( TX_RING_BYTES, CB_ALIGN );
  872. if ( !priv->tcbs ) {
  873. DBG ( "TX-ring allocation failed\n" );
  874. return -ENOMEM;
  875. }
  876. tcb = priv->tcb_tail = priv->tcbs;
  877. priv->tx_curr = priv->tx_tail = 0;
  878. priv->tx_cnt = 0;
  879. for ( i = 0; i < TCB_COUNT; i++, tcb++ ) {
  880. tcb->status = 0;
  881. tcb->count = 0x01208000;
  882. tcb->iob = NULL;
  883. tcb->tbda_addr = virt_to_bus ( &tcb->tbd_addr0 );
  884. tcb->link = virt_to_bus ( tcb + 1 );
  885. tcb->next = tcb + 1;
  886. }
  887. /* We point tcb_head at the last TCB, so the first ifec_net_transmit()
  888. * will use the first (head->next) TCB to transmit. */
  889. priv->tcb_head = --tcb;
  890. tcb->link = virt_to_bus ( priv->tcbs );
  891. tcb->next = priv->tcbs;
  892. return 0;
  893. }
  894. /*
  895. * Wake up the Command Unit and issue a Resume/Start.
  896. *
  897. * @v netdev Network device containing Command Unit
  898. *
  899. * The time between clearing the S bit and issuing Resume must be as short as
  900. * possible to prevent a race condition. As noted in linux eepro100.c :
  901. * Note: Watch out for the potential race condition here: imagine
  902. * erasing the previous suspend
  903. * the chip processes the previous command
  904. * the chip processes the final command, and suspends
  905. * doing the CU_RESUME
  906. * the chip processes the next-yet-valid post-final-command.
  907. * So blindly sending a CU_RESUME is only safe if we do it immediately after
  908. * erasing the previous CmdSuspend, without the possibility of an intervening
  909. * delay.
  910. */
  911. void ifec_tx_wake ( struct net_device *netdev )
  912. {
  913. struct ifec_private *priv = netdev->priv;
  914. unsigned long ioaddr = priv->ioaddr;
  915. struct ifec_tcb *tcb = priv->tcb_head->next;
  916. DBGP ( "ifec_tx_wake\n" );
  917. /* For the special case of the first transmit, we issue a START. The
  918. * card won't RESUME after the configure command. */
  919. if ( priv->configured ) {
  920. priv->configured = 0;
  921. ifec_scb_cmd ( netdev, virt_to_bus ( tcb ), CUStart );
  922. ifec_scb_cmd_wait ( netdev );
  923. return;
  924. }
  925. /* Resume if suspended. */
  926. switch ( ( inw ( ioaddr + SCBStatus ) >> 6 ) & 0x3 ) {
  927. case 0: /* Idle - We should not reach this state. */
  928. DBG2 ( "ifec_tx_wake: tx idle!\n" );
  929. ifec_scb_cmd ( netdev, virt_to_bus ( tcb ), CUStart );
  930. ifec_scb_cmd_wait ( netdev );
  931. return;
  932. case 1: /* Suspended */
  933. DBG2 ( "s" );
  934. break;
  935. default: /* Active */
  936. DBG2 ( "a" );
  937. }
  938. ifec_scb_cmd_wait ( netdev );
  939. outl ( 0, ioaddr + SCBPointer );
  940. priv->tcb_head->command &= ~CmdSuspend;
  941. /* Immediately issue Resume command */
  942. outb ( CUResume, ioaddr + SCBCmd );
  943. ifec_scb_cmd_wait ( netdev );
  944. }
  945. /*********************************************************************/
  946. static struct pci_device_id ifec_nics[] = {
  947. PCI_ROM(0x8086, 0x1029, "id1029", "Intel EtherExpressPro100 ID1029", 0),
  948. PCI_ROM(0x8086, 0x1030, "id1030", "Intel EtherExpressPro100 ID1030", 0),
  949. PCI_ROM(0x8086, 0x1031, "82801cam", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  950. PCI_ROM(0x8086, 0x1032, "eepro100-1032", "Intel PRO/100 VE Network Connection", 0),
  951. PCI_ROM(0x8086, 0x1033, "eepro100-1033", "Intel PRO/100 VM Network Connection", 0),
  952. PCI_ROM(0x8086, 0x1034, "eepro100-1034", "Intel PRO/100 VM Network Connection", 0),
  953. PCI_ROM(0x8086, 0x1035, "eepro100-1035", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  954. PCI_ROM(0x8086, 0x1036, "eepro100-1036", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  955. PCI_ROM(0x8086, 0x1037, "eepro100-1037", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  956. PCI_ROM(0x8086, 0x1038, "id1038", "Intel PRO/100 VM Network Connection", 0),
  957. PCI_ROM(0x8086, 0x1039, "82562et", "Intel PRO100 VE 82562ET", 0),
  958. PCI_ROM(0x8086, 0x103a, "id103a", "Intel Corporation 82559 InBusiness 10/100", 0),
  959. PCI_ROM(0x8086, 0x103b, "82562etb", "Intel PRO100 VE 82562ETB", 0),
  960. PCI_ROM(0x8086, 0x103c, "eepro100-103c", "Intel PRO/100 VM Network Connection", 0),
  961. PCI_ROM(0x8086, 0x103d, "eepro100-103d", "Intel PRO/100 VE Network Connection", 0),
  962. PCI_ROM(0x8086, 0x103e, "eepro100-103e", "Intel PRO/100 VM Network Connection", 0),
  963. PCI_ROM(0x8086, 0x1051, "prove", "Intel PRO/100 VE Network Connection", 0),
  964. PCI_ROM(0x8086, 0x1059, "82551qm", "Intel PRO/100 M Mobile Connection", 0),
  965. PCI_ROM(0x8086, 0x1209, "82559er", "Intel EtherExpressPro100 82559ER", 0),
  966. PCI_ROM(0x8086, 0x1227, "82865", "Intel 82865 EtherExpress PRO/100A", 0),
  967. PCI_ROM(0x8086, 0x1228, "82556", "Intel 82556 EtherExpress PRO/100 Smart", 0),
  968. PCI_ROM(0x8086, 0x1229, "eepro100", "Intel EtherExpressPro100", 0),
  969. PCI_ROM(0x8086, 0x2449, "82562em", "Intel EtherExpressPro100 82562EM", 0),
  970. PCI_ROM(0x8086, 0x2459, "82562-1", "Intel 82562 based Fast Ethernet Connection", 0),
  971. PCI_ROM(0x8086, 0x245d, "82562-2", "Intel 82562 based Fast Ethernet Connection", 0),
  972. PCI_ROM(0x8086, 0x1050, "82562ez", "Intel 82562EZ Network Connection", 0),
  973. PCI_ROM(0x8086, 0x1051, "eepro100-1051", "Intel 82801EB/ER (ICH5/ICH5R) Chipset Ethernet Controller", 0),
  974. PCI_ROM(0x8086, 0x1065, "82562-3", "Intel 82562 based Fast Ethernet Connection", 0),
  975. PCI_ROM(0x8086, 0x5200, "eepro100-5200", "Intel EtherExpress PRO/100 Intelligent Server", 0),
  976. PCI_ROM(0x8086, 0x5201, "eepro100-5201", "Intel EtherExpress PRO/100 Intelligent Server", 0),
  977. PCI_ROM(0x8086, 0x1092, "82562-3", "Intel Pro/100 VE Network", 0),
  978. PCI_ROM(0x8086, 0x27dc, "eepro100-27dc", "Intel 82801G (ICH7) Chipset Ethernet Controller", 0),
  979. PCI_ROM(0x8086, 0x10fe, "82552", "Intel 82552 10/100 Network Connection", 0),
  980. };
  981. /* Cards with device ids 0x1030 to 0x103F, 0x2449, 0x2459 or 0x245D might need
  982. * a workaround for hardware bug on 10 mbit half duplex (see linux driver eepro100.c)
  983. * 2003/03/17 gbaum */
  984. struct pci_driver ifec_driver __pci_driver = {
  985. .ids = ifec_nics,
  986. .id_count = ( sizeof (ifec_nics) / sizeof (ifec_nics[0]) ),
  987. .probe = ifec_pci_probe,
  988. .remove = ifec_pci_remove
  989. };
  990. /*
  991. * Local variables:
  992. * c-basic-offset: 8
  993. * c-indent-level: 8
  994. * tab-width: 8
  995. * End:
  996. */