You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

ath_hw.c 6.1KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183
  1. /*
  2. * Copyright (c) 2009 Atheros Communications Inc.
  3. *
  4. * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
  5. * Original from Linux kernel 3.0.1
  6. *
  7. * Permission to use, copy, modify, and/or distribute this software for any
  8. * purpose with or without fee is hereby granted, provided that the above
  9. * copyright notice and this permission notice appear in all copies.
  10. *
  11. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  12. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  13. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  14. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  15. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  16. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  17. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include <ipxe/io.h>
  20. #include "ath.h"
  21. #include "reg.h"
  22. #define REG_READ (common->ops->read)
  23. #define REG_WRITE (common->ops->write)
  24. /**
  25. * ath_hw_set_bssid_mask - filter out bssids we listen
  26. *
  27. * @common: the ath_common struct for the device.
  28. *
  29. * BSSID masking is a method used by AR5212 and newer hardware to inform PCU
  30. * which bits of the interface's MAC address should be looked at when trying
  31. * to decide which packets to ACK. In station mode and AP mode with a single
  32. * BSS every bit matters since we lock to only one BSS. In AP mode with
  33. * multiple BSSes (virtual interfaces) not every bit matters because hw must
  34. * accept frames for all BSSes and so we tweak some bits of our mac address
  35. * in order to have multiple BSSes.
  36. *
  37. * NOTE: This is a simple filter and does *not* filter out all
  38. * relevant frames. Some frames that are not for us might get ACKed from us
  39. * by PCU because they just match the mask.
  40. *
  41. * When handling multiple BSSes you can get the BSSID mask by computing the
  42. * set of ~ ( MAC XOR BSSID ) for all bssids we handle.
  43. *
  44. * When you do this you are essentially computing the common bits of all your
  45. * BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with
  46. * the MAC address to obtain the relevant bits and compare the result with
  47. * (frame's BSSID & mask) to see if they match.
  48. *
  49. * Simple example: on your card you have have two BSSes you have created with
  50. * BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.
  51. * There is another BSSID-03 but you are not part of it. For simplicity's sake,
  52. * assuming only 4 bits for a mac address and for BSSIDs you can then have:
  53. *
  54. * \
  55. * MAC: 0001 |
  56. * BSSID-01: 0100 | --> Belongs to us
  57. * BSSID-02: 1001 |
  58. * /
  59. * -------------------
  60. * BSSID-03: 0110 | --> External
  61. * -------------------
  62. *
  63. * Our bssid_mask would then be:
  64. *
  65. * On loop iteration for BSSID-01:
  66. * ~(0001 ^ 0100) -> ~(0101)
  67. * -> 1010
  68. * bssid_mask = 1010
  69. *
  70. * On loop iteration for BSSID-02:
  71. * bssid_mask &= ~(0001 ^ 1001)
  72. * bssid_mask = (1010) & ~(0001 ^ 1001)
  73. * bssid_mask = (1010) & ~(1000)
  74. * bssid_mask = (1010) & (0111)
  75. * bssid_mask = 0010
  76. *
  77. * A bssid_mask of 0010 means "only pay attention to the second least
  78. * significant bit". This is because its the only bit common
  79. * amongst the MAC and all BSSIDs we support. To findout what the real
  80. * common bit is we can simply "&" the bssid_mask now with any BSSID we have
  81. * or our MAC address (we assume the hardware uses the MAC address).
  82. *
  83. * Now, suppose there's an incoming frame for BSSID-03:
  84. *
  85. * IFRAME-01: 0110
  86. *
  87. * An easy eye-inspeciton of this already should tell you that this frame
  88. * will not pass our check. This is because the bssid_mask tells the
  89. * hardware to only look at the second least significant bit and the
  90. * common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB
  91. * as 1, which does not match 0.
  92. *
  93. * So with IFRAME-01 we *assume* the hardware will do:
  94. *
  95. * allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
  96. * --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;
  97. * --> allow = (0010) == 0000 ? 1 : 0;
  98. * --> allow = 0
  99. *
  100. * Lets now test a frame that should work:
  101. *
  102. * IFRAME-02: 0001 (we should allow)
  103. *
  104. * allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
  105. * --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;
  106. * --> allow = (0000) == (0000)
  107. * --> allow = 1
  108. *
  109. * Other examples:
  110. *
  111. * IFRAME-03: 0100 --> allowed
  112. * IFRAME-04: 1001 --> allowed
  113. * IFRAME-05: 1101 --> allowed but its not for us!!!
  114. *
  115. */
  116. void ath_hw_setbssidmask(struct ath_common *common)
  117. {
  118. void *ah = common->ah;
  119. REG_WRITE(ah, get_unaligned_le32(common->bssidmask), AR_BSSMSKL);
  120. REG_WRITE(ah, get_unaligned_le16(common->bssidmask + 4), AR_BSSMSKU);
  121. }
  122. /**
  123. * ath_hw_cycle_counters_update - common function to update cycle counters
  124. *
  125. * @common: the ath_common struct for the device.
  126. *
  127. * This function is used to update all cycle counters in one place.
  128. * It has to be called while holding common->cc_lock!
  129. */
  130. void ath_hw_cycle_counters_update(struct ath_common *common)
  131. {
  132. u32 cycles, busy, rx, tx;
  133. void *ah = common->ah;
  134. /* freeze */
  135. REG_WRITE(ah, AR_MIBC_FMC, AR_MIBC);
  136. /* read */
  137. cycles = REG_READ(ah, AR_CCCNT);
  138. busy = REG_READ(ah, AR_RCCNT);
  139. rx = REG_READ(ah, AR_RFCNT);
  140. tx = REG_READ(ah, AR_TFCNT);
  141. /* clear */
  142. REG_WRITE(ah, 0, AR_CCCNT);
  143. REG_WRITE(ah, 0, AR_RFCNT);
  144. REG_WRITE(ah, 0, AR_RCCNT);
  145. REG_WRITE(ah, 0, AR_TFCNT);
  146. /* unfreeze */
  147. REG_WRITE(ah, 0, AR_MIBC);
  148. /* update all cycle counters here */
  149. common->cc_ani.cycles += cycles;
  150. common->cc_ani.rx_busy += busy;
  151. common->cc_ani.rx_frame += rx;
  152. common->cc_ani.tx_frame += tx;
  153. common->cc_survey.cycles += cycles;
  154. common->cc_survey.rx_busy += busy;
  155. common->cc_survey.rx_frame += rx;
  156. common->cc_survey.tx_frame += tx;
  157. }
  158. int32_t ath_hw_get_listen_time(struct ath_common *common)
  159. {
  160. struct ath_cycle_counters *cc = &common->cc_ani;
  161. int32_t listen_time;
  162. listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /
  163. (common->clockrate * 1000);
  164. memset(cc, 0, sizeof(*cc));
  165. return listen_time;
  166. }