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  1. /*
  2. * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
  5. * Munro, in turn based on the Linux kernel's PCI implementation.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of the
  10. * License, or any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. FILE_LICENCE ( GPL2_OR_LATER );
  22. #include <stdint.h>
  23. #include <stdlib.h>
  24. #include <stdio.h>
  25. #include <string.h>
  26. #include <errno.h>
  27. #include <ipxe/tables.h>
  28. #include <ipxe/device.h>
  29. #include <ipxe/pci.h>
  30. /** @file
  31. *
  32. * PCI bus
  33. *
  34. */
  35. static void pcibus_remove ( struct root_device *rootdev );
  36. /**
  37. * Read PCI BAR
  38. *
  39. * @v pci PCI device
  40. * @v reg PCI register number
  41. * @ret bar Base address register
  42. *
  43. * Reads the specified PCI base address register, including the flags
  44. * portion. 64-bit BARs will be handled automatically. If the value
  45. * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
  46. * high dword is non-zero on a 32-bit platform), then the value
  47. * returned will be zero plus the flags for a 64-bit BAR. Unreachable
  48. * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
  49. */
  50. static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
  51. uint32_t low;
  52. uint32_t high;
  53. pci_read_config_dword ( pci, reg, &low );
  54. if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) )
  55. == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){
  56. pci_read_config_dword ( pci, reg + 4, &high );
  57. if ( high ) {
  58. if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
  59. return ( ( ( uint64_t ) high << 32 ) | low );
  60. } else {
  61. DBGC ( pci, PCI_FMT " unhandled 64-bit BAR "
  62. "%08x%08x\n",
  63. PCI_ARGS ( pci ), high, low );
  64. return PCI_BASE_ADDRESS_MEM_TYPE_64;
  65. }
  66. }
  67. }
  68. return low;
  69. }
  70. /**
  71. * Find the start of a PCI BAR
  72. *
  73. * @v pci PCI device
  74. * @v reg PCI register number
  75. * @ret start BAR start address
  76. *
  77. * Reads the specified PCI base address register, and returns the
  78. * address portion of the BAR (i.e. without the flags).
  79. *
  80. * If the address exceeds the size of an unsigned long (i.e. if a
  81. * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
  82. * return value will be zero.
  83. */
  84. unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
  85. unsigned long bar;
  86. bar = pci_bar ( pci, reg );
  87. if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){
  88. return ( bar & PCI_BASE_ADDRESS_MEM_MASK );
  89. } else {
  90. return ( bar & PCI_BASE_ADDRESS_IO_MASK );
  91. }
  92. }
  93. /**
  94. * Read membase and ioaddr for a PCI device
  95. *
  96. * @v pci PCI device
  97. *
  98. * This scans through all PCI BARs on the specified device. The first
  99. * valid memory BAR is recorded as pci_device::membase, and the first
  100. * valid IO BAR is recorded as pci_device::ioaddr.
  101. *
  102. * 64-bit BARs are handled automatically. On a 32-bit platform, if a
  103. * 64-bit BAR has a non-zero high dword, it will be regarded as
  104. * invalid.
  105. */
  106. static void pci_read_bases ( struct pci_device *pci ) {
  107. unsigned long bar;
  108. int reg;
  109. for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
  110. bar = pci_bar ( pci, reg );
  111. if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
  112. if ( ! pci->ioaddr )
  113. pci->ioaddr =
  114. ( bar & PCI_BASE_ADDRESS_IO_MASK );
  115. } else {
  116. if ( ! pci->membase )
  117. pci->membase =
  118. ( bar & PCI_BASE_ADDRESS_MEM_MASK );
  119. /* Skip next BAR if 64-bit */
  120. if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
  121. reg += 4;
  122. }
  123. }
  124. }
  125. /**
  126. * Enable PCI device
  127. *
  128. * @v pci PCI device
  129. *
  130. * Set device to be a busmaster in case BIOS neglected to do so. Also
  131. * adjust PCI latency timer to a reasonable value, 32.
  132. */
  133. void adjust_pci_device ( struct pci_device *pci ) {
  134. unsigned short new_command, pci_command;
  135. unsigned char pci_latency;
  136. pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
  137. new_command = ( pci_command | PCI_COMMAND_MASTER |
  138. PCI_COMMAND_MEM | PCI_COMMAND_IO );
  139. if ( pci_command != new_command ) {
  140. DBGC ( pci, PCI_FMT " device not enabled by BIOS! Updating "
  141. "PCI command %04x->%04x\n",
  142. PCI_ARGS ( pci ), pci_command, new_command );
  143. pci_write_config_word ( pci, PCI_COMMAND, new_command );
  144. }
  145. pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
  146. if ( pci_latency < 32 ) {
  147. DBGC ( pci, PCI_FMT " latency timer is unreasonably low at "
  148. "%d. Setting to 32.\n", PCI_ARGS ( pci ), pci_latency );
  149. pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
  150. }
  151. }
  152. /**
  153. * Probe a PCI device
  154. *
  155. * @v pci PCI device
  156. * @ret rc Return status code
  157. *
  158. * Searches for a driver for the PCI device. If a driver is found,
  159. * its probe() routine is called.
  160. */
  161. static int pci_probe ( struct pci_device *pci ) {
  162. struct pci_driver *driver;
  163. struct pci_device_id *id;
  164. unsigned int i;
  165. int rc;
  166. DBGC ( pci, PCI_FMT " is %04x:%04x mem %lx io %lx irq %d\n",
  167. PCI_ARGS ( pci ), pci->vendor, pci->device, pci->membase,
  168. pci->ioaddr, pci->irq );
  169. for_each_table_entry ( driver, PCI_DRIVERS ) {
  170. for ( i = 0 ; i < driver->id_count ; i++ ) {
  171. id = &driver->ids[i];
  172. if ( ( id->vendor != PCI_ANY_ID ) &&
  173. ( id->vendor != pci->vendor ) )
  174. continue;
  175. if ( ( id->device != PCI_ANY_ID ) &&
  176. ( id->device != pci->device ) )
  177. continue;
  178. pci->driver = driver;
  179. pci->driver_name = id->name;
  180. DBGC ( pci, "...using driver %s\n", pci->driver_name );
  181. if ( ( rc = driver->probe ( pci, id ) ) != 0 ) {
  182. DBGC ( pci, "......probe failed: %s\n",
  183. strerror ( rc ) );
  184. continue;
  185. }
  186. DBGC ( pci, PCI_FMT " added\n", PCI_ARGS ( pci ) );
  187. return 0;
  188. }
  189. }
  190. DBGC ( pci, "...no driver found\n" );
  191. return -ENOTTY;
  192. }
  193. /**
  194. * Remove a PCI device
  195. *
  196. * @v pci PCI device
  197. */
  198. static void pci_remove ( struct pci_device *pci ) {
  199. pci->driver->remove ( pci );
  200. DBGC ( pci, PCI_FMT " removed\n", PCI_ARGS ( pci ) );
  201. }
  202. /**
  203. * Probe PCI root bus
  204. *
  205. * @v rootdev PCI bus root device
  206. *
  207. * Scans the PCI bus for devices and registers all devices it can
  208. * find.
  209. */
  210. static int pcibus_probe ( struct root_device *rootdev ) {
  211. struct pci_device *pci = NULL;
  212. unsigned int num_bus;
  213. unsigned int busdevfn;
  214. uint8_t hdrtype = 0;
  215. uint32_t tmp;
  216. int rc;
  217. num_bus = ( pci_max_bus() + 1 );
  218. for ( busdevfn = 0 ; busdevfn < PCI_BUSDEVFN ( num_bus, 0, 0 ) ;
  219. busdevfn++ ) {
  220. /* Allocate struct pci_device */
  221. if ( ! pci )
  222. pci = malloc ( sizeof ( *pci ) );
  223. if ( ! pci ) {
  224. rc = -ENOMEM;
  225. goto err;
  226. }
  227. memset ( pci, 0, sizeof ( *pci ) );
  228. pci->busdevfn = busdevfn;
  229. /* Skip all but the first function on
  230. * non-multifunction cards
  231. */
  232. if ( PCI_FUNC ( busdevfn ) == 0 ) {
  233. pci_read_config_byte ( pci, PCI_HEADER_TYPE,
  234. &hdrtype );
  235. } else if ( ! ( hdrtype & 0x80 ) ) {
  236. continue;
  237. }
  238. /* Check for physical device presence */
  239. pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
  240. if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
  241. continue;
  242. /* Populate struct pci_device */
  243. pci->vendor = ( tmp & 0xffff );
  244. pci->device = ( tmp >> 16 );
  245. pci_read_config_dword ( pci, PCI_REVISION, &tmp );
  246. pci->class = ( tmp >> 8 );
  247. pci_read_config_byte ( pci, PCI_INTERRUPT_LINE,
  248. &pci->irq );
  249. pci_read_bases ( pci );
  250. /* Add to device hierarchy */
  251. snprintf ( pci->dev.name, sizeof ( pci->dev.name ),
  252. "PCI%02x:%02x.%x", PCI_BUS ( busdevfn ),
  253. PCI_SLOT ( busdevfn ), PCI_FUNC ( busdevfn ) );
  254. pci->dev.desc.bus_type = BUS_TYPE_PCI;
  255. pci->dev.desc.location = pci->busdevfn;
  256. pci->dev.desc.vendor = pci->vendor;
  257. pci->dev.desc.device = pci->device;
  258. pci->dev.desc.class = pci->class;
  259. pci->dev.desc.ioaddr = pci->ioaddr;
  260. pci->dev.desc.irq = pci->irq;
  261. pci->dev.parent = &rootdev->dev;
  262. list_add ( &pci->dev.siblings, &rootdev->dev.children);
  263. INIT_LIST_HEAD ( &pci->dev.children );
  264. /* Look for a driver */
  265. if ( pci_probe ( pci ) == 0 ) {
  266. /* pcidev registered, we can drop our ref */
  267. pci = NULL;
  268. } else {
  269. /* Not registered; re-use struct pci_device */
  270. list_del ( &pci->dev.siblings );
  271. }
  272. }
  273. free ( pci );
  274. return 0;
  275. err:
  276. free ( pci );
  277. pcibus_remove ( rootdev );
  278. return rc;
  279. }
  280. /**
  281. * Remove PCI root bus
  282. *
  283. * @v rootdev PCI bus root device
  284. */
  285. static void pcibus_remove ( struct root_device *rootdev ) {
  286. struct pci_device *pci;
  287. struct pci_device *tmp;
  288. list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
  289. dev.siblings ) {
  290. pci_remove ( pci );
  291. list_del ( &pci->dev.siblings );
  292. free ( pci );
  293. }
  294. }
  295. /** PCI bus root device driver */
  296. static struct root_driver pci_root_driver = {
  297. .probe = pcibus_probe,
  298. .remove = pcibus_remove,
  299. };
  300. /** PCI bus root device */
  301. struct root_device pci_root_device __root_device = {
  302. .dev = { .name = "PCI" },
  303. .driver = &pci_root_driver,
  304. };