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ehci.c 48KB

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  1. /*
  2. * Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of the
  7. * License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17. * 02110-1301, USA.
  18. *
  19. * You can also choose to distribute this program under the terms of
  20. * the Unmodified Binary Distribution Licence (as given in the file
  21. * COPYING.UBDL), provided that you have satisfied its requirements.
  22. */
  23. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  24. #include <stdlib.h>
  25. #include <unistd.h>
  26. #include <string.h>
  27. #include <strings.h>
  28. #include <errno.h>
  29. #include <byteswap.h>
  30. #include <ipxe/malloc.h>
  31. #include <ipxe/pci.h>
  32. #include <ipxe/usb.h>
  33. #include <ipxe/init.h>
  34. #include "ehci.h"
  35. /** @file
  36. *
  37. * USB Enhanced Host Controller Interface (EHCI) driver
  38. *
  39. */
  40. /**
  41. * Construct error code from transfer descriptor status
  42. *
  43. * @v status Transfer descriptor status
  44. * @ret rc Error code
  45. *
  46. * Bits 2-5 of the status code provide some indication as to the root
  47. * cause of the error. We incorporate these into the error code as
  48. * reported to usb_complete_err().
  49. */
  50. #define EIO_STATUS( status ) EUNIQ ( EINFO_EIO, ( ( (status) >> 2 ) & 0xf ) )
  51. /******************************************************************************
  52. *
  53. * Register access
  54. *
  55. ******************************************************************************
  56. */
  57. /**
  58. * Initialise device
  59. *
  60. * @v ehci EHCI device
  61. * @v regs MMIO registers
  62. */
  63. static void ehci_init ( struct ehci_device *ehci, void *regs ) {
  64. uint32_t hcsparams;
  65. uint32_t hccparams;
  66. size_t caplength;
  67. /* Locate capability and operational registers */
  68. ehci->cap = regs;
  69. caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
  70. ehci->op = ( ehci->cap + caplength );
  71. DBGC2 ( ehci, "EHCI %p cap %08lx op %08lx\n", ehci,
  72. virt_to_phys ( ehci->cap ), virt_to_phys ( ehci->op ) );
  73. /* Read structural parameters */
  74. hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
  75. ehci->ports = EHCI_HCSPARAMS_PORTS ( hcsparams );
  76. DBGC ( ehci, "EHCI %p has %d ports\n", ehci, ehci->ports );
  77. /* Read capability parameters 1 */
  78. hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
  79. ehci->addr64 = EHCI_HCCPARAMS_ADDR64 ( hccparams );
  80. ehci->flsize = ( EHCI_HCCPARAMS_FLSIZE ( hccparams ) ?
  81. EHCI_FLSIZE_SMALL : EHCI_FLSIZE_DEFAULT );
  82. ehci->eecp = EHCI_HCCPARAMS_EECP ( hccparams );
  83. DBGC2 ( ehci, "EHCI %p %d-bit flsize %d\n", ehci,
  84. ( ehci->addr64 ? 64 : 32 ), ehci->flsize );
  85. }
  86. /**
  87. * Find extended capability
  88. *
  89. * @v ehci EHCI device
  90. * @v pci PCI device
  91. * @v id Capability ID
  92. * @v offset Offset to previous extended capability instance, or zero
  93. * @ret offset Offset to extended capability, or zero if not found
  94. */
  95. static unsigned int ehci_extended_capability ( struct ehci_device *ehci,
  96. struct pci_device *pci,
  97. unsigned int id,
  98. unsigned int offset ) {
  99. uint32_t eecp;
  100. /* Locate the extended capability */
  101. while ( 1 ) {
  102. /* Locate first or next capability as applicable */
  103. if ( offset ) {
  104. pci_read_config_dword ( pci, offset, &eecp );
  105. offset = EHCI_EECP_NEXT ( eecp );
  106. } else {
  107. offset = ehci->eecp;
  108. }
  109. if ( ! offset )
  110. return 0;
  111. /* Check if this is the requested capability */
  112. pci_read_config_dword ( pci, offset, &eecp );
  113. if ( EHCI_EECP_ID ( eecp ) == id )
  114. return offset;
  115. }
  116. }
  117. /**
  118. * Calculate buffer alignment
  119. *
  120. * @v len Length
  121. * @ret align Buffer alignment
  122. *
  123. * Determine alignment required for a buffer which must be aligned to
  124. * at least EHCI_MIN_ALIGN and which must not cross a page boundary.
  125. */
  126. static inline size_t ehci_align ( size_t len ) {
  127. size_t align;
  128. /* Align to own length (rounded up to a power of two) */
  129. align = ( 1 << fls ( len - 1 ) );
  130. /* Round up to EHCI_MIN_ALIGN if needed */
  131. if ( align < EHCI_MIN_ALIGN )
  132. align = EHCI_MIN_ALIGN;
  133. return align;
  134. }
  135. /**
  136. * Check control data structure reachability
  137. *
  138. * @v ehci EHCI device
  139. * @v ptr Data structure pointer
  140. * @ret rc Return status code
  141. */
  142. static int ehci_ctrl_reachable ( struct ehci_device *ehci, void *ptr ) {
  143. physaddr_t phys = virt_to_phys ( ptr );
  144. uint32_t segment;
  145. /* Always reachable in a 32-bit build */
  146. if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
  147. return 0;
  148. /* Reachable only if control segment matches in a 64-bit build */
  149. segment = ( ( ( uint64_t ) phys ) >> 32 );
  150. if ( segment == ehci->ctrldssegment )
  151. return 0;
  152. return -ENOTSUP;
  153. }
  154. /******************************************************************************
  155. *
  156. * USB legacy support
  157. *
  158. ******************************************************************************
  159. */
  160. /** Prevent the release of ownership back to BIOS */
  161. static int ehci_legacy_prevent_release;
  162. /**
  163. * Initialise USB legacy support
  164. *
  165. * @v ehci EHCI device
  166. * @v pci PCI device
  167. */
  168. static void ehci_legacy_init ( struct ehci_device *ehci,
  169. struct pci_device *pci ) {
  170. unsigned int legacy;
  171. uint8_t bios;
  172. /* Locate USB legacy support capability (if present) */
  173. legacy = ehci_extended_capability ( ehci, pci, EHCI_EECP_ID_LEGACY, 0 );
  174. if ( ! legacy ) {
  175. /* Not an error; capability may not be present */
  176. DBGC ( ehci, "EHCI %p has no USB legacy support capability\n",
  177. ehci );
  178. return;
  179. }
  180. /* Check if legacy USB support is enabled */
  181. pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ), &bios );
  182. if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
  183. /* Not an error; already owned by OS */
  184. DBGC ( ehci, "EHCI %p USB legacy support already disabled\n",
  185. ehci );
  186. return;
  187. }
  188. /* Record presence of USB legacy support capability */
  189. ehci->legacy = legacy;
  190. }
  191. /**
  192. * Claim ownership from BIOS
  193. *
  194. * @v ehci EHCI device
  195. * @v pci PCI device
  196. */
  197. static void ehci_legacy_claim ( struct ehci_device *ehci,
  198. struct pci_device *pci ) {
  199. unsigned int legacy = ehci->legacy;
  200. uint32_t ctlsts;
  201. uint8_t bios;
  202. unsigned int i;
  203. /* Do nothing unless legacy support capability is present */
  204. if ( ! legacy )
  205. return;
  206. /* Claim ownership */
  207. pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ),
  208. EHCI_USBLEGSUP_OS_OWNED );
  209. /* Wait for BIOS to release ownership */
  210. for ( i = 0 ; i < EHCI_USBLEGSUP_MAX_WAIT_MS ; i++ ) {
  211. /* Check if BIOS has released ownership */
  212. pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ),
  213. &bios );
  214. if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
  215. DBGC ( ehci, "EHCI %p claimed ownership from BIOS\n",
  216. ehci );
  217. pci_read_config_dword ( pci, ( legacy +
  218. EHCI_USBLEGSUP_CTLSTS ),
  219. &ctlsts );
  220. if ( ctlsts ) {
  221. DBGC ( ehci, "EHCI %p warning: BIOS retained "
  222. "SMIs: %08x\n", ehci, ctlsts );
  223. }
  224. return;
  225. }
  226. /* Delay */
  227. mdelay ( 1 );
  228. }
  229. /* BIOS did not release ownership. Claim it forcibly by
  230. * disabling all SMIs.
  231. */
  232. DBGC ( ehci, "EHCI %p could not claim ownership from BIOS: forcibly "
  233. "disabling SMIs\n", ehci );
  234. pci_write_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ), 0 );
  235. }
  236. /**
  237. * Release ownership back to BIOS
  238. *
  239. * @v ehci EHCI device
  240. * @v pci PCI device
  241. */
  242. static void ehci_legacy_release ( struct ehci_device *ehci,
  243. struct pci_device *pci ) {
  244. /* Do nothing unless legacy support capability is present */
  245. if ( ! ehci->legacy )
  246. return;
  247. /* Do nothing if releasing ownership is prevented */
  248. if ( ehci_legacy_prevent_release ) {
  249. DBGC ( ehci, "EHCI %p not releasing ownership to BIOS\n", ehci);
  250. return;
  251. }
  252. /* Release ownership */
  253. pci_write_config_byte ( pci, ( ehci->legacy + EHCI_USBLEGSUP_OS ), 0 );
  254. DBGC ( ehci, "EHCI %p released ownership to BIOS\n", ehci );
  255. }
  256. /******************************************************************************
  257. *
  258. * Run / stop / reset
  259. *
  260. ******************************************************************************
  261. */
  262. /**
  263. * Start EHCI device
  264. *
  265. * @v ehci EHCI device
  266. */
  267. static void ehci_run ( struct ehci_device *ehci ) {
  268. uint32_t usbcmd;
  269. /* Set run/stop bit */
  270. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  271. usbcmd &= ~EHCI_USBCMD_FLSIZE_MASK;
  272. usbcmd |= ( EHCI_USBCMD_RUN | EHCI_USBCMD_FLSIZE ( ehci->flsize ) |
  273. EHCI_USBCMD_PERIODIC | EHCI_USBCMD_ASYNC );
  274. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  275. }
  276. /**
  277. * Stop EHCI device
  278. *
  279. * @v ehci EHCI device
  280. * @ret rc Return status code
  281. */
  282. static int ehci_stop ( struct ehci_device *ehci ) {
  283. uint32_t usbcmd;
  284. uint32_t usbsts;
  285. unsigned int i;
  286. /* Clear run/stop bit */
  287. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  288. usbcmd &= ~( EHCI_USBCMD_RUN | EHCI_USBCMD_PERIODIC |
  289. EHCI_USBCMD_ASYNC );
  290. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  291. /* Wait for device to stop */
  292. for ( i = 0 ; i < EHCI_STOP_MAX_WAIT_MS ; i++ ) {
  293. /* Check if device is stopped */
  294. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  295. if ( usbsts & EHCI_USBSTS_HCH )
  296. return 0;
  297. /* Delay */
  298. mdelay ( 1 );
  299. }
  300. DBGC ( ehci, "EHCI %p timed out waiting for stop\n", ehci );
  301. return -ETIMEDOUT;
  302. }
  303. /**
  304. * Reset EHCI device
  305. *
  306. * @v ehci EHCI device
  307. * @ret rc Return status code
  308. */
  309. static int ehci_reset ( struct ehci_device *ehci ) {
  310. uint32_t usbcmd;
  311. unsigned int i;
  312. int rc;
  313. /* The EHCI specification states that resetting a running
  314. * device may result in undefined behaviour, so try stopping
  315. * it first.
  316. */
  317. if ( ( rc = ehci_stop ( ehci ) ) != 0 ) {
  318. /* Ignore errors and attempt to reset the device anyway */
  319. }
  320. /* Reset device */
  321. writel ( EHCI_USBCMD_HCRST, ehci->op + EHCI_OP_USBCMD );
  322. /* Wait for reset to complete */
  323. for ( i = 0 ; i < EHCI_RESET_MAX_WAIT_MS ; i++ ) {
  324. /* Check if reset is complete */
  325. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  326. if ( ! ( usbcmd & EHCI_USBCMD_HCRST ) )
  327. return 0;
  328. /* Delay */
  329. mdelay ( 1 );
  330. }
  331. DBGC ( ehci, "EHCI %p timed out waiting for reset\n", ehci );
  332. return -ETIMEDOUT;
  333. }
  334. /******************************************************************************
  335. *
  336. * Transfer descriptor rings
  337. *
  338. ******************************************************************************
  339. */
  340. /**
  341. * Allocate transfer descriptor ring
  342. *
  343. * @v ehci EHCI device
  344. * @v ring Transfer descriptor ring
  345. * @ret rc Return status code
  346. */
  347. static int ehci_ring_alloc ( struct ehci_device *ehci,
  348. struct ehci_ring *ring ) {
  349. struct ehci_transfer_descriptor *desc;
  350. struct ehci_transfer_descriptor *next;
  351. unsigned int i;
  352. size_t len;
  353. uint32_t link;
  354. int rc;
  355. /* Initialise structure */
  356. memset ( ring, 0, sizeof ( *ring ) );
  357. /* Allocate I/O buffers */
  358. ring->iobuf = zalloc ( EHCI_RING_COUNT * sizeof ( ring->iobuf[0] ) );
  359. if ( ! ring->iobuf ) {
  360. rc = -ENOMEM;
  361. goto err_alloc_iobuf;
  362. }
  363. /* Allocate queue head */
  364. ring->head = malloc_dma ( sizeof ( *ring->head ),
  365. ehci_align ( sizeof ( *ring->head ) ) );
  366. if ( ! ring->head ) {
  367. rc = -ENOMEM;
  368. goto err_alloc_queue;
  369. }
  370. if ( ( rc = ehci_ctrl_reachable ( ehci, ring->head ) ) != 0 ) {
  371. DBGC ( ehci, "EHCI %p queue head unreachable\n", ehci );
  372. goto err_unreachable_queue;
  373. }
  374. memset ( ring->head, 0, sizeof ( *ring->head ) );
  375. /* Allocate transfer descriptors */
  376. len = ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) );
  377. ring->desc = malloc_dma ( len, sizeof ( ring->desc[0] ) );
  378. if ( ! ring->desc ) {
  379. rc = -ENOMEM;
  380. goto err_alloc_desc;
  381. }
  382. memset ( ring->desc, 0, len );
  383. /* Initialise transfer descriptors */
  384. for ( i = 0 ; i < EHCI_RING_COUNT ; i++ ) {
  385. desc = &ring->desc[i];
  386. if ( ( rc = ehci_ctrl_reachable ( ehci, desc ) ) != 0 ) {
  387. DBGC ( ehci, "EHCI %p descriptor unreachable\n", ehci );
  388. goto err_unreachable_desc;
  389. }
  390. next = &ring->desc[ ( i + 1 ) % EHCI_RING_COUNT ];
  391. link = virt_to_phys ( next );
  392. desc->next = cpu_to_le32 ( link );
  393. desc->alt = cpu_to_le32 ( link );
  394. }
  395. /* Initialise queue head */
  396. link = virt_to_phys ( &ring->desc[0] );
  397. ring->head->cache.next = cpu_to_le32 ( link );
  398. return 0;
  399. err_unreachable_desc:
  400. free_dma ( ring->desc, len );
  401. err_alloc_desc:
  402. err_unreachable_queue:
  403. free_dma ( ring->head, sizeof ( *ring->head ) );
  404. err_alloc_queue:
  405. free ( ring->iobuf );
  406. err_alloc_iobuf:
  407. return rc;
  408. }
  409. /**
  410. * Free transfer descriptor ring
  411. *
  412. * @v ring Transfer descriptor ring
  413. */
  414. static void ehci_ring_free ( struct ehci_ring *ring ) {
  415. unsigned int i;
  416. /* Sanity checks */
  417. assert ( ehci_ring_fill ( ring ) == 0 );
  418. for ( i = 0 ; i < EHCI_RING_COUNT ; i++ )
  419. assert ( ring->iobuf[i] == NULL );
  420. /* Free transfer descriptors */
  421. free_dma ( ring->desc, ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) ) );
  422. /* Free queue head */
  423. free_dma ( ring->head, sizeof ( *ring->head ) );
  424. /* Free I/O buffers */
  425. free ( ring->iobuf );
  426. }
  427. /**
  428. * Enqueue transfer descriptors
  429. *
  430. * @v ehci EHCI device
  431. * @v ring Transfer descriptor ring
  432. * @v iobuf I/O buffer
  433. * @v xfers Transfers
  434. * @v count Number of transfers
  435. * @ret rc Return status code
  436. */
  437. static int ehci_enqueue ( struct ehci_device *ehci, struct ehci_ring *ring,
  438. struct io_buffer *iobuf,
  439. const struct ehci_transfer *xfer,
  440. unsigned int count ) {
  441. struct ehci_transfer_descriptor *desc;
  442. physaddr_t phys;
  443. void *data;
  444. size_t len;
  445. size_t offset;
  446. size_t frag_len;
  447. unsigned int toggle;
  448. unsigned int index;
  449. unsigned int i;
  450. /* Sanity check */
  451. assert ( iobuf != NULL );
  452. assert ( count > 0 );
  453. /* Fail if ring does not have sufficient space */
  454. if ( ehci_ring_remaining ( ring ) < count )
  455. return -ENOBUFS;
  456. /* Fail if any portion is unreachable */
  457. for ( i = 0 ; i < count ; i++ ) {
  458. if ( xfer->flags & EHCI_FL_IMMEDIATE )
  459. continue;
  460. phys = ( virt_to_phys ( xfer[i].data ) + xfer[i].len - 1 );
  461. if ( ( phys > 0xffffffffUL ) && ( ! ehci->addr64 ) )
  462. return -ENOTSUP;
  463. }
  464. /* Enqueue each transfer, recording the I/O buffer with the last */
  465. for ( ; count ; ring->prod++, xfer++ ) {
  466. /* Populate descriptor header */
  467. index = ( ring->prod % EHCI_RING_COUNT );
  468. desc = &ring->desc[index];
  469. toggle = ( xfer->flags & EHCI_FL_TOGGLE );
  470. assert ( xfer->len <= EHCI_LEN_MASK );
  471. assert ( EHCI_FL_TOGGLE == EHCI_LEN_TOGGLE );
  472. desc->len = cpu_to_le16 ( xfer->len | toggle );
  473. desc->flags = ( xfer->flags | EHCI_FL_CERR_MAX );
  474. /* Copy data to immediate data buffer (if requested) */
  475. data = xfer->data;
  476. len = xfer->len;
  477. if ( xfer->flags & EHCI_FL_IMMEDIATE ) {
  478. assert ( len <= sizeof ( desc->immediate ) );
  479. memcpy ( desc->immediate, data, len );
  480. data = desc->immediate;
  481. }
  482. /* Populate buffer pointers */
  483. for ( i = 0 ; len ; i++ ) {
  484. /* Calculate length of this fragment */
  485. phys = virt_to_phys ( data );
  486. offset = ( phys & ( EHCI_PAGE_ALIGN - 1 ) );
  487. frag_len = ( EHCI_PAGE_ALIGN - offset );
  488. if ( frag_len > len )
  489. frag_len = len;
  490. /* Sanity checks */
  491. assert ( ( i == 0 ) || ( offset == 0 ) );
  492. assert ( i < ( sizeof ( desc->low ) /
  493. sizeof ( desc->low[0] ) ) );
  494. /* Populate buffer pointer */
  495. desc->low[i] = cpu_to_le32 ( phys );
  496. if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
  497. desc->high[i] =
  498. cpu_to_le32 ( ((uint64_t) phys) >> 32 );
  499. }
  500. /* Move to next fragment */
  501. data += frag_len;
  502. len -= frag_len;
  503. }
  504. /* Ensure everything is valid before activating descriptor */
  505. wmb();
  506. desc->status = EHCI_STATUS_ACTIVE;
  507. /* Record I/O buffer against last ring index */
  508. if ( --count == 0 )
  509. ring->iobuf[index] = iobuf;
  510. }
  511. return 0;
  512. }
  513. /**
  514. * Dequeue a transfer descriptor
  515. *
  516. * @v ring Transfer descriptor ring
  517. * @ret iobuf I/O buffer (or NULL)
  518. */
  519. static struct io_buffer * ehci_dequeue ( struct ehci_ring *ring ) {
  520. struct ehci_transfer_descriptor *desc;
  521. struct io_buffer *iobuf;
  522. unsigned int index = ( ring->cons % EHCI_RING_COUNT );
  523. /* Sanity check */
  524. assert ( ehci_ring_fill ( ring ) > 0 );
  525. /* Mark descriptor as inactive (and not halted) */
  526. desc = &ring->desc[index];
  527. desc->status = 0;
  528. /* Retrieve I/O buffer */
  529. iobuf = ring->iobuf[index];
  530. ring->iobuf[index] = NULL;
  531. /* Update consumer counter */
  532. ring->cons++;
  533. return iobuf;
  534. }
  535. /******************************************************************************
  536. *
  537. * Schedule management
  538. *
  539. ******************************************************************************
  540. */
  541. /**
  542. * Get link value for a queue head
  543. *
  544. * @v queue Queue head
  545. * @ret link Link value
  546. */
  547. static inline uint32_t ehci_link_qh ( struct ehci_queue_head *queue ) {
  548. return ( virt_to_phys ( queue ) | EHCI_LINK_TYPE_QH );
  549. }
  550. /**
  551. * (Re)build asynchronous schedule
  552. *
  553. * @v ehci EHCI device
  554. */
  555. static void ehci_async_schedule ( struct ehci_device *ehci ) {
  556. struct ehci_endpoint *endpoint;
  557. struct ehci_queue_head *queue;
  558. uint32_t link;
  559. /* Build schedule in reverse order of execution. Provided
  560. * that we only ever add or remove single endpoints, this can
  561. * safely run concurrently with hardware execution of the
  562. * schedule.
  563. */
  564. link = ehci_link_qh ( ehci->head );
  565. list_for_each_entry_reverse ( endpoint, &ehci->async, schedule ) {
  566. queue = endpoint->ring.head;
  567. queue->link = cpu_to_le32 ( link );
  568. wmb();
  569. link = ehci_link_qh ( queue );
  570. }
  571. ehci->head->link = cpu_to_le32 ( link );
  572. wmb();
  573. }
  574. /**
  575. * Add endpoint to asynchronous schedule
  576. *
  577. * @v endpoint Endpoint
  578. */
  579. static void ehci_async_add ( struct ehci_endpoint *endpoint ) {
  580. struct ehci_device *ehci = endpoint->ehci;
  581. /* Add to end of schedule */
  582. list_add_tail ( &endpoint->schedule, &ehci->async );
  583. /* Rebuild schedule */
  584. ehci_async_schedule ( ehci );
  585. }
  586. /**
  587. * Remove endpoint from asynchronous schedule
  588. *
  589. * @v endpoint Endpoint
  590. * @ret rc Return status code
  591. */
  592. static int ehci_async_del ( struct ehci_endpoint *endpoint ) {
  593. struct ehci_device *ehci = endpoint->ehci;
  594. uint32_t usbcmd;
  595. uint32_t usbsts;
  596. unsigned int i;
  597. /* Remove from schedule */
  598. list_check_contains_entry ( endpoint, &ehci->async, schedule );
  599. list_del ( &endpoint->schedule );
  600. /* Rebuild schedule */
  601. ehci_async_schedule ( ehci );
  602. /* Request notification when asynchronous schedule advances */
  603. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  604. usbcmd |= EHCI_USBCMD_ASYNC_ADVANCE;
  605. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  606. /* Wait for asynchronous schedule to advance */
  607. for ( i = 0 ; i < EHCI_ASYNC_ADVANCE_MAX_WAIT_MS ; i++ ) {
  608. /* Check for asynchronous schedule advancing */
  609. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  610. if ( usbsts & EHCI_USBSTS_ASYNC_ADVANCE ) {
  611. usbsts &= ~EHCI_USBSTS_CHANGE;
  612. usbsts |= EHCI_USBSTS_ASYNC_ADVANCE;
  613. writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
  614. return 0;
  615. }
  616. /* Delay */
  617. mdelay ( 1 );
  618. }
  619. /* Bad things will probably happen now */
  620. DBGC ( ehci, "EHCI %p timed out waiting for asynchronous schedule "
  621. "to advance\n", ehci );
  622. return -ETIMEDOUT;
  623. }
  624. /**
  625. * (Re)build periodic schedule
  626. *
  627. * @v ehci EHCI device
  628. */
  629. static void ehci_periodic_schedule ( struct ehci_device *ehci ) {
  630. struct ehci_endpoint *endpoint;
  631. struct ehci_queue_head *queue;
  632. uint32_t link;
  633. unsigned int frames;
  634. unsigned int max_interval;
  635. unsigned int i;
  636. /* Build schedule in reverse order of execution. Provided
  637. * that we only ever add or remove single endpoints, this can
  638. * safely run concurrently with hardware execution of the
  639. * schedule.
  640. */
  641. DBGCP ( ehci, "EHCI %p periodic schedule: ", ehci );
  642. link = EHCI_LINK_TERMINATE;
  643. list_for_each_entry_reverse ( endpoint, &ehci->periodic, schedule ) {
  644. queue = endpoint->ring.head;
  645. queue->link = cpu_to_le32 ( link );
  646. wmb();
  647. DBGCP ( ehci, "%s%d",
  648. ( ( link == EHCI_LINK_TERMINATE ) ? "" : "<-" ),
  649. endpoint->ep->interval );
  650. link = ehci_link_qh ( queue );
  651. }
  652. DBGCP ( ehci, "\n" );
  653. /* Populate periodic frame list */
  654. DBGCP ( ehci, "EHCI %p periodic frame list:", ehci );
  655. frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  656. for ( i = 0 ; i < frames ; i++ ) {
  657. /* Calculate maximum interval (in microframes) which
  658. * may appear as part of this frame list.
  659. */
  660. if ( i == 0 ) {
  661. /* Start of list: include all endpoints */
  662. max_interval = -1U;
  663. } else {
  664. /* Calculate highest power-of-two frame interval */
  665. max_interval = ( 1 << ( ffs ( i ) - 1 ) );
  666. /* Convert to microframes */
  667. max_interval <<= 3;
  668. /* Round up to nearest 2^n-1 */
  669. max_interval = ( ( max_interval << 1 ) - 1 );
  670. }
  671. /* Find first endpoint in schedule satisfying this
  672. * maximum interval constraint.
  673. */
  674. link = EHCI_LINK_TERMINATE;
  675. list_for_each_entry ( endpoint, &ehci->periodic, schedule ) {
  676. if ( endpoint->ep->interval <= max_interval ) {
  677. queue = endpoint->ring.head;
  678. link = ehci_link_qh ( queue );
  679. DBGCP ( ehci, " %d:%d",
  680. i, endpoint->ep->interval );
  681. break;
  682. }
  683. }
  684. ehci->frame[i].link = cpu_to_le32 ( link );
  685. }
  686. wmb();
  687. DBGCP ( ehci, "\n" );
  688. }
  689. /**
  690. * Add endpoint to periodic schedule
  691. *
  692. * @v endpoint Endpoint
  693. */
  694. static void ehci_periodic_add ( struct ehci_endpoint *endpoint ) {
  695. struct ehci_device *ehci = endpoint->ehci;
  696. struct ehci_endpoint *before;
  697. unsigned int interval = endpoint->ep->interval;
  698. /* Find first endpoint with a smaller interval */
  699. list_for_each_entry ( before, &ehci->periodic, schedule ) {
  700. if ( before->ep->interval < interval )
  701. break;
  702. }
  703. list_add_tail ( &endpoint->schedule, &before->schedule );
  704. /* Rebuild schedule */
  705. ehci_periodic_schedule ( ehci );
  706. }
  707. /**
  708. * Remove endpoint from periodic schedule
  709. *
  710. * @v endpoint Endpoint
  711. * @ret rc Return status code
  712. */
  713. static int ehci_periodic_del ( struct ehci_endpoint *endpoint ) {
  714. struct ehci_device *ehci = endpoint->ehci;
  715. /* Remove from schedule */
  716. list_check_contains_entry ( endpoint, &ehci->periodic, schedule );
  717. list_del ( &endpoint->schedule );
  718. /* Rebuild schedule */
  719. ehci_periodic_schedule ( ehci );
  720. /* Delay for a whole USB frame (with a 100% safety margin) */
  721. mdelay ( 2 );
  722. return 0;
  723. }
  724. /**
  725. * Add endpoint to appropriate schedule
  726. *
  727. * @v endpoint Endpoint
  728. */
  729. static void ehci_schedule_add ( struct ehci_endpoint *endpoint ) {
  730. struct usb_endpoint *ep = endpoint->ep;
  731. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  732. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  733. ehci_periodic_add ( endpoint );
  734. } else {
  735. ehci_async_add ( endpoint );
  736. }
  737. }
  738. /**
  739. * Remove endpoint from appropriate schedule
  740. *
  741. * @v endpoint Endpoint
  742. * @ret rc Return status code
  743. */
  744. static int ehci_schedule_del ( struct ehci_endpoint *endpoint ) {
  745. struct usb_endpoint *ep = endpoint->ep;
  746. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  747. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  748. return ehci_periodic_del ( endpoint );
  749. } else {
  750. return ehci_async_del ( endpoint );
  751. }
  752. }
  753. /******************************************************************************
  754. *
  755. * Endpoint operations
  756. *
  757. ******************************************************************************
  758. */
  759. /**
  760. * Determine endpoint characteristics
  761. *
  762. * @v ep USB endpoint
  763. * @ret chr Endpoint characteristics
  764. */
  765. static uint32_t ehci_endpoint_characteristics ( struct usb_endpoint *ep ) {
  766. struct usb_device *usb = ep->usb;
  767. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  768. uint32_t chr;
  769. /* Determine basic characteristics */
  770. chr = ( EHCI_CHR_ADDRESS ( usb->address ) |
  771. EHCI_CHR_ENDPOINT ( ep->address ) |
  772. EHCI_CHR_MAX_LEN ( ep->mtu ) );
  773. /* Control endpoints require manual control of the data toggle */
  774. if ( attr == USB_ENDPOINT_ATTR_CONTROL )
  775. chr |= EHCI_CHR_TOGGLE;
  776. /* Determine endpoint speed */
  777. if ( usb->port->speed == USB_SPEED_HIGH ) {
  778. chr |= EHCI_CHR_EPS_HIGH;
  779. } else {
  780. if ( usb->port->speed == USB_SPEED_FULL ) {
  781. chr |= EHCI_CHR_EPS_FULL;
  782. } else {
  783. chr |= EHCI_CHR_EPS_LOW;
  784. }
  785. if ( attr == USB_ENDPOINT_ATTR_CONTROL )
  786. chr |= EHCI_CHR_CONTROL;
  787. }
  788. return chr;
  789. }
  790. /**
  791. * Determine endpoint capabilities
  792. *
  793. * @v ep USB endpoint
  794. * @ret cap Endpoint capabilities
  795. */
  796. static uint32_t ehci_endpoint_capabilities ( struct usb_endpoint *ep ) {
  797. struct usb_device *usb = ep->usb;
  798. struct usb_port *tt = usb_transaction_translator ( usb );
  799. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  800. uint32_t cap;
  801. unsigned int i;
  802. /* Determine basic capabilities */
  803. cap = EHCI_CAP_MULT ( ep->burst + 1 );
  804. /* Determine interrupt schedule mask, if applicable */
  805. if ( ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) &&
  806. ( ( ep->interval != 0 ) /* avoid infinite loop */ ) ) {
  807. for ( i = 0 ; i < 8 /* microframes per frame */ ;
  808. i += ep->interval ) {
  809. cap |= EHCI_CAP_INTR_SCHED ( i );
  810. }
  811. }
  812. /* Set transaction translator hub address and port, if applicable */
  813. if ( tt ) {
  814. assert ( tt->hub->usb );
  815. cap |= ( EHCI_CAP_TT_HUB ( tt->hub->usb->address ) |
  816. EHCI_CAP_TT_PORT ( tt->address ) );
  817. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT )
  818. cap |= EHCI_CAP_SPLIT_SCHED_DEFAULT;
  819. }
  820. return cap;
  821. }
  822. /**
  823. * Update endpoint characteristics and capabilities
  824. *
  825. * @v ep USB endpoint
  826. */
  827. static void ehci_endpoint_update ( struct usb_endpoint *ep ) {
  828. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  829. struct ehci_queue_head *head;
  830. /* Update queue characteristics and capabilities */
  831. head = endpoint->ring.head;
  832. head->chr = cpu_to_le32 ( ehci_endpoint_characteristics ( ep ) );
  833. head->cap = cpu_to_le32 ( ehci_endpoint_capabilities ( ep ) );
  834. }
  835. /**
  836. * Open endpoint
  837. *
  838. * @v ep USB endpoint
  839. * @ret rc Return status code
  840. */
  841. static int ehci_endpoint_open ( struct usb_endpoint *ep ) {
  842. struct usb_device *usb = ep->usb;
  843. struct ehci_device *ehci = usb_get_hostdata ( usb );
  844. struct ehci_endpoint *endpoint;
  845. int rc;
  846. /* Allocate and initialise structure */
  847. endpoint = zalloc ( sizeof ( *endpoint ) );
  848. if ( ! endpoint ) {
  849. rc = -ENOMEM;
  850. goto err_alloc;
  851. }
  852. endpoint->ehci = ehci;
  853. endpoint->ep = ep;
  854. usb_endpoint_set_hostdata ( ep, endpoint );
  855. /* Initialise descriptor ring */
  856. if ( ( rc = ehci_ring_alloc ( ehci, &endpoint->ring ) ) != 0 )
  857. goto err_ring_alloc;
  858. /* Update queue characteristics and capabilities */
  859. ehci_endpoint_update ( ep );
  860. /* Add to list of endpoints */
  861. list_add_tail ( &endpoint->list, &ehci->endpoints );
  862. /* Add to schedule */
  863. ehci_schedule_add ( endpoint );
  864. return 0;
  865. ehci_ring_free ( &endpoint->ring );
  866. err_ring_alloc:
  867. free ( endpoint );
  868. err_alloc:
  869. return rc;
  870. }
  871. /**
  872. * Close endpoint
  873. *
  874. * @v ep USB endpoint
  875. */
  876. static void ehci_endpoint_close ( struct usb_endpoint *ep ) {
  877. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  878. struct ehci_device *ehci = endpoint->ehci;
  879. struct usb_device *usb = ep->usb;
  880. struct io_buffer *iobuf;
  881. int rc;
  882. /* Remove from schedule */
  883. if ( ( rc = ehci_schedule_del ( endpoint ) ) != 0 ) {
  884. /* No way to prevent hardware from continuing to
  885. * access the memory, so leak it.
  886. */
  887. DBGC ( ehci, "EHCI %p %s endpoint %02x could not unschedule: "
  888. "%s\n", ehci, usb->name, ep->address, strerror ( rc ) );
  889. return;
  890. }
  891. /* Cancel any incomplete transfers */
  892. while ( ehci_ring_fill ( &endpoint->ring ) ) {
  893. iobuf = ehci_dequeue ( &endpoint->ring );
  894. if ( iobuf )
  895. usb_complete_err ( ep, iobuf, -ECANCELED );
  896. }
  897. /* Remove from list of endpoints */
  898. list_del ( &endpoint->list );
  899. /* Free descriptor ring */
  900. ehci_ring_free ( &endpoint->ring );
  901. /* Free endpoint */
  902. free ( endpoint );
  903. }
  904. /**
  905. * Reset endpoint
  906. *
  907. * @v ep USB endpoint
  908. * @ret rc Return status code
  909. */
  910. static int ehci_endpoint_reset ( struct usb_endpoint *ep ) {
  911. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  912. struct ehci_ring *ring = &endpoint->ring;
  913. struct ehci_transfer_descriptor *cache = &ring->head->cache;
  914. uint32_t link;
  915. /* Sanity checks */
  916. assert ( ! ( cache->status & EHCI_STATUS_ACTIVE ) );
  917. assert ( cache->status & EHCI_STATUS_HALTED );
  918. /* Reset residual count */
  919. ring->residual = 0;
  920. /* Reset data toggle */
  921. cache->len = 0;
  922. /* Prepare to restart at next unconsumed descriptor */
  923. link = virt_to_phys ( &ring->desc[ ring->cons % EHCI_RING_COUNT ] );
  924. cache->next = cpu_to_le32 ( link );
  925. /* Restart ring */
  926. wmb();
  927. cache->status = 0;
  928. return 0;
  929. }
  930. /**
  931. * Update MTU
  932. *
  933. * @v ep USB endpoint
  934. * @ret rc Return status code
  935. */
  936. static int ehci_endpoint_mtu ( struct usb_endpoint *ep ) {
  937. /* Update endpoint characteristics and capabilities */
  938. ehci_endpoint_update ( ep );
  939. return 0;
  940. }
  941. /**
  942. * Enqueue message transfer
  943. *
  944. * @v ep USB endpoint
  945. * @v packet Setup packet
  946. * @v iobuf I/O buffer
  947. * @ret rc Return status code
  948. */
  949. static int ehci_endpoint_message ( struct usb_endpoint *ep,
  950. struct usb_setup_packet *packet,
  951. struct io_buffer *iobuf ) {
  952. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  953. struct ehci_device *ehci = endpoint->ehci;
  954. unsigned int input = ( packet->request & cpu_to_le16 ( USB_DIR_IN ) );
  955. struct ehci_transfer xfers[3];
  956. struct ehci_transfer *xfer = xfers;
  957. size_t len = iob_len ( iobuf );
  958. int rc;
  959. /* Construct setup stage */
  960. xfer->data = packet;
  961. xfer->len = sizeof ( *packet );
  962. xfer->flags = ( EHCI_FL_IMMEDIATE | EHCI_FL_PID_SETUP );
  963. xfer++;
  964. /* Construct data stage, if applicable */
  965. if ( len ) {
  966. xfer->data = iobuf->data;
  967. xfer->len = len;
  968. xfer->flags = ( EHCI_FL_TOGGLE |
  969. ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
  970. xfer++;
  971. }
  972. /* Construct status stage */
  973. xfer->data = NULL;
  974. xfer->len = 0;
  975. xfer->flags = ( EHCI_FL_TOGGLE | EHCI_FL_IOC |
  976. ( ( len && input ) ? EHCI_FL_PID_OUT : EHCI_FL_PID_IN));
  977. xfer++;
  978. /* Enqueue transfer */
  979. if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
  980. ( xfer - xfers ) ) ) != 0 )
  981. return rc;
  982. return 0;
  983. }
  984. /**
  985. * Enqueue stream transfer
  986. *
  987. * @v ep USB endpoint
  988. * @v iobuf I/O buffer
  989. * @v terminate Terminate using a short packet
  990. * @ret rc Return status code
  991. */
  992. static int ehci_endpoint_stream ( struct usb_endpoint *ep,
  993. struct io_buffer *iobuf, int terminate ) {
  994. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  995. struct ehci_device *ehci = endpoint->ehci;
  996. unsigned int input = ( ep->address & USB_DIR_IN );
  997. struct ehci_transfer xfers[2];
  998. struct ehci_transfer *xfer = xfers;
  999. size_t len = iob_len ( iobuf );
  1000. int rc;
  1001. /* Create transfer */
  1002. xfer->data = iobuf->data;
  1003. xfer->len = len;
  1004. xfer->flags = ( EHCI_FL_IOC |
  1005. ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
  1006. xfer++;
  1007. if ( terminate && ( ( len & ( ep->mtu - 1 ) ) == 0 ) ) {
  1008. xfer->data = NULL;
  1009. xfer->len = 0;
  1010. assert ( ! input );
  1011. xfer->flags = ( EHCI_FL_IOC | EHCI_FL_PID_OUT );
  1012. xfer++;
  1013. }
  1014. /* Enqueue transfer */
  1015. if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
  1016. ( xfer - xfers ) ) ) != 0 )
  1017. return rc;
  1018. return 0;
  1019. }
  1020. /**
  1021. * Poll for completions
  1022. *
  1023. * @v endpoint Endpoint
  1024. */
  1025. static void ehci_endpoint_poll ( struct ehci_endpoint *endpoint ) {
  1026. struct ehci_device *ehci = endpoint->ehci;
  1027. struct ehci_ring *ring = &endpoint->ring;
  1028. struct ehci_transfer_descriptor *desc;
  1029. struct usb_endpoint *ep = endpoint->ep;
  1030. struct usb_device *usb = ep->usb;
  1031. struct io_buffer *iobuf;
  1032. unsigned int index;
  1033. unsigned int status;
  1034. int rc;
  1035. /* Consume all completed descriptors */
  1036. while ( ehci_ring_fill ( &endpoint->ring ) ) {
  1037. /* Stop if we reach an uncompleted descriptor */
  1038. rmb();
  1039. index = ( ring->cons % EHCI_RING_COUNT );
  1040. desc = &ring->desc[index];
  1041. status = desc->status;
  1042. if ( status & EHCI_STATUS_ACTIVE )
  1043. break;
  1044. /* Consume this descriptor */
  1045. iobuf = ehci_dequeue ( ring );
  1046. /* If we have encountered an error, then consume all
  1047. * remaining descriptors in this transaction, report
  1048. * the error to the USB core, and stop further
  1049. * processing.
  1050. */
  1051. if ( status & EHCI_STATUS_HALTED ) {
  1052. rc = -EIO_STATUS ( status );
  1053. DBGC ( ehci, "EHCI %p %s endpoint %02x completion %d "
  1054. "failed (status %02x): %s\n", ehci, usb->name,
  1055. ep->address, index, status, strerror ( rc ) );
  1056. while ( ! iobuf )
  1057. iobuf = ehci_dequeue ( ring );
  1058. usb_complete_err ( endpoint->ep, iobuf, rc );
  1059. return;
  1060. }
  1061. /* Accumulate residual data count */
  1062. ring->residual += ( le16_to_cpu ( desc->len ) & EHCI_LEN_MASK );
  1063. /* If this is not the end of a transaction (i.e. has
  1064. * no I/O buffer), then continue to next descriptor.
  1065. */
  1066. if ( ! iobuf )
  1067. continue;
  1068. /* Update I/O buffer length */
  1069. iob_unput ( iobuf, ring->residual );
  1070. ring->residual = 0;
  1071. /* Report completion to USB core */
  1072. usb_complete ( endpoint->ep, iobuf );
  1073. }
  1074. }
  1075. /******************************************************************************
  1076. *
  1077. * Device operations
  1078. *
  1079. ******************************************************************************
  1080. */
  1081. /**
  1082. * Open device
  1083. *
  1084. * @v usb USB device
  1085. * @ret rc Return status code
  1086. */
  1087. static int ehci_device_open ( struct usb_device *usb ) {
  1088. struct ehci_device *ehci = usb_bus_get_hostdata ( usb->port->hub->bus );
  1089. usb_set_hostdata ( usb, ehci );
  1090. return 0;
  1091. }
  1092. /**
  1093. * Close device
  1094. *
  1095. * @v usb USB device
  1096. */
  1097. static void ehci_device_close ( struct usb_device *usb ) {
  1098. struct ehci_device *ehci = usb_get_hostdata ( usb );
  1099. struct usb_bus *bus = ehci->bus;
  1100. /* Free device address, if assigned */
  1101. if ( usb->address )
  1102. usb_free_address ( bus, usb->address );
  1103. }
  1104. /**
  1105. * Assign device address
  1106. *
  1107. * @v usb USB device
  1108. * @ret rc Return status code
  1109. */
  1110. static int ehci_device_address ( struct usb_device *usb ) {
  1111. struct ehci_device *ehci = usb_get_hostdata ( usb );
  1112. struct usb_bus *bus = ehci->bus;
  1113. struct usb_endpoint *ep0 = usb_endpoint ( usb, USB_EP0_ADDRESS );
  1114. int address;
  1115. int rc;
  1116. /* Sanity checks */
  1117. assert ( usb->address == 0 );
  1118. assert ( ep0 != NULL );
  1119. /* Allocate device address */
  1120. address = usb_alloc_address ( bus );
  1121. if ( address < 0 ) {
  1122. rc = address;
  1123. DBGC ( ehci, "EHCI %p %s could not allocate address: %s\n",
  1124. ehci, usb->name, strerror ( rc ) );
  1125. goto err_alloc_address;
  1126. }
  1127. /* Set address */
  1128. if ( ( rc = usb_set_address ( usb, address ) ) != 0 )
  1129. goto err_set_address;
  1130. /* Update device address */
  1131. usb->address = address;
  1132. /* Update control endpoint characteristics and capabilities */
  1133. ehci_endpoint_update ( ep0 );
  1134. return 0;
  1135. err_set_address:
  1136. usb_free_address ( bus, address );
  1137. err_alloc_address:
  1138. return rc;
  1139. }
  1140. /******************************************************************************
  1141. *
  1142. * Hub operations
  1143. *
  1144. ******************************************************************************
  1145. */
  1146. /**
  1147. * Open hub
  1148. *
  1149. * @v hub USB hub
  1150. * @ret rc Return status code
  1151. */
  1152. static int ehci_hub_open ( struct usb_hub *hub __unused ) {
  1153. /* Nothing to do */
  1154. return 0;
  1155. }
  1156. /**
  1157. * Close hub
  1158. *
  1159. * @v hub USB hub
  1160. */
  1161. static void ehci_hub_close ( struct usb_hub *hub __unused ) {
  1162. /* Nothing to do */
  1163. }
  1164. /******************************************************************************
  1165. *
  1166. * Root hub operations
  1167. *
  1168. ******************************************************************************
  1169. */
  1170. /**
  1171. * Open root hub
  1172. *
  1173. * @v hub USB hub
  1174. * @ret rc Return status code
  1175. */
  1176. static int ehci_root_open ( struct usb_hub *hub ) {
  1177. struct usb_bus *bus = hub->bus;
  1178. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1179. uint32_t portsc;
  1180. unsigned int i;
  1181. /* Route all ports to EHCI controller */
  1182. writel ( EHCI_CONFIGFLAG_CF, ehci->op + EHCI_OP_CONFIGFLAG );
  1183. /* Enable power to all ports */
  1184. for ( i = 1 ; i <= ehci->ports ; i++ ) {
  1185. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( i ) );
  1186. portsc &= ~EHCI_PORTSC_CHANGE;
  1187. portsc |= EHCI_PORTSC_PP;
  1188. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( i ) );
  1189. }
  1190. /* Wait 20ms after potentially enabling power to a port */
  1191. mdelay ( EHCI_PORT_POWER_DELAY_MS );
  1192. /* Record hub driver private data */
  1193. usb_hub_set_drvdata ( hub, ehci );
  1194. return 0;
  1195. }
  1196. /**
  1197. * Close root hub
  1198. *
  1199. * @v hub USB hub
  1200. */
  1201. static void ehci_root_close ( struct usb_hub *hub ) {
  1202. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1203. /* Route all ports back to companion controllers */
  1204. writel ( 0, ehci->op + EHCI_OP_CONFIGFLAG );
  1205. /* Clear hub driver private data */
  1206. usb_hub_set_drvdata ( hub, NULL );
  1207. }
  1208. /**
  1209. * Enable port
  1210. *
  1211. * @v hub USB hub
  1212. * @v port USB port
  1213. * @ret rc Return status code
  1214. */
  1215. static int ehci_root_enable ( struct usb_hub *hub, struct usb_port *port ) {
  1216. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1217. uint32_t portsc;
  1218. unsigned int line;
  1219. unsigned int i;
  1220. /* Check for a low-speed device */
  1221. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1222. line = EHCI_PORTSC_LINE_STATUS ( portsc );
  1223. if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
  1224. DBGC ( ehci, "EHCI %p port %d detected low-speed device: "
  1225. "disowning\n", ehci, port->address );
  1226. goto disown;
  1227. }
  1228. /* Reset port */
  1229. portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
  1230. portsc |= EHCI_PORTSC_PR;
  1231. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1232. mdelay ( USB_RESET_DELAY_MS );
  1233. portsc &= ~EHCI_PORTSC_PR;
  1234. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1235. /* Wait for reset to complete */
  1236. for ( i = 0 ; i < EHCI_PORT_RESET_MAX_WAIT_MS ; i++ ) {
  1237. /* Check port status */
  1238. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1239. if ( ! ( portsc & EHCI_PORTSC_PR ) ) {
  1240. if ( portsc & EHCI_PORTSC_PED )
  1241. return 0;
  1242. DBGC ( ehci, "EHCI %p port %d not enabled after reset: "
  1243. "disowning\n", ehci, port->address );
  1244. goto disown;
  1245. }
  1246. /* Delay */
  1247. mdelay ( 1 );
  1248. }
  1249. DBGC ( ehci, "EHCI %p timed out waiting for port %d to reset\n",
  1250. ehci, port->address );
  1251. return -ETIMEDOUT;
  1252. disown:
  1253. portsc &= ~EHCI_PORTSC_CHANGE;
  1254. portsc |= EHCI_PORTSC_OWNER;
  1255. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1256. return -ENODEV;
  1257. }
  1258. /**
  1259. * Disable port
  1260. *
  1261. * @v hub USB hub
  1262. * @v port USB port
  1263. * @ret rc Return status code
  1264. */
  1265. static int ehci_root_disable ( struct usb_hub *hub, struct usb_port *port ) {
  1266. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1267. uint32_t portsc;
  1268. /* Disable port */
  1269. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1270. portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
  1271. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1272. return 0;
  1273. }
  1274. /**
  1275. * Update root hub port speed
  1276. *
  1277. * @v hub USB hub
  1278. * @v port USB port
  1279. * @ret rc Return status code
  1280. */
  1281. static int ehci_root_speed ( struct usb_hub *hub, struct usb_port *port ) {
  1282. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1283. uint32_t portsc;
  1284. unsigned int speed;
  1285. unsigned int line;
  1286. int ccs;
  1287. int ped;
  1288. /* Read port status */
  1289. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1290. DBGC2 ( ehci, "EHCI %p port %d status is %08x\n",
  1291. ehci, port->address, portsc );
  1292. ccs = ( portsc & EHCI_PORTSC_CCS );
  1293. ped = ( portsc & EHCI_PORTSC_PED );
  1294. line = EHCI_PORTSC_LINE_STATUS ( portsc );
  1295. /* Determine port speed */
  1296. if ( ! ccs ) {
  1297. /* Port not connected */
  1298. speed = USB_SPEED_NONE;
  1299. } else if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
  1300. /* Detected as low-speed */
  1301. speed = USB_SPEED_LOW;
  1302. } else if ( ped ) {
  1303. /* Port already enabled: must be high-speed */
  1304. speed = USB_SPEED_HIGH;
  1305. } else {
  1306. /* Not low-speed and not yet enabled. Could be either
  1307. * full-speed or high-speed; we can't yet tell.
  1308. */
  1309. speed = USB_SPEED_FULL;
  1310. }
  1311. port->speed = speed;
  1312. return 0;
  1313. }
  1314. /**
  1315. * Clear transaction translator buffer
  1316. *
  1317. * @v hub USB hub
  1318. * @v port USB port
  1319. * @v ep USB endpoint
  1320. * @ret rc Return status code
  1321. */
  1322. static int ehci_root_clear_tt ( struct usb_hub *hub, struct usb_port *port,
  1323. struct usb_endpoint *ep ) {
  1324. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1325. /* Should never be called; this is a root hub */
  1326. DBGC ( ehci, "EHCI %p port %d nonsensical CLEAR_TT for %s endpoint "
  1327. "%02x\n", ehci, port->address, ep->usb->name, ep->address );
  1328. return -ENOTSUP;
  1329. }
  1330. /**
  1331. * Poll for port status changes
  1332. *
  1333. * @v hub USB hub
  1334. * @v port USB port
  1335. */
  1336. static void ehci_root_poll ( struct usb_hub *hub, struct usb_port *port ) {
  1337. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1338. uint32_t portsc;
  1339. uint32_t change;
  1340. /* Do nothing unless something has changed */
  1341. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1342. change = ( portsc & EHCI_PORTSC_CHANGE );
  1343. if ( ! change )
  1344. return;
  1345. /* Acknowledge changes */
  1346. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1347. /* Report port status change */
  1348. usb_port_changed ( port );
  1349. }
  1350. /******************************************************************************
  1351. *
  1352. * Bus operations
  1353. *
  1354. ******************************************************************************
  1355. */
  1356. /**
  1357. * Open USB bus
  1358. *
  1359. * @v bus USB bus
  1360. * @ret rc Return status code
  1361. */
  1362. static int ehci_bus_open ( struct usb_bus *bus ) {
  1363. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1364. unsigned int frames;
  1365. size_t len;
  1366. int rc;
  1367. /* Sanity checks */
  1368. assert ( list_empty ( &ehci->async ) );
  1369. assert ( list_empty ( &ehci->periodic ) );
  1370. /* Allocate and initialise asynchronous queue head */
  1371. ehci->head = malloc_dma ( sizeof ( *ehci->head ),
  1372. ehci_align ( sizeof ( *ehci->head ) ) );
  1373. if ( ! ehci->head ) {
  1374. rc = -ENOMEM;
  1375. goto err_alloc_head;
  1376. }
  1377. memset ( ehci->head, 0, sizeof ( *ehci->head ) );
  1378. ehci->head->chr = cpu_to_le32 ( EHCI_CHR_HEAD );
  1379. ehci->head->cache.next = cpu_to_le32 ( EHCI_LINK_TERMINATE );
  1380. ehci->head->cache.status = EHCI_STATUS_HALTED;
  1381. ehci_async_schedule ( ehci );
  1382. writel ( virt_to_phys ( ehci->head ),
  1383. ehci->op + EHCI_OP_ASYNCLISTADDR );
  1384. /* Use async queue head to determine control data structure segment */
  1385. ehci->ctrldssegment =
  1386. ( ( ( uint64_t ) virt_to_phys ( ehci->head ) ) >> 32 );
  1387. if ( ehci->addr64 ) {
  1388. writel ( ehci->ctrldssegment, ehci->op + EHCI_OP_CTRLDSSEGMENT);
  1389. } else if ( ehci->ctrldssegment ) {
  1390. DBGC ( ehci, "EHCI %p CTRLDSSEGMENT not supported\n", ehci );
  1391. rc = -ENOTSUP;
  1392. goto err_ctrldssegment;
  1393. }
  1394. /* Allocate periodic frame list */
  1395. frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  1396. len = ( frames * sizeof ( ehci->frame[0] ) );
  1397. ehci->frame = malloc_dma ( len, EHCI_PAGE_ALIGN );
  1398. if ( ! ehci->frame ) {
  1399. rc = -ENOMEM;
  1400. goto err_alloc_frame;
  1401. }
  1402. if ( ( rc = ehci_ctrl_reachable ( ehci, ehci->frame ) ) != 0 ) {
  1403. DBGC ( ehci, "EHCI %p frame list unreachable\n", ehci );
  1404. goto err_unreachable_frame;
  1405. }
  1406. ehci_periodic_schedule ( ehci );
  1407. writel ( virt_to_phys ( ehci->frame ),
  1408. ehci->op + EHCI_OP_PERIODICLISTBASE );
  1409. /* Start controller */
  1410. ehci_run ( ehci );
  1411. return 0;
  1412. ehci_stop ( ehci );
  1413. err_unreachable_frame:
  1414. free_dma ( ehci->frame, len );
  1415. err_alloc_frame:
  1416. err_ctrldssegment:
  1417. free_dma ( ehci->head, sizeof ( *ehci->head ) );
  1418. err_alloc_head:
  1419. return rc;
  1420. }
  1421. /**
  1422. * Close USB bus
  1423. *
  1424. * @v bus USB bus
  1425. */
  1426. static void ehci_bus_close ( struct usb_bus *bus ) {
  1427. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1428. unsigned int frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  1429. /* Sanity checks */
  1430. assert ( list_empty ( &ehci->async ) );
  1431. assert ( list_empty ( &ehci->periodic ) );
  1432. /* Stop controller */
  1433. ehci_stop ( ehci );
  1434. /* Free periodic frame list */
  1435. free_dma ( ehci->frame, ( frames * sizeof ( ehci->frame[0] ) ) );
  1436. /* Free asynchronous schedule */
  1437. free_dma ( ehci->head, sizeof ( *ehci->head ) );
  1438. }
  1439. /**
  1440. * Poll USB bus
  1441. *
  1442. * @v bus USB bus
  1443. */
  1444. static void ehci_bus_poll ( struct usb_bus *bus ) {
  1445. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1446. struct usb_hub *hub = bus->hub;
  1447. struct ehci_endpoint *endpoint;
  1448. unsigned int i;
  1449. uint32_t usbsts;
  1450. uint32_t change;
  1451. /* Do nothing unless something has changed */
  1452. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  1453. assert ( usbsts & EHCI_USBSTS_ASYNC );
  1454. assert ( usbsts & EHCI_USBSTS_PERIODIC );
  1455. assert ( ! ( usbsts & EHCI_USBSTS_HCH ) );
  1456. change = ( usbsts & EHCI_USBSTS_CHANGE );
  1457. if ( ! change )
  1458. return;
  1459. /* Acknowledge changes */
  1460. writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
  1461. /* Process completions, if applicable */
  1462. if ( change & ( EHCI_USBSTS_USBINT | EHCI_USBSTS_USBERRINT ) ) {
  1463. /* Iterate over all endpoints looking for completed
  1464. * descriptors. We trust that completion handlers are
  1465. * minimal and will not do anything that could
  1466. * plausibly affect the endpoint list itself.
  1467. */
  1468. list_for_each_entry ( endpoint, &ehci->endpoints, list )
  1469. ehci_endpoint_poll ( endpoint );
  1470. }
  1471. /* Process port status changes, if applicable */
  1472. if ( change & EHCI_USBSTS_PORT ) {
  1473. /* Iterate over all ports looking for status changes */
  1474. for ( i = 1 ; i <= ehci->ports ; i++ )
  1475. ehci_root_poll ( hub, usb_port ( hub, i ) );
  1476. }
  1477. /* Report fatal errors */
  1478. if ( change & EHCI_USBSTS_SYSERR )
  1479. DBGC ( ehci, "EHCI %p host system error\n", ehci );
  1480. }
  1481. /******************************************************************************
  1482. *
  1483. * PCI interface
  1484. *
  1485. ******************************************************************************
  1486. */
  1487. /** USB host controller operations */
  1488. static struct usb_host_operations ehci_operations = {
  1489. .endpoint = {
  1490. .open = ehci_endpoint_open,
  1491. .close = ehci_endpoint_close,
  1492. .reset = ehci_endpoint_reset,
  1493. .mtu = ehci_endpoint_mtu,
  1494. .message = ehci_endpoint_message,
  1495. .stream = ehci_endpoint_stream,
  1496. },
  1497. .device = {
  1498. .open = ehci_device_open,
  1499. .close = ehci_device_close,
  1500. .address = ehci_device_address,
  1501. },
  1502. .bus = {
  1503. .open = ehci_bus_open,
  1504. .close = ehci_bus_close,
  1505. .poll = ehci_bus_poll,
  1506. },
  1507. .hub = {
  1508. .open = ehci_hub_open,
  1509. .close = ehci_hub_close,
  1510. },
  1511. .root = {
  1512. .open = ehci_root_open,
  1513. .close = ehci_root_close,
  1514. .enable = ehci_root_enable,
  1515. .disable = ehci_root_disable,
  1516. .speed = ehci_root_speed,
  1517. .clear_tt = ehci_root_clear_tt,
  1518. },
  1519. };
  1520. /**
  1521. * Probe PCI device
  1522. *
  1523. * @v pci PCI device
  1524. * @ret rc Return status code
  1525. */
  1526. static int ehci_probe ( struct pci_device *pci ) {
  1527. struct ehci_device *ehci;
  1528. struct usb_port *port;
  1529. unsigned long bar_start;
  1530. size_t bar_size;
  1531. unsigned int i;
  1532. int rc;
  1533. /* Allocate and initialise structure */
  1534. ehci = zalloc ( sizeof ( *ehci ) );
  1535. if ( ! ehci ) {
  1536. rc = -ENOMEM;
  1537. goto err_alloc;
  1538. }
  1539. INIT_LIST_HEAD ( &ehci->endpoints );
  1540. INIT_LIST_HEAD ( &ehci->async );
  1541. INIT_LIST_HEAD ( &ehci->periodic );
  1542. /* Fix up PCI device */
  1543. adjust_pci_device ( pci );
  1544. /* Map registers */
  1545. bar_start = pci_bar_start ( pci, EHCI_BAR );
  1546. bar_size = pci_bar_size ( pci, EHCI_BAR );
  1547. ehci->regs = ioremap ( bar_start, bar_size );
  1548. if ( ! ehci->regs ) {
  1549. rc = -ENODEV;
  1550. goto err_ioremap;
  1551. }
  1552. /* Initialise EHCI device */
  1553. ehci_init ( ehci, ehci->regs );
  1554. /* Initialise USB legacy support and claim ownership */
  1555. ehci_legacy_init ( ehci, pci );
  1556. ehci_legacy_claim ( ehci, pci );
  1557. /* Reset device */
  1558. if ( ( rc = ehci_reset ( ehci ) ) != 0 )
  1559. goto err_reset;
  1560. /* Allocate USB bus */
  1561. ehci->bus = alloc_usb_bus ( &pci->dev, ehci->ports, EHCI_MTU,
  1562. &ehci_operations );
  1563. if ( ! ehci->bus ) {
  1564. rc = -ENOMEM;
  1565. goto err_alloc_bus;
  1566. }
  1567. usb_bus_set_hostdata ( ehci->bus, ehci );
  1568. usb_hub_set_drvdata ( ehci->bus->hub, ehci );
  1569. /* Set port protocols */
  1570. for ( i = 1 ; i <= ehci->ports ; i++ ) {
  1571. port = usb_port ( ehci->bus->hub, i );
  1572. port->protocol = USB_PROTO_2_0;
  1573. }
  1574. /* Register USB bus */
  1575. if ( ( rc = register_usb_bus ( ehci->bus ) ) != 0 )
  1576. goto err_register;
  1577. pci_set_drvdata ( pci, ehci );
  1578. return 0;
  1579. unregister_usb_bus ( ehci->bus );
  1580. err_register:
  1581. free_usb_bus ( ehci->bus );
  1582. err_alloc_bus:
  1583. ehci_reset ( ehci );
  1584. err_reset:
  1585. ehci_legacy_release ( ehci, pci );
  1586. iounmap ( ehci->regs );
  1587. err_ioremap:
  1588. free ( ehci );
  1589. err_alloc:
  1590. return rc;
  1591. }
  1592. /**
  1593. * Remove PCI device
  1594. *
  1595. * @v pci PCI device
  1596. */
  1597. static void ehci_remove ( struct pci_device *pci ) {
  1598. struct ehci_device *ehci = pci_get_drvdata ( pci );
  1599. struct usb_bus *bus = ehci->bus;
  1600. unregister_usb_bus ( bus );
  1601. assert ( list_empty ( &ehci->async ) );
  1602. assert ( list_empty ( &ehci->periodic ) );
  1603. free_usb_bus ( bus );
  1604. ehci_reset ( ehci );
  1605. ehci_legacy_release ( ehci, pci );
  1606. iounmap ( ehci->regs );
  1607. free ( ehci );
  1608. }
  1609. /** EHCI PCI device IDs */
  1610. static struct pci_device_id ehci_ids[] = {
  1611. PCI_ROM ( 0xffff, 0xffff, "ehci", "EHCI", 0 ),
  1612. };
  1613. /** EHCI PCI driver */
  1614. struct pci_driver ehci_driver __pci_driver = {
  1615. .ids = ehci_ids,
  1616. .id_count = ( sizeof ( ehci_ids ) / sizeof ( ehci_ids[0] ) ),
  1617. .class = PCI_CLASS ( PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB,
  1618. PCI_CLASS_SERIAL_USB_EHCI ),
  1619. .probe = ehci_probe,
  1620. .remove = ehci_remove,
  1621. };
  1622. /**
  1623. * Prepare for exit
  1624. *
  1625. * @v booting System is shutting down for OS boot
  1626. */
  1627. static void ehci_shutdown ( int booting ) {
  1628. /* If we are shutting down to boot an OS, then prevent the
  1629. * release of ownership back to BIOS.
  1630. */
  1631. ehci_legacy_prevent_release = booting;
  1632. }
  1633. /** Startup/shutdown function */
  1634. struct startup_fn ehci_startup __startup_fn ( STARTUP_LATE ) = {
  1635. .shutdown = ehci_shutdown,
  1636. };