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ehci.c 51KB

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  1. /*
  2. * Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of the
  7. * License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17. * 02110-1301, USA.
  18. *
  19. * You can also choose to distribute this program under the terms of
  20. * the Unmodified Binary Distribution Licence (as given in the file
  21. * COPYING.UBDL), provided that you have satisfied its requirements.
  22. */
  23. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  24. #include <stdlib.h>
  25. #include <unistd.h>
  26. #include <string.h>
  27. #include <strings.h>
  28. #include <errno.h>
  29. #include <byteswap.h>
  30. #include <ipxe/malloc.h>
  31. #include <ipxe/pci.h>
  32. #include <ipxe/usb.h>
  33. #include <ipxe/init.h>
  34. #include "ehci.h"
  35. /** @file
  36. *
  37. * USB Enhanced Host Controller Interface (EHCI) driver
  38. *
  39. */
  40. /**
  41. * Construct error code from transfer descriptor status
  42. *
  43. * @v status Transfer descriptor status
  44. * @ret rc Error code
  45. *
  46. * Bits 2-5 of the status code provide some indication as to the root
  47. * cause of the error. We incorporate these into the error code as
  48. * reported to usb_complete_err().
  49. */
  50. #define EIO_STATUS( status ) EUNIQ ( EINFO_EIO, ( ( (status) >> 2 ) & 0xf ) )
  51. /******************************************************************************
  52. *
  53. * Register access
  54. *
  55. ******************************************************************************
  56. */
  57. /**
  58. * Initialise device
  59. *
  60. * @v ehci EHCI device
  61. * @v regs MMIO registers
  62. */
  63. static void ehci_init ( struct ehci_device *ehci, void *regs ) {
  64. uint32_t hcsparams;
  65. uint32_t hccparams;
  66. size_t caplength;
  67. /* Locate capability and operational registers */
  68. ehci->cap = regs;
  69. caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
  70. ehci->op = ( ehci->cap + caplength );
  71. DBGC2 ( ehci, "EHCI %s cap %08lx op %08lx\n", ehci->name,
  72. virt_to_phys ( ehci->cap ), virt_to_phys ( ehci->op ) );
  73. /* Read structural parameters */
  74. hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
  75. ehci->ports = EHCI_HCSPARAMS_PORTS ( hcsparams );
  76. DBGC ( ehci, "EHCI %s has %d ports\n", ehci->name, ehci->ports );
  77. /* Read capability parameters 1 */
  78. hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
  79. ehci->addr64 = EHCI_HCCPARAMS_ADDR64 ( hccparams );
  80. ehci->flsize = ( EHCI_HCCPARAMS_FLSIZE ( hccparams ) ?
  81. EHCI_FLSIZE_SMALL : EHCI_FLSIZE_DEFAULT );
  82. ehci->eecp = EHCI_HCCPARAMS_EECP ( hccparams );
  83. DBGC2 ( ehci, "EHCI %s %d-bit flsize %d\n", ehci->name,
  84. ( ehci->addr64 ? 64 : 32 ), ehci->flsize );
  85. }
  86. /**
  87. * Find extended capability
  88. *
  89. * @v ehci EHCI device
  90. * @v pci PCI device
  91. * @v id Capability ID
  92. * @v offset Offset to previous extended capability instance, or zero
  93. * @ret offset Offset to extended capability, or zero if not found
  94. */
  95. static unsigned int ehci_extended_capability ( struct ehci_device *ehci,
  96. struct pci_device *pci,
  97. unsigned int id,
  98. unsigned int offset ) {
  99. uint32_t eecp;
  100. /* Locate the extended capability */
  101. while ( 1 ) {
  102. /* Locate first or next capability as applicable */
  103. if ( offset ) {
  104. pci_read_config_dword ( pci, offset, &eecp );
  105. offset = EHCI_EECP_NEXT ( eecp );
  106. } else {
  107. offset = ehci->eecp;
  108. }
  109. if ( ! offset )
  110. return 0;
  111. /* Check if this is the requested capability */
  112. pci_read_config_dword ( pci, offset, &eecp );
  113. if ( EHCI_EECP_ID ( eecp ) == id )
  114. return offset;
  115. }
  116. }
  117. /**
  118. * Calculate buffer alignment
  119. *
  120. * @v len Length
  121. * @ret align Buffer alignment
  122. *
  123. * Determine alignment required for a buffer which must be aligned to
  124. * at least EHCI_MIN_ALIGN and which must not cross a page boundary.
  125. */
  126. static inline size_t ehci_align ( size_t len ) {
  127. size_t align;
  128. /* Align to own length (rounded up to a power of two) */
  129. align = ( 1 << fls ( len - 1 ) );
  130. /* Round up to EHCI_MIN_ALIGN if needed */
  131. if ( align < EHCI_MIN_ALIGN )
  132. align = EHCI_MIN_ALIGN;
  133. return align;
  134. }
  135. /**
  136. * Check control data structure reachability
  137. *
  138. * @v ehci EHCI device
  139. * @v ptr Data structure pointer
  140. * @ret rc Return status code
  141. */
  142. static int ehci_ctrl_reachable ( struct ehci_device *ehci, void *ptr ) {
  143. physaddr_t phys = virt_to_phys ( ptr );
  144. uint32_t segment;
  145. /* Always reachable in a 32-bit build */
  146. if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
  147. return 0;
  148. /* Reachable only if control segment matches in a 64-bit build */
  149. segment = ( ( ( uint64_t ) phys ) >> 32 );
  150. if ( segment == ehci->ctrldssegment )
  151. return 0;
  152. return -ENOTSUP;
  153. }
  154. /******************************************************************************
  155. *
  156. * USB legacy support
  157. *
  158. ******************************************************************************
  159. */
  160. /** Prevent the release of ownership back to BIOS */
  161. static int ehci_legacy_prevent_release;
  162. /**
  163. * Initialise USB legacy support
  164. *
  165. * @v ehci EHCI device
  166. * @v pci PCI device
  167. */
  168. static void ehci_legacy_init ( struct ehci_device *ehci,
  169. struct pci_device *pci ) {
  170. unsigned int legacy;
  171. uint8_t bios;
  172. /* Locate USB legacy support capability (if present) */
  173. legacy = ehci_extended_capability ( ehci, pci, EHCI_EECP_ID_LEGACY, 0 );
  174. if ( ! legacy ) {
  175. /* Not an error; capability may not be present */
  176. DBGC ( ehci, "EHCI %s has no USB legacy support capability\n",
  177. ehci->name );
  178. return;
  179. }
  180. /* Check if legacy USB support is enabled */
  181. pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ), &bios );
  182. if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
  183. /* Not an error; already owned by OS */
  184. DBGC ( ehci, "EHCI %s USB legacy support already disabled\n",
  185. ehci->name );
  186. return;
  187. }
  188. /* Record presence of USB legacy support capability */
  189. ehci->legacy = legacy;
  190. }
  191. /**
  192. * Claim ownership from BIOS
  193. *
  194. * @v ehci EHCI device
  195. * @v pci PCI device
  196. */
  197. static void ehci_legacy_claim ( struct ehci_device *ehci,
  198. struct pci_device *pci ) {
  199. unsigned int legacy = ehci->legacy;
  200. uint32_t ctlsts;
  201. uint8_t bios;
  202. unsigned int i;
  203. /* Do nothing unless legacy support capability is present */
  204. if ( ! legacy )
  205. return;
  206. /* Claim ownership */
  207. pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ),
  208. EHCI_USBLEGSUP_OS_OWNED );
  209. /* Wait for BIOS to release ownership */
  210. for ( i = 0 ; i < EHCI_USBLEGSUP_MAX_WAIT_MS ; i++ ) {
  211. /* Check if BIOS has released ownership */
  212. pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ),
  213. &bios );
  214. if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
  215. DBGC ( ehci, "EHCI %s claimed ownership from BIOS\n",
  216. ehci->name );
  217. pci_read_config_dword ( pci, ( legacy +
  218. EHCI_USBLEGSUP_CTLSTS ),
  219. &ctlsts );
  220. if ( ctlsts ) {
  221. DBGC ( ehci, "EHCI %s warning: BIOS retained "
  222. "SMIs: %08x\n", ehci->name, ctlsts );
  223. }
  224. return;
  225. }
  226. /* Delay */
  227. mdelay ( 1 );
  228. }
  229. /* BIOS did not release ownership. Claim it forcibly by
  230. * disabling all SMIs.
  231. */
  232. DBGC ( ehci, "EHCI %s could not claim ownership from BIOS: forcibly "
  233. "disabling SMIs\n", ehci->name );
  234. pci_write_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ), 0 );
  235. }
  236. /**
  237. * Release ownership back to BIOS
  238. *
  239. * @v ehci EHCI device
  240. * @v pci PCI device
  241. */
  242. static void ehci_legacy_release ( struct ehci_device *ehci,
  243. struct pci_device *pci ) {
  244. /* Do nothing unless legacy support capability is present */
  245. if ( ! ehci->legacy )
  246. return;
  247. /* Do nothing if releasing ownership is prevented */
  248. if ( ehci_legacy_prevent_release ) {
  249. DBGC ( ehci, "EHCI %s not releasing ownership to BIOS\n",
  250. ehci->name );
  251. return;
  252. }
  253. /* Release ownership */
  254. pci_write_config_byte ( pci, ( ehci->legacy + EHCI_USBLEGSUP_OS ), 0 );
  255. DBGC ( ehci, "EHCI %s released ownership to BIOS\n", ehci->name );
  256. }
  257. /******************************************************************************
  258. *
  259. * Companion controllers
  260. *
  261. ******************************************************************************
  262. */
  263. /**
  264. * Poll child companion controllers
  265. *
  266. * @v ehci EHCI device
  267. */
  268. static void ehci_poll_companions ( struct ehci_device *ehci ) {
  269. struct usb_bus *bus;
  270. struct device_description *desc;
  271. /* Poll any USB buses belonging to child companion controllers */
  272. for_each_usb_bus ( bus ) {
  273. /* Get underlying devices description */
  274. desc = &bus->dev->desc;
  275. /* Skip buses that are not PCI devices */
  276. if ( desc->bus_type != BUS_TYPE_PCI )
  277. continue;
  278. /* Skip buses that are not part of the same PCI device */
  279. if ( PCI_FIRST_FUNC ( desc->location ) !=
  280. PCI_FIRST_FUNC ( ehci->bus->dev->desc.location ) )
  281. continue;
  282. /* Skip buses that are not UHCI or OHCI PCI devices */
  283. if ( ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
  284. PCI_CLASS_SERIAL_USB,
  285. PCI_CLASS_SERIAL_USB_UHCI ))&&
  286. ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
  287. PCI_CLASS_SERIAL_USB,
  288. PCI_CLASS_SERIAL_USB_OHCI ) ))
  289. continue;
  290. /* Poll child companion controller bus */
  291. DBGC2 ( ehci, "EHCI %s polling companion %s\n",
  292. ehci->name, bus->name );
  293. usb_poll ( bus );
  294. }
  295. }
  296. /**
  297. * Locate EHCI companion controller
  298. *
  299. * @v pci PCI device
  300. * @ret busdevfn EHCI companion controller bus:dev.fn (if any)
  301. */
  302. unsigned int ehci_companion ( struct pci_device *pci ) {
  303. struct pci_device tmp;
  304. unsigned int busdevfn;
  305. int rc;
  306. /* Look for an EHCI function on the same PCI device */
  307. busdevfn = pci->busdevfn;
  308. while ( ++busdevfn <= PCI_LAST_FUNC ( pci->busdevfn ) ) {
  309. pci_init ( &tmp, busdevfn );
  310. if ( ( rc = pci_read_config ( &tmp ) ) != 0 )
  311. continue;
  312. if ( tmp.class == PCI_CLASS ( PCI_CLASS_SERIAL,
  313. PCI_CLASS_SERIAL_USB,
  314. PCI_CLASS_SERIAL_USB_EHCI ) )
  315. return busdevfn;
  316. }
  317. return 0;
  318. }
  319. /******************************************************************************
  320. *
  321. * Run / stop / reset
  322. *
  323. ******************************************************************************
  324. */
  325. /**
  326. * Start EHCI device
  327. *
  328. * @v ehci EHCI device
  329. */
  330. static void ehci_run ( struct ehci_device *ehci ) {
  331. uint32_t usbcmd;
  332. /* Set run/stop bit */
  333. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  334. usbcmd &= ~EHCI_USBCMD_FLSIZE_MASK;
  335. usbcmd |= ( EHCI_USBCMD_RUN | EHCI_USBCMD_FLSIZE ( ehci->flsize ) |
  336. EHCI_USBCMD_PERIODIC | EHCI_USBCMD_ASYNC );
  337. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  338. }
  339. /**
  340. * Stop EHCI device
  341. *
  342. * @v ehci EHCI device
  343. * @ret rc Return status code
  344. */
  345. static int ehci_stop ( struct ehci_device *ehci ) {
  346. uint32_t usbcmd;
  347. uint32_t usbsts;
  348. unsigned int i;
  349. /* Clear run/stop bit */
  350. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  351. usbcmd &= ~( EHCI_USBCMD_RUN | EHCI_USBCMD_PERIODIC |
  352. EHCI_USBCMD_ASYNC );
  353. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  354. /* Wait for device to stop */
  355. for ( i = 0 ; i < EHCI_STOP_MAX_WAIT_MS ; i++ ) {
  356. /* Check if device is stopped */
  357. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  358. if ( usbsts & EHCI_USBSTS_HCH )
  359. return 0;
  360. /* Delay */
  361. mdelay ( 1 );
  362. }
  363. DBGC ( ehci, "EHCI %s timed out waiting for stop\n", ehci->name );
  364. return -ETIMEDOUT;
  365. }
  366. /**
  367. * Reset EHCI device
  368. *
  369. * @v ehci EHCI device
  370. * @ret rc Return status code
  371. */
  372. static int ehci_reset ( struct ehci_device *ehci ) {
  373. uint32_t usbcmd;
  374. unsigned int i;
  375. int rc;
  376. /* The EHCI specification states that resetting a running
  377. * device may result in undefined behaviour, so try stopping
  378. * it first.
  379. */
  380. if ( ( rc = ehci_stop ( ehci ) ) != 0 ) {
  381. /* Ignore errors and attempt to reset the device anyway */
  382. }
  383. /* Reset device */
  384. writel ( EHCI_USBCMD_HCRST, ehci->op + EHCI_OP_USBCMD );
  385. /* Wait for reset to complete */
  386. for ( i = 0 ; i < EHCI_RESET_MAX_WAIT_MS ; i++ ) {
  387. /* Check if reset is complete */
  388. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  389. if ( ! ( usbcmd & EHCI_USBCMD_HCRST ) )
  390. return 0;
  391. /* Delay */
  392. mdelay ( 1 );
  393. }
  394. DBGC ( ehci, "EHCI %s timed out waiting for reset\n", ehci->name );
  395. return -ETIMEDOUT;
  396. }
  397. /******************************************************************************
  398. *
  399. * Transfer descriptor rings
  400. *
  401. ******************************************************************************
  402. */
  403. /**
  404. * Allocate transfer descriptor ring
  405. *
  406. * @v ehci EHCI device
  407. * @v ring Transfer descriptor ring
  408. * @ret rc Return status code
  409. */
  410. static int ehci_ring_alloc ( struct ehci_device *ehci,
  411. struct ehci_ring *ring ) {
  412. struct ehci_transfer_descriptor *desc;
  413. struct ehci_transfer_descriptor *next;
  414. unsigned int i;
  415. size_t len;
  416. uint32_t link;
  417. int rc;
  418. /* Initialise structure */
  419. memset ( ring, 0, sizeof ( *ring ) );
  420. /* Allocate I/O buffers */
  421. ring->iobuf = zalloc ( EHCI_RING_COUNT * sizeof ( ring->iobuf[0] ) );
  422. if ( ! ring->iobuf ) {
  423. rc = -ENOMEM;
  424. goto err_alloc_iobuf;
  425. }
  426. /* Allocate queue head */
  427. ring->head = malloc_dma ( sizeof ( *ring->head ),
  428. ehci_align ( sizeof ( *ring->head ) ) );
  429. if ( ! ring->head ) {
  430. rc = -ENOMEM;
  431. goto err_alloc_queue;
  432. }
  433. if ( ( rc = ehci_ctrl_reachable ( ehci, ring->head ) ) != 0 ) {
  434. DBGC ( ehci, "EHCI %s queue head unreachable\n", ehci->name );
  435. goto err_unreachable_queue;
  436. }
  437. memset ( ring->head, 0, sizeof ( *ring->head ) );
  438. /* Allocate transfer descriptors */
  439. len = ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) );
  440. ring->desc = malloc_dma ( len, sizeof ( ring->desc[0] ) );
  441. if ( ! ring->desc ) {
  442. rc = -ENOMEM;
  443. goto err_alloc_desc;
  444. }
  445. memset ( ring->desc, 0, len );
  446. /* Initialise transfer descriptors */
  447. for ( i = 0 ; i < EHCI_RING_COUNT ; i++ ) {
  448. desc = &ring->desc[i];
  449. if ( ( rc = ehci_ctrl_reachable ( ehci, desc ) ) != 0 ) {
  450. DBGC ( ehci, "EHCI %s descriptor unreachable\n",
  451. ehci->name );
  452. goto err_unreachable_desc;
  453. }
  454. next = &ring->desc[ ( i + 1 ) % EHCI_RING_COUNT ];
  455. link = virt_to_phys ( next );
  456. desc->next = cpu_to_le32 ( link );
  457. desc->alt = cpu_to_le32 ( link );
  458. }
  459. /* Initialise queue head */
  460. link = virt_to_phys ( &ring->desc[0] );
  461. ring->head->cache.next = cpu_to_le32 ( link );
  462. return 0;
  463. err_unreachable_desc:
  464. free_dma ( ring->desc, len );
  465. err_alloc_desc:
  466. err_unreachable_queue:
  467. free_dma ( ring->head, sizeof ( *ring->head ) );
  468. err_alloc_queue:
  469. free ( ring->iobuf );
  470. err_alloc_iobuf:
  471. return rc;
  472. }
  473. /**
  474. * Free transfer descriptor ring
  475. *
  476. * @v ring Transfer descriptor ring
  477. */
  478. static void ehci_ring_free ( struct ehci_ring *ring ) {
  479. unsigned int i;
  480. /* Sanity checks */
  481. assert ( ehci_ring_fill ( ring ) == 0 );
  482. for ( i = 0 ; i < EHCI_RING_COUNT ; i++ )
  483. assert ( ring->iobuf[i] == NULL );
  484. /* Free transfer descriptors */
  485. free_dma ( ring->desc, ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) ) );
  486. /* Free queue head */
  487. free_dma ( ring->head, sizeof ( *ring->head ) );
  488. /* Free I/O buffers */
  489. free ( ring->iobuf );
  490. }
  491. /**
  492. * Enqueue transfer descriptors
  493. *
  494. * @v ehci EHCI device
  495. * @v ring Transfer descriptor ring
  496. * @v iobuf I/O buffer
  497. * @v xfers Transfers
  498. * @v count Number of transfers
  499. * @ret rc Return status code
  500. */
  501. static int ehci_enqueue ( struct ehci_device *ehci, struct ehci_ring *ring,
  502. struct io_buffer *iobuf,
  503. const struct ehci_transfer *xfer,
  504. unsigned int count ) {
  505. struct ehci_transfer_descriptor *desc;
  506. physaddr_t phys;
  507. void *data;
  508. size_t len;
  509. size_t offset;
  510. size_t frag_len;
  511. unsigned int toggle;
  512. unsigned int index;
  513. unsigned int i;
  514. /* Sanity check */
  515. assert ( iobuf != NULL );
  516. assert ( count > 0 );
  517. /* Fail if ring does not have sufficient space */
  518. if ( ehci_ring_remaining ( ring ) < count )
  519. return -ENOBUFS;
  520. /* Fail if any portion is unreachable */
  521. for ( i = 0 ; i < count ; i++ ) {
  522. if ( ! xfer[i].len )
  523. continue;
  524. phys = ( virt_to_phys ( xfer[i].data ) + xfer[i].len - 1 );
  525. if ( ( phys > 0xffffffffUL ) && ( ! ehci->addr64 ) )
  526. return -ENOTSUP;
  527. }
  528. /* Enqueue each transfer, recording the I/O buffer with the last */
  529. for ( ; count ; ring->prod++, xfer++ ) {
  530. /* Populate descriptor header */
  531. index = ( ring->prod % EHCI_RING_COUNT );
  532. desc = &ring->desc[index];
  533. toggle = ( xfer->flags & EHCI_FL_TOGGLE );
  534. assert ( xfer->len <= EHCI_LEN_MASK );
  535. assert ( EHCI_FL_TOGGLE == EHCI_LEN_TOGGLE );
  536. desc->len = cpu_to_le16 ( xfer->len | toggle );
  537. desc->flags = ( xfer->flags | EHCI_FL_CERR_MAX );
  538. /* Populate buffer pointers */
  539. data = xfer->data;
  540. len = xfer->len;
  541. for ( i = 0 ; len ; i++ ) {
  542. /* Calculate length of this fragment */
  543. phys = virt_to_phys ( data );
  544. offset = ( phys & ( EHCI_PAGE_ALIGN - 1 ) );
  545. frag_len = ( EHCI_PAGE_ALIGN - offset );
  546. if ( frag_len > len )
  547. frag_len = len;
  548. /* Sanity checks */
  549. assert ( ( i == 0 ) || ( offset == 0 ) );
  550. assert ( i < ( sizeof ( desc->low ) /
  551. sizeof ( desc->low[0] ) ) );
  552. /* Populate buffer pointer */
  553. desc->low[i] = cpu_to_le32 ( phys );
  554. if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
  555. desc->high[i] =
  556. cpu_to_le32 ( ((uint64_t) phys) >> 32 );
  557. }
  558. /* Move to next fragment */
  559. data += frag_len;
  560. len -= frag_len;
  561. }
  562. /* Ensure everything is valid before activating descriptor */
  563. wmb();
  564. desc->status = EHCI_STATUS_ACTIVE;
  565. /* Record I/O buffer against last ring index */
  566. if ( --count == 0 )
  567. ring->iobuf[index] = iobuf;
  568. }
  569. return 0;
  570. }
  571. /**
  572. * Dequeue a transfer descriptor
  573. *
  574. * @v ring Transfer descriptor ring
  575. * @ret iobuf I/O buffer (or NULL)
  576. */
  577. static struct io_buffer * ehci_dequeue ( struct ehci_ring *ring ) {
  578. struct ehci_transfer_descriptor *desc;
  579. struct io_buffer *iobuf;
  580. unsigned int index = ( ring->cons % EHCI_RING_COUNT );
  581. /* Sanity check */
  582. assert ( ehci_ring_fill ( ring ) > 0 );
  583. /* Mark descriptor as inactive (and not halted) */
  584. desc = &ring->desc[index];
  585. desc->status = 0;
  586. /* Retrieve I/O buffer */
  587. iobuf = ring->iobuf[index];
  588. ring->iobuf[index] = NULL;
  589. /* Update consumer counter */
  590. ring->cons++;
  591. return iobuf;
  592. }
  593. /******************************************************************************
  594. *
  595. * Schedule management
  596. *
  597. ******************************************************************************
  598. */
  599. /**
  600. * Get link value for a queue head
  601. *
  602. * @v queue Queue head
  603. * @ret link Link value
  604. */
  605. static inline uint32_t ehci_link_qh ( struct ehci_queue_head *queue ) {
  606. return ( virt_to_phys ( queue ) | EHCI_LINK_TYPE_QH );
  607. }
  608. /**
  609. * (Re)build asynchronous schedule
  610. *
  611. * @v ehci EHCI device
  612. */
  613. static void ehci_async_schedule ( struct ehci_device *ehci ) {
  614. struct ehci_endpoint *endpoint;
  615. struct ehci_queue_head *queue;
  616. uint32_t link;
  617. /* Build schedule in reverse order of execution. Provided
  618. * that we only ever add or remove single endpoints, this can
  619. * safely run concurrently with hardware execution of the
  620. * schedule.
  621. */
  622. link = ehci_link_qh ( ehci->head );
  623. list_for_each_entry_reverse ( endpoint, &ehci->async, schedule ) {
  624. queue = endpoint->ring.head;
  625. queue->link = cpu_to_le32 ( link );
  626. wmb();
  627. link = ehci_link_qh ( queue );
  628. }
  629. ehci->head->link = cpu_to_le32 ( link );
  630. wmb();
  631. }
  632. /**
  633. * Add endpoint to asynchronous schedule
  634. *
  635. * @v endpoint Endpoint
  636. */
  637. static void ehci_async_add ( struct ehci_endpoint *endpoint ) {
  638. struct ehci_device *ehci = endpoint->ehci;
  639. /* Add to end of schedule */
  640. list_add_tail ( &endpoint->schedule, &ehci->async );
  641. /* Rebuild schedule */
  642. ehci_async_schedule ( ehci );
  643. }
  644. /**
  645. * Remove endpoint from asynchronous schedule
  646. *
  647. * @v endpoint Endpoint
  648. * @ret rc Return status code
  649. */
  650. static int ehci_async_del ( struct ehci_endpoint *endpoint ) {
  651. struct ehci_device *ehci = endpoint->ehci;
  652. uint32_t usbcmd;
  653. uint32_t usbsts;
  654. unsigned int i;
  655. /* Remove from schedule */
  656. list_check_contains_entry ( endpoint, &ehci->async, schedule );
  657. list_del ( &endpoint->schedule );
  658. /* Rebuild schedule */
  659. ehci_async_schedule ( ehci );
  660. /* Request notification when asynchronous schedule advances */
  661. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  662. usbcmd |= EHCI_USBCMD_ASYNC_ADVANCE;
  663. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  664. /* Wait for asynchronous schedule to advance */
  665. for ( i = 0 ; i < EHCI_ASYNC_ADVANCE_MAX_WAIT_MS ; i++ ) {
  666. /* Check for asynchronous schedule advancing */
  667. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  668. if ( usbsts & EHCI_USBSTS_ASYNC_ADVANCE ) {
  669. usbsts &= ~EHCI_USBSTS_CHANGE;
  670. usbsts |= EHCI_USBSTS_ASYNC_ADVANCE;
  671. writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
  672. return 0;
  673. }
  674. /* Delay */
  675. mdelay ( 1 );
  676. }
  677. /* Bad things will probably happen now */
  678. DBGC ( ehci, "EHCI %s timed out waiting for asynchronous schedule "
  679. "to advance\n", ehci->name );
  680. return -ETIMEDOUT;
  681. }
  682. /**
  683. * (Re)build periodic schedule
  684. *
  685. * @v ehci EHCI device
  686. */
  687. static void ehci_periodic_schedule ( struct ehci_device *ehci ) {
  688. struct ehci_endpoint *endpoint;
  689. struct ehci_queue_head *queue;
  690. uint32_t link;
  691. unsigned int frames;
  692. unsigned int max_interval;
  693. unsigned int i;
  694. /* Build schedule in reverse order of execution. Provided
  695. * that we only ever add or remove single endpoints, this can
  696. * safely run concurrently with hardware execution of the
  697. * schedule.
  698. */
  699. DBGCP ( ehci, "EHCI %s periodic schedule: ", ehci->name );
  700. link = EHCI_LINK_TERMINATE;
  701. list_for_each_entry_reverse ( endpoint, &ehci->periodic, schedule ) {
  702. queue = endpoint->ring.head;
  703. queue->link = cpu_to_le32 ( link );
  704. wmb();
  705. DBGCP ( ehci, "%s%d",
  706. ( ( link == EHCI_LINK_TERMINATE ) ? "" : "<-" ),
  707. endpoint->ep->interval );
  708. link = ehci_link_qh ( queue );
  709. }
  710. DBGCP ( ehci, "\n" );
  711. /* Populate periodic frame list */
  712. DBGCP ( ehci, "EHCI %s periodic frame list:", ehci->name );
  713. frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  714. for ( i = 0 ; i < frames ; i++ ) {
  715. /* Calculate maximum interval (in microframes) which
  716. * may appear as part of this frame list.
  717. */
  718. if ( i == 0 ) {
  719. /* Start of list: include all endpoints */
  720. max_interval = -1U;
  721. } else {
  722. /* Calculate highest power-of-two frame interval */
  723. max_interval = ( 1 << ( ffs ( i ) - 1 ) );
  724. /* Convert to microframes */
  725. max_interval <<= 3;
  726. /* Round up to nearest 2^n-1 */
  727. max_interval = ( ( max_interval << 1 ) - 1 );
  728. }
  729. /* Find first endpoint in schedule satisfying this
  730. * maximum interval constraint.
  731. */
  732. link = EHCI_LINK_TERMINATE;
  733. list_for_each_entry ( endpoint, &ehci->periodic, schedule ) {
  734. if ( endpoint->ep->interval <= max_interval ) {
  735. queue = endpoint->ring.head;
  736. link = ehci_link_qh ( queue );
  737. DBGCP ( ehci, " %d:%d",
  738. i, endpoint->ep->interval );
  739. break;
  740. }
  741. }
  742. ehci->frame[i].link = cpu_to_le32 ( link );
  743. }
  744. wmb();
  745. DBGCP ( ehci, "\n" );
  746. }
  747. /**
  748. * Add endpoint to periodic schedule
  749. *
  750. * @v endpoint Endpoint
  751. */
  752. static void ehci_periodic_add ( struct ehci_endpoint *endpoint ) {
  753. struct ehci_device *ehci = endpoint->ehci;
  754. struct ehci_endpoint *before;
  755. unsigned int interval = endpoint->ep->interval;
  756. /* Find first endpoint with a smaller interval */
  757. list_for_each_entry ( before, &ehci->periodic, schedule ) {
  758. if ( before->ep->interval < interval )
  759. break;
  760. }
  761. list_add_tail ( &endpoint->schedule, &before->schedule );
  762. /* Rebuild schedule */
  763. ehci_periodic_schedule ( ehci );
  764. }
  765. /**
  766. * Remove endpoint from periodic schedule
  767. *
  768. * @v endpoint Endpoint
  769. * @ret rc Return status code
  770. */
  771. static int ehci_periodic_del ( struct ehci_endpoint *endpoint ) {
  772. struct ehci_device *ehci = endpoint->ehci;
  773. /* Remove from schedule */
  774. list_check_contains_entry ( endpoint, &ehci->periodic, schedule );
  775. list_del ( &endpoint->schedule );
  776. /* Rebuild schedule */
  777. ehci_periodic_schedule ( ehci );
  778. /* Delay for a whole USB frame (with a 100% safety margin) */
  779. mdelay ( 2 );
  780. return 0;
  781. }
  782. /**
  783. * Add endpoint to appropriate schedule
  784. *
  785. * @v endpoint Endpoint
  786. */
  787. static void ehci_schedule_add ( struct ehci_endpoint *endpoint ) {
  788. struct usb_endpoint *ep = endpoint->ep;
  789. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  790. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  791. ehci_periodic_add ( endpoint );
  792. } else {
  793. ehci_async_add ( endpoint );
  794. }
  795. }
  796. /**
  797. * Remove endpoint from appropriate schedule
  798. *
  799. * @v endpoint Endpoint
  800. * @ret rc Return status code
  801. */
  802. static int ehci_schedule_del ( struct ehci_endpoint *endpoint ) {
  803. struct usb_endpoint *ep = endpoint->ep;
  804. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  805. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  806. return ehci_periodic_del ( endpoint );
  807. } else {
  808. return ehci_async_del ( endpoint );
  809. }
  810. }
  811. /******************************************************************************
  812. *
  813. * Endpoint operations
  814. *
  815. ******************************************************************************
  816. */
  817. /**
  818. * Determine endpoint characteristics
  819. *
  820. * @v ep USB endpoint
  821. * @ret chr Endpoint characteristics
  822. */
  823. static uint32_t ehci_endpoint_characteristics ( struct usb_endpoint *ep ) {
  824. struct usb_device *usb = ep->usb;
  825. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  826. uint32_t chr;
  827. /* Determine basic characteristics */
  828. chr = ( EHCI_CHR_ADDRESS ( usb->address ) |
  829. EHCI_CHR_ENDPOINT ( ep->address ) |
  830. EHCI_CHR_MAX_LEN ( ep->mtu ) );
  831. /* Control endpoints require manual control of the data toggle */
  832. if ( attr == USB_ENDPOINT_ATTR_CONTROL )
  833. chr |= EHCI_CHR_TOGGLE;
  834. /* Determine endpoint speed */
  835. if ( usb->speed == USB_SPEED_HIGH ) {
  836. chr |= EHCI_CHR_EPS_HIGH;
  837. } else {
  838. if ( usb->speed == USB_SPEED_FULL ) {
  839. chr |= EHCI_CHR_EPS_FULL;
  840. } else {
  841. chr |= EHCI_CHR_EPS_LOW;
  842. }
  843. if ( attr == USB_ENDPOINT_ATTR_CONTROL )
  844. chr |= EHCI_CHR_CONTROL;
  845. }
  846. return chr;
  847. }
  848. /**
  849. * Determine endpoint capabilities
  850. *
  851. * @v ep USB endpoint
  852. * @ret cap Endpoint capabilities
  853. */
  854. static uint32_t ehci_endpoint_capabilities ( struct usb_endpoint *ep ) {
  855. struct usb_device *usb = ep->usb;
  856. struct usb_port *tt = usb_transaction_translator ( usb );
  857. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  858. uint32_t cap;
  859. unsigned int i;
  860. /* Determine basic capabilities */
  861. cap = EHCI_CAP_MULT ( ep->burst + 1 );
  862. /* Determine interrupt schedule mask, if applicable */
  863. if ( ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) &&
  864. ( ( ep->interval != 0 ) /* avoid infinite loop */ ) ) {
  865. for ( i = 0 ; i < 8 /* microframes per frame */ ;
  866. i += ep->interval ) {
  867. cap |= EHCI_CAP_INTR_SCHED ( i );
  868. }
  869. }
  870. /* Set transaction translator hub address and port, if applicable */
  871. if ( tt ) {
  872. assert ( tt->hub->usb );
  873. cap |= ( EHCI_CAP_TT_HUB ( tt->hub->usb->address ) |
  874. EHCI_CAP_TT_PORT ( tt->address ) );
  875. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT )
  876. cap |= EHCI_CAP_SPLIT_SCHED_DEFAULT;
  877. }
  878. return cap;
  879. }
  880. /**
  881. * Update endpoint characteristics and capabilities
  882. *
  883. * @v ep USB endpoint
  884. */
  885. static void ehci_endpoint_update ( struct usb_endpoint *ep ) {
  886. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  887. struct ehci_queue_head *head;
  888. /* Update queue characteristics and capabilities */
  889. head = endpoint->ring.head;
  890. head->chr = cpu_to_le32 ( ehci_endpoint_characteristics ( ep ) );
  891. head->cap = cpu_to_le32 ( ehci_endpoint_capabilities ( ep ) );
  892. }
  893. /**
  894. * Open endpoint
  895. *
  896. * @v ep USB endpoint
  897. * @ret rc Return status code
  898. */
  899. static int ehci_endpoint_open ( struct usb_endpoint *ep ) {
  900. struct usb_device *usb = ep->usb;
  901. struct ehci_device *ehci = usb_get_hostdata ( usb );
  902. struct ehci_endpoint *endpoint;
  903. int rc;
  904. /* Allocate and initialise structure */
  905. endpoint = zalloc ( sizeof ( *endpoint ) );
  906. if ( ! endpoint ) {
  907. rc = -ENOMEM;
  908. goto err_alloc;
  909. }
  910. endpoint->ehci = ehci;
  911. endpoint->ep = ep;
  912. usb_endpoint_set_hostdata ( ep, endpoint );
  913. /* Initialise descriptor ring */
  914. if ( ( rc = ehci_ring_alloc ( ehci, &endpoint->ring ) ) != 0 )
  915. goto err_ring_alloc;
  916. /* Update queue characteristics and capabilities */
  917. ehci_endpoint_update ( ep );
  918. /* Add to list of endpoints */
  919. list_add_tail ( &endpoint->list, &ehci->endpoints );
  920. /* Add to schedule */
  921. ehci_schedule_add ( endpoint );
  922. return 0;
  923. ehci_ring_free ( &endpoint->ring );
  924. err_ring_alloc:
  925. free ( endpoint );
  926. err_alloc:
  927. return rc;
  928. }
  929. /**
  930. * Close endpoint
  931. *
  932. * @v ep USB endpoint
  933. */
  934. static void ehci_endpoint_close ( struct usb_endpoint *ep ) {
  935. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  936. struct ehci_device *ehci = endpoint->ehci;
  937. struct usb_device *usb = ep->usb;
  938. struct io_buffer *iobuf;
  939. int rc;
  940. /* Remove from schedule */
  941. if ( ( rc = ehci_schedule_del ( endpoint ) ) != 0 ) {
  942. /* No way to prevent hardware from continuing to
  943. * access the memory, so leak it.
  944. */
  945. DBGC ( ehci, "EHCI %s %s could not unschedule: %s\n",
  946. usb->name, usb_endpoint_name ( ep ), strerror ( rc ) );
  947. return;
  948. }
  949. /* Cancel any incomplete transfers */
  950. while ( ehci_ring_fill ( &endpoint->ring ) ) {
  951. iobuf = ehci_dequeue ( &endpoint->ring );
  952. if ( iobuf )
  953. usb_complete_err ( ep, iobuf, -ECANCELED );
  954. }
  955. /* Remove from list of endpoints */
  956. list_del ( &endpoint->list );
  957. /* Free descriptor ring */
  958. ehci_ring_free ( &endpoint->ring );
  959. /* Free endpoint */
  960. free ( endpoint );
  961. }
  962. /**
  963. * Reset endpoint
  964. *
  965. * @v ep USB endpoint
  966. * @ret rc Return status code
  967. */
  968. static int ehci_endpoint_reset ( struct usb_endpoint *ep ) {
  969. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  970. struct ehci_ring *ring = &endpoint->ring;
  971. struct ehci_transfer_descriptor *cache = &ring->head->cache;
  972. uint32_t link;
  973. /* Sanity checks */
  974. assert ( ! ( cache->status & EHCI_STATUS_ACTIVE ) );
  975. assert ( cache->status & EHCI_STATUS_HALTED );
  976. /* Reset residual count */
  977. ring->residual = 0;
  978. /* Reset data toggle */
  979. cache->len = 0;
  980. /* Prepare to restart at next unconsumed descriptor */
  981. link = virt_to_phys ( &ring->desc[ ring->cons % EHCI_RING_COUNT ] );
  982. cache->next = cpu_to_le32 ( link );
  983. /* Restart ring */
  984. wmb();
  985. cache->status = 0;
  986. return 0;
  987. }
  988. /**
  989. * Update MTU
  990. *
  991. * @v ep USB endpoint
  992. * @ret rc Return status code
  993. */
  994. static int ehci_endpoint_mtu ( struct usb_endpoint *ep ) {
  995. /* Update endpoint characteristics and capabilities */
  996. ehci_endpoint_update ( ep );
  997. return 0;
  998. }
  999. /**
  1000. * Enqueue message transfer
  1001. *
  1002. * @v ep USB endpoint
  1003. * @v iobuf I/O buffer
  1004. * @ret rc Return status code
  1005. */
  1006. static int ehci_endpoint_message ( struct usb_endpoint *ep,
  1007. struct io_buffer *iobuf ) {
  1008. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  1009. struct ehci_device *ehci = endpoint->ehci;
  1010. struct usb_setup_packet *packet;
  1011. unsigned int input;
  1012. struct ehci_transfer xfers[3];
  1013. struct ehci_transfer *xfer = xfers;
  1014. size_t len;
  1015. int rc;
  1016. /* Construct setup stage */
  1017. assert ( iob_len ( iobuf ) >= sizeof ( *packet ) );
  1018. packet = iobuf->data;
  1019. iob_pull ( iobuf, sizeof ( *packet ) );
  1020. xfer->data = packet;
  1021. xfer->len = sizeof ( *packet );
  1022. xfer->flags = EHCI_FL_PID_SETUP;
  1023. xfer++;
  1024. /* Construct data stage, if applicable */
  1025. len = iob_len ( iobuf );
  1026. input = ( packet->request & cpu_to_le16 ( USB_DIR_IN ) );
  1027. if ( len ) {
  1028. xfer->data = iobuf->data;
  1029. xfer->len = len;
  1030. xfer->flags = ( EHCI_FL_TOGGLE |
  1031. ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
  1032. xfer++;
  1033. }
  1034. /* Construct status stage */
  1035. xfer->data = NULL;
  1036. xfer->len = 0;
  1037. xfer->flags = ( EHCI_FL_TOGGLE | EHCI_FL_IOC |
  1038. ( ( len && input ) ? EHCI_FL_PID_OUT : EHCI_FL_PID_IN));
  1039. xfer++;
  1040. /* Enqueue transfer */
  1041. if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
  1042. ( xfer - xfers ) ) ) != 0 )
  1043. return rc;
  1044. return 0;
  1045. }
  1046. /**
  1047. * Calculate number of transfer descriptors
  1048. *
  1049. * @v len Length of data
  1050. * @v zlp Append a zero-length packet
  1051. * @ret count Number of transfer descriptors
  1052. */
  1053. static unsigned int ehci_endpoint_count ( size_t len, int zlp ) {
  1054. unsigned int count;
  1055. /* Split into 16kB transfers. A single transfer can handle up
  1056. * to 20kB if it happens to be page-aligned, or up to 16kB
  1057. * with arbitrary alignment. We simplify the code by assuming
  1058. * that we can fit only 16kB into each transfer.
  1059. */
  1060. count = ( ( len + EHCI_MTU - 1 ) / EHCI_MTU );
  1061. /* Append a zero-length transfer if applicable */
  1062. if ( zlp || ( count == 0 ) )
  1063. count++;
  1064. return count;
  1065. }
  1066. /**
  1067. * Enqueue stream transfer
  1068. *
  1069. * @v ep USB endpoint
  1070. * @v iobuf I/O buffer
  1071. * @v zlp Append a zero-length packet
  1072. * @ret rc Return status code
  1073. */
  1074. static int ehci_endpoint_stream ( struct usb_endpoint *ep,
  1075. struct io_buffer *iobuf, int zlp ) {
  1076. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  1077. struct ehci_device *ehci = endpoint->ehci;
  1078. void *data = iobuf->data;
  1079. size_t len = iob_len ( iobuf );
  1080. unsigned int count = ehci_endpoint_count ( len, zlp );
  1081. unsigned int input = ( ep->address & USB_DIR_IN );
  1082. unsigned int flags = ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT );
  1083. struct ehci_transfer xfers[count];
  1084. struct ehci_transfer *xfer = xfers;
  1085. size_t xfer_len;
  1086. unsigned int i;
  1087. int rc;
  1088. /* Create transfers */
  1089. for ( i = 0 ; i < count ; i++ ) {
  1090. /* Calculate transfer length */
  1091. xfer_len = EHCI_MTU;
  1092. if ( xfer_len > len )
  1093. xfer_len = len;
  1094. /* Create transfer */
  1095. xfer->data = data;
  1096. xfer->len = xfer_len;
  1097. xfer->flags = flags;
  1098. /* Move to next transfer */
  1099. data += xfer_len;
  1100. len -= xfer_len;
  1101. xfer++;
  1102. }
  1103. xfer[-1].flags |= EHCI_FL_IOC;
  1104. /* Enqueue transfer */
  1105. if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
  1106. count ) ) != 0 )
  1107. return rc;
  1108. return 0;
  1109. }
  1110. /**
  1111. * Poll for completions
  1112. *
  1113. * @v endpoint Endpoint
  1114. */
  1115. static void ehci_endpoint_poll ( struct ehci_endpoint *endpoint ) {
  1116. struct ehci_device *ehci = endpoint->ehci;
  1117. struct ehci_ring *ring = &endpoint->ring;
  1118. struct ehci_transfer_descriptor *desc;
  1119. struct usb_endpoint *ep = endpoint->ep;
  1120. struct usb_device *usb = ep->usb;
  1121. struct io_buffer *iobuf;
  1122. unsigned int index;
  1123. unsigned int status;
  1124. int rc;
  1125. /* Consume all completed descriptors */
  1126. while ( ehci_ring_fill ( &endpoint->ring ) ) {
  1127. /* Stop if we reach an uncompleted descriptor */
  1128. rmb();
  1129. index = ( ring->cons % EHCI_RING_COUNT );
  1130. desc = &ring->desc[index];
  1131. status = desc->status;
  1132. if ( status & EHCI_STATUS_ACTIVE )
  1133. break;
  1134. /* Consume this descriptor */
  1135. iobuf = ehci_dequeue ( ring );
  1136. /* If we have encountered an error, then consume all
  1137. * remaining descriptors in this transaction, report
  1138. * the error to the USB core, and stop further
  1139. * processing.
  1140. */
  1141. if ( status & EHCI_STATUS_HALTED ) {
  1142. rc = -EIO_STATUS ( status );
  1143. DBGC ( ehci, "EHCI %s %s completion %d failed (status "
  1144. "%02x): %s\n", usb->name,
  1145. usb_endpoint_name ( ep ), index, status,
  1146. strerror ( rc ) );
  1147. while ( ! iobuf )
  1148. iobuf = ehci_dequeue ( ring );
  1149. usb_complete_err ( endpoint->ep, iobuf, rc );
  1150. return;
  1151. }
  1152. /* Accumulate residual data count */
  1153. ring->residual += ( le16_to_cpu ( desc->len ) & EHCI_LEN_MASK );
  1154. /* If this is not the end of a transaction (i.e. has
  1155. * no I/O buffer), then continue to next descriptor.
  1156. */
  1157. if ( ! iobuf )
  1158. continue;
  1159. /* Update I/O buffer length */
  1160. iob_unput ( iobuf, ring->residual );
  1161. ring->residual = 0;
  1162. /* Report completion to USB core */
  1163. usb_complete ( endpoint->ep, iobuf );
  1164. }
  1165. }
  1166. /******************************************************************************
  1167. *
  1168. * Device operations
  1169. *
  1170. ******************************************************************************
  1171. */
  1172. /**
  1173. * Open device
  1174. *
  1175. * @v usb USB device
  1176. * @ret rc Return status code
  1177. */
  1178. static int ehci_device_open ( struct usb_device *usb ) {
  1179. struct ehci_device *ehci = usb_bus_get_hostdata ( usb->port->hub->bus );
  1180. usb_set_hostdata ( usb, ehci );
  1181. return 0;
  1182. }
  1183. /**
  1184. * Close device
  1185. *
  1186. * @v usb USB device
  1187. */
  1188. static void ehci_device_close ( struct usb_device *usb ) {
  1189. struct ehci_device *ehci = usb_get_hostdata ( usb );
  1190. struct usb_bus *bus = ehci->bus;
  1191. /* Free device address, if assigned */
  1192. if ( usb->address )
  1193. usb_free_address ( bus, usb->address );
  1194. }
  1195. /**
  1196. * Assign device address
  1197. *
  1198. * @v usb USB device
  1199. * @ret rc Return status code
  1200. */
  1201. static int ehci_device_address ( struct usb_device *usb ) {
  1202. struct ehci_device *ehci = usb_get_hostdata ( usb );
  1203. struct usb_bus *bus = ehci->bus;
  1204. struct usb_endpoint *ep0 = usb_endpoint ( usb, USB_EP0_ADDRESS );
  1205. int address;
  1206. int rc;
  1207. /* Sanity checks */
  1208. assert ( usb->address == 0 );
  1209. assert ( ep0 != NULL );
  1210. /* Allocate device address */
  1211. address = usb_alloc_address ( bus );
  1212. if ( address < 0 ) {
  1213. rc = address;
  1214. DBGC ( ehci, "EHCI %s could not allocate address: %s\n",
  1215. usb->name, strerror ( rc ) );
  1216. goto err_alloc_address;
  1217. }
  1218. /* Set address */
  1219. if ( ( rc = usb_set_address ( usb, address ) ) != 0 )
  1220. goto err_set_address;
  1221. /* Update device address */
  1222. usb->address = address;
  1223. /* Update control endpoint characteristics and capabilities */
  1224. ehci_endpoint_update ( ep0 );
  1225. return 0;
  1226. err_set_address:
  1227. usb_free_address ( bus, address );
  1228. err_alloc_address:
  1229. return rc;
  1230. }
  1231. /******************************************************************************
  1232. *
  1233. * Hub operations
  1234. *
  1235. ******************************************************************************
  1236. */
  1237. /**
  1238. * Open hub
  1239. *
  1240. * @v hub USB hub
  1241. * @ret rc Return status code
  1242. */
  1243. static int ehci_hub_open ( struct usb_hub *hub __unused ) {
  1244. /* Nothing to do */
  1245. return 0;
  1246. }
  1247. /**
  1248. * Close hub
  1249. *
  1250. * @v hub USB hub
  1251. */
  1252. static void ehci_hub_close ( struct usb_hub *hub __unused ) {
  1253. /* Nothing to do */
  1254. }
  1255. /******************************************************************************
  1256. *
  1257. * Root hub operations
  1258. *
  1259. ******************************************************************************
  1260. */
  1261. /**
  1262. * Open root hub
  1263. *
  1264. * @v hub USB hub
  1265. * @ret rc Return status code
  1266. */
  1267. static int ehci_root_open ( struct usb_hub *hub ) {
  1268. struct usb_bus *bus = hub->bus;
  1269. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1270. uint32_t portsc;
  1271. unsigned int i;
  1272. /* Route all ports to EHCI controller */
  1273. writel ( EHCI_CONFIGFLAG_CF, ehci->op + EHCI_OP_CONFIGFLAG );
  1274. /* Enable power to all ports */
  1275. for ( i = 1 ; i <= ehci->ports ; i++ ) {
  1276. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( i ) );
  1277. portsc &= ~EHCI_PORTSC_CHANGE;
  1278. portsc |= EHCI_PORTSC_PP;
  1279. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( i ) );
  1280. }
  1281. /* Wait 20ms after potentially enabling power to a port */
  1282. mdelay ( EHCI_PORT_POWER_DELAY_MS );
  1283. /* Record hub driver private data */
  1284. usb_hub_set_drvdata ( hub, ehci );
  1285. return 0;
  1286. }
  1287. /**
  1288. * Close root hub
  1289. *
  1290. * @v hub USB hub
  1291. */
  1292. static void ehci_root_close ( struct usb_hub *hub ) {
  1293. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1294. /* Route all ports back to companion controllers */
  1295. writel ( 0, ehci->op + EHCI_OP_CONFIGFLAG );
  1296. /* Clear hub driver private data */
  1297. usb_hub_set_drvdata ( hub, NULL );
  1298. }
  1299. /**
  1300. * Enable port
  1301. *
  1302. * @v hub USB hub
  1303. * @v port USB port
  1304. * @ret rc Return status code
  1305. */
  1306. static int ehci_root_enable ( struct usb_hub *hub, struct usb_port *port ) {
  1307. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1308. uint32_t portsc;
  1309. unsigned int line;
  1310. unsigned int i;
  1311. /* Check for a low-speed device */
  1312. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1313. line = EHCI_PORTSC_LINE_STATUS ( portsc );
  1314. if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
  1315. DBGC ( ehci, "EHCI %s-%d detected low-speed device: "
  1316. "disowning\n", ehci->name, port->address );
  1317. goto disown;
  1318. }
  1319. /* Reset port */
  1320. portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
  1321. portsc |= EHCI_PORTSC_PR;
  1322. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1323. mdelay ( USB_RESET_DELAY_MS );
  1324. portsc &= ~EHCI_PORTSC_PR;
  1325. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1326. /* Wait for reset to complete */
  1327. for ( i = 0 ; i < EHCI_PORT_RESET_MAX_WAIT_MS ; i++ ) {
  1328. /* Check port status */
  1329. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1330. if ( ! ( portsc & EHCI_PORTSC_PR ) ) {
  1331. if ( portsc & EHCI_PORTSC_PED )
  1332. return 0;
  1333. DBGC ( ehci, "EHCI %s-%d not enabled after reset: "
  1334. "disowning\n", ehci->name, port->address );
  1335. goto disown;
  1336. }
  1337. /* Delay */
  1338. mdelay ( 1 );
  1339. }
  1340. DBGC ( ehci, "EHCI %s-%d timed out waiting for port to reset\n",
  1341. ehci->name, port->address );
  1342. return -ETIMEDOUT;
  1343. disown:
  1344. /* Disown port */
  1345. portsc &= ~EHCI_PORTSC_CHANGE;
  1346. portsc |= EHCI_PORTSC_OWNER;
  1347. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1348. /* Delay to allow child companion controllers to settle */
  1349. mdelay ( EHCI_DISOWN_DELAY_MS );
  1350. /* Poll child companion controllers */
  1351. ehci_poll_companions ( ehci );
  1352. return -ENODEV;
  1353. }
  1354. /**
  1355. * Disable port
  1356. *
  1357. * @v hub USB hub
  1358. * @v port USB port
  1359. * @ret rc Return status code
  1360. */
  1361. static int ehci_root_disable ( struct usb_hub *hub, struct usb_port *port ) {
  1362. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1363. uint32_t portsc;
  1364. /* Disable port */
  1365. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1366. portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
  1367. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1368. return 0;
  1369. }
  1370. /**
  1371. * Update root hub port speed
  1372. *
  1373. * @v hub USB hub
  1374. * @v port USB port
  1375. * @ret rc Return status code
  1376. */
  1377. static int ehci_root_speed ( struct usb_hub *hub, struct usb_port *port ) {
  1378. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1379. uint32_t portsc;
  1380. unsigned int speed;
  1381. unsigned int line;
  1382. int ccs;
  1383. int csc;
  1384. int ped;
  1385. /* Read port status */
  1386. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1387. DBGC2 ( ehci, "EHCI %s-%d status is %08x\n",
  1388. ehci->name, port->address, portsc );
  1389. ccs = ( portsc & EHCI_PORTSC_CCS );
  1390. csc = ( portsc & EHCI_PORTSC_CSC );
  1391. ped = ( portsc & EHCI_PORTSC_PED );
  1392. line = EHCI_PORTSC_LINE_STATUS ( portsc );
  1393. /* Record disconnections and clear changes */
  1394. port->disconnected |= csc;
  1395. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1396. /* Determine port speed */
  1397. if ( ! ccs ) {
  1398. /* Port not connected */
  1399. speed = USB_SPEED_NONE;
  1400. } else if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
  1401. /* Detected as low-speed */
  1402. speed = USB_SPEED_LOW;
  1403. } else if ( ped ) {
  1404. /* Port already enabled: must be high-speed */
  1405. speed = USB_SPEED_HIGH;
  1406. } else {
  1407. /* Not low-speed and not yet enabled. Could be either
  1408. * full-speed or high-speed; we can't yet tell.
  1409. */
  1410. speed = USB_SPEED_FULL;
  1411. }
  1412. port->speed = speed;
  1413. return 0;
  1414. }
  1415. /**
  1416. * Clear transaction translator buffer
  1417. *
  1418. * @v hub USB hub
  1419. * @v port USB port
  1420. * @v ep USB endpoint
  1421. * @ret rc Return status code
  1422. */
  1423. static int ehci_root_clear_tt ( struct usb_hub *hub, struct usb_port *port,
  1424. struct usb_endpoint *ep ) {
  1425. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1426. /* Should never be called; this is a root hub */
  1427. DBGC ( ehci, "EHCI %s-%d nonsensical CLEAR_TT for %s %s\n", ehci->name,
  1428. port->address, ep->usb->name, usb_endpoint_name ( ep ) );
  1429. return -ENOTSUP;
  1430. }
  1431. /**
  1432. * Poll for port status changes
  1433. *
  1434. * @v hub USB hub
  1435. * @v port USB port
  1436. */
  1437. static void ehci_root_poll ( struct usb_hub *hub, struct usb_port *port ) {
  1438. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1439. uint32_t portsc;
  1440. uint32_t change;
  1441. /* Do nothing unless something has changed */
  1442. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1443. change = ( portsc & EHCI_PORTSC_CHANGE );
  1444. if ( ! change )
  1445. return;
  1446. /* Record disconnections and clear changes */
  1447. port->disconnected |= ( portsc & EHCI_PORTSC_CSC );
  1448. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1449. /* Report port status change */
  1450. usb_port_changed ( port );
  1451. }
  1452. /******************************************************************************
  1453. *
  1454. * Bus operations
  1455. *
  1456. ******************************************************************************
  1457. */
  1458. /**
  1459. * Open USB bus
  1460. *
  1461. * @v bus USB bus
  1462. * @ret rc Return status code
  1463. */
  1464. static int ehci_bus_open ( struct usb_bus *bus ) {
  1465. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1466. unsigned int frames;
  1467. size_t len;
  1468. int rc;
  1469. /* Sanity checks */
  1470. assert ( list_empty ( &ehci->async ) );
  1471. assert ( list_empty ( &ehci->periodic ) );
  1472. /* Allocate and initialise asynchronous queue head */
  1473. ehci->head = malloc_dma ( sizeof ( *ehci->head ),
  1474. ehci_align ( sizeof ( *ehci->head ) ) );
  1475. if ( ! ehci->head ) {
  1476. rc = -ENOMEM;
  1477. goto err_alloc_head;
  1478. }
  1479. memset ( ehci->head, 0, sizeof ( *ehci->head ) );
  1480. ehci->head->chr = cpu_to_le32 ( EHCI_CHR_HEAD );
  1481. ehci->head->cache.next = cpu_to_le32 ( EHCI_LINK_TERMINATE );
  1482. ehci->head->cache.status = EHCI_STATUS_HALTED;
  1483. ehci_async_schedule ( ehci );
  1484. writel ( virt_to_phys ( ehci->head ),
  1485. ehci->op + EHCI_OP_ASYNCLISTADDR );
  1486. /* Use async queue head to determine control data structure segment */
  1487. ehci->ctrldssegment =
  1488. ( ( ( uint64_t ) virt_to_phys ( ehci->head ) ) >> 32 );
  1489. if ( ehci->addr64 ) {
  1490. writel ( ehci->ctrldssegment, ehci->op + EHCI_OP_CTRLDSSEGMENT);
  1491. } else if ( ehci->ctrldssegment ) {
  1492. DBGC ( ehci, "EHCI %s CTRLDSSEGMENT not supported\n",
  1493. ehci->name );
  1494. rc = -ENOTSUP;
  1495. goto err_ctrldssegment;
  1496. }
  1497. /* Allocate periodic frame list */
  1498. frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  1499. len = ( frames * sizeof ( ehci->frame[0] ) );
  1500. ehci->frame = malloc_dma ( len, EHCI_PAGE_ALIGN );
  1501. if ( ! ehci->frame ) {
  1502. rc = -ENOMEM;
  1503. goto err_alloc_frame;
  1504. }
  1505. if ( ( rc = ehci_ctrl_reachable ( ehci, ehci->frame ) ) != 0 ) {
  1506. DBGC ( ehci, "EHCI %s frame list unreachable\n", ehci->name );
  1507. goto err_unreachable_frame;
  1508. }
  1509. ehci_periodic_schedule ( ehci );
  1510. writel ( virt_to_phys ( ehci->frame ),
  1511. ehci->op + EHCI_OP_PERIODICLISTBASE );
  1512. /* Start controller */
  1513. ehci_run ( ehci );
  1514. return 0;
  1515. ehci_stop ( ehci );
  1516. err_unreachable_frame:
  1517. free_dma ( ehci->frame, len );
  1518. err_alloc_frame:
  1519. err_ctrldssegment:
  1520. free_dma ( ehci->head, sizeof ( *ehci->head ) );
  1521. err_alloc_head:
  1522. return rc;
  1523. }
  1524. /**
  1525. * Close USB bus
  1526. *
  1527. * @v bus USB bus
  1528. */
  1529. static void ehci_bus_close ( struct usb_bus *bus ) {
  1530. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1531. unsigned int frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  1532. /* Sanity checks */
  1533. assert ( list_empty ( &ehci->async ) );
  1534. assert ( list_empty ( &ehci->periodic ) );
  1535. /* Stop controller */
  1536. ehci_stop ( ehci );
  1537. /* Free periodic frame list */
  1538. free_dma ( ehci->frame, ( frames * sizeof ( ehci->frame[0] ) ) );
  1539. /* Free asynchronous schedule */
  1540. free_dma ( ehci->head, sizeof ( *ehci->head ) );
  1541. }
  1542. /**
  1543. * Poll USB bus
  1544. *
  1545. * @v bus USB bus
  1546. */
  1547. static void ehci_bus_poll ( struct usb_bus *bus ) {
  1548. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1549. struct usb_hub *hub = bus->hub;
  1550. struct ehci_endpoint *endpoint;
  1551. unsigned int i;
  1552. uint32_t usbsts;
  1553. uint32_t change;
  1554. /* Do nothing unless something has changed */
  1555. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  1556. assert ( usbsts & EHCI_USBSTS_ASYNC );
  1557. assert ( usbsts & EHCI_USBSTS_PERIODIC );
  1558. assert ( ! ( usbsts & EHCI_USBSTS_HCH ) );
  1559. change = ( usbsts & EHCI_USBSTS_CHANGE );
  1560. if ( ! change )
  1561. return;
  1562. /* Acknowledge changes */
  1563. writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
  1564. /* Process completions, if applicable */
  1565. if ( change & ( EHCI_USBSTS_USBINT | EHCI_USBSTS_USBERRINT ) ) {
  1566. /* Iterate over all endpoints looking for completed
  1567. * descriptors. We trust that completion handlers are
  1568. * minimal and will not do anything that could
  1569. * plausibly affect the endpoint list itself.
  1570. */
  1571. list_for_each_entry ( endpoint, &ehci->endpoints, list )
  1572. ehci_endpoint_poll ( endpoint );
  1573. }
  1574. /* Process port status changes, if applicable */
  1575. if ( change & EHCI_USBSTS_PORT ) {
  1576. /* Iterate over all ports looking for status changes */
  1577. for ( i = 1 ; i <= ehci->ports ; i++ )
  1578. ehci_root_poll ( hub, usb_port ( hub, i ) );
  1579. }
  1580. /* Report fatal errors */
  1581. if ( change & EHCI_USBSTS_SYSERR )
  1582. DBGC ( ehci, "EHCI %s host system error\n", ehci->name );
  1583. }
  1584. /******************************************************************************
  1585. *
  1586. * PCI interface
  1587. *
  1588. ******************************************************************************
  1589. */
  1590. /** USB host controller operations */
  1591. static struct usb_host_operations ehci_operations = {
  1592. .endpoint = {
  1593. .open = ehci_endpoint_open,
  1594. .close = ehci_endpoint_close,
  1595. .reset = ehci_endpoint_reset,
  1596. .mtu = ehci_endpoint_mtu,
  1597. .message = ehci_endpoint_message,
  1598. .stream = ehci_endpoint_stream,
  1599. },
  1600. .device = {
  1601. .open = ehci_device_open,
  1602. .close = ehci_device_close,
  1603. .address = ehci_device_address,
  1604. },
  1605. .bus = {
  1606. .open = ehci_bus_open,
  1607. .close = ehci_bus_close,
  1608. .poll = ehci_bus_poll,
  1609. },
  1610. .hub = {
  1611. .open = ehci_hub_open,
  1612. .close = ehci_hub_close,
  1613. },
  1614. .root = {
  1615. .open = ehci_root_open,
  1616. .close = ehci_root_close,
  1617. .enable = ehci_root_enable,
  1618. .disable = ehci_root_disable,
  1619. .speed = ehci_root_speed,
  1620. .clear_tt = ehci_root_clear_tt,
  1621. },
  1622. };
  1623. /**
  1624. * Probe PCI device
  1625. *
  1626. * @v pci PCI device
  1627. * @ret rc Return status code
  1628. */
  1629. static int ehci_probe ( struct pci_device *pci ) {
  1630. struct ehci_device *ehci;
  1631. struct usb_port *port;
  1632. unsigned long bar_start;
  1633. size_t bar_size;
  1634. unsigned int i;
  1635. int rc;
  1636. /* Allocate and initialise structure */
  1637. ehci = zalloc ( sizeof ( *ehci ) );
  1638. if ( ! ehci ) {
  1639. rc = -ENOMEM;
  1640. goto err_alloc;
  1641. }
  1642. ehci->name = pci->dev.name;
  1643. INIT_LIST_HEAD ( &ehci->endpoints );
  1644. INIT_LIST_HEAD ( &ehci->async );
  1645. INIT_LIST_HEAD ( &ehci->periodic );
  1646. /* Fix up PCI device */
  1647. adjust_pci_device ( pci );
  1648. /* Map registers */
  1649. bar_start = pci_bar_start ( pci, EHCI_BAR );
  1650. bar_size = pci_bar_size ( pci, EHCI_BAR );
  1651. ehci->regs = ioremap ( bar_start, bar_size );
  1652. if ( ! ehci->regs ) {
  1653. rc = -ENODEV;
  1654. goto err_ioremap;
  1655. }
  1656. /* Initialise EHCI device */
  1657. ehci_init ( ehci, ehci->regs );
  1658. /* Initialise USB legacy support and claim ownership */
  1659. ehci_legacy_init ( ehci, pci );
  1660. ehci_legacy_claim ( ehci, pci );
  1661. /* Reset device */
  1662. if ( ( rc = ehci_reset ( ehci ) ) != 0 )
  1663. goto err_reset;
  1664. /* Allocate USB bus */
  1665. ehci->bus = alloc_usb_bus ( &pci->dev, ehci->ports, EHCI_MTU,
  1666. &ehci_operations );
  1667. if ( ! ehci->bus ) {
  1668. rc = -ENOMEM;
  1669. goto err_alloc_bus;
  1670. }
  1671. usb_bus_set_hostdata ( ehci->bus, ehci );
  1672. usb_hub_set_drvdata ( ehci->bus->hub, ehci );
  1673. /* Set port protocols */
  1674. for ( i = 1 ; i <= ehci->ports ; i++ ) {
  1675. port = usb_port ( ehci->bus->hub, i );
  1676. port->protocol = USB_PROTO_2_0;
  1677. }
  1678. /* Register USB bus */
  1679. if ( ( rc = register_usb_bus ( ehci->bus ) ) != 0 )
  1680. goto err_register;
  1681. pci_set_drvdata ( pci, ehci );
  1682. return 0;
  1683. unregister_usb_bus ( ehci->bus );
  1684. err_register:
  1685. free_usb_bus ( ehci->bus );
  1686. err_alloc_bus:
  1687. ehci_reset ( ehci );
  1688. err_reset:
  1689. ehci_legacy_release ( ehci, pci );
  1690. iounmap ( ehci->regs );
  1691. err_ioremap:
  1692. free ( ehci );
  1693. err_alloc:
  1694. return rc;
  1695. }
  1696. /**
  1697. * Remove PCI device
  1698. *
  1699. * @v pci PCI device
  1700. */
  1701. static void ehci_remove ( struct pci_device *pci ) {
  1702. struct ehci_device *ehci = pci_get_drvdata ( pci );
  1703. struct usb_bus *bus = ehci->bus;
  1704. unregister_usb_bus ( bus );
  1705. assert ( list_empty ( &ehci->async ) );
  1706. assert ( list_empty ( &ehci->periodic ) );
  1707. free_usb_bus ( bus );
  1708. ehci_reset ( ehci );
  1709. ehci_legacy_release ( ehci, pci );
  1710. iounmap ( ehci->regs );
  1711. free ( ehci );
  1712. }
  1713. /** EHCI PCI device IDs */
  1714. static struct pci_device_id ehci_ids[] = {
  1715. PCI_ROM ( 0xffff, 0xffff, "ehci", "EHCI", 0 ),
  1716. };
  1717. /** EHCI PCI driver */
  1718. struct pci_driver ehci_driver __pci_driver = {
  1719. .ids = ehci_ids,
  1720. .id_count = ( sizeof ( ehci_ids ) / sizeof ( ehci_ids[0] ) ),
  1721. .class = PCI_CLASS_ID ( PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB,
  1722. PCI_CLASS_SERIAL_USB_EHCI ),
  1723. .probe = ehci_probe,
  1724. .remove = ehci_remove,
  1725. };
  1726. /**
  1727. * Prepare for exit
  1728. *
  1729. * @v booting System is shutting down for OS boot
  1730. */
  1731. static void ehci_shutdown ( int booting ) {
  1732. /* If we are shutting down to boot an OS, then prevent the
  1733. * release of ownership back to BIOS.
  1734. */
  1735. ehci_legacy_prevent_release = booting;
  1736. }
  1737. /** Startup/shutdown function */
  1738. struct startup_fn ehci_startup __startup_fn ( STARTUP_LATE ) = {
  1739. .shutdown = ehci_shutdown,
  1740. };