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rfbuffer.h 45KB

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  1. /*
  2. * RF Buffer handling functions
  3. *
  4. * Copyright (c) 2009 Nick Kossifidis <mickflemm@gmail.com>
  5. *
  6. * Permission to use, copy, modify, and distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. *
  18. */
  19. /*
  20. * There are some special registers on the RF chip
  21. * that control various operation settings related mostly to
  22. * the analog parts (channel, gain adjustment etc).
  23. *
  24. * We don't write on those registers directly but
  25. * we send a data packet on the chip, using a special register,
  26. * that holds all the settings we need. After we 've sent the
  27. * data packet, we write on another special register to notify hw
  28. * to apply the settings. This is done so that control registers
  29. * can be dynamicaly programmed during operation and the settings
  30. * are applied faster on the hw.
  31. *
  32. * We call each data packet an "RF Bank" and all the data we write
  33. * (all RF Banks) "RF Buffer". This file holds initial RF Buffer
  34. * data for the different RF chips, and various info to match RF
  35. * Buffer offsets with specific RF registers so that we can access
  36. * them. We tweak these settings on rfregs_init function.
  37. *
  38. * Also check out reg.h and U.S. Patent 6677779 B1 (about buffer
  39. * registers and control registers):
  40. *
  41. * http://www.google.com/patents?id=qNURAAAAEBAJ
  42. */
  43. /*
  44. * Struct to hold default mode specific RF
  45. * register values (RF Banks)
  46. */
  47. struct ath5k_ini_rfbuffer {
  48. u8 rfb_bank; /* RF Bank number */
  49. u16 rfb_ctrl_register; /* RF Buffer control register */
  50. u32 rfb_mode_data[5]; /* RF Buffer data for each mode */
  51. };
  52. /*
  53. * Struct to hold RF Buffer field
  54. * infos used to access certain RF
  55. * analog registers
  56. */
  57. struct ath5k_rfb_field {
  58. u8 len; /* Field length */
  59. u16 pos; /* Offset on the raw packet */
  60. u8 col; /* Column -used for shifting */
  61. };
  62. /*
  63. * RF analog register definition
  64. */
  65. struct ath5k_rf_reg {
  66. u8 bank; /* RF Buffer Bank number */
  67. u8 index; /* Register's index on rf_regs_idx */
  68. struct ath5k_rfb_field field; /* RF Buffer field for this register */
  69. };
  70. /* Map RF registers to indexes
  71. * We do this to handle common bits and make our
  72. * life easier by using an index for each register
  73. * instead of a full rfb_field */
  74. enum ath5k_rf_regs_idx {
  75. /* BANK 6 */
  76. AR5K_RF_OB_2GHZ = 0,
  77. AR5K_RF_OB_5GHZ,
  78. AR5K_RF_DB_2GHZ,
  79. AR5K_RF_DB_5GHZ,
  80. AR5K_RF_FIXED_BIAS_A,
  81. AR5K_RF_FIXED_BIAS_B,
  82. AR5K_RF_PWD_XPD,
  83. AR5K_RF_XPD_SEL,
  84. AR5K_RF_XPD_GAIN,
  85. AR5K_RF_PD_GAIN_LO,
  86. AR5K_RF_PD_GAIN_HI,
  87. AR5K_RF_HIGH_VC_CP,
  88. AR5K_RF_MID_VC_CP,
  89. AR5K_RF_LOW_VC_CP,
  90. AR5K_RF_PUSH_UP,
  91. AR5K_RF_PAD2GND,
  92. AR5K_RF_XB2_LVL,
  93. AR5K_RF_XB5_LVL,
  94. AR5K_RF_PWD_ICLOBUF_2G,
  95. AR5K_RF_PWD_84,
  96. AR5K_RF_PWD_90,
  97. AR5K_RF_PWD_130,
  98. AR5K_RF_PWD_131,
  99. AR5K_RF_PWD_132,
  100. AR5K_RF_PWD_136,
  101. AR5K_RF_PWD_137,
  102. AR5K_RF_PWD_138,
  103. AR5K_RF_PWD_166,
  104. AR5K_RF_PWD_167,
  105. AR5K_RF_DERBY_CHAN_SEL_MODE,
  106. /* BANK 7 */
  107. AR5K_RF_GAIN_I,
  108. AR5K_RF_PLO_SEL,
  109. AR5K_RF_RFGAIN_SEL,
  110. AR5K_RF_RFGAIN_STEP,
  111. AR5K_RF_WAIT_S,
  112. AR5K_RF_WAIT_I,
  113. AR5K_RF_MAX_TIME,
  114. AR5K_RF_MIXVGA_OVR,
  115. AR5K_RF_MIXGAIN_OVR,
  116. AR5K_RF_MIXGAIN_STEP,
  117. AR5K_RF_PD_DELAY_A,
  118. AR5K_RF_PD_DELAY_B,
  119. AR5K_RF_PD_DELAY_XR,
  120. AR5K_RF_PD_PERIOD_A,
  121. AR5K_RF_PD_PERIOD_B,
  122. AR5K_RF_PD_PERIOD_XR,
  123. };
  124. /*******************\
  125. * RF5111 (Sombrero) *
  126. \*******************/
  127. /* BANK 6 len pos col */
  128. #define AR5K_RF5111_OB_2GHZ { 3, 119, 0 }
  129. #define AR5K_RF5111_DB_2GHZ { 3, 122, 0 }
  130. #define AR5K_RF5111_OB_5GHZ { 3, 104, 0 }
  131. #define AR5K_RF5111_DB_5GHZ { 3, 107, 0 }
  132. #define AR5K_RF5111_PWD_XPD { 1, 95, 0 }
  133. #define AR5K_RF5111_XPD_GAIN { 4, 96, 0 }
  134. /* Access to PWD registers */
  135. #define AR5K_RF5111_PWD(_n) { 1, (135 - _n), 3 }
  136. /* BANK 7 len pos col */
  137. #define AR5K_RF5111_GAIN_I { 6, 29, 0 }
  138. #define AR5K_RF5111_PLO_SEL { 1, 4, 0 }
  139. #define AR5K_RF5111_RFGAIN_SEL { 1, 36, 0 }
  140. #define AR5K_RF5111_RFGAIN_STEP { 6, 37, 0 }
  141. /* Only on AR5212 BaseBand and up */
  142. #define AR5K_RF5111_WAIT_S { 5, 19, 0 }
  143. #define AR5K_RF5111_WAIT_I { 5, 24, 0 }
  144. #define AR5K_RF5111_MAX_TIME { 2, 49, 0 }
  145. static const struct ath5k_rf_reg rf_regs_5111[] = {
  146. {6, AR5K_RF_OB_2GHZ, AR5K_RF5111_OB_2GHZ},
  147. {6, AR5K_RF_DB_2GHZ, AR5K_RF5111_DB_2GHZ},
  148. {6, AR5K_RF_OB_5GHZ, AR5K_RF5111_OB_5GHZ},
  149. {6, AR5K_RF_DB_5GHZ, AR5K_RF5111_DB_5GHZ},
  150. {6, AR5K_RF_PWD_XPD, AR5K_RF5111_PWD_XPD},
  151. {6, AR5K_RF_XPD_GAIN, AR5K_RF5111_XPD_GAIN},
  152. {6, AR5K_RF_PWD_84, AR5K_RF5111_PWD(84)},
  153. {6, AR5K_RF_PWD_90, AR5K_RF5111_PWD(90)},
  154. {7, AR5K_RF_GAIN_I, AR5K_RF5111_GAIN_I},
  155. {7, AR5K_RF_PLO_SEL, AR5K_RF5111_PLO_SEL},
  156. {7, AR5K_RF_RFGAIN_SEL, AR5K_RF5111_RFGAIN_SEL},
  157. {7, AR5K_RF_RFGAIN_STEP, AR5K_RF5111_RFGAIN_STEP},
  158. {7, AR5K_RF_WAIT_S, AR5K_RF5111_WAIT_S},
  159. {7, AR5K_RF_WAIT_I, AR5K_RF5111_WAIT_I},
  160. {7, AR5K_RF_MAX_TIME, AR5K_RF5111_MAX_TIME}
  161. };
  162. /* Default mode specific settings */
  163. static const struct ath5k_ini_rfbuffer rfb_5111[] = {
  164. { 0, 0x989c,
  165. /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
  166. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  167. { 0, 0x989c,
  168. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  169. { 0, 0x989c,
  170. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  171. { 0, 0x989c,
  172. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  173. { 0, 0x989c,
  174. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  175. { 0, 0x989c,
  176. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  177. { 0, 0x989c,
  178. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  179. { 0, 0x989c,
  180. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  181. { 0, 0x989c,
  182. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  183. { 0, 0x989c,
  184. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  185. { 0, 0x989c,
  186. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  187. { 0, 0x989c,
  188. { 0x00380000, 0x00380000, 0x00380000, 0x00380000, 0x00380000 } },
  189. { 0, 0x989c,
  190. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  191. { 0, 0x989c,
  192. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  193. { 0, 0x989c,
  194. { 0x00000000, 0x00000000, 0x000000c0, 0x00000080, 0x00000080 } },
  195. { 0, 0x989c,
  196. { 0x000400f9, 0x000400f9, 0x000400ff, 0x000400fd, 0x000400fd } },
  197. { 0, 0x98d4,
  198. { 0x00000000, 0x00000000, 0x00000004, 0x00000004, 0x00000004 } },
  199. { 1, 0x98d4,
  200. { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
  201. { 2, 0x98d4,
  202. { 0x00000010, 0x00000014, 0x00000010, 0x00000010, 0x00000014 } },
  203. { 3, 0x98d8,
  204. { 0x00601068, 0x00601068, 0x00601068, 0x00601068, 0x00601068 } },
  205. { 6, 0x989c,
  206. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  207. { 6, 0x989c,
  208. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  209. { 6, 0x989c,
  210. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  211. { 6, 0x989c,
  212. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  213. { 6, 0x989c,
  214. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  215. { 6, 0x989c,
  216. { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
  217. { 6, 0x989c,
  218. { 0x04000000, 0x04000000, 0x04000000, 0x04000000, 0x04000000 } },
  219. { 6, 0x989c,
  220. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  221. { 6, 0x989c,
  222. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  223. { 6, 0x989c,
  224. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  225. { 6, 0x989c,
  226. { 0x00000000, 0x00000000, 0x0a000000, 0x00000000, 0x00000000 } },
  227. { 6, 0x989c,
  228. { 0x003800c0, 0x00380080, 0x023800c0, 0x003800c0, 0x003800c0 } },
  229. { 6, 0x989c,
  230. { 0x00020006, 0x00020006, 0x00000006, 0x00020006, 0x00020006 } },
  231. { 6, 0x989c,
  232. { 0x00000089, 0x00000089, 0x00000089, 0x00000089, 0x00000089 } },
  233. { 6, 0x989c,
  234. { 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0 } },
  235. { 6, 0x989c,
  236. { 0x00040007, 0x00040007, 0x00040007, 0x00040007, 0x00040007 } },
  237. { 6, 0x98d4,
  238. { 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a } },
  239. { 7, 0x989c,
  240. { 0x00000040, 0x00000048, 0x00000040, 0x00000040, 0x00000040 } },
  241. { 7, 0x989c,
  242. { 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 } },
  243. { 7, 0x989c,
  244. { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
  245. { 7, 0x989c,
  246. { 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f } },
  247. { 7, 0x989c,
  248. { 0x000000f1, 0x000000f1, 0x00000061, 0x000000f1, 0x000000f1 } },
  249. { 7, 0x989c,
  250. { 0x0000904f, 0x0000904f, 0x0000904c, 0x0000904f, 0x0000904f } },
  251. { 7, 0x989c,
  252. { 0x0000125a, 0x0000125a, 0x0000129a, 0x0000125a, 0x0000125a } },
  253. { 7, 0x98cc,
  254. { 0x0000000e, 0x0000000e, 0x0000000f, 0x0000000e, 0x0000000e } },
  255. };
  256. /***********************\
  257. * RF5112/RF2112 (Derby) *
  258. \***********************/
  259. /* BANK 7 (Common) len pos col */
  260. #define AR5K_RF5112X_GAIN_I { 6, 14, 0 }
  261. #define AR5K_RF5112X_MIXVGA_OVR { 1, 36, 0 }
  262. #define AR5K_RF5112X_MIXGAIN_OVR { 2, 37, 0 }
  263. #define AR5K_RF5112X_MIXGAIN_STEP { 4, 32, 0 }
  264. #define AR5K_RF5112X_PD_DELAY_A { 4, 58, 0 }
  265. #define AR5K_RF5112X_PD_DELAY_B { 4, 62, 0 }
  266. #define AR5K_RF5112X_PD_DELAY_XR { 4, 66, 0 }
  267. #define AR5K_RF5112X_PD_PERIOD_A { 4, 70, 0 }
  268. #define AR5K_RF5112X_PD_PERIOD_B { 4, 74, 0 }
  269. #define AR5K_RF5112X_PD_PERIOD_XR { 4, 78, 0 }
  270. /* RFX112 (Derby 1) */
  271. /* BANK 6 len pos col */
  272. #define AR5K_RF5112_OB_2GHZ { 3, 269, 0 }
  273. #define AR5K_RF5112_DB_2GHZ { 3, 272, 0 }
  274. #define AR5K_RF5112_OB_5GHZ { 3, 261, 0 }
  275. #define AR5K_RF5112_DB_5GHZ { 3, 264, 0 }
  276. #define AR5K_RF5112_FIXED_BIAS_A { 1, 260, 0 }
  277. #define AR5K_RF5112_FIXED_BIAS_B { 1, 259, 0 }
  278. #define AR5K_RF5112_XPD_SEL { 1, 284, 0 }
  279. #define AR5K_RF5112_XPD_GAIN { 2, 252, 0 }
  280. /* Access to PWD registers */
  281. #define AR5K_RF5112_PWD(_n) { 1, (302 - _n), 3 }
  282. static const struct ath5k_rf_reg rf_regs_5112[] = {
  283. {6, AR5K_RF_OB_2GHZ, AR5K_RF5112_OB_2GHZ},
  284. {6, AR5K_RF_DB_2GHZ, AR5K_RF5112_DB_2GHZ},
  285. {6, AR5K_RF_OB_5GHZ, AR5K_RF5112_OB_5GHZ},
  286. {6, AR5K_RF_DB_5GHZ, AR5K_RF5112_DB_5GHZ},
  287. {6, AR5K_RF_FIXED_BIAS_A, AR5K_RF5112_FIXED_BIAS_A},
  288. {6, AR5K_RF_FIXED_BIAS_B, AR5K_RF5112_FIXED_BIAS_B},
  289. {6, AR5K_RF_XPD_SEL, AR5K_RF5112_XPD_SEL},
  290. {6, AR5K_RF_XPD_GAIN, AR5K_RF5112_XPD_GAIN},
  291. {6, AR5K_RF_PWD_130, AR5K_RF5112_PWD(130)},
  292. {6, AR5K_RF_PWD_131, AR5K_RF5112_PWD(131)},
  293. {6, AR5K_RF_PWD_132, AR5K_RF5112_PWD(132)},
  294. {6, AR5K_RF_PWD_136, AR5K_RF5112_PWD(136)},
  295. {6, AR5K_RF_PWD_137, AR5K_RF5112_PWD(137)},
  296. {6, AR5K_RF_PWD_138, AR5K_RF5112_PWD(138)},
  297. {7, AR5K_RF_GAIN_I, AR5K_RF5112X_GAIN_I},
  298. {7, AR5K_RF_MIXVGA_OVR, AR5K_RF5112X_MIXVGA_OVR},
  299. {7, AR5K_RF_MIXGAIN_OVR, AR5K_RF5112X_MIXGAIN_OVR},
  300. {7, AR5K_RF_MIXGAIN_STEP, AR5K_RF5112X_MIXGAIN_STEP},
  301. {7, AR5K_RF_PD_DELAY_A, AR5K_RF5112X_PD_DELAY_A},
  302. {7, AR5K_RF_PD_DELAY_B, AR5K_RF5112X_PD_DELAY_B},
  303. {7, AR5K_RF_PD_DELAY_XR, AR5K_RF5112X_PD_DELAY_XR},
  304. {7, AR5K_RF_PD_PERIOD_A, AR5K_RF5112X_PD_PERIOD_A},
  305. {7, AR5K_RF_PD_PERIOD_B, AR5K_RF5112X_PD_PERIOD_B},
  306. {7, AR5K_RF_PD_PERIOD_XR, AR5K_RF5112X_PD_PERIOD_XR},
  307. };
  308. /* Default mode specific settings */
  309. static const struct ath5k_ini_rfbuffer rfb_5112[] = {
  310. { 1, 0x98d4,
  311. /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
  312. { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
  313. { 2, 0x98d0,
  314. { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
  315. { 3, 0x98dc,
  316. { 0x00a0c0c0, 0x00a0c0c0, 0x00e0c0c0, 0x00e0c0c0, 0x00e0c0c0 } },
  317. { 6, 0x989c,
  318. { 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000 } },
  319. { 6, 0x989c,
  320. { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
  321. { 6, 0x989c,
  322. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  323. { 6, 0x989c,
  324. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  325. { 6, 0x989c,
  326. { 0x00660000, 0x00660000, 0x00660000, 0x00660000, 0x00660000 } },
  327. { 6, 0x989c,
  328. { 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000 } },
  329. { 6, 0x989c,
  330. { 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000 } },
  331. { 6, 0x989c,
  332. { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
  333. { 6, 0x989c,
  334. { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
  335. { 6, 0x989c,
  336. { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
  337. { 6, 0x989c,
  338. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  339. { 6, 0x989c,
  340. { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
  341. { 6, 0x989c,
  342. { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
  343. { 6, 0x989c,
  344. { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
  345. { 6, 0x989c,
  346. { 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000 } },
  347. { 6, 0x989c,
  348. { 0x00600000, 0x00600000, 0x00600000, 0x00600000, 0x00600000 } },
  349. { 6, 0x989c,
  350. { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
  351. { 6, 0x989c,
  352. { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
  353. { 6, 0x989c,
  354. { 0x00640000, 0x00640000, 0x00640000, 0x00640000, 0x00640000 } },
  355. { 6, 0x989c,
  356. { 0x00200000, 0x00200000, 0x00200000, 0x00200000, 0x00200000 } },
  357. { 6, 0x989c,
  358. { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
  359. { 6, 0x989c,
  360. { 0x00250000, 0x00250000, 0x00250000, 0x00250000, 0x00250000 } },
  361. { 6, 0x989c,
  362. { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
  363. { 6, 0x989c,
  364. { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
  365. { 6, 0x989c,
  366. { 0x00510000, 0x00510000, 0x00510000, 0x00510000, 0x00510000 } },
  367. { 6, 0x989c,
  368. { 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000 } },
  369. { 6, 0x989c,
  370. { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
  371. { 6, 0x989c,
  372. { 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000 } },
  373. { 6, 0x989c,
  374. { 0x00400000, 0x00400000, 0x00400000, 0x00400000, 0x00400000 } },
  375. { 6, 0x989c,
  376. { 0x03090000, 0x03090000, 0x03090000, 0x03090000, 0x03090000 } },
  377. { 6, 0x989c,
  378. { 0x06000000, 0x06000000, 0x06000000, 0x06000000, 0x06000000 } },
  379. { 6, 0x989c,
  380. { 0x000000b0, 0x000000b0, 0x000000a8, 0x000000a8, 0x000000a8 } },
  381. { 6, 0x989c,
  382. { 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e } },
  383. { 6, 0x989c,
  384. { 0x006c4a41, 0x006c4a41, 0x006c4af1, 0x006c4a61, 0x006c4a61 } },
  385. { 6, 0x989c,
  386. { 0x0050892a, 0x0050892a, 0x0050892b, 0x0050892b, 0x0050892b } },
  387. { 6, 0x989c,
  388. { 0x00842400, 0x00842400, 0x00842400, 0x00842400, 0x00842400 } },
  389. { 6, 0x989c,
  390. { 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200 } },
  391. { 6, 0x98d0,
  392. { 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c } },
  393. { 7, 0x989c,
  394. { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
  395. { 7, 0x989c,
  396. { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
  397. { 7, 0x989c,
  398. { 0x0000000a, 0x0000000a, 0x00000012, 0x00000012, 0x00000012 } },
  399. { 7, 0x989c,
  400. { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
  401. { 7, 0x989c,
  402. { 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1 } },
  403. { 7, 0x989c,
  404. { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
  405. { 7, 0x989c,
  406. { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
  407. { 7, 0x989c,
  408. { 0x00000022, 0x00000022, 0x00000022, 0x00000022, 0x00000022 } },
  409. { 7, 0x989c,
  410. { 0x00000092, 0x00000092, 0x00000092, 0x00000092, 0x00000092 } },
  411. { 7, 0x989c,
  412. { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
  413. { 7, 0x989c,
  414. { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
  415. { 7, 0x989c,
  416. { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
  417. { 7, 0x98c4,
  418. { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
  419. };
  420. /* RFX112A (Derby 2) */
  421. /* BANK 6 len pos col */
  422. #define AR5K_RF5112A_OB_2GHZ { 3, 287, 0 }
  423. #define AR5K_RF5112A_DB_2GHZ { 3, 290, 0 }
  424. #define AR5K_RF5112A_OB_5GHZ { 3, 279, 0 }
  425. #define AR5K_RF5112A_DB_5GHZ { 3, 282, 0 }
  426. #define AR5K_RF5112A_FIXED_BIAS_A { 1, 278, 0 }
  427. #define AR5K_RF5112A_FIXED_BIAS_B { 1, 277, 0 }
  428. #define AR5K_RF5112A_XPD_SEL { 1, 302, 0 }
  429. #define AR5K_RF5112A_PDGAINLO { 2, 270, 0 }
  430. #define AR5K_RF5112A_PDGAINHI { 2, 257, 0 }
  431. /* Access to PWD registers */
  432. #define AR5K_RF5112A_PWD(_n) { 1, (306 - _n), 3 }
  433. /* Voltage regulators */
  434. #define AR5K_RF5112A_HIGH_VC_CP { 2, 90, 2 }
  435. #define AR5K_RF5112A_MID_VC_CP { 2, 92, 2 }
  436. #define AR5K_RF5112A_LOW_VC_CP { 2, 94, 2 }
  437. #define AR5K_RF5112A_PUSH_UP { 1, 254, 2 }
  438. /* Power consumption */
  439. #define AR5K_RF5112A_PAD2GND { 1, 281, 1 }
  440. #define AR5K_RF5112A_XB2_LVL { 2, 1, 3 }
  441. #define AR5K_RF5112A_XB5_LVL { 2, 3, 3 }
  442. static const struct ath5k_rf_reg rf_regs_5112a[] = {
  443. {6, AR5K_RF_OB_2GHZ, AR5K_RF5112A_OB_2GHZ},
  444. {6, AR5K_RF_DB_2GHZ, AR5K_RF5112A_DB_2GHZ},
  445. {6, AR5K_RF_OB_5GHZ, AR5K_RF5112A_OB_5GHZ},
  446. {6, AR5K_RF_DB_5GHZ, AR5K_RF5112A_DB_5GHZ},
  447. {6, AR5K_RF_FIXED_BIAS_A, AR5K_RF5112A_FIXED_BIAS_A},
  448. {6, AR5K_RF_FIXED_BIAS_B, AR5K_RF5112A_FIXED_BIAS_B},
  449. {6, AR5K_RF_XPD_SEL, AR5K_RF5112A_XPD_SEL},
  450. {6, AR5K_RF_PD_GAIN_LO, AR5K_RF5112A_PDGAINLO},
  451. {6, AR5K_RF_PD_GAIN_HI, AR5K_RF5112A_PDGAINHI},
  452. {6, AR5K_RF_PWD_130, AR5K_RF5112A_PWD(130)},
  453. {6, AR5K_RF_PWD_131, AR5K_RF5112A_PWD(131)},
  454. {6, AR5K_RF_PWD_132, AR5K_RF5112A_PWD(132)},
  455. {6, AR5K_RF_PWD_136, AR5K_RF5112A_PWD(136)},
  456. {6, AR5K_RF_PWD_137, AR5K_RF5112A_PWD(137)},
  457. {6, AR5K_RF_PWD_138, AR5K_RF5112A_PWD(138)},
  458. {6, AR5K_RF_PWD_166, AR5K_RF5112A_PWD(166)},
  459. {6, AR5K_RF_PWD_167, AR5K_RF5112A_PWD(167)},
  460. {6, AR5K_RF_HIGH_VC_CP, AR5K_RF5112A_HIGH_VC_CP},
  461. {6, AR5K_RF_MID_VC_CP, AR5K_RF5112A_MID_VC_CP},
  462. {6, AR5K_RF_LOW_VC_CP, AR5K_RF5112A_LOW_VC_CP},
  463. {6, AR5K_RF_PUSH_UP, AR5K_RF5112A_PUSH_UP},
  464. {6, AR5K_RF_PAD2GND, AR5K_RF5112A_PAD2GND},
  465. {6, AR5K_RF_XB2_LVL, AR5K_RF5112A_XB2_LVL},
  466. {6, AR5K_RF_XB5_LVL, AR5K_RF5112A_XB5_LVL},
  467. {7, AR5K_RF_GAIN_I, AR5K_RF5112X_GAIN_I},
  468. {7, AR5K_RF_MIXVGA_OVR, AR5K_RF5112X_MIXVGA_OVR},
  469. {7, AR5K_RF_MIXGAIN_OVR, AR5K_RF5112X_MIXGAIN_OVR},
  470. {7, AR5K_RF_MIXGAIN_STEP, AR5K_RF5112X_MIXGAIN_STEP},
  471. {7, AR5K_RF_PD_DELAY_A, AR5K_RF5112X_PD_DELAY_A},
  472. {7, AR5K_RF_PD_DELAY_B, AR5K_RF5112X_PD_DELAY_B},
  473. {7, AR5K_RF_PD_DELAY_XR, AR5K_RF5112X_PD_DELAY_XR},
  474. {7, AR5K_RF_PD_PERIOD_A, AR5K_RF5112X_PD_PERIOD_A},
  475. {7, AR5K_RF_PD_PERIOD_B, AR5K_RF5112X_PD_PERIOD_B},
  476. {7, AR5K_RF_PD_PERIOD_XR, AR5K_RF5112X_PD_PERIOD_XR},
  477. };
  478. /* Default mode specific settings */
  479. static const struct ath5k_ini_rfbuffer rfb_5112a[] = {
  480. { 1, 0x98d4,
  481. /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
  482. { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
  483. { 2, 0x98d0,
  484. { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
  485. { 3, 0x98dc,
  486. { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
  487. { 6, 0x989c,
  488. { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } },
  489. { 6, 0x989c,
  490. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  491. { 6, 0x989c,
  492. { 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000 } },
  493. { 6, 0x989c,
  494. { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
  495. { 6, 0x989c,
  496. { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } },
  497. { 6, 0x989c,
  498. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  499. { 6, 0x989c,
  500. { 0x00180000, 0x00180000, 0x00180000, 0x00180000, 0x00180000 } },
  501. { 6, 0x989c,
  502. { 0x00600000, 0x00600000, 0x006e0000, 0x006e0000, 0x006e0000 } },
  503. { 6, 0x989c,
  504. { 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000 } },
  505. { 6, 0x989c,
  506. { 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000 } },
  507. { 6, 0x989c,
  508. { 0x04480000, 0x04480000, 0x04480000, 0x04480000, 0x04480000 } },
  509. { 6, 0x989c,
  510. { 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000 } },
  511. { 6, 0x989c,
  512. { 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000 } },
  513. { 6, 0x989c,
  514. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  515. { 6, 0x989c,
  516. { 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000 } },
  517. { 6, 0x989c,
  518. { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
  519. { 6, 0x989c,
  520. { 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000 } },
  521. { 6, 0x989c,
  522. { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
  523. { 6, 0x989c,
  524. { 0x02190000, 0x02190000, 0x02190000, 0x02190000, 0x02190000 } },
  525. { 6, 0x989c,
  526. { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
  527. { 6, 0x989c,
  528. { 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000 } },
  529. { 6, 0x989c,
  530. { 0x00990000, 0x00990000, 0x00990000, 0x00990000, 0x00990000 } },
  531. { 6, 0x989c,
  532. { 0x00500000, 0x00500000, 0x00500000, 0x00500000, 0x00500000 } },
  533. { 6, 0x989c,
  534. { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
  535. { 6, 0x989c,
  536. { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
  537. { 6, 0x989c,
  538. { 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000 } },
  539. { 6, 0x989c,
  540. { 0x01740000, 0x01740000, 0x01740000, 0x01740000, 0x01740000 } },
  541. { 6, 0x989c,
  542. { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
  543. { 6, 0x989c,
  544. { 0x86280000, 0x86280000, 0x86280000, 0x86280000, 0x86280000 } },
  545. { 6, 0x989c,
  546. { 0x31840000, 0x31840000, 0x31840000, 0x31840000, 0x31840000 } },
  547. { 6, 0x989c,
  548. { 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080 } },
  549. { 6, 0x989c,
  550. { 0x00270019, 0x00270019, 0x00270019, 0x00270019, 0x00270019 } },
  551. { 6, 0x989c,
  552. { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
  553. { 6, 0x989c,
  554. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  555. { 6, 0x989c,
  556. { 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2 } },
  557. { 6, 0x989c,
  558. { 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084 } },
  559. { 6, 0x989c,
  560. { 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4 } },
  561. { 6, 0x989c,
  562. { 0x00119220, 0x00119220, 0x00119220, 0x00119220, 0x00119220 } },
  563. { 6, 0x989c,
  564. { 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800 } },
  565. { 6, 0x98d8,
  566. { 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230 } },
  567. { 7, 0x989c,
  568. { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
  569. { 7, 0x989c,
  570. { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
  571. { 7, 0x989c,
  572. { 0x00000012, 0x00000012, 0x00000012, 0x00000012, 0x00000012 } },
  573. { 7, 0x989c,
  574. { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
  575. { 7, 0x989c,
  576. { 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9 } },
  577. { 7, 0x989c,
  578. { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
  579. { 7, 0x989c,
  580. { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
  581. { 7, 0x989c,
  582. { 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2 } },
  583. { 7, 0x989c,
  584. { 0x00000052, 0x00000052, 0x00000052, 0x00000052, 0x00000052 } },
  585. { 7, 0x989c,
  586. { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
  587. { 7, 0x989c,
  588. { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
  589. { 7, 0x989c,
  590. { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
  591. { 7, 0x98c4,
  592. { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
  593. };
  594. /******************\
  595. * RF2413 (Griffin) *
  596. \******************/
  597. /* BANK 6 len pos col */
  598. #define AR5K_RF2413_OB_2GHZ { 3, 168, 0 }
  599. #define AR5K_RF2413_DB_2GHZ { 3, 165, 0 }
  600. static const struct ath5k_rf_reg rf_regs_2413[] = {
  601. {6, AR5K_RF_OB_2GHZ, AR5K_RF2413_OB_2GHZ},
  602. {6, AR5K_RF_DB_2GHZ, AR5K_RF2413_DB_2GHZ},
  603. };
  604. /* Default mode specific settings
  605. * XXX: a/aTurbo ???
  606. */
  607. static const struct ath5k_ini_rfbuffer rfb_2413[] = {
  608. { 1, 0x98d4,
  609. /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
  610. { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
  611. { 2, 0x98d0,
  612. { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
  613. { 3, 0x98dc,
  614. { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
  615. { 6, 0x989c,
  616. { 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000 } },
  617. { 6, 0x989c,
  618. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  619. { 6, 0x989c,
  620. { 0x03000000, 0x03000000, 0x03000000, 0x03000000, 0x03000000 } },
  621. { 6, 0x989c,
  622. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  623. { 6, 0x989c,
  624. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  625. { 6, 0x989c,
  626. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  627. { 6, 0x989c,
  628. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  629. { 6, 0x989c,
  630. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  631. { 6, 0x989c,
  632. { 0x40400000, 0x40400000, 0x40400000, 0x40400000, 0x40400000 } },
  633. { 6, 0x989c,
  634. { 0x65050000, 0x65050000, 0x65050000, 0x65050000, 0x65050000 } },
  635. { 6, 0x989c,
  636. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  637. { 6, 0x989c,
  638. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  639. { 6, 0x989c,
  640. { 0x00420000, 0x00420000, 0x00420000, 0x00420000, 0x00420000 } },
  641. { 6, 0x989c,
  642. { 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000 } },
  643. { 6, 0x989c,
  644. { 0x00030000, 0x00030000, 0x00030000, 0x00030000, 0x00030000 } },
  645. { 6, 0x989c,
  646. { 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000 } },
  647. { 6, 0x989c,
  648. { 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000 } },
  649. { 6, 0x989c,
  650. { 0x00220000, 0x00220000, 0x00220000, 0x00220000, 0x00220000 } },
  651. { 6, 0x989c,
  652. { 0x04220000, 0x04220000, 0x04220000, 0x04220000, 0x04220000 } },
  653. { 6, 0x989c,
  654. { 0x00230018, 0x00230018, 0x00230018, 0x00230018, 0x00230018 } },
  655. { 6, 0x989c,
  656. { 0x00280000, 0x00280000, 0x00280060, 0x00280060, 0x00280060 } },
  657. { 6, 0x989c,
  658. { 0x005000c0, 0x005000c0, 0x005000c3, 0x005000c3, 0x005000c3 } },
  659. { 6, 0x989c,
  660. { 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f } },
  661. { 6, 0x989c,
  662. { 0x00000458, 0x00000458, 0x00000458, 0x00000458, 0x00000458 } },
  663. { 6, 0x989c,
  664. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  665. { 6, 0x989c,
  666. { 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000 } },
  667. { 6, 0x98d8,
  668. { 0x00400230, 0x00400230, 0x00400230, 0x00400230, 0x00400230 } },
  669. { 7, 0x989c,
  670. { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
  671. { 7, 0x989c,
  672. { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
  673. { 7, 0x98cc,
  674. { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
  675. };
  676. /***************************\
  677. * RF2315/RF2316 (Cobra SoC) *
  678. \***************************/
  679. /* BANK 6 len pos col */
  680. #define AR5K_RF2316_OB_2GHZ { 3, 178, 0 }
  681. #define AR5K_RF2316_DB_2GHZ { 3, 175, 0 }
  682. static const struct ath5k_rf_reg rf_regs_2316[] = {
  683. {6, AR5K_RF_OB_2GHZ, AR5K_RF2316_OB_2GHZ},
  684. {6, AR5K_RF_DB_2GHZ, AR5K_RF2316_DB_2GHZ},
  685. };
  686. /* Default mode specific settings */
  687. static const struct ath5k_ini_rfbuffer rfb_2316[] = {
  688. { 1, 0x98d4,
  689. /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
  690. { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
  691. { 2, 0x98d0,
  692. { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
  693. { 3, 0x98dc,
  694. { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
  695. { 6, 0x989c,
  696. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  697. { 6, 0x989c,
  698. { 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000 } },
  699. { 6, 0x989c,
  700. { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } },
  701. { 6, 0x989c,
  702. { 0x02000000, 0x02000000, 0x02000000, 0x02000000, 0x02000000 } },
  703. { 6, 0x989c,
  704. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  705. { 6, 0x989c,
  706. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  707. { 6, 0x989c,
  708. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  709. { 6, 0x989c,
  710. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  711. { 6, 0x989c,
  712. { 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000 } },
  713. { 6, 0x989c,
  714. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  715. { 6, 0x989c,
  716. { 0x95150000, 0x95150000, 0x95150000, 0x95150000, 0x95150000 } },
  717. { 6, 0x989c,
  718. { 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000 } },
  719. { 6, 0x989c,
  720. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  721. { 6, 0x989c,
  722. { 0x00080000, 0x00080000, 0x00080000, 0x00080000, 0x00080000 } },
  723. { 6, 0x989c,
  724. { 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000 } },
  725. { 6, 0x989c,
  726. { 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000 } },
  727. { 6, 0x989c,
  728. { 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000 } },
  729. { 6, 0x989c,
  730. { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } },
  731. { 6, 0x989c,
  732. { 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000 } },
  733. { 6, 0x989c,
  734. { 0x10880000, 0x10880000, 0x10880000, 0x10880000, 0x10880000 } },
  735. { 6, 0x989c,
  736. { 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060 } },
  737. { 6, 0x989c,
  738. { 0x00a00000, 0x00a00000, 0x00a00080, 0x00a00080, 0x00a00080 } },
  739. { 6, 0x989c,
  740. { 0x00400000, 0x00400000, 0x0040000d, 0x0040000d, 0x0040000d } },
  741. { 6, 0x989c,
  742. { 0x00110400, 0x00110400, 0x00110400, 0x00110400, 0x00110400 } },
  743. { 6, 0x989c,
  744. { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
  745. { 6, 0x989c,
  746. { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
  747. { 6, 0x989c,
  748. { 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00 } },
  749. { 6, 0x989c,
  750. { 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8 } },
  751. { 6, 0x98c0,
  752. { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } },
  753. { 7, 0x989c,
  754. { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
  755. { 7, 0x989c,
  756. { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
  757. { 7, 0x98cc,
  758. { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
  759. };
  760. /******************************\
  761. * RF5413/RF5424 (Eagle/Condor) *
  762. \******************************/
  763. /* BANK 6 len pos col */
  764. #define AR5K_RF5413_OB_2GHZ { 3, 241, 0 }
  765. #define AR5K_RF5413_DB_2GHZ { 3, 238, 0 }
  766. #define AR5K_RF5413_OB_5GHZ { 3, 247, 0 }
  767. #define AR5K_RF5413_DB_5GHZ { 3, 244, 0 }
  768. #define AR5K_RF5413_PWD_ICLOBUF2G { 3, 131, 3 }
  769. #define AR5K_RF5413_DERBY_CHAN_SEL_MODE { 1, 291, 2 }
  770. static const struct ath5k_rf_reg rf_regs_5413[] = {
  771. {6, AR5K_RF_OB_2GHZ, AR5K_RF5413_OB_2GHZ},
  772. {6, AR5K_RF_DB_2GHZ, AR5K_RF5413_DB_2GHZ},
  773. {6, AR5K_RF_OB_5GHZ, AR5K_RF5413_OB_5GHZ},
  774. {6, AR5K_RF_DB_5GHZ, AR5K_RF5413_DB_5GHZ},
  775. {6, AR5K_RF_PWD_ICLOBUF_2G, AR5K_RF5413_PWD_ICLOBUF2G},
  776. {6, AR5K_RF_DERBY_CHAN_SEL_MODE, AR5K_RF5413_DERBY_CHAN_SEL_MODE},
  777. };
  778. /* Default mode specific settings */
  779. static const struct ath5k_ini_rfbuffer rfb_5413[] = {
  780. { 1, 0x98d4,
  781. /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
  782. { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
  783. { 2, 0x98d0,
  784. { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
  785. { 3, 0x98dc,
  786. { 0x00a000c0, 0x00a000c0, 0x00e000c0, 0x00e000c0, 0x00e000c0 } },
  787. { 6, 0x989c,
  788. { 0x33000000, 0x33000000, 0x33000000, 0x33000000, 0x33000000 } },
  789. { 6, 0x989c,
  790. { 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000 } },
  791. { 6, 0x989c,
  792. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  793. { 6, 0x989c,
  794. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  795. { 6, 0x989c,
  796. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  797. { 6, 0x989c,
  798. { 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000 } },
  799. { 6, 0x989c,
  800. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  801. { 6, 0x989c,
  802. { 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000 } },
  803. { 6, 0x989c,
  804. { 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000 } },
  805. { 6, 0x989c,
  806. { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
  807. { 6, 0x989c,
  808. { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
  809. { 6, 0x989c,
  810. { 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000 } },
  811. { 6, 0x989c,
  812. { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
  813. { 6, 0x989c,
  814. { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
  815. { 6, 0x989c,
  816. { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
  817. { 6, 0x989c,
  818. { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
  819. { 6, 0x989c,
  820. { 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000 } },
  821. { 6, 0x989c,
  822. { 0x00610000, 0x00610000, 0x00610000, 0x00610000, 0x00610000 } },
  823. { 6, 0x989c,
  824. { 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000 } },
  825. { 6, 0x989c,
  826. { 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000 } },
  827. { 6, 0x989c,
  828. { 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000 } },
  829. { 6, 0x989c,
  830. { 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000 } },
  831. { 6, 0x989c,
  832. { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } },
  833. { 6, 0x989c,
  834. { 0x00440000, 0x00440000, 0x00440000, 0x00440000, 0x00440000 } },
  835. { 6, 0x989c,
  836. { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
  837. { 6, 0x989c,
  838. { 0x00100080, 0x00100080, 0x00100080, 0x00100080, 0x00100080 } },
  839. { 6, 0x989c,
  840. { 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034 } },
  841. { 6, 0x989c,
  842. { 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0 } },
  843. { 6, 0x989c,
  844. { 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f } },
  845. { 6, 0x989c,
  846. { 0x00510040, 0x00510040, 0x00510040, 0x00510040, 0x00510040 } },
  847. { 6, 0x989c,
  848. { 0x005000da, 0x005000da, 0x005000da, 0x005000da, 0x005000da } },
  849. { 6, 0x989c,
  850. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  851. { 6, 0x989c,
  852. { 0x00004044, 0x00004044, 0x00004044, 0x00004044, 0x00004044 } },
  853. { 6, 0x989c,
  854. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  855. { 6, 0x989c,
  856. { 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0 } },
  857. { 6, 0x989c,
  858. { 0x00002c00, 0x00002c00, 0x00003600, 0x00003600, 0x00002c00 } },
  859. { 6, 0x98c8,
  860. { 0x00000403, 0x00000403, 0x00040403, 0x00040403, 0x00040403 } },
  861. { 7, 0x989c,
  862. { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
  863. { 7, 0x989c,
  864. { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
  865. { 7, 0x98cc,
  866. { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
  867. };
  868. /***************************\
  869. * RF2425/RF2417 (Swan/Nala) *
  870. * AR2317 (Spider SoC) *
  871. \***************************/
  872. /* BANK 6 len pos col */
  873. #define AR5K_RF2425_OB_2GHZ { 3, 193, 0 }
  874. #define AR5K_RF2425_DB_2GHZ { 3, 190, 0 }
  875. static const struct ath5k_rf_reg rf_regs_2425[] = {
  876. {6, AR5K_RF_OB_2GHZ, AR5K_RF2425_OB_2GHZ},
  877. {6, AR5K_RF_DB_2GHZ, AR5K_RF2425_DB_2GHZ},
  878. };
  879. /* Default mode specific settings
  880. * XXX: a/aTurbo ?
  881. */
  882. static const struct ath5k_ini_rfbuffer rfb_2425[] = {
  883. { 1, 0x98d4,
  884. /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
  885. { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
  886. { 2, 0x98d0,
  887. { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } },
  888. { 3, 0x98dc,
  889. { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
  890. { 6, 0x989c,
  891. { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
  892. { 6, 0x989c,
  893. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  894. { 6, 0x989c,
  895. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  896. { 6, 0x989c,
  897. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  898. { 6, 0x989c,
  899. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  900. { 6, 0x989c,
  901. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  902. { 6, 0x989c,
  903. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  904. { 6, 0x989c,
  905. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  906. { 6, 0x989c,
  907. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  908. { 6, 0x989c,
  909. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  910. { 6, 0x989c,
  911. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  912. { 6, 0x989c,
  913. { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
  914. { 6, 0x989c,
  915. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  916. { 6, 0x989c,
  917. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  918. { 6, 0x989c,
  919. { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
  920. { 6, 0x989c,
  921. { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
  922. { 6, 0x989c,
  923. { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
  924. { 6, 0x989c,
  925. { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
  926. { 6, 0x989c,
  927. { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } },
  928. { 6, 0x989c,
  929. { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } },
  930. { 6, 0x989c,
  931. { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
  932. { 6, 0x989c,
  933. { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } },
  934. { 6, 0x989c,
  935. { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
  936. { 6, 0x989c,
  937. { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
  938. { 6, 0x989c,
  939. { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
  940. { 6, 0x989c,
  941. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  942. { 6, 0x989c,
  943. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  944. { 6, 0x989c,
  945. { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
  946. { 6, 0x989c,
  947. { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } },
  948. { 6, 0x98c4,
  949. { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
  950. { 7, 0x989c,
  951. { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
  952. { 7, 0x989c,
  953. { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
  954. { 7, 0x98cc,
  955. { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
  956. };
  957. /*
  958. * TODO: Handle the few differences with swan during
  959. * bank modification and get rid of this
  960. */
  961. static const struct ath5k_ini_rfbuffer rfb_2317[] = {
  962. { 1, 0x98d4,
  963. /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
  964. { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
  965. { 2, 0x98d0,
  966. { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
  967. { 3, 0x98dc,
  968. { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
  969. { 6, 0x989c,
  970. { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
  971. { 6, 0x989c,
  972. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  973. { 6, 0x989c,
  974. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  975. { 6, 0x989c,
  976. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  977. { 6, 0x989c,
  978. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  979. { 6, 0x989c,
  980. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  981. { 6, 0x989c,
  982. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  983. { 6, 0x989c,
  984. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  985. { 6, 0x989c,
  986. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  987. { 6, 0x989c,
  988. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  989. { 6, 0x989c,
  990. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  991. { 6, 0x989c,
  992. { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
  993. { 6, 0x989c,
  994. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  995. { 6, 0x989c,
  996. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  997. { 6, 0x989c,
  998. { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
  999. { 6, 0x989c,
  1000. { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
  1001. { 6, 0x989c,
  1002. { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
  1003. { 6, 0x989c,
  1004. { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
  1005. { 6, 0x989c,
  1006. { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } },
  1007. { 6, 0x989c,
  1008. { 0x00140100, 0x00140100, 0x00140100, 0x00140100, 0x00140100 } },
  1009. { 6, 0x989c,
  1010. { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
  1011. { 6, 0x989c,
  1012. { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } },
  1013. { 6, 0x989c,
  1014. { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
  1015. { 6, 0x989c,
  1016. { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
  1017. { 6, 0x989c,
  1018. { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
  1019. { 6, 0x989c,
  1020. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1021. { 6, 0x989c,
  1022. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1023. { 6, 0x989c,
  1024. { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
  1025. { 6, 0x989c,
  1026. { 0x00009688, 0x00009688, 0x00009688, 0x00009688, 0x00009688 } },
  1027. { 6, 0x98c4,
  1028. { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
  1029. { 7, 0x989c,
  1030. { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
  1031. { 7, 0x989c,
  1032. { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
  1033. { 7, 0x98cc,
  1034. { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
  1035. };
  1036. /*
  1037. * TODO: Handle the few differences with swan during
  1038. * bank modification and get rid of this
  1039. * XXX: a/aTurbo ?
  1040. */
  1041. static const struct ath5k_ini_rfbuffer rfb_2417[] = {
  1042. { 1, 0x98d4,
  1043. /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
  1044. { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
  1045. { 2, 0x98d0,
  1046. { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } },
  1047. { 3, 0x98dc,
  1048. { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
  1049. { 6, 0x989c,
  1050. { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
  1051. { 6, 0x989c,
  1052. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1053. { 6, 0x989c,
  1054. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1055. { 6, 0x989c,
  1056. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1057. { 6, 0x989c,
  1058. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1059. { 6, 0x989c,
  1060. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1061. { 6, 0x989c,
  1062. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1063. { 6, 0x989c,
  1064. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1065. { 6, 0x989c,
  1066. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1067. { 6, 0x989c,
  1068. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1069. { 6, 0x989c,
  1070. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1071. { 6, 0x989c,
  1072. { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
  1073. { 6, 0x989c,
  1074. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1075. { 6, 0x989c,
  1076. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1077. { 6, 0x989c,
  1078. { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
  1079. { 6, 0x989c,
  1080. { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
  1081. { 6, 0x989c,
  1082. { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
  1083. { 6, 0x989c,
  1084. { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
  1085. { 6, 0x989c,
  1086. { 0x00e70000, 0x00e70000, 0x80e70000, 0x80e70000, 0x00e70000 } },
  1087. { 6, 0x989c,
  1088. { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } },
  1089. { 6, 0x989c,
  1090. { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
  1091. { 6, 0x989c,
  1092. { 0x0007001a, 0x0007001a, 0x0207001a, 0x0207001a, 0x0007001a } },
  1093. { 6, 0x989c,
  1094. { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
  1095. { 6, 0x989c,
  1096. { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
  1097. { 6, 0x989c,
  1098. { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
  1099. { 6, 0x989c,
  1100. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1101. { 6, 0x989c,
  1102. { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
  1103. { 6, 0x989c,
  1104. { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
  1105. { 6, 0x989c,
  1106. { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } },
  1107. { 6, 0x98c4,
  1108. { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
  1109. { 7, 0x989c,
  1110. { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
  1111. { 7, 0x989c,
  1112. { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
  1113. { 7, 0x98cc,
  1114. { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
  1115. };