ide_x.c 34KB

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  1. /* Derived from Etherboot 5.1 */
  2. #include <etherboot.h>
  3. #include <pci.h>
  4. #include <timer.h>
  5. #include <lib.h>
  6. #define DEBUG_THIS DEBUG_IDE
  7. #include <debug.h>
  8. #define IDE_MAX_CONTROLLERS 4
  9. #define IDE_MAX_DRIVES (IDE_MAX_CONTROLLERS * 2)
  10. #define BSY_SET_DURING_SPINUP 1
  11. /*
  12. * UBL, The Universal Talkware Boot Loader
  13. * Copyright (C) 2000 Universal Talkware Inc.
  14. * Copyright (C) 2002 Eric Biederman
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  29. *
  30. *
  31. */
  32. struct controller {
  33. uint16_t cmd_base;
  34. uint16_t ctrl_base;
  35. };
  36. struct harddisk_info {
  37. struct controller *ctrl;
  38. uint16_t heads;
  39. uint16_t cylinders;
  40. uint16_t sectors_per_track;
  41. uint8_t model_number[41];
  42. uint8_t slave;
  43. sector_t sectors;
  44. int address_mode;
  45. #define ADDRESS_MODE_CHS 0
  46. #define ADDRESS_MODE_LBA 1
  47. #define ADDRESS_MODE_LBA48 2
  48. #define ADDRESS_MODE_PACKET 3
  49. uint32_t hw_sector_size;
  50. unsigned drive_exists : 1;
  51. unsigned slave_absent : 1;
  52. unsigned removable : 1;
  53. };
  54. #define IDE_SECTOR_SIZE 0x200
  55. #define CDROM_SECTOR_SIZE 0x800
  56. #define IDE_BASE0 (0x1F0u) /* primary controller */
  57. #define IDE_BASE1 (0x170u) /* secondary */
  58. #define IDE_BASE2 (0x1E8u) /* third */
  59. #define IDE_BASE3 (0x168u) /* fourth */
  60. #define IDE_BASE4 (0x1E0u) /* fifth */
  61. #define IDE_BASE5 (0x160u) /* sixth */
  62. #define IDE_REG_EXTENDED_OFFSET (0x204u)
  63. #define IDE_REG_DATA(ctrl) ((ctrl)->cmd_base + 0u) /* word register */
  64. #define IDE_REG_ERROR(ctrl) ((ctrl)->cmd_base + 1u)
  65. #define IDE_REG_PRECOMP(ctrl) ((ctrl)->cmd_base + 1u)
  66. #define IDE_REG_FEATURE(ctrl) ((ctrl)->cmd_base + 1u)
  67. #define IDE_REG_SECTOR_COUNT(ctrl) ((ctrl)->cmd_base + 2u)
  68. #define IDE_REG_SECTOR_NUMBER(ctrl) ((ctrl)->cmd_base + 3u)
  69. #define IDE_REG_LBA_LOW(ctrl) ((ctrl)->cmd_base + 3u)
  70. #define IDE_REG_CYLINDER_LSB(ctrl) ((ctrl)->cmd_base + 4u)
  71. #define IDE_REG_LBA_MID(ctrl) ((ctrl)->cmd_base + 4u)
  72. #define IDE_REG_CYLINDER_MSB(ctrl) ((ctrl)->cmd_base + 5u)
  73. #define IDE_REG_LBA_HIGH(ctrl) ((ctrl)->cmd_base + 5u)
  74. #define IDE_REG_DRIVEHEAD(ctrl) ((ctrl)->cmd_base + 6u)
  75. #define IDE_REG_DEVICE(ctrl) ((ctrl)->cmd_base + 6u)
  76. #define IDE_REG_STATUS(ctrl) ((ctrl)->cmd_base + 7u)
  77. #define IDE_REG_COMMAND(ctrl) ((ctrl)->cmd_base + 7u)
  78. #define IDE_REG_ALTSTATUS(ctrl) ((ctrl)->ctrl_base + 2u)
  79. #define IDE_REG_DEVICE_CONTROL(ctrl) ((ctrl)->ctrl_base + 2u)
  80. struct ide_pio_command
  81. {
  82. uint8_t feature;
  83. uint8_t sector_count;
  84. uint8_t lba_low;
  85. uint8_t lba_mid;
  86. uint8_t lba_high;
  87. uint8_t device;
  88. # define IDE_DH_DEFAULT (0xA0)
  89. # define IDE_DH_HEAD(x) ((x) & 0x0F)
  90. # define IDE_DH_MASTER (0x00)
  91. # define IDE_DH_SLAVE (0x10)
  92. # define IDE_DH_LBA (0x40)
  93. # define IDE_DH_CHS (0x00)
  94. uint8_t command;
  95. uint8_t sector_count2;
  96. uint8_t lba_low2;
  97. uint8_t lba_mid2;
  98. uint8_t lba_high2;
  99. };
  100. #define IDE_DEFAULT_COMMAND { 0xFFu, 0x01, 0x00, 0x0000, IDE_DH_DEFAULT }
  101. #define IDE_ERR_ICRC 0x80 /* ATA Ultra DMA bad CRC */
  102. #define IDE_ERR_BBK 0x80 /* ATA bad block */
  103. #define IDE_ERR_UNC 0x40 /* ATA uncorrected error */
  104. #define IDE_ERR_MC 0x20 /* ATA media change */
  105. #define IDE_ERR_IDNF 0x10 /* ATA id not found */
  106. #define IDE_ERR_MCR 0x08 /* ATA media change request */
  107. #define IDE_ERR_ABRT 0x04 /* ATA command aborted */
  108. #define IDE_ERR_NTK0 0x02 /* ATA track 0 not found */
  109. #define IDE_ERR_NDAM 0x01 /* ATA address mark not found */
  110. #define IDE_STATUS_BSY 0x80 /* busy */
  111. #define IDE_STATUS_RDY 0x40 /* ready */
  112. #define IDE_STATUS_DF 0x20 /* device fault */
  113. #define IDE_STATUS_WFT 0x20 /* write fault (old name) */
  114. #define IDE_STATUS_SKC 0x10 /* seek complete */
  115. #define IDE_STATUS_DRQ 0x08 /* data request */
  116. #define IDE_STATUS_CORR 0x04 /* corrected */
  117. #define IDE_STATUS_IDX 0x02 /* index */
  118. #define IDE_STATUS_ERR 0x01 /* error (ATA) */
  119. #define IDE_STATUS_CHK 0x01 /* check (ATAPI) */
  120. #define IDE_CTRL_HD15 0x08 /* bit should always be set to one */
  121. #define IDE_CTRL_SRST 0x04 /* soft reset */
  122. #define IDE_CTRL_NIEN 0x02 /* disable interrupts */
  123. /* Most mandtory and optional ATA commands (from ATA-3), */
  124. #define IDE_CMD_CFA_ERASE_SECTORS 0xC0
  125. #define IDE_CMD_CFA_REQUEST_EXT_ERR_CODE 0x03
  126. #define IDE_CMD_CFA_TRANSLATE_SECTOR 0x87
  127. #define IDE_CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD
  128. #define IDE_CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38
  129. #define IDE_CMD_CHECK_POWER_MODE1 0xE5
  130. #define IDE_CMD_CHECK_POWER_MODE2 0x98
  131. #define IDE_CMD_DEVICE_RESET 0x08
  132. #define IDE_CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
  133. #define IDE_CMD_FLUSH_CACHE 0xE7
  134. #define IDE_CMD_FORMAT_TRACK 0x50
  135. #define IDE_CMD_IDENTIFY_DEVICE 0xEC
  136. #define IDE_CMD_IDENTIFY_DEVICE_PACKET 0xA1
  137. #define IDE_CMD_IDENTIFY_PACKET_DEVICE 0xA1
  138. #define IDE_CMD_IDLE1 0xE3
  139. #define IDE_CMD_IDLE2 0x97
  140. #define IDE_CMD_IDLE_IMMEDIATE1 0xE1
  141. #define IDE_CMD_IDLE_IMMEDIATE2 0x95
  142. #define IDE_CMD_INITIALIZE_DRIVE_PARAMETERS 0x91
  143. #define IDE_CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
  144. #define IDE_CMD_NOP 0x00
  145. #define IDE_CMD_PACKET 0xA0
  146. #define IDE_CMD_READ_BUFFER 0xE4
  147. #define IDE_CMD_READ_DMA 0xC8
  148. #define IDE_CMD_READ_DMA_QUEUED 0xC7
  149. #define IDE_CMD_READ_MULTIPLE 0xC4
  150. #define IDE_CMD_READ_SECTORS 0x20
  151. #define IDE_CMD_READ_SECTORS_EXT 0x24
  152. #define IDE_CMD_READ_VERIFY_SECTORS 0x40
  153. #define IDE_CMD_RECALIBRATE 0x10
  154. #define IDE_CMD_SEEK 0x70
  155. #define IDE_CMD_SET_FEATURES 0xEF
  156. #define IDE_CMD_SET_MAX_ADDR_EXT 0x24
  157. #define IDE_CMD_SET_MULTIPLE_MODE 0xC6
  158. #define IDE_CMD_SLEEP1 0xE6
  159. #define IDE_CMD_SLEEP2 0x99
  160. #define IDE_CMD_STANDBY1 0xE2
  161. #define IDE_CMD_STANDBY2 0x96
  162. #define IDE_CMD_STANDBY_IMMEDIATE1 0xE0
  163. #define IDE_CMD_STANDBY_IMMEDIATE2 0x94
  164. #define IDE_CMD_WRITE_BUFFER 0xE8
  165. #define IDE_CMD_WRITE_DMA 0xCA
  166. #define IDE_CMD_WRITE_DMA_QUEUED 0xCC
  167. #define IDE_CMD_WRITE_MULTIPLE 0xC5
  168. #define IDE_CMD_WRITE_SECTORS 0x30
  169. #define IDE_CMD_WRITE_VERIFY 0x3C
  170. /* IDE_CMD_SET_FEATURE sub commands */
  171. #define IDE_FEATURE_CFA_ENABLE_8BIT_PIO 0x01
  172. #define IDE_FEATURE_ENABLE_WRITE_CACHE 0x02
  173. #define IDE_FEATURE_SET_TRANSFER_MODE 0x03
  174. #define IDE_FEATURE_ENABLE_POWER_MANAGEMENT 0x05
  175. #define IDE_FEATURE_ENABLE_POWERUP_IN_STANDBY 0x06
  176. #define IDE_FEATURE_STANDBY_SPINUP_DRIVE 0x07
  177. #define IDE_FEATURE_CFA_ENABLE_POWER_MODE1 0x0A
  178. #define IDE_FEATURE_DISABLE_MEDIA_STATUS_NOTIFICATION 0x31
  179. #define IDE_FEATURE_ENABLE_AUTOMATIC_ACOUSTIC_MANAGEMENT 0x42
  180. #define IDE_FEATURE_SET_MAXIMUM_HOST_INTERFACE_SECTOR_TIMES 0x43
  181. #define IDE_FEATURE_DISABLE_READ_LOOKAHEAD 0x55
  182. #define IDE_FEATURE_ENABLE_RELEASE_INTERRUPT 0x5D
  183. #define IDE_FEATURE_ENABLE_SERVICE_INTERRUPT 0x5E
  184. #define IDE_FEATURE_DISABLE_REVERTING_TO_POWERON_DEFAULTS 0x66
  185. #define IDE_FEATURE_CFA_DISABLE_8BIT_PIO 0x81
  186. #define IDE_FEATURE_DISABLE_WRITE_CACHE 0x82
  187. #define IDE_FEATURE_DISABLE_POWER_MANAGEMENT 0x85
  188. #define IDE_FEATURE_DISABLE_POWERUP_IN_STANDBY 0x86
  189. #define IDE_FEATURE_CFA_DISABLE_POWER_MODE1 0x8A
  190. #define IDE_FEATURE_ENABLE_MEDIA_STATUS_NOTIFICATION 0x95
  191. #define IDE_FEATURE_ENABLE_READ_LOOKAHEAD 0xAA
  192. #define IDE_FEATURE_DISABLE_AUTOMATIC_ACOUSTIC_MANAGEMENT 0xC2
  193. #define IDE_FEATURE_ENABLE_REVERTING_TO_POWERON_DEFAULTS 0xCC
  194. #define IDE_FEATURE_DISABLE_SERVICE_INTERRUPT 0xDE
  195. static unsigned short ide_base[] = {
  196. IDE_BASE0,
  197. IDE_BASE1,
  198. IDE_BASE2,
  199. IDE_BASE3,
  200. 0
  201. };
  202. static struct controller controllers[IDE_MAX_CONTROLLERS];
  203. static struct harddisk_info harddisk_info[IDE_MAX_DRIVES];
  204. static unsigned char ide_buffer[IDE_SECTOR_SIZE];
  205. static int await_ide(int (*done)(struct controller *ctrl),
  206. struct controller *ctrl, unsigned long timeout)
  207. {
  208. int result;
  209. for(;;) {
  210. result = done(ctrl);
  211. if (result) {
  212. return 0;
  213. }
  214. //poll_interruptions();
  215. if ((timeout == 0) || (currticks() > timeout)) {
  216. break;
  217. }
  218. }
  219. printf("IDE time out\n");
  220. return -1;
  221. }
  222. /* The maximum time any IDE command can last 31 seconds,
  223. * So if any IDE commands takes this long we know we have problems.
  224. */
  225. #define IDE_TIMEOUT (32*TICKS_PER_SEC)
  226. static int not_bsy(struct controller *ctrl)
  227. {
  228. return !(inb(IDE_REG_STATUS(ctrl)) & IDE_STATUS_BSY);
  229. }
  230. /* IDE drives assert BSY bit within 400 nsec when SRST is set.
  231. * Use 2 msec since our tick is 1 msec */
  232. #define IDE_RESET_PULSE (2*TICKS_PER_SEC / 18)
  233. static int bsy(struct controller *ctrl)
  234. {
  235. return inb(IDE_REG_STATUS(ctrl)) & IDE_STATUS_BSY;
  236. }
  237. #if !BSY_SET_DURING_SPINUP
  238. static int timeout(struct controller *ctrl)
  239. {
  240. return 0;
  241. }
  242. #endif
  243. static void print_status(struct controller *ctrl)
  244. {
  245. debug("IDE: status=%#x, err=%#x\n",
  246. inb(IDE_REG_STATUS(ctrl)), inb(IDE_REG_ERROR(ctrl)));
  247. }
  248. static int ide_software_reset(struct controller *ctrl)
  249. {
  250. /* Wait a little bit in case this is immediately after
  251. * hardware reset.
  252. */
  253. mdelay(2);
  254. /* A software reset should not be delivered while the bsy bit
  255. * is set. If the bsy bit does not clear in a reasonable
  256. * amount of time give up.
  257. */
  258. debug("Waiting for ide%d to become ready for reset... ",
  259. ctrl - controllers);
  260. if (await_ide(not_bsy, ctrl, currticks() + IDE_TIMEOUT) < 0) {
  261. debug("failed\n");
  262. return -1;
  263. }
  264. debug("ok\n");
  265. /* Disable Interrupts and reset the ide bus */
  266. outb(IDE_CTRL_HD15 | IDE_CTRL_SRST | IDE_CTRL_NIEN,
  267. IDE_REG_DEVICE_CONTROL(ctrl));
  268. /* If BSY bit is not asserted within 400ns, no device there */
  269. if (await_ide(bsy, ctrl, currticks() + IDE_RESET_PULSE) < 0) {
  270. return -1;
  271. }
  272. outb(IDE_CTRL_HD15 | IDE_CTRL_NIEN, IDE_REG_DEVICE_CONTROL(ctrl));
  273. mdelay(2);
  274. if (await_ide(not_bsy, ctrl, currticks() + IDE_TIMEOUT) < 0) {
  275. return -1;
  276. }
  277. return 0;
  278. }
  279. static void pio_set_registers(
  280. struct controller *ctrl, const struct ide_pio_command *cmd)
  281. {
  282. uint8_t device;
  283. /* Disable Interrupts */
  284. outb(IDE_CTRL_HD15 | IDE_CTRL_NIEN, IDE_REG_DEVICE_CONTROL(ctrl));
  285. /* Possibly switch selected device */
  286. device = inb(IDE_REG_DEVICE(ctrl));
  287. outb(cmd->device, IDE_REG_DEVICE(ctrl));
  288. if ((device & (1UL << 4)) != (cmd->device & (1UL << 4))) {
  289. /* Allow time for the selected drive to switch,
  290. * The linux ide code suggests 50ms is the right
  291. * amount of time to use here.
  292. */
  293. mdelay(50);
  294. }
  295. outb(cmd->feature, IDE_REG_FEATURE(ctrl));
  296. if (cmd->command == IDE_CMD_READ_SECTORS_EXT) {
  297. outb(cmd->sector_count2, IDE_REG_SECTOR_COUNT(ctrl));
  298. outb(cmd->lba_low2, IDE_REG_LBA_LOW(ctrl));
  299. outb(cmd->lba_mid2, IDE_REG_LBA_MID(ctrl));
  300. outb(cmd->lba_high2, IDE_REG_LBA_HIGH(ctrl));
  301. }
  302. outb(cmd->sector_count, IDE_REG_SECTOR_COUNT(ctrl));
  303. outb(cmd->lba_low, IDE_REG_LBA_LOW(ctrl));
  304. outb(cmd->lba_mid, IDE_REG_LBA_MID(ctrl));
  305. outb(cmd->lba_high, IDE_REG_LBA_HIGH(ctrl));
  306. outb(cmd->command, IDE_REG_COMMAND(ctrl));
  307. }
  308. static int pio_non_data(struct controller *ctrl, const struct ide_pio_command *cmd)
  309. {
  310. /* Wait until the busy bit is clear */
  311. if (await_ide(not_bsy, ctrl, currticks() + IDE_TIMEOUT) < 0) {
  312. return -1;
  313. }
  314. pio_set_registers(ctrl, cmd);
  315. ndelay(400);
  316. if (await_ide(not_bsy, ctrl, currticks() + IDE_TIMEOUT) < 0) {
  317. return -1;
  318. }
  319. /* FIXME is there more error checking I could do here? */
  320. return 0;
  321. }
  322. static int pio_data_in(struct controller *ctrl, const struct ide_pio_command *cmd,
  323. void *buffer, size_t bytes)
  324. {
  325. unsigned int status;
  326. /* FIXME handle commands with multiple blocks */
  327. /* Wait until the busy bit is clear */
  328. if (await_ide(not_bsy, ctrl, currticks() + IDE_TIMEOUT) < 0) {
  329. return -1;
  330. }
  331. /* How do I tell if INTRQ is asserted? */
  332. pio_set_registers(ctrl, cmd);
  333. ndelay(400);
  334. if (await_ide(not_bsy, ctrl, currticks() + IDE_TIMEOUT) < 0) {
  335. return -1;
  336. }
  337. status = inb(IDE_REG_STATUS(ctrl));
  338. if (!(status & IDE_STATUS_DRQ)) {
  339. print_status(ctrl);
  340. return -1;
  341. }
  342. insw(IDE_REG_DATA(ctrl), buffer, bytes/2);
  343. status = inb(IDE_REG_STATUS(ctrl));
  344. if (status & IDE_STATUS_DRQ) {
  345. print_status(ctrl);
  346. return -1;
  347. }
  348. return 0;
  349. }
  350. static int pio_packet(struct harddisk_info *info, int in,
  351. const void *packet, int packet_len,
  352. void *buffer, int buffer_len)
  353. {
  354. unsigned int status;
  355. struct ide_pio_command cmd;
  356. memset(&cmd, 0, sizeof(cmd));
  357. /* Wait until the busy bit is clear */
  358. if (await_ide(not_bsy, info->ctrl, currticks() + IDE_TIMEOUT) < 0) {
  359. return -1;
  360. }
  361. /* Issue a PACKET command */
  362. cmd.lba_mid = (uint8_t) buffer_len;
  363. cmd.lba_high = (uint8_t) (buffer_len >> 8);
  364. cmd.device = IDE_DH_DEFAULT | info->slave;
  365. cmd.command = IDE_CMD_PACKET;
  366. pio_set_registers(info->ctrl, &cmd);
  367. ndelay(400);
  368. if (await_ide(not_bsy, info->ctrl, currticks() + IDE_TIMEOUT) < 0) {
  369. return -1;
  370. }
  371. status = inb(IDE_REG_STATUS(info->ctrl));
  372. if (!(status & IDE_STATUS_DRQ)) {
  373. debug("no drq after PACKET\n");
  374. print_status(info->ctrl);
  375. return -1;
  376. }
  377. /* Send the packet */
  378. outsw(IDE_REG_DATA(info->ctrl), packet, packet_len/2);
  379. if (await_ide(not_bsy, info->ctrl, currticks() + IDE_TIMEOUT) < 0) {
  380. return -1;
  381. }
  382. status = inb(IDE_REG_STATUS(info->ctrl));
  383. if (buffer_len == 0) {
  384. if (status & IDE_STATUS_DRQ) {
  385. debug("drq after non-data command\n");
  386. print_status(info->ctrl);
  387. return -1;
  388. }
  389. return 0;
  390. }
  391. if (!(status & IDE_STATUS_DRQ)) {
  392. debug("no drq after sending packet\n");
  393. print_status(info->ctrl);
  394. return -1;
  395. }
  396. insw(IDE_REG_DATA(info->ctrl), buffer, buffer_len/2);
  397. status = inb(IDE_REG_STATUS(info->ctrl));
  398. if (status & IDE_STATUS_DRQ) {
  399. debug("drq after insw\n");
  400. print_status(info->ctrl);
  401. return -1;
  402. }
  403. return 0;
  404. }
  405. static inline int ide_read_sector_chs(
  406. struct harddisk_info *info, void *buffer, unsigned long sector)
  407. {
  408. struct ide_pio_command cmd;
  409. unsigned int track;
  410. unsigned int offset;
  411. unsigned int cylinder;
  412. memset(&cmd, 0, sizeof(cmd));
  413. cmd.sector_count = 1;
  414. //debug("ide_read_sector_chs: sector= %ld.\n",sector);
  415. track = sector / info->sectors_per_track;
  416. /* Sector number */
  417. offset = 1 + (sector % info->sectors_per_track);
  418. cylinder = track / info->heads;
  419. cmd.lba_low = offset;
  420. cmd.lba_mid = cylinder & 0xff;
  421. cmd.lba_high = (cylinder >> 8) & 0xff;
  422. cmd.device = IDE_DH_DEFAULT |
  423. IDE_DH_HEAD(track % info->heads) |
  424. info->slave |
  425. IDE_DH_CHS;
  426. cmd.command = IDE_CMD_READ_SECTORS;
  427. return pio_data_in(info->ctrl, &cmd, buffer, IDE_SECTOR_SIZE);
  428. }
  429. static inline int ide_read_sector_lba(
  430. struct harddisk_info *info, void *buffer, unsigned long sector)
  431. {
  432. struct ide_pio_command cmd;
  433. memset(&cmd, 0, sizeof(cmd));
  434. cmd.sector_count = 1;
  435. cmd.lba_low = sector & 0xff;
  436. cmd.lba_mid = (sector >> 8) & 0xff;
  437. cmd.lba_high = (sector >> 16) & 0xff;
  438. cmd.device = IDE_DH_DEFAULT |
  439. ((sector >> 24) & 0x0f) |
  440. info->slave |
  441. IDE_DH_LBA;
  442. cmd.command = IDE_CMD_READ_SECTORS;
  443. //debug("%s: sector= %ld, device command= 0x%x.\n",__FUNCTION__,(unsigned long) sector, cmd.device);
  444. return pio_data_in(info->ctrl, &cmd, buffer, IDE_SECTOR_SIZE);
  445. }
  446. static inline int ide_read_sector_lba48(
  447. struct harddisk_info *info, void *buffer, sector_t sector)
  448. {
  449. struct ide_pio_command cmd;
  450. memset(&cmd, 0, sizeof(cmd));
  451. //debug("ide_read_sector_lba48: sector= %ld.\n",(unsigned long) sector);
  452. cmd.sector_count = 1;
  453. cmd.lba_low = sector & 0xff;
  454. cmd.lba_mid = (sector >> 8) & 0xff;
  455. cmd.lba_high = (sector >> 16) & 0xff;
  456. cmd.lba_low2 = (sector >> 24) & 0xff;
  457. cmd.lba_mid2 = (sector >> 32) & 0xff;
  458. cmd.lba_high2 = (sector >> 40) & 0xff;
  459. cmd.device = info->slave | IDE_DH_LBA;
  460. cmd.command = IDE_CMD_READ_SECTORS_EXT;
  461. return pio_data_in(info->ctrl, &cmd, buffer, IDE_SECTOR_SIZE);
  462. }
  463. static inline int ide_read_sector_packet(
  464. struct harddisk_info *info, void *buffer, sector_t sector)
  465. {
  466. char packet[12];
  467. static uint8_t cdbuffer[CDROM_SECTOR_SIZE];
  468. static struct harddisk_info *last_disk = 0;
  469. static sector_t last_sector = (sector_t) -1;
  470. uint8_t *buf;
  471. uint32_t hw_sector;
  472. //debug("sector=%Ld\n", sector);
  473. if (info->hw_sector_size == CDROM_SECTOR_SIZE) {
  474. buf = cdbuffer;
  475. hw_sector = sector >> 2;
  476. } else {
  477. buf = buffer;
  478. hw_sector = sector;
  479. }
  480. if (buf==buffer || info != last_disk || hw_sector != last_sector) {
  481. //debug("hw_sector=%u\n", hw_sector);
  482. memset(packet, 0, sizeof packet);
  483. packet[0] = 0x28; /* READ */
  484. packet[2] = hw_sector >> 24;
  485. packet[3] = hw_sector >> 16;
  486. packet[4] = hw_sector >> 8;
  487. packet[5] = hw_sector >> 0;
  488. packet[7] = 0;
  489. packet[8] = 1; /* length */
  490. if (pio_packet(info, 1, packet, sizeof packet,
  491. buf, info->hw_sector_size) != 0) {
  492. debug("read error\n");
  493. return -1;
  494. }
  495. last_disk = info;
  496. last_sector = hw_sector;
  497. }
  498. if (buf != buffer)
  499. memcpy(buffer, &cdbuffer[(sector & 3) << 9], IDE_SECTOR_SIZE);
  500. return 0;
  501. }
  502. int ide_read(int drive, sector_t sector, void *buffer)
  503. {
  504. struct harddisk_info *info = &harddisk_info[drive];
  505. int result;
  506. //debug("drive=%d, sector=%ld\n",drive,(unsigned long) sector);
  507. /* Report the buffer is empty */
  508. if (sector > info->sectors) {
  509. return -1;
  510. }
  511. if (info->address_mode == ADDRESS_MODE_CHS) {
  512. result = ide_read_sector_chs(info, buffer, sector);
  513. }
  514. else if (info->address_mode == ADDRESS_MODE_LBA) {
  515. result = ide_read_sector_lba(info, buffer, sector);
  516. }
  517. else if (info->address_mode == ADDRESS_MODE_LBA48) {
  518. result = ide_read_sector_lba48(info, buffer, sector);
  519. }
  520. else if (info->address_mode == ADDRESS_MODE_PACKET) {
  521. result = ide_read_sector_packet(info, buffer, sector);
  522. }
  523. else {
  524. result = -1;
  525. }
  526. return result;
  527. }
  528. static int init_drive_x(struct harddisk_info *info, struct controller *ctrl,
  529. int slave, int drive, unsigned char *buffer, int ident_command)
  530. {
  531. uint16_t* drive_info;
  532. struct ide_pio_command cmd;
  533. int i;
  534. info->ctrl = ctrl;
  535. info->heads = 0u;
  536. info->cylinders = 0u;
  537. info->sectors_per_track = 0u;
  538. info->address_mode = IDE_DH_CHS;
  539. info->sectors = 0ul;
  540. info->drive_exists = 0;
  541. info->slave_absent = 0;
  542. info->removable = 0;
  543. info->hw_sector_size = IDE_SECTOR_SIZE;
  544. info->slave = slave?IDE_DH_SLAVE: IDE_DH_MASTER;
  545. debug("Testing for hd%c\n", 'a'+drive);
  546. /* Select the drive that we are testing */
  547. outb(IDE_DH_DEFAULT | IDE_DH_HEAD(0) | IDE_DH_CHS | info->slave,
  548. IDE_REG_DEVICE(ctrl));
  549. mdelay(50);
  550. /* Test to see if the drive registers exist,
  551. * In many cases this quickly rules out a missing drive.
  552. */
  553. for(i = 0; i < 4; i++) {
  554. outb(0xaa + i, (ctrl->cmd_base) + 2 + i);
  555. }
  556. for(i = 0; i < 4; i++) {
  557. if (inb((ctrl->cmd_base) + 2 + i) != 0xaa + i) {
  558. return 1;
  559. }
  560. }
  561. for(i = 0; i < 4; i++) {
  562. outb(0x55 + i, (ctrl->cmd_base) + 2 + i);
  563. }
  564. for(i = 0; i < 4; i++) {
  565. if (inb((ctrl->cmd_base) + 2 + i) != 0x55 + i) {
  566. return 1;
  567. }
  568. }
  569. debug("Probing for hd%c\n", 'a'+drive);
  570. memset(&cmd, 0, sizeof(cmd));
  571. cmd.device = IDE_DH_DEFAULT | IDE_DH_HEAD(0) | IDE_DH_CHS | info->slave;
  572. cmd.command = ident_command;
  573. if (pio_data_in(ctrl, &cmd, buffer, IDE_SECTOR_SIZE) < 0) {
  574. /* Well, if that command didn't work, we probably don't have drive. */
  575. return 1;
  576. }
  577. /* Now suck the data out */
  578. drive_info = (uint16_t *)buffer;
  579. if (drive_info[2] == 0x37C8) {
  580. /* If the response is incomplete spin up the drive... */
  581. memset(&cmd, 0, sizeof(cmd));
  582. cmd.device = IDE_DH_DEFAULT | IDE_DH_HEAD(0) | IDE_DH_CHS |
  583. info->slave;
  584. cmd.feature = IDE_FEATURE_STANDBY_SPINUP_DRIVE;
  585. if (pio_non_data(ctrl, &cmd) < 0) {
  586. /* If the command doesn't work give up on the drive */
  587. return 1;
  588. }
  589. }
  590. if ((drive_info[2] == 0x37C8) || (drive_info[2] == 0x8C73)) {
  591. /* The response is incomplete retry the drive info command */
  592. memset(&cmd, 0, sizeof(cmd));
  593. cmd.device = IDE_DH_DEFAULT | IDE_DH_HEAD(0) | IDE_DH_CHS |
  594. info->slave;
  595. cmd.command = ident_command;
  596. if(pio_data_in(ctrl, &cmd, buffer, IDE_SECTOR_SIZE) < 0) {
  597. /* If the command didn't work give up on the drive. */
  598. return 1;
  599. }
  600. }
  601. if ((drive_info[2] != 0x37C8) &&
  602. (drive_info[2] != 0x738C) &&
  603. (drive_info[2] != 0x8C73) &&
  604. (drive_info[2] != 0xC837) &&
  605. (drive_info[2] != 0x0000)) {
  606. debugx("Invalid IDE Configuration: %hx\n", drive_info[2]);
  607. return 1;
  608. }
  609. for(i = 27; i < 47; i++) {
  610. info->model_number[((i-27)<< 1)] = (drive_info[i] >> 8) & 0xff;
  611. info->model_number[((i-27)<< 1)+1] = drive_info[i] & 0xff;
  612. }
  613. info->model_number[40] = '\0';
  614. info->drive_exists = 1;
  615. /* See if LBA is supported */
  616. if (ident_command == IDE_CMD_IDENTIFY_PACKET_DEVICE) {
  617. info->address_mode = ADDRESS_MODE_PACKET;
  618. info->removable = 1; /* XXX */
  619. } else if (drive_info[49] & (1 << 9)) {
  620. info->address_mode = ADDRESS_MODE_LBA;
  621. info->sectors = (drive_info[61] << 16) | (drive_info[60]);
  622. // debug("LBA mode, sectors=%Ld\n", info->sectors);
  623. /* Enable LBA48 mode if it is present */
  624. if (drive_info[83] & (1 <<10)) {
  625. /* Should LBA48 depend on LBA? */
  626. info->address_mode = ADDRESS_MODE_LBA48;
  627. info->sectors =
  628. (((sector_t)drive_info[103]) << 48) |
  629. (((sector_t)drive_info[102]) << 32) |
  630. (((sector_t)drive_info[101]) << 16) |
  631. (((sector_t)drive_info[100]) << 0);
  632. // debug("LBA48 mode, sectors=%Ld\n", info->sectors);
  633. }
  634. } else {
  635. info->address_mode = ADDRESS_MODE_CHS;
  636. info->heads = drive_info[3];
  637. info->cylinders = drive_info[1];
  638. info->sectors_per_track = drive_info[6];
  639. info->sectors =
  640. info->sectors_per_track *
  641. info->heads *
  642. info->cylinders;
  643. debug("CHS mode, sectors_per_track=[%d], heads=[%d], cylinders=[%d]\n",
  644. info->sectors_per_track,
  645. info->heads,
  646. info->cylinders);
  647. // debug("sectors=%Ld\n", info->sectors);
  648. }
  649. /* See if we have a slave */
  650. if (!info->slave && (((drive_info[93] >> 14) & 3) == 1)) {
  651. info->slave_absent = !(drive_info[93] & (1 << 5));
  652. }
  653. /* See if we need to put the device in CFA power mode 1 */
  654. if ((drive_info[160] & ((1 << 15) | (1 << 13)| (1 << 12))) ==
  655. ((1 << 15) | (1 << 13)| (1 << 12))) {
  656. memset(&cmd, 0, sizeof(cmd));
  657. cmd.device = IDE_DH_DEFAULT | IDE_DH_HEAD(0) | IDE_DH_CHS | info->slave;
  658. cmd.feature = IDE_FEATURE_CFA_ENABLE_POWER_MODE1;
  659. if (pio_non_data(ctrl, &cmd) < 0) {
  660. /* If I need to power up the drive, and I can't
  661. * give up.
  662. */
  663. debugx("Cannot power up CFA device\n");
  664. return 1;
  665. }
  666. }
  667. /* Some extra steps for older drives.. */
  668. if (info->address_mode != ADDRESS_MODE_PACKET) {
  669. /* Initialize drive parameters
  670. * This is an obsolete command (disappeared as of ATA-6)
  671. * but old drives need it before accessing media. */
  672. memset(&cmd, 0, sizeof(cmd));
  673. cmd.device = IDE_DH_DEFAULT | IDE_DH_HEAD(drive_info[3] - 1)
  674. | info->slave;
  675. cmd.sector_count = drive_info[6];
  676. cmd.command = IDE_CMD_INITIALIZE_DRIVE_PARAMETERS;
  677. debug("Init device params... ");
  678. if (pio_non_data(ctrl, &cmd) < 0) {
  679. debug("failed (ok for newer drives)\n");
  680. }
  681. else{
  682. debug("ok\n");
  683. }
  684. }
  685. printf("hd%c: %s",
  686. 'a'+drive,
  687. (info->address_mode==ADDRESS_MODE_CHS) ? "CHS" :
  688. (info->address_mode==ADDRESS_MODE_LBA) ? "LBA" :
  689. (info->address_mode==ADDRESS_MODE_LBA48) ? "LBA48" :
  690. (info->address_mode==ADDRESS_MODE_PACKET) ? "ATAPI" : "???");
  691. #if 0
  692. // can not pass compiler
  693. if (info->sectors > (10LL*1000*1000*1000/512))
  694. printf(" %uGB", (unsigned) (info->sectors / (1000*1000*1000/512)));
  695. else if (info->sectors > (10*1000*1000/512))
  696. printf(" %uMB", (unsigned) (info->sectors / (1000*1000/512)));
  697. else if (info->sectors > 0)
  698. printf(" %uKB", (unsigned) (info->sectors / 2));
  699. #endif
  700. printf(": %s\n", info->model_number);
  701. return 0;
  702. }
  703. /* Experimental floating bus detection
  704. * As Eric mentions, we get stuck when the bus has no drive
  705. * and floating high. To avoid this, try some heuristics.
  706. * This is based on a paper on Phoenix website. --ts1 */
  707. static int ide_bus_floating(struct controller *ctrl)
  708. {
  709. unsigned long timeout;
  710. unsigned char status;
  711. /* Test 1: if status reads 0xff, probably no device is present
  712. * on the bus. Repeat this for 20msec. */
  713. timeout = currticks() + 20 * TICKS_PER_SEC / 18;
  714. status = 0;
  715. do {
  716. /* Take logical OR to avoid chattering */
  717. status |= inb(IDE_REG_STATUS(ctrl));
  718. /* If it makes 0xff, it's possible to be floating,
  719. * do test2 to ensure. */
  720. if (status == 0xff)
  721. goto test2;
  722. /* If BSY bit is not set, it's harmless to continue probing. */
  723. if ((status & IDE_STATUS_BSY) == 0)
  724. return 0;
  725. } while (currticks() < timeout);
  726. /* Timed out. Logical ORed status didn't make 0xFF.
  727. * We have something there. */
  728. return 0;
  729. test2:
  730. /* Test 2: write something to registers, then read back and
  731. * compare. Note that ATA spec inhibits this while BSY is set,
  732. * but for many drives this works. This is a confirmation step anyway.
  733. */
  734. outb(0xaa, ctrl->cmd_base + 2);
  735. outb(0x55, ctrl->cmd_base + 3);
  736. outb(0xff, ctrl->cmd_base + 4);
  737. if (inb(ctrl->cmd_base+2) == 0xaa
  738. && inb(ctrl->cmd_base+3) == 0x55
  739. && inb(ctrl->cmd_base+4) == 0xff) {
  740. /* We have some registers there.
  741. * Though this does not mean it is not a NIC or something... */
  742. return 0;
  743. }
  744. /* Status port is 0xFF, and other registers are not there.
  745. * Most certainly this bus is floating. */
  746. debugx("Detected floating bus\n");
  747. return 1;
  748. }
  749. static int init_controller(struct controller *ctrl, int drive, unsigned char *buffer)
  750. {
  751. struct harddisk_info *info;
  752. /* Put the drives ide channel in a know state and wait
  753. * for the drives to spinup.
  754. *
  755. * In practice IDE disks tend not to respond to commands until
  756. * they have spun up. This makes IDE hard to deal with
  757. * immediately after power up, as the delays can be quite
  758. * long, so we must be very careful here.
  759. *
  760. * There are two pathological cases that must be dealt with:
  761. *
  762. * - The BSY bit not being set while the IDE drives spin up.
  763. * In this cases only a hard coded delay will work. As
  764. * I have not reproduced it, and this is out of spec for
  765. * IDE drives the work around can be enabled by setting
  766. * BSY_SET_DURING_SPINUP to 0.
  767. *
  768. * - The BSY bit floats high when no drives are plugged in.
  769. * This case will not be detected except by timing out but
  770. * we avoid the problems by only probing devices we are
  771. * supposed to boot from. If we don't do the probe we
  772. * will not experience the problem.
  773. *
  774. * So speed wise I am only slow if the BSY bit is not set
  775. * or not reported by the IDE controller during spinup, which
  776. * is quite rare.
  777. *
  778. */
  779. #if !BSY_SET_DURING_SPINUP
  780. if (await_ide(timeout, ctrl, currticks() + IDE_TIMEOUT) < 0) {
  781. return -1;
  782. }
  783. #endif
  784. /* ts1: Try some heuristics to avoid waiting for floating bus */
  785. if (ide_bus_floating(ctrl))
  786. return -1;
  787. if (ide_software_reset(ctrl) < 0) {
  788. return -1;
  789. }
  790. /* Note: I have just done a software reset. It may be
  791. * reasonable to just read the boot time signatures
  792. * off of the drives to see if they are present.
  793. *
  794. * For now I will go with just sending commands to the drives
  795. * and assuming filtering out missing drives by detecting registers
  796. * that won't set and commands that fail to execute properly.
  797. */
  798. /* Now initialize the individual drives */
  799. info = &harddisk_info[drive];
  800. init_drive_x(info, ctrl, 0, drive, buffer, IDE_CMD_IDENTIFY_DEVICE);
  801. if (!info->drive_exists)
  802. init_drive_x(info, ctrl, 0, drive, buffer,
  803. IDE_CMD_IDENTIFY_PACKET_DEVICE);
  804. if (info->drive_exists && !info->slave_absent) {
  805. drive++;
  806. info++;
  807. init_drive_x(info, ctrl, 1, drive, buffer,
  808. IDE_CMD_IDENTIFY_DEVICE);
  809. if (!info->drive_exists)
  810. init_drive_x(info, ctrl, 1, drive, buffer,
  811. IDE_CMD_IDENTIFY_PACKET_DEVICE);
  812. }
  813. return 0;
  814. }
  815. static int
  816. atapi_request_sense(struct harddisk_info *info, uint8_t *asc, uint8_t *ascq)
  817. {
  818. uint8_t packet[12];
  819. uint8_t buf[18];
  820. int i;
  821. memset(packet, 0, sizeof packet);
  822. packet[0] = 0x03; /* REQUEST SENSE */
  823. packet[4] = sizeof buf;
  824. if (pio_packet(info, 1, packet, sizeof packet, buf, sizeof buf) != 0)
  825. return -1;
  826. for (i = 0; i < sizeof buf; i++)
  827. debug("%02x ", buf[i]);
  828. debug("\n");
  829. if (asc)
  830. *asc = buf[12];
  831. if (ascq)
  832. *ascq = buf[13];
  833. return 0;
  834. }
  835. static int atapi_detect_medium(struct harddisk_info *info)
  836. {
  837. uint8_t packet[12];
  838. uint8_t buf[8];
  839. uint32_t block_len, sectors;
  840. unsigned long timeout;
  841. uint8_t asc, ascq;
  842. int in_progress;
  843. memset(packet, 0, sizeof packet);
  844. packet[0] = 0x25; /* READ CAPACITY */
  845. /* Retry READ CAPACITY for 5 seconds unless MEDIUM NOT PRESENT
  846. * is reported by the drive. If the drive reports "IN PROGRESS",
  847. * 30 seconds is added. */
  848. timeout = currticks() + 5*TICKS_PER_SEC;
  849. in_progress = 0;
  850. while (currticks() < timeout) {
  851. if (pio_packet(info, 1, packet, sizeof packet, buf, sizeof buf)
  852. == 0)
  853. goto ok;
  854. if (atapi_request_sense(info, &asc, &ascq) == 0) {
  855. if (asc == 0x3a) { /* MEDIUM NOT PRESENT */
  856. debug("Device reports MEDIUM NOT PRESENT\n");
  857. return -1;
  858. }
  859. if (asc == 0x04 && ascq == 0x01 && !in_progress) {
  860. /* IN PROGRESS OF BECOMING READY */
  861. printf("Waiting for drive to detect "
  862. "the medium... ");
  863. /* Allow 30 seconds more */
  864. timeout = currticks() + 30*TICKS_PER_SEC;
  865. in_progress = 1;
  866. }
  867. }
  868. mdelay(100);
  869. }
  870. debug("read capacity failed\n");
  871. return -1;
  872. ok:
  873. block_len = (uint32_t) buf[4] << 24
  874. | (uint32_t) buf[5] << 16
  875. | (uint32_t) buf[6] << 8
  876. | (uint32_t) buf[7] << 0;
  877. debug("block_len=%u\n", block_len);
  878. if (block_len != IDE_SECTOR_SIZE && block_len != CDROM_SECTOR_SIZE) {
  879. debugx("Unsupported sector size %u\n", block_len);
  880. return -1;
  881. }
  882. info->hw_sector_size = block_len;
  883. sectors = (uint32_t) buf[0] << 24
  884. | (uint32_t) buf[1] << 16
  885. | (uint32_t) buf[2] << 8
  886. | (uint32_t) buf[3] << 0;
  887. debug("sectors=%u\n", sectors);
  888. if (info->hw_sector_size == CDROM_SECTOR_SIZE)
  889. sectors <<= 2; /* # of sectors in 512-byte "soft" sector */
  890. if (sectors != info->sectors)
  891. printf("%dMB medium detected\n", sectors>>(20-9));
  892. info->sectors = sectors;
  893. return 0;
  894. }
  895. static int detect_medium(struct harddisk_info *info)
  896. {
  897. if (info->address_mode == ADDRESS_MODE_PACKET) {
  898. if (atapi_detect_medium(info) != 0)
  899. return -1;
  900. } else {
  901. debug("not implemented for non-ATAPI device\n");
  902. return -1;
  903. }
  904. return 0;
  905. }
  906. static int find_ide_controller_compat(struct controller *ctrl, int index)
  907. {
  908. if (index >= IDE_MAX_CONTROLLERS)
  909. return -1;
  910. ctrl->cmd_base = ide_base[index];
  911. ctrl->ctrl_base = ide_base[index] + IDE_REG_EXTENDED_OFFSET;
  912. return 0;
  913. }
  914. #ifdef SUPPORT_PCI
  915. static int find_ide_controller(struct controller *ctrl, int ctrl_index)
  916. {
  917. int pci_index;
  918. struct pci_device *dev;
  919. unsigned int mask;
  920. uint32_t x;
  921. /* A PCI IDE controller has two channels (pri, sec) */
  922. pci_index = ctrl_index >> 1;
  923. /* Find a IDE storage class device */
  924. dev = pci_find_device_2(-1, -1, 0x0101, 0x0180, -1, pci_index);
  925. if (!dev) {
  926. debug("PCI IDE #%d not found\n", pci_index);
  927. return -1;
  928. }
  929. debug("found PCI IDE controller %04x:%04x prog_if=%#x\n",
  930. dev->vendor, dev->dev_id, ((dev->class>>8) & 0xff));
  931. /* See how this controller is configured */
  932. mask = (ctrl_index & 1) ? 4 : 1;
  933. debug("%s channel: ", (ctrl_index & 1) ? "secodary" : "primary");
  934. if ( (((dev->class>>8) & 0xff) & mask) || ((dev->class>>16)!= 0x0101)) { // 0x0180 and other must use native PCI mode
  935. debug("native PCI mode\n");
  936. if ((ctrl_index & 1) == 0) {
  937. /* Primary channel */
  938. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0,&x);
  939. ctrl->cmd_base = x;
  940. pci_read_config_dword(dev, PCI_BASE_ADDRESS_1,&x);
  941. ctrl->ctrl_base = x;
  942. } else {
  943. /* Secondary channel */
  944. pci_read_config_dword(dev, PCI_BASE_ADDRESS_2,&x);
  945. ctrl->cmd_base = x;
  946. pci_read_config_dword(dev, PCI_BASE_ADDRESS_3,&x);
  947. ctrl->ctrl_base = x;
  948. }
  949. ctrl->cmd_base &= ~3;
  950. ctrl->ctrl_base &= ~3;
  951. } else {
  952. debug("compatibility mode\n");
  953. if (find_ide_controller_compat(ctrl, ctrl_index) != 0)
  954. return -1;
  955. }
  956. debug("cmd_base=%#x ctrl_base=%#x\n", ctrl->cmd_base, ctrl->ctrl_base);
  957. #if 0
  958. debug("cmd+0=%0#x\n", inb(ctrl->cmd_base+0));
  959. debug("cmd+1=%0#x\n", inb(ctrl->cmd_base+1));
  960. debug("cmd+2=%0#x\n", inb(ctrl->cmd_base+2));
  961. debug("cmd+3=%0#x\n", inb(ctrl->cmd_base+3));
  962. debug("cmd+4=%0#x\n", inb(ctrl->cmd_base+4));
  963. debug("cmd+5=%0#x\n", inb(ctrl->cmd_base+5));
  964. debug("cmd+6=%0#x\n", inb(ctrl->cmd_base+6));
  965. debug("cmd+7=%0#x\n", inb(ctrl->cmd_base+7));
  966. debug("ctrl+0=%0#x\n", inb(ctrl->ctrl_base+0));
  967. debug("ctrl+1=%0#x\n", inb(ctrl->ctrl_base+1));
  968. debug("ctrl+2=%0#x\n", inb(ctrl->ctrl_base+2));
  969. debug("ctrl+3=%0#x\n", inb(ctrl->ctrl_base+3));
  970. #endif
  971. return 0;
  972. }
  973. #else /* !SUPPORT_PCI */
  974. # define find_ide_controller find_ide_controller_compat
  975. #endif
  976. int ide_probe(int drive)
  977. {
  978. struct controller *ctrl;
  979. int ctrl_index;
  980. struct harddisk_info *info;
  981. if (drive >= IDE_MAX_DRIVES) {
  982. debugx("Unsupported drive number\n");
  983. return -1;
  984. }
  985. /* A controller has two drives (master, slave) */
  986. ctrl_index = drive >> 1;
  987. ctrl = &controllers[ctrl_index];
  988. if (ctrl->cmd_base == 0) {
  989. if (find_ide_controller(ctrl, ctrl_index) != 0) {
  990. debugx("IDE channel %d not found\n", ctrl_index);
  991. return -1;
  992. }
  993. if (init_controller(ctrl, drive & ~1, ide_buffer) != 0) {
  994. printf("No drive detected on IDE channel %d\n",
  995. ctrl_index);
  996. return -1;
  997. }
  998. }
  999. info = &harddisk_info[drive];
  1000. if (!info->drive_exists) {
  1001. printf("Drive %d does not exist\n", drive);
  1002. return -1;
  1003. }
  1004. if (info->removable) {
  1005. if (detect_medium(info) != 0) {
  1006. printf("Media detection failed\n");
  1007. return -1;
  1008. }
  1009. }
  1010. return 0;
  1011. }
  1012. /* vim:set sts=8 sw=8: */