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eepro100.c 33KB

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  1. /*
  2. * eepro100.c -- This is a driver for Intel Fast Ethernet Controllers
  3. * (ifec).
  4. *
  5. * Originally written for Etherboot by:
  6. *
  7. * Copyright (C) AW Computer Systems.
  8. * written by R.E.Wolff -- R.E.Wolff@BitWizard.nl
  9. *
  10. * AW Computer Systems is contributing to the free software community
  11. * by paying for this driver and then putting the result under GPL.
  12. *
  13. * If you need a Linux device driver, please contact BitWizard for a
  14. * quote.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation; either version 2, or (at
  19. * your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  24. * General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  29. *
  30. *
  31. * date version by what
  32. * Written: May 29 1997 V0.10 REW Initial revision.
  33. * changes: May 31 1997 V0.90 REW Works!
  34. * Jun 1 1997 V0.91 REW Cleanup
  35. * Jun 2 1997 V0.92 REW Add some code documentation
  36. * Jul 25 1997 V1.00 REW Tested by AW to work in a PROM
  37. * Cleanup for publication
  38. * Dez 11 2004 V1.10 Kiszka Add RX ring buffer support
  39. * Jun 2008 v2.0 mdeck Updated to gPXE. Changed much.
  40. *
  41. * Cleanups and fixes by Thomas Miletich<thomas.miletich@gmail.com>
  42. *
  43. * This is the etherboot intel etherexpress Pro/100B driver.
  44. *
  45. * It was written from scratch, with Donald Beckers eepro100.c kernel
  46. * driver as a guideline. Mostly the 82557 related definitions and the
  47. * lower level routines have been cut-and-pasted into this source.
  48. *
  49. * The driver was finished before Intel got the NDA out of the closet.
  50. *
  51. * Datasheet is now published and available from
  52. * ftp://download.intel.com/design/network/manuals/8255X_OpenSDM.pdf
  53. * - Michael Brown
  54. * */
  55. FILE_LICENCE ( GPL2_OR_LATER );
  56. /*
  57. * General Theory of Operation
  58. *
  59. * Initialization
  60. *
  61. * ifec_pci_probe() is called by gPXE during initialization. Typical NIC
  62. * initialization is performed. EEPROM data is read.
  63. *
  64. * Network Boot
  65. *
  66. * ifec_net_open() is called by gPXE before attempting to network boot from the
  67. * card. Here, the Command Unit & Receive Unit are initialized. The tx & rx
  68. * rings are setup. The MAC address is programmed and the card is configured.
  69. *
  70. * Transmit
  71. *
  72. * ifec_net_transmit() enqueues a packet in the tx ring - active::tcbs[] The tx
  73. * ring is composed of TCBs linked to each other into a ring. A tx request
  74. * fills out the next available TCB with a pointer to the packet data.
  75. * The last enqueued tx is always at active::tcb_head. Thus, a tx request fills
  76. * out the TCB following tcb_head.
  77. * active::tcb_tail points to the TCB we're awaiting completion of.
  78. * ifec_tx_process() checks tcb_tail, and once complete,
  79. * blindly increments tcb_tail to the next ring TCB.
  80. *
  81. * Receive
  82. *
  83. * priv::rfds[] is an array of Receive Frame Descriptors. The RFDs are linked
  84. * together to form a ring.
  85. * ifec_net_poll() calls ifec_rx_process(), which checks the next RFD for
  86. * data. If we received a packet, we allocate a new io_buffer and copy the
  87. * packet data into it. If alloc_iob() fails, we don't touch the RFD and try
  88. * again on the next poll.
  89. */
  90. /*
  91. * Debugging levels:
  92. * - DBG() is for any errors, i.e. failed alloc_iob(), malloc_dma(),
  93. * TX overflow, corrupted packets, ...
  94. * - DBG2() is for successful events, like packet received,
  95. * packet transmitted, and other general notifications.
  96. * - DBGP() prints the name of each called function on entry
  97. */
  98. #include <stdint.h>
  99. #include <byteswap.h>
  100. #include <errno.h>
  101. #include <stdio.h>
  102. #include <unistd.h>
  103. #include <gpxe/ethernet.h>
  104. #include <gpxe/if_ether.h>
  105. #include <gpxe/iobuf.h>
  106. #include <gpxe/malloc.h>
  107. #include <gpxe/pci.h>
  108. #include <gpxe/spi_bit.h>
  109. #include <gpxe/timer.h>
  110. #include <gpxe/nvs.h>
  111. #include <gpxe/threewire.h>
  112. #include <gpxe/netdevice.h>
  113. #include "eepro100.h"
  114. /****************************** Global data **********************************/
  115. /*
  116. * This is the default configuration command data. The values were copied from
  117. * the Linux kernel initialization for the eepro100.
  118. */
  119. static struct ifec_cfg ifec_cfg = {
  120. .status = 0,
  121. .command = CmdConfigure | CmdSuspend,
  122. .link = 0, /* Filled in later */
  123. .byte = { 22, /* How many bytes in this array */
  124. ( TX_FIFO << 4 ) | RX_FIFO, /* Rx & Tx FIFO limits */
  125. 0, 0, /* Adaptive Interframe Spacing */
  126. RX_DMA_COUNT, /* Rx DMA max byte count */
  127. TX_DMA_COUNT + 0x80, /* Tx DMA max byte count */
  128. 0x32, /* Many bits. */
  129. 0x03, /* Discard short receive & Underrun retries */
  130. 1, /* 1=Use MII 0=Use AUI */
  131. 0,
  132. 0x2E, /* NSAI, Preamble length, & Loopback*/
  133. 0, /* Linear priority */
  134. 0x60, /* L PRI MODE & Interframe spacing */
  135. 0, 0xf2,
  136. 0x48, /* Promiscuous, Broadcast disable, CRS & CDT */
  137. 0, 0x40,
  138. 0xf2, /* Stripping, Padding, Receive CRC Transfer */
  139. 0x80, /* 0x40=Force full-duplex, 0x80=Allowfull-duplex*/
  140. 0x3f, /* Multiple IA */
  141. 0x0D } /* Multicast all */
  142. };
  143. static struct net_device_operations ifec_operations = {
  144. .open = ifec_net_open,
  145. .close = ifec_net_close,
  146. .transmit = ifec_net_transmit,
  147. .poll = ifec_net_poll,
  148. .irq = ifec_net_irq
  149. };
  150. /******************* gPXE PCI Device Driver API functions ********************/
  151. /*
  152. * Initialize the PCI device.
  153. *
  154. * @v pci The device's associated pci_device structure.
  155. * @v id The PCI device + vendor id.
  156. * @ret rc Returns zero if successfully initialized.
  157. *
  158. * This function is called very early on, while gPXE is initializing.
  159. * This is a gPXE PCI Device Driver API function.
  160. */
  161. static int ifec_pci_probe ( struct pci_device *pci,
  162. const struct pci_device_id *id __unused )
  163. {
  164. struct net_device *netdev;
  165. struct ifec_private *priv;
  166. int rc;
  167. DBGP ( "ifec_pci_probe: " );
  168. if ( pci->ioaddr == 0 )
  169. return -EINVAL;
  170. netdev = alloc_etherdev ( sizeof(*priv) );
  171. if ( !netdev )
  172. return -ENOMEM;
  173. netdev_init ( netdev, &ifec_operations );
  174. priv = netdev->priv;
  175. pci_set_drvdata ( pci, netdev );
  176. netdev->dev = &pci->dev;
  177. /* enable bus master, etc */
  178. adjust_pci_device( pci );
  179. DBGP ( "pci " );
  180. memset ( priv, 0, sizeof(*priv) );
  181. priv->ioaddr = pci->ioaddr;
  182. ifec_reset ( netdev );
  183. DBGP ( "reset " );
  184. ifec_init_eeprom ( netdev );
  185. /* read MAC address */
  186. nvs_read ( &priv->eeprom.nvs, EEPROM_ADDR_MAC_0, netdev->hw_addr,
  187. ETH_ALEN );
  188. /* read mdio_register */
  189. nvs_read ( &priv->eeprom.nvs, EEPROM_ADDR_MDIO_REGISTER,
  190. &priv->mdio_register, 2 );
  191. ifec_link_update ( netdev ); /* Update link state */
  192. if ( ( rc = register_netdev ( netdev ) ) != 0 )
  193. goto error;
  194. DBGP ( "ints\n" );
  195. return 0;
  196. error:
  197. ifec_reset ( netdev );
  198. netdev_nullify ( netdev );
  199. netdev_put ( netdev );
  200. return rc;
  201. }
  202. /*
  203. * Remove a device from the PCI device list.
  204. *
  205. * @v pci PCI device to remove.
  206. *
  207. * This is a PCI Device Driver API function.
  208. */
  209. static void ifec_pci_remove ( struct pci_device *pci )
  210. {
  211. struct net_device *netdev = pci_get_drvdata ( pci );
  212. DBGP ( "ifec_pci_remove\n" );
  213. unregister_netdev ( netdev );
  214. ifec_reset ( netdev );
  215. netdev_nullify ( netdev );
  216. netdev_put ( netdev );
  217. }
  218. /****************** gPXE Network Device Driver API functions *****************/
  219. /*
  220. * Close a network device.
  221. *
  222. * @v netdev Device to close.
  223. *
  224. * This is a gPXE Network Device Driver API function.
  225. */
  226. static void ifec_net_close ( struct net_device *netdev )
  227. {
  228. struct ifec_private *priv = netdev->priv;
  229. unsigned long ioaddr = priv->ioaddr;
  230. unsigned short intr_status;
  231. DBGP ( "ifec_net_close\n" );
  232. /* disable interrupts */
  233. ifec_net_irq ( netdev, 0 );
  234. /* Ack & clear ints */
  235. intr_status = inw ( ioaddr + SCBStatus );
  236. outw ( intr_status, ioaddr + SCBStatus );
  237. inw ( ioaddr + SCBStatus );
  238. ifec_reset ( netdev );
  239. /* Free any resources */
  240. ifec_free ( netdev );
  241. }
  242. /* Interrupts to be masked */
  243. #define INTERRUPT_MASK ( SCBMaskEarlyRx | SCBMaskFlowCtl )
  244. /*
  245. * Enable or disable IRQ masking.
  246. *
  247. * @v netdev Device to control.
  248. * @v enable Zero to mask off IRQ, non-zero to enable IRQ.
  249. *
  250. * This is a gPXE Network Driver API function.
  251. */
  252. static void ifec_net_irq ( struct net_device *netdev, int enable )
  253. {
  254. struct ifec_private *priv = netdev->priv;
  255. unsigned long ioaddr = priv->ioaddr;
  256. DBGP ( "ifec_net_irq\n" );
  257. outw ( enable ? INTERRUPT_MASK : SCBMaskAll, ioaddr + SCBCmd );
  258. }
  259. /*
  260. * Opens a network device.
  261. *
  262. * @v netdev Device to be opened.
  263. * @ret rc Non-zero if failed to open.
  264. *
  265. * This enables tx and rx on the device.
  266. * This is a gPXE Network Device Driver API function.
  267. */
  268. static int ifec_net_open ( struct net_device *netdev )
  269. {
  270. struct ifec_private *priv = netdev->priv;
  271. struct ifec_ias *ias = NULL;
  272. struct ifec_cfg *cfg = NULL;
  273. int i, options;
  274. int rc = -ENOMEM;
  275. DBGP ( "ifec_net_open: " );
  276. /* Ensure interrupts are disabled. */
  277. ifec_net_irq ( netdev, 0 );
  278. /* Initialize Command Unit and Receive Unit base addresses. */
  279. ifec_scb_cmd ( netdev, 0, RUAddrLoad );
  280. ifec_scb_cmd ( netdev, virt_to_bus ( &priv->stats ), CUStatsAddr );
  281. ifec_scb_cmd ( netdev, 0, CUCmdBase );
  282. /* Initialize both rings */
  283. if ( ( rc = ifec_rx_setup ( netdev ) ) != 0 )
  284. goto error;
  285. if ( ( rc = ifec_tx_setup ( netdev ) ) != 0 )
  286. goto error;
  287. /* Initialize MDIO */
  288. options = 0x00; /* 0x40 = 10mbps half duplex, 0x00 = Autosense */
  289. ifec_mdio_setup ( netdev, options );
  290. /* Prepare MAC address w/ Individual Address Setup (ias) command.*/
  291. ias = malloc_dma ( sizeof ( *ias ), CB_ALIGN );
  292. if ( !ias ) {
  293. rc = -ENOMEM;
  294. goto error;
  295. }
  296. ias->command = CmdIASetup;
  297. ias->status = 0;
  298. memcpy ( ias->ia, netdev->ll_addr, ETH_ALEN );
  299. /* Prepare operating parameters w/ a configure command. */
  300. cfg = malloc_dma ( sizeof ( *cfg ), CB_ALIGN );
  301. if ( !cfg ) {
  302. rc = -ENOMEM;
  303. goto error;
  304. }
  305. memcpy ( cfg, &ifec_cfg, sizeof ( *cfg ) );
  306. cfg->link = virt_to_bus ( priv->tcbs );
  307. cfg->byte[19] = ( options & 0x10 ) ? 0xC0 : 0x80;
  308. ias->link = virt_to_bus ( cfg );
  309. /* Issue the ias and configure commands. */
  310. ifec_scb_cmd ( netdev, virt_to_bus ( ias ), CUStart );
  311. ifec_scb_cmd_wait ( netdev );
  312. priv->configured = 1;
  313. /* Wait up to 10 ms for configuration to initiate */
  314. for ( i = 10; i && !cfg->status; i-- )
  315. mdelay ( 1 );
  316. if ( ! cfg->status ) {
  317. DBG ( "Failed to initiate!\n" );
  318. goto error;
  319. }
  320. free_dma ( ias, sizeof ( *ias ) );
  321. free_dma ( cfg, sizeof ( *cfg ) );
  322. DBG2 ( "cfg " );
  323. /* Enable rx by sending ring address to card */
  324. if ( priv->rfds[0] != NULL ) {
  325. ifec_scb_cmd ( netdev, virt_to_bus( priv->rfds[0] ), RUStart );
  326. ifec_scb_cmd_wait ( netdev );
  327. }
  328. DBG2 ( "rx_start\n" );
  329. return 0;
  330. error:
  331. free_dma ( cfg, sizeof ( *cfg ) );
  332. free_dma ( ias, sizeof ( *ias ) );
  333. ifec_free ( netdev );
  334. ifec_reset ( netdev );
  335. return rc;
  336. }
  337. /*
  338. * This function allows a driver to process events during operation.
  339. *
  340. * @v netdev Device being polled.
  341. *
  342. * This is called periodically by gPXE to let the driver check the status of
  343. * transmitted packets and to allow the driver to check for received packets.
  344. * This is a gPXE Network Device Driver API function.
  345. */
  346. static void ifec_net_poll ( struct net_device *netdev )
  347. {
  348. struct ifec_private *priv = netdev->priv;
  349. static int linkpoll = 0;
  350. unsigned short intr_status;
  351. DBGP ( "ifec_net_poll\n" );
  352. /* acknowledge interrupts ASAP */
  353. intr_status = inw ( priv->ioaddr + SCBStatus );
  354. outw ( intr_status, priv->ioaddr + SCBStatus );
  355. inw ( priv->ioaddr + SCBStatus );
  356. DBG2 ( "poll - status: 0x%04X\n", intr_status );
  357. if ( ++linkpoll > LINK_CHECK_PERIOD ) {
  358. linkpoll = 0;
  359. ifec_link_update ( netdev ); /* Update link state */
  360. }
  361. /* anything to do here? */
  362. if ( ( intr_status & ( ~INTERRUPT_MASK ) ) == 0 )
  363. return;
  364. /* process received and transmitted packets */
  365. ifec_tx_process ( netdev );
  366. ifec_rx_process ( netdev );
  367. ifec_check_ru_status ( netdev, intr_status );
  368. return;
  369. }
  370. /*
  371. * This transmits a packet.
  372. *
  373. * @v netdev Device to transmit from.
  374. * @v iobuf Data to transmit.
  375. * @ret rc Non-zero if failed to transmit.
  376. *
  377. * This is a gPXE Network Driver API function.
  378. */
  379. static int ifec_net_transmit ( struct net_device *netdev,
  380. struct io_buffer *iobuf )
  381. {
  382. struct ifec_private *priv = netdev->priv;
  383. struct ifec_tcb *tcb = priv->tcb_head->next;
  384. unsigned long ioaddr = priv->ioaddr;
  385. DBGP ( "ifec_net_transmit\n" );
  386. /* Wait for TCB to become available. */
  387. if ( tcb->status || tcb->iob ) {
  388. DBG ( "TX overflow\n" );
  389. return -ENOBUFS;
  390. }
  391. DBG2 ( "transmitting packet (%d bytes). status = %hX, cmd=%hX\n",
  392. iob_len ( iobuf ), tcb->status, inw ( ioaddr + SCBCmd ) );
  393. tcb->command = CmdSuspend | CmdTx | CmdTxFlex;
  394. tcb->count = 0x01208000;
  395. tcb->tbd_addr0 = virt_to_bus ( iobuf->data );
  396. tcb->tbd_size0 = 0x3FFF & iob_len ( iobuf );
  397. tcb->iob = iobuf;
  398. ifec_tx_wake ( netdev );
  399. /* Append to end of ring. */
  400. priv->tcb_head = tcb;
  401. return 0;
  402. }
  403. /*************************** Local support functions *************************/
  404. /* Define what each GPIO Pin does */
  405. static const uint16_t ifec_ee_bits[] = {
  406. [SPI_BIT_SCLK] = EE_SHIFT_CLK,
  407. [SPI_BIT_MOSI] = EE_DATA_WRITE,
  408. [SPI_BIT_MISO] = EE_DATA_READ,
  409. [SPI_BIT_SS(0)] = EE_ENB,
  410. };
  411. /*
  412. * Read a single bit from the GPIO pins used for SPI.
  413. * should be called by SPI bitbash functions only
  414. *
  415. * @v basher Bitbash device
  416. * @v bit_id Line to be read
  417. */
  418. static int ifec_spi_read_bit ( struct bit_basher *basher,
  419. unsigned int bit_id )
  420. {
  421. struct ifec_private *priv =
  422. container_of ( basher, struct ifec_private, spi.basher );
  423. unsigned long ee_addr = priv->ioaddr + CSREeprom;
  424. unsigned int ret = 0;
  425. uint16_t mask;
  426. DBGP ( "ifec_spi_read_bit\n" );
  427. mask = ifec_ee_bits[bit_id];
  428. ret = inw (ee_addr);
  429. return ( ret & mask ) ? 1 : 0;
  430. }
  431. /*
  432. * Write a single bit to the GPIO pins used for SPI.
  433. * should be called by SPI bitbash functions only
  434. *
  435. * @v basher Bitbash device
  436. * @v bit_id Line to write to
  437. * @v data Value to write
  438. */
  439. static void ifec_spi_write_bit ( struct bit_basher *basher,
  440. unsigned int bit_id,
  441. unsigned long data )
  442. {
  443. struct ifec_private *priv =
  444. container_of ( basher, struct ifec_private, spi.basher );
  445. unsigned long ee_addr = priv->ioaddr + CSREeprom;
  446. short val;
  447. uint16_t mask = ifec_ee_bits[bit_id];
  448. DBGP ( "ifec_spi_write_bit\n" );
  449. val = inw ( ee_addr );
  450. val &= ~mask;
  451. val |= data & mask;
  452. outw ( val, ee_addr );
  453. }
  454. /* set function pointer to SPI read- and write-bit functions */
  455. static struct bit_basher_operations ifec_basher_ops = {
  456. .read = ifec_spi_read_bit,
  457. .write = ifec_spi_write_bit,
  458. };
  459. /*
  460. * Initialize the eeprom stuff
  461. *
  462. * @v netdev Network device
  463. */
  464. static void ifec_init_eeprom ( struct net_device *netdev )
  465. {
  466. struct ifec_private *priv = netdev->priv;
  467. DBGP ( "ifec_init_eeprom\n" );
  468. priv->spi.basher.op = &ifec_basher_ops;
  469. priv->spi.bus.mode = SPI_MODE_THREEWIRE;
  470. init_spi_bit_basher ( &priv->spi );
  471. priv->eeprom.bus = &priv->spi.bus;
  472. /* init as 93c46(93c14 compatible) first, to set the command len,
  473. * block size and word len. Needs to be set for address len detection.
  474. */
  475. init_at93c46 ( &priv->eeprom, 16 );
  476. /* detect address length, */
  477. threewire_detect_address_len ( &priv->eeprom );
  478. /* address len == 8 means 93c66 instead of 93c46 */
  479. if ( priv->eeprom.address_len == 8 )
  480. init_at93c66 ( &priv->eeprom, 16 );
  481. }
  482. /*
  483. * Check if the network cable is plugged in.
  484. *
  485. * @v netdev Network device to check.
  486. * @ret retval greater 0 if linkup.
  487. */
  488. static int ifec_link_check ( struct net_device *netdev )
  489. {
  490. struct ifec_private *priv = netdev->priv;
  491. unsigned short mdio_register = priv->mdio_register;
  492. DBGP ( "ifec_link_check\n" );
  493. /* Read the status register once to discard stale data */
  494. ifec_mdio_read ( netdev, mdio_register & 0x1f, 1 );
  495. /* Check to see if network cable is plugged in. */
  496. if ( ! ( ifec_mdio_read ( netdev, mdio_register & 0x1f, 1 )
  497. & ( 1 << 2 ) ) ) {
  498. return 0;
  499. }
  500. return 1;
  501. }
  502. /*
  503. * Check network cable link, inform gPXE as appropriate.
  504. *
  505. * @v netdev Network device to check.
  506. */
  507. static void ifec_link_update ( struct net_device *netdev )
  508. {
  509. DBGP ( "ifec_link_update\n" );
  510. /* Update link state */
  511. if ( ifec_link_check ( netdev ) )
  512. netdev_link_up ( netdev );
  513. else
  514. netdev_link_down ( netdev );
  515. }
  516. /*
  517. * Support function: ifec_mdio_read
  518. *
  519. * This probably reads a register in the "physical media interface chip".
  520. * -- REW
  521. */
  522. static int ifec_mdio_read ( struct net_device *netdev, int phy_id,
  523. int location )
  524. {
  525. struct ifec_private *priv = netdev->priv;
  526. unsigned long ioaddr = priv->ioaddr;
  527. int val;
  528. int boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
  529. DBGP ( "ifec_mdio_read\n" );
  530. outl ( 0x08000000 | ( location << 16 ) | ( phy_id << 21 ),
  531. ioaddr + CSRCtrlMDI );
  532. do {
  533. udelay ( 16 );
  534. val = inl ( ioaddr + CSRCtrlMDI );
  535. if ( --boguscnt < 0 ) {
  536. DBG ( " ifec_mdio_read() time out with val = %X.\n",
  537. val );
  538. break;
  539. }
  540. } while (! ( val & 0x10000000 ) );
  541. return val & 0xffff;
  542. }
  543. /*
  544. * Initializes MDIO.
  545. *
  546. * @v netdev Network device
  547. * @v options MDIO options
  548. */
  549. static void ifec_mdio_setup ( struct net_device *netdev, int options )
  550. {
  551. struct ifec_private *priv = netdev->priv;
  552. unsigned short mdio_register = priv->mdio_register;
  553. DBGP ( "ifec_mdio_setup\n" );
  554. if ( ( (mdio_register>>8) & 0x3f ) == DP83840
  555. || ( (mdio_register>>8) & 0x3f ) == DP83840A ) {
  556. int mdi_reg23 = ifec_mdio_read ( netdev, mdio_register
  557. & 0x1f, 23 ) | 0x0422;
  558. if (CONGENB)
  559. mdi_reg23 |= 0x0100;
  560. DBG2 ( "DP83840 specific setup, setting register 23 to "
  561. "%hX.\n", mdi_reg23 );
  562. ifec_mdio_write ( netdev, mdio_register & 0x1f, 23, mdi_reg23 );
  563. }
  564. DBG2 ( "dp83840 " );
  565. if ( options != 0 ) {
  566. ifec_mdio_write ( netdev, mdio_register & 0x1f, 0,
  567. ( (options & 0x20) ? 0x2000 : 0 ) |
  568. ( (options & 0x10) ? 0x0100 : 0 ) );
  569. DBG2 ( "set mdio_register. " );
  570. }
  571. }
  572. /*
  573. * Support function: ifec_mdio_write
  574. *
  575. * This probably writes to the "physical media interface chip".
  576. * -- REW
  577. */
  578. static int ifec_mdio_write ( struct net_device *netdev,
  579. int phy_id, int location, int value )
  580. {
  581. struct ifec_private *priv = netdev->priv;
  582. unsigned long ioaddr = priv->ioaddr;
  583. int val;
  584. int boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
  585. DBGP ( "ifec_mdio_write\n" );
  586. outl ( 0x04000000 | ( location << 16 ) | ( phy_id << 21 ) | value,
  587. ioaddr + CSRCtrlMDI );
  588. do {
  589. udelay ( 16 );
  590. val = inl ( ioaddr + CSRCtrlMDI );
  591. if ( --boguscnt < 0 ) {
  592. DBG ( " ifec_mdio_write() time out with val = %X.\n",
  593. val );
  594. break;
  595. }
  596. } while (! ( val & 0x10000000 ) );
  597. return val & 0xffff;
  598. }
  599. /*
  600. * Resets the hardware.
  601. *
  602. * @v netdev Network device
  603. */
  604. static void ifec_reset ( struct net_device *netdev )
  605. {
  606. struct ifec_private *priv = netdev->priv;
  607. unsigned long ioaddr = priv->ioaddr;
  608. DBGP ( "ifec_reset\n" );
  609. /* do partial reset first */
  610. outl ( PortPartialReset, ioaddr + CSRPort );
  611. inw ( ioaddr + SCBStatus );
  612. udelay ( 20 );
  613. /* full reset */
  614. outl ( PortReset, ioaddr + CSRPort );
  615. inw ( ioaddr + SCBStatus );
  616. udelay ( 20 );
  617. /* disable interrupts again */
  618. ifec_net_irq ( netdev, 0 );
  619. }
  620. /*
  621. * free()s the tx/rx rings.
  622. *
  623. * @v netdev Network device
  624. */
  625. static void ifec_free ( struct net_device *netdev )
  626. {
  627. struct ifec_private *priv = netdev_priv ( netdev );
  628. int i;
  629. DBGP ( "ifec_free\n" );
  630. /* free all allocated receive io_buffers */
  631. for ( i = 0; i < RFD_COUNT; i++ ) {
  632. free_iob ( priv->rx_iobs[i] );
  633. priv->rx_iobs[i] = NULL;
  634. priv->rfds[i] = NULL;
  635. }
  636. /* free TX ring buffer */
  637. free_dma ( priv->tcbs, TX_RING_BYTES );
  638. priv->tcbs = NULL;
  639. }
  640. /*
  641. * Initializes an RFD.
  642. *
  643. * @v rfd RFD struct to initialize
  644. * @v command Command word
  645. * @v link Link value
  646. */
  647. static void ifec_rfd_init ( struct ifec_rfd *rfd, s16 command, u32 link )
  648. {
  649. DBGP ( "ifec_rfd_init\n" );
  650. rfd->status = 0;
  651. rfd->command = command;
  652. rfd->rx_buf_addr = 0xFFFFFFFF;
  653. rfd->count = 0;
  654. rfd->size = RFD_PACKET_LEN;
  655. rfd->link = link;
  656. }
  657. /*
  658. * Send address of new RFD to card
  659. *
  660. * @v netdev Network device
  661. */
  662. static void ifec_reprime_ru ( struct net_device *netdev )
  663. {
  664. struct ifec_private *priv = netdev->priv;
  665. int cur_rx = priv->cur_rx;
  666. DBGP ( "ifec_reprime_ru\n" );
  667. if ( priv->rfds[cur_rx] != NULL ) {
  668. ifec_scb_cmd ( netdev, virt_to_bus ( priv->rfds[cur_rx] ),
  669. RUStart );
  670. ifec_scb_cmd_wait ( netdev );
  671. }
  672. }
  673. /*
  674. * Check if reprime of RU needed
  675. *
  676. * @v netdev Network device
  677. */
  678. static void ifec_check_ru_status ( struct net_device *netdev,
  679. unsigned short intr_status )
  680. {
  681. struct ifec_private *priv = netdev->priv;
  682. DBGP ( "ifec_check_ru_status\n" );
  683. /*
  684. * The chip may have suspended reception for various reasons.
  685. * Check for that, and re-prime it should this be the case.
  686. */
  687. switch ( ( intr_status >> 2 ) & 0xf ) {
  688. case 0: /* Idle */
  689. case 4: /* Ready */
  690. break;
  691. case 1: /* Suspended */
  692. case 2: /* No resources (RFDs) */
  693. case 9: /* Suspended with no more RBDs */
  694. case 10: /* No resources due to no RBDs */
  695. case 12: /* Ready with no RBDs */
  696. DBG ( "ifec_net_poll: RU reprimed.\n" );
  697. ifec_reprime_ru ( netdev );
  698. break;
  699. default:
  700. /* reserved values */
  701. DBG ( "ifec_net_poll: RU state anomaly: %i\n",
  702. ( inw ( priv->ioaddr + SCBStatus ) >> 2 ) & 0xf );
  703. break;
  704. }
  705. }
  706. #define RFD_STATUS ( RFD_OK | RFDRxCol | RFDRxErr | RFDShort | \
  707. RFDDMAOverrun | RFDNoBufs | RFDCRCError )
  708. /*
  709. * Looks for received packets in the rx ring, reports success or error to
  710. * the core accordingly. Starts reallocation of rx ring.
  711. *
  712. * @v netdev Network device
  713. */
  714. static void ifec_rx_process ( struct net_device *netdev )
  715. {
  716. struct ifec_private *priv = netdev->priv;
  717. int cur_rx = priv->cur_rx;
  718. struct io_buffer *iob = priv->rx_iobs[cur_rx];
  719. struct ifec_rfd *rfd = priv->rfds[cur_rx];
  720. unsigned int rx_len;
  721. s16 status;
  722. DBGP ( "ifec_rx_process\n" );
  723. /* Process any received packets */
  724. while ( iob && rfd && ( status = rfd->status ) ) {
  725. rx_len = rfd->count & RFDMaskCount;
  726. DBG2 ( "Got a packet: Len = %d, cur_rx = %d.\n", rx_len,
  727. cur_rx );
  728. DBGIO_HD ( (void*)rfd->packet, 0x30 );
  729. if ( ( status & RFD_STATUS ) != RFD_OK ) {
  730. DBG ( "Corrupted packet received. "
  731. "Status = %#08hx\n", status );
  732. netdev_rx_err ( netdev, iob, -EINVAL );
  733. } else {
  734. /* Hand off the packet to the network subsystem */
  735. iob_put ( iob, rx_len );
  736. DBG2 ( "Received packet: %p, len: %d\n", iob, rx_len );
  737. netdev_rx ( netdev, iob );
  738. }
  739. /* make sure we don't reuse this RFD */
  740. priv->rx_iobs[cur_rx] = NULL;
  741. priv->rfds[cur_rx] = NULL;
  742. /* Next RFD */
  743. priv->cur_rx = ( cur_rx + 1 ) % RFD_COUNT;
  744. cur_rx = priv->cur_rx;
  745. iob = priv->rx_iobs[cur_rx];
  746. rfd = priv->rfds[cur_rx];
  747. }
  748. ifec_refill_rx_ring ( netdev );
  749. }
  750. /*
  751. * Allocates io_buffer, set pointers in ifec_private structure accordingly,
  752. * reserves space for RFD header in io_buffer.
  753. *
  754. * @v netdev Network device
  755. * @v cur Descriptor number to work on
  756. * @v cmd Value to set cmd field in RFD to
  757. * @v link Pointer to ned RFD
  758. * @ret rc 0 on success, negative on failure
  759. */
  760. static int ifec_get_rx_desc ( struct net_device *netdev, int cur, int cmd,
  761. int link )
  762. {
  763. struct ifec_private *priv = netdev->priv;
  764. struct ifec_rfd *rfd = priv->rfds[cur];
  765. DBGP ( "ifec_get_rx_desc\n" );
  766. priv->rx_iobs[cur] = alloc_iob ( sizeof ( *rfd ) );
  767. if ( ! priv->rx_iobs[cur] ) {
  768. DBG ( "alloc_iob failed. desc. nr: %d\n", cur );
  769. priv->rfds[cur] = NULL;
  770. return -ENOMEM;
  771. }
  772. /* Initialize new tail. */
  773. priv->rfds[cur] = priv->rx_iobs[cur]->data;
  774. ifec_rfd_init ( priv->rfds[cur], cmd, link );
  775. iob_reserve ( priv->rx_iobs[cur], RFD_HEADER_LEN );
  776. return 0;
  777. }
  778. /*
  779. * Allocate new descriptor entries and initialize them if needed
  780. *
  781. * @v netdev Network device
  782. */
  783. static void ifec_refill_rx_ring ( struct net_device *netdev )
  784. {
  785. struct ifec_private *priv = netdev->priv;
  786. int i, cur_rx;
  787. unsigned short intr_status;
  788. DBGP ( "ifec_refill_rx_ring\n" );
  789. for ( i = 0; i < RFD_COUNT; i++ ) {
  790. cur_rx = ( priv->cur_rx + i ) % RFD_COUNT;
  791. /* only refill if empty */
  792. if ( priv->rfds[cur_rx] != NULL ||
  793. priv->rx_iobs[cur_rx] != NULL )
  794. continue;
  795. DBG2 ( "refilling RFD %d\n", cur_rx );
  796. if ( ifec_get_rx_desc ( netdev, cur_rx,
  797. CmdSuspend | CmdEndOfList, 0 ) == 0 ) {
  798. if ( i > 0 ) {
  799. int prev_rx = ( ( ( cur_rx + RFD_COUNT ) - 1 )
  800. % RFD_COUNT );
  801. struct ifec_rfd *rfd = priv->rfds[prev_rx];
  802. rfd->command = 0;
  803. rfd->link = virt_to_bus ( priv->rfds[cur_rx] );
  804. }
  805. }
  806. }
  807. intr_status = inw ( priv->ioaddr + SCBStatus );
  808. ifec_check_ru_status ( netdev, intr_status );
  809. }
  810. /*
  811. * Initial allocation & initialization of the rx ring.
  812. *
  813. * @v netdev Device of rx ring.
  814. * @ret rc Non-zero if error occured
  815. */
  816. static int ifec_rx_setup ( struct net_device *netdev )
  817. {
  818. struct ifec_private *priv = netdev->priv;
  819. int i;
  820. DBGP ( "ifec_rx_setup\n" );
  821. priv->cur_rx = 0;
  822. /* init values for ifec_refill_rx_ring() */
  823. for ( i = 0; i < RFD_COUNT; i++ ) {
  824. priv->rfds[i] = NULL;
  825. priv->rx_iobs[i] = NULL;
  826. }
  827. ifec_refill_rx_ring ( netdev );
  828. return 0;
  829. }
  830. /*
  831. * Initiates a SCB command.
  832. *
  833. * @v netdev Network device
  834. * @v ptr General pointer value for command.
  835. * @v cmd Command to issue.
  836. * @ret rc Non-zero if command not issued.
  837. */
  838. static int ifec_scb_cmd ( struct net_device *netdev, u32 ptr, u8 cmd )
  839. {
  840. struct ifec_private *priv = netdev->priv;
  841. unsigned long ioaddr = priv->ioaddr;
  842. int rc;
  843. DBGP ( "ifec_scb_cmd\n" );
  844. rc = ifec_scb_cmd_wait ( netdev ); /* Wait until ready */
  845. if ( !rc ) {
  846. outl ( ptr, ioaddr + SCBPointer );
  847. outb ( cmd, ioaddr + SCBCmd ); /* Issue command */
  848. }
  849. return rc;
  850. }
  851. /*
  852. * Wait for command unit to accept a command.
  853. *
  854. * @v cmd_ioaddr I/O address of command register.
  855. * @ret rc Non-zero if command timed out.
  856. */
  857. static int ifec_scb_cmd_wait ( struct net_device *netdev )
  858. {
  859. struct ifec_private *priv = netdev->priv;
  860. unsigned long cmd_ioaddr = priv->ioaddr + SCBCmd;
  861. int rc, wait = CU_CMD_TIMEOUT;
  862. DBGP ( "ifec_scb_cmd_wait\n" );
  863. for ( ; wait && ( rc = inb ( cmd_ioaddr ) ); wait-- )
  864. udelay ( 1 );
  865. if ( !wait )
  866. DBG ( "ifec_scb_cmd_wait timeout!\n" );
  867. return rc;
  868. }
  869. /*
  870. * Check status of transmitted packets & perform tx completions.
  871. *
  872. * @v netdev Network device.
  873. */
  874. static void ifec_tx_process ( struct net_device *netdev )
  875. {
  876. struct ifec_private *priv = netdev->priv;
  877. struct ifec_tcb *tcb = priv->tcb_tail;
  878. s16 status;
  879. DBGP ( "ifec_tx_process\n" );
  880. /* Check status of transmitted packets */
  881. while ( ( status = tcb->status ) && tcb->iob ) {
  882. if ( status & TCB_U ) {
  883. /* report error to gPXE */
  884. DBG ( "ifec_tx_process : tx error!\n " );
  885. netdev_tx_complete_err ( netdev, tcb->iob, -EINVAL );
  886. } else {
  887. /* report successful transmit */
  888. netdev_tx_complete ( netdev, tcb->iob );
  889. }
  890. DBG2 ( "tx completion\n" );
  891. tcb->iob = NULL;
  892. tcb->status = 0;
  893. priv->tcb_tail = tcb->next; /* Next TCB */
  894. tcb = tcb->next;
  895. }
  896. }
  897. /*
  898. * Allocates & initialize tx resources.
  899. *
  900. * @v netdev Network device.
  901. * @ret rc Non-zero if error occurred.
  902. */
  903. static int ifec_tx_setup ( struct net_device *netdev )
  904. {
  905. struct ifec_private *priv = netdev->priv;
  906. struct ifec_tcb *tcb;
  907. int i;
  908. DBGP ( "ifec_tx_setup\n" );
  909. /* allocate tx ring */
  910. priv->tcbs = malloc_dma ( TX_RING_BYTES, CB_ALIGN );
  911. if ( !priv->tcbs ) {
  912. DBG ( "TX-ring allocation failed\n" );
  913. return -ENOMEM;
  914. }
  915. tcb = priv->tcb_tail = priv->tcbs;
  916. priv->tx_curr = priv->tx_tail = 0;
  917. priv->tx_cnt = 0;
  918. for ( i = 0; i < TCB_COUNT; i++, tcb++ ) {
  919. tcb->status = 0;
  920. tcb->count = 0x01208000;
  921. tcb->iob = NULL;
  922. tcb->tbda_addr = virt_to_bus ( &tcb->tbd_addr0 );
  923. tcb->link = virt_to_bus ( tcb + 1 );
  924. tcb->next = tcb + 1;
  925. }
  926. /* We point tcb_head at the last TCB, so the first ifec_net_transmit()
  927. * will use the first (head->next) TCB to transmit. */
  928. priv->tcb_head = --tcb;
  929. tcb->link = virt_to_bus ( priv->tcbs );
  930. tcb->next = priv->tcbs;
  931. return 0;
  932. }
  933. /*
  934. * Wake up the Command Unit and issue a Resume/Start.
  935. *
  936. * @v netdev Network device containing Command Unit
  937. *
  938. * The time between clearing the S bit and issuing Resume must be as short as
  939. * possible to prevent a race condition. As noted in linux eepro100.c :
  940. * Note: Watch out for the potential race condition here: imagine
  941. * erasing the previous suspend
  942. * the chip processes the previous command
  943. * the chip processes the final command, and suspends
  944. * doing the CU_RESUME
  945. * the chip processes the next-yet-valid post-final-command.
  946. * So blindly sending a CU_RESUME is only safe if we do it immediately after
  947. * erasing the previous CmdSuspend, without the possibility of an intervening
  948. * delay.
  949. */
  950. void ifec_tx_wake ( struct net_device *netdev )
  951. {
  952. struct ifec_private *priv = netdev->priv;
  953. unsigned long ioaddr = priv->ioaddr;
  954. struct ifec_tcb *tcb = priv->tcb_head->next;
  955. DBGP ( "ifec_tx_wake\n" );
  956. /* For the special case of the first transmit, we issue a START. The
  957. * card won't RESUME after the configure command. */
  958. if ( priv->configured ) {
  959. priv->configured = 0;
  960. ifec_scb_cmd ( netdev, virt_to_bus ( tcb ), CUStart );
  961. ifec_scb_cmd_wait ( netdev );
  962. return;
  963. }
  964. /* Resume if suspended. */
  965. switch ( ( inw ( ioaddr + SCBStatus ) >> 6 ) & 0x3 ) {
  966. case 0: /* Idle - We should not reach this state. */
  967. DBG2 ( "ifec_tx_wake: tx idle!\n" );
  968. ifec_scb_cmd ( netdev, virt_to_bus ( tcb ), CUStart );
  969. ifec_scb_cmd_wait ( netdev );
  970. return;
  971. case 1: /* Suspended */
  972. DBG2 ( "s" );
  973. break;
  974. default: /* Active */
  975. DBG2 ( "a" );
  976. }
  977. ifec_scb_cmd_wait ( netdev );
  978. outl ( 0, ioaddr + SCBPointer );
  979. priv->tcb_head->command &= ~CmdSuspend;
  980. /* Immediately issue Resume command */
  981. outb ( CUResume, ioaddr + SCBCmd );
  982. ifec_scb_cmd_wait ( netdev );
  983. }
  984. /*********************************************************************/
  985. static struct pci_device_id ifec_nics[] = {
  986. PCI_ROM(0x8086, 0x1029, "id1029", "Intel EtherExpressPro100 ID1029", 0),
  987. PCI_ROM(0x8086, 0x1030, "id1030", "Intel EtherExpressPro100 ID1030", 0),
  988. PCI_ROM(0x8086, 0x1031, "82801cam", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  989. PCI_ROM(0x8086, 0x1032, "eepro100-1032", "Intel PRO/100 VE Network Connection", 0),
  990. PCI_ROM(0x8086, 0x1033, "eepro100-1033", "Intel PRO/100 VM Network Connection", 0),
  991. PCI_ROM(0x8086, 0x1034, "eepro100-1034", "Intel PRO/100 VM Network Connection", 0),
  992. PCI_ROM(0x8086, 0x1035, "eepro100-1035", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  993. PCI_ROM(0x8086, 0x1036, "eepro100-1036", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  994. PCI_ROM(0x8086, 0x1037, "eepro100-1037", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  995. PCI_ROM(0x8086, 0x1038, "id1038", "Intel PRO/100 VM Network Connection", 0),
  996. PCI_ROM(0x8086, 0x1039, "82562et", "Intel PRO100 VE 82562ET", 0),
  997. PCI_ROM(0x8086, 0x103a, "id103a", "Intel Corporation 82559 InBusiness 10/100", 0),
  998. PCI_ROM(0x8086, 0x103b, "82562etb", "Intel PRO100 VE 82562ETB", 0),
  999. PCI_ROM(0x8086, 0x103c, "eepro100-103c", "Intel PRO/100 VM Network Connection", 0),
  1000. PCI_ROM(0x8086, 0x103d, "eepro100-103d", "Intel PRO/100 VE Network Connection", 0),
  1001. PCI_ROM(0x8086, 0x103e, "eepro100-103e", "Intel PRO/100 VM Network Connection", 0),
  1002. PCI_ROM(0x8086, 0x1051, "prove", "Intel PRO/100 VE Network Connection", 0),
  1003. PCI_ROM(0x8086, 0x1059, "82551qm", "Intel PRO/100 M Mobile Connection", 0),
  1004. PCI_ROM(0x8086, 0x1209, "82559er", "Intel EtherExpressPro100 82559ER", 0),
  1005. PCI_ROM(0x8086, 0x1227, "82865", "Intel 82865 EtherExpress PRO/100A", 0),
  1006. PCI_ROM(0x8086, 0x1228, "82556", "Intel 82556 EtherExpress PRO/100 Smart", 0),
  1007. PCI_ROM(0x8086, 0x1229, "eepro100", "Intel EtherExpressPro100", 0),
  1008. PCI_ROM(0x8086, 0x2449, "82562em", "Intel EtherExpressPro100 82562EM", 0),
  1009. PCI_ROM(0x8086, 0x2459, "82562-1", "Intel 82562 based Fast Ethernet Connection", 0),
  1010. PCI_ROM(0x8086, 0x245d, "82562-2", "Intel 82562 based Fast Ethernet Connection", 0),
  1011. PCI_ROM(0x8086, 0x1050, "82562ez", "Intel 82562EZ Network Connection", 0),
  1012. PCI_ROM(0x8086, 0x1051, "eepro100-1051", "Intel 82801EB/ER (ICH5/ICH5R) Chipset Ethernet Controller", 0),
  1013. PCI_ROM(0x8086, 0x1065, "82562-3", "Intel 82562 based Fast Ethernet Connection", 0),
  1014. PCI_ROM(0x8086, 0x5200, "eepro100-5200", "Intel EtherExpress PRO/100 Intelligent Server", 0),
  1015. PCI_ROM(0x8086, 0x5201, "eepro100-5201", "Intel EtherExpress PRO/100 Intelligent Server", 0),
  1016. };
  1017. /* Cards with device ids 0x1030 to 0x103F, 0x2449, 0x2459 or 0x245D might need
  1018. * a workaround for hardware bug on 10 mbit half duplex (see linux driver eepro100.c)
  1019. * 2003/03/17 gbaum */
  1020. struct pci_driver ifec_driver __pci_driver = {
  1021. .ids = ifec_nics,
  1022. .id_count = ( sizeof (ifec_nics) / sizeof (ifec_nics[0]) ),
  1023. .probe = ifec_pci_probe,
  1024. .remove = ifec_pci_remove
  1025. };
  1026. /*
  1027. * Local variables:
  1028. * c-basic-offset: 8
  1029. * c-indent-level: 8
  1030. * tab-width: 8
  1031. * End:
  1032. */