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arbel.c 66KB

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  1. /*
  2. * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * Based in part upon the original driver by Mellanox Technologies
  5. * Ltd. Portions may be Copyright (c) Mellanox Technologies Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of the
  10. * License, or any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. FILE_LICENCE ( GPL2_OR_LATER );
  22. #include <stdint.h>
  23. #include <stdlib.h>
  24. #include <stdio.h>
  25. #include <string.h>
  26. #include <strings.h>
  27. #include <unistd.h>
  28. #include <errno.h>
  29. #include <byteswap.h>
  30. #include <gpxe/io.h>
  31. #include <gpxe/pci.h>
  32. #include <gpxe/malloc.h>
  33. #include <gpxe/umalloc.h>
  34. #include <gpxe/iobuf.h>
  35. #include <gpxe/netdevice.h>
  36. #include <gpxe/infiniband.h>
  37. #include <gpxe/ib_smc.h>
  38. #include "arbel.h"
  39. /**
  40. * @file
  41. *
  42. * Mellanox Arbel Infiniband HCA
  43. *
  44. */
  45. /***************************************************************************
  46. *
  47. * Queue number allocation
  48. *
  49. ***************************************************************************
  50. */
  51. /**
  52. * Allocate queue number
  53. *
  54. * @v q_inuse Queue usage bitmask
  55. * @v max_inuse Maximum number of in-use queues
  56. * @ret qn_offset Free queue number offset, or negative error
  57. */
  58. static int arbel_alloc_qn_offset ( arbel_bitmask_t *q_inuse,
  59. unsigned int max_inuse ) {
  60. unsigned int qn_offset = 0;
  61. arbel_bitmask_t mask = 1;
  62. while ( qn_offset < max_inuse ) {
  63. if ( ( mask & *q_inuse ) == 0 ) {
  64. *q_inuse |= mask;
  65. return qn_offset;
  66. }
  67. qn_offset++;
  68. mask <<= 1;
  69. if ( ! mask ) {
  70. mask = 1;
  71. q_inuse++;
  72. }
  73. }
  74. return -ENFILE;
  75. }
  76. /**
  77. * Free queue number
  78. *
  79. * @v q_inuse Queue usage bitmask
  80. * @v qn_offset Queue number offset
  81. */
  82. static void arbel_free_qn_offset ( arbel_bitmask_t *q_inuse, int qn_offset ) {
  83. arbel_bitmask_t mask;
  84. mask = ( 1 << ( qn_offset % ( 8 * sizeof ( mask ) ) ) );
  85. q_inuse += ( qn_offset / ( 8 * sizeof ( mask ) ) );
  86. *q_inuse &= ~mask;
  87. }
  88. /***************************************************************************
  89. *
  90. * HCA commands
  91. *
  92. ***************************************************************************
  93. */
  94. /**
  95. * Wait for Arbel command completion
  96. *
  97. * @v arbel Arbel device
  98. * @ret rc Return status code
  99. */
  100. static int arbel_cmd_wait ( struct arbel *arbel,
  101. struct arbelprm_hca_command_register *hcr ) {
  102. unsigned int wait;
  103. for ( wait = ARBEL_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  104. hcr->u.dwords[6] =
  105. readl ( arbel->config + ARBEL_HCR_REG ( 6 ) );
  106. if ( MLX_GET ( hcr, go ) == 0 )
  107. return 0;
  108. mdelay ( 1 );
  109. }
  110. return -EBUSY;
  111. }
  112. /**
  113. * Issue HCA command
  114. *
  115. * @v arbel Arbel device
  116. * @v command Command opcode, flags and input/output lengths
  117. * @v op_mod Opcode modifier (0 if no modifier applicable)
  118. * @v in Input parameters
  119. * @v in_mod Input modifier (0 if no modifier applicable)
  120. * @v out Output parameters
  121. * @ret rc Return status code
  122. */
  123. static int arbel_cmd ( struct arbel *arbel, unsigned long command,
  124. unsigned int op_mod, const void *in,
  125. unsigned int in_mod, void *out ) {
  126. struct arbelprm_hca_command_register hcr;
  127. unsigned int opcode = ARBEL_HCR_OPCODE ( command );
  128. size_t in_len = ARBEL_HCR_IN_LEN ( command );
  129. size_t out_len = ARBEL_HCR_OUT_LEN ( command );
  130. void *in_buffer;
  131. void *out_buffer;
  132. unsigned int status;
  133. unsigned int i;
  134. int rc;
  135. assert ( in_len <= ARBEL_MBOX_SIZE );
  136. assert ( out_len <= ARBEL_MBOX_SIZE );
  137. DBGC2 ( arbel, "Arbel %p command %02x in %zx%s out %zx%s\n",
  138. arbel, opcode, in_len,
  139. ( ( command & ARBEL_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  140. ( ( command & ARBEL_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  141. /* Check that HCR is free */
  142. if ( ( rc = arbel_cmd_wait ( arbel, &hcr ) ) != 0 ) {
  143. DBGC ( arbel, "Arbel %p command interface locked\n", arbel );
  144. return rc;
  145. }
  146. /* Prepare HCR */
  147. memset ( &hcr, 0, sizeof ( hcr ) );
  148. in_buffer = &hcr.u.dwords[0];
  149. if ( in_len && ( command & ARBEL_HCR_IN_MBOX ) ) {
  150. in_buffer = arbel->mailbox_in;
  151. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  152. }
  153. memcpy ( in_buffer, in, in_len );
  154. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  155. out_buffer = &hcr.u.dwords[3];
  156. if ( out_len && ( command & ARBEL_HCR_OUT_MBOX ) ) {
  157. out_buffer = arbel->mailbox_out;
  158. MLX_FILL_1 ( &hcr, 4, out_param_l,
  159. virt_to_bus ( out_buffer ) );
  160. }
  161. MLX_FILL_3 ( &hcr, 6,
  162. opcode, opcode,
  163. opcode_modifier, op_mod,
  164. go, 1 );
  165. DBGC2_HD ( arbel, &hcr, sizeof ( hcr ) );
  166. if ( in_len ) {
  167. DBGC2 ( arbel, "Input:\n" );
  168. DBGC2_HD ( arbel, in, ( ( in_len < 512 ) ? in_len : 512 ) );
  169. }
  170. /* Issue command */
  171. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  172. i++ ) {
  173. writel ( hcr.u.dwords[i],
  174. arbel->config + ARBEL_HCR_REG ( i ) );
  175. barrier();
  176. }
  177. /* Wait for command completion */
  178. if ( ( rc = arbel_cmd_wait ( arbel, &hcr ) ) != 0 ) {
  179. DBGC ( arbel, "Arbel %p timed out waiting for command:\n",
  180. arbel );
  181. DBGC_HD ( arbel, &hcr, sizeof ( hcr ) );
  182. return rc;
  183. }
  184. /* Check command status */
  185. status = MLX_GET ( &hcr, status );
  186. if ( status != 0 ) {
  187. DBGC ( arbel, "Arbel %p command failed with status %02x:\n",
  188. arbel, status );
  189. DBGC_HD ( arbel, &hcr, sizeof ( hcr ) );
  190. return -EIO;
  191. }
  192. /* Read output parameters, if any */
  193. hcr.u.dwords[3] = readl ( arbel->config + ARBEL_HCR_REG ( 3 ) );
  194. hcr.u.dwords[4] = readl ( arbel->config + ARBEL_HCR_REG ( 4 ) );
  195. memcpy ( out, out_buffer, out_len );
  196. if ( out_len ) {
  197. DBGC2 ( arbel, "Output:\n" );
  198. DBGC2_HD ( arbel, out, ( ( out_len < 512 ) ? out_len : 512 ) );
  199. }
  200. return 0;
  201. }
  202. static inline int
  203. arbel_cmd_query_dev_lim ( struct arbel *arbel,
  204. struct arbelprm_query_dev_lim *dev_lim ) {
  205. return arbel_cmd ( arbel,
  206. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_DEV_LIM,
  207. 1, sizeof ( *dev_lim ) ),
  208. 0, NULL, 0, dev_lim );
  209. }
  210. static inline int
  211. arbel_cmd_query_fw ( struct arbel *arbel, struct arbelprm_query_fw *fw ) {
  212. return arbel_cmd ( arbel,
  213. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_FW,
  214. 1, sizeof ( *fw ) ),
  215. 0, NULL, 0, fw );
  216. }
  217. static inline int
  218. arbel_cmd_init_hca ( struct arbel *arbel,
  219. const struct arbelprm_init_hca *init_hca ) {
  220. return arbel_cmd ( arbel,
  221. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT_HCA,
  222. 1, sizeof ( *init_hca ) ),
  223. 0, init_hca, 0, NULL );
  224. }
  225. static inline int
  226. arbel_cmd_close_hca ( struct arbel *arbel ) {
  227. return arbel_cmd ( arbel,
  228. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CLOSE_HCA ),
  229. 0, NULL, 0, NULL );
  230. }
  231. static inline int
  232. arbel_cmd_init_ib ( struct arbel *arbel, unsigned int port,
  233. const struct arbelprm_init_ib *init_ib ) {
  234. return arbel_cmd ( arbel,
  235. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT_IB,
  236. 1, sizeof ( *init_ib ) ),
  237. 0, init_ib, port, NULL );
  238. }
  239. static inline int
  240. arbel_cmd_close_ib ( struct arbel *arbel, unsigned int port ) {
  241. return arbel_cmd ( arbel,
  242. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CLOSE_IB ),
  243. 0, NULL, port, NULL );
  244. }
  245. static inline int
  246. arbel_cmd_sw2hw_mpt ( struct arbel *arbel, unsigned int index,
  247. const struct arbelprm_mpt *mpt ) {
  248. return arbel_cmd ( arbel,
  249. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_MPT,
  250. 1, sizeof ( *mpt ) ),
  251. 0, mpt, index, NULL );
  252. }
  253. static inline int
  254. arbel_cmd_map_eq ( struct arbel *arbel, unsigned long index_map,
  255. const struct arbelprm_event_mask *mask ) {
  256. return arbel_cmd ( arbel,
  257. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_EQ,
  258. 0, sizeof ( *mask ) ),
  259. 0, mask, index_map, NULL );
  260. }
  261. static inline int
  262. arbel_cmd_sw2hw_eq ( struct arbel *arbel, unsigned int index,
  263. const struct arbelprm_eqc *eqctx ) {
  264. return arbel_cmd ( arbel,
  265. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_EQ,
  266. 1, sizeof ( *eqctx ) ),
  267. 0, eqctx, index, NULL );
  268. }
  269. static inline int
  270. arbel_cmd_hw2sw_eq ( struct arbel *arbel, unsigned int index,
  271. struct arbelprm_eqc *eqctx ) {
  272. return arbel_cmd ( arbel,
  273. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_HW2SW_EQ,
  274. 1, sizeof ( *eqctx ) ),
  275. 1, NULL, index, eqctx );
  276. }
  277. static inline int
  278. arbel_cmd_sw2hw_cq ( struct arbel *arbel, unsigned long cqn,
  279. const struct arbelprm_completion_queue_context *cqctx ) {
  280. return arbel_cmd ( arbel,
  281. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_CQ,
  282. 1, sizeof ( *cqctx ) ),
  283. 0, cqctx, cqn, NULL );
  284. }
  285. static inline int
  286. arbel_cmd_hw2sw_cq ( struct arbel *arbel, unsigned long cqn,
  287. struct arbelprm_completion_queue_context *cqctx) {
  288. return arbel_cmd ( arbel,
  289. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_HW2SW_CQ,
  290. 1, sizeof ( *cqctx ) ),
  291. 0, NULL, cqn, cqctx );
  292. }
  293. static inline int
  294. arbel_cmd_rst2init_qpee ( struct arbel *arbel, unsigned long qpn,
  295. const struct arbelprm_qp_ee_state_transitions *ctx ){
  296. return arbel_cmd ( arbel,
  297. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RST2INIT_QPEE,
  298. 1, sizeof ( *ctx ) ),
  299. 0, ctx, qpn, NULL );
  300. }
  301. static inline int
  302. arbel_cmd_init2rtr_qpee ( struct arbel *arbel, unsigned long qpn,
  303. const struct arbelprm_qp_ee_state_transitions *ctx ){
  304. return arbel_cmd ( arbel,
  305. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT2RTR_QPEE,
  306. 1, sizeof ( *ctx ) ),
  307. 0, ctx, qpn, NULL );
  308. }
  309. static inline int
  310. arbel_cmd_rtr2rts_qpee ( struct arbel *arbel, unsigned long qpn,
  311. const struct arbelprm_qp_ee_state_transitions *ctx ) {
  312. return arbel_cmd ( arbel,
  313. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RTR2RTS_QPEE,
  314. 1, sizeof ( *ctx ) ),
  315. 0, ctx, qpn, NULL );
  316. }
  317. static inline int
  318. arbel_cmd_rts2rts_qp ( struct arbel *arbel, unsigned long qpn,
  319. const struct arbelprm_qp_ee_state_transitions *ctx ) {
  320. return arbel_cmd ( arbel,
  321. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RTS2RTS_QPEE,
  322. 1, sizeof ( *ctx ) ),
  323. 0, ctx, qpn, NULL );
  324. }
  325. static inline int
  326. arbel_cmd_2rst_qpee ( struct arbel *arbel, unsigned long qpn ) {
  327. return arbel_cmd ( arbel,
  328. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_2RST_QPEE ),
  329. 0x03, NULL, qpn, NULL );
  330. }
  331. static inline int
  332. arbel_cmd_mad_ifc ( struct arbel *arbel, unsigned int port,
  333. union arbelprm_mad *mad ) {
  334. return arbel_cmd ( arbel,
  335. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_MAD_IFC,
  336. 1, sizeof ( *mad ),
  337. 1, sizeof ( *mad ) ),
  338. 0x03, mad, port, mad );
  339. }
  340. static inline int
  341. arbel_cmd_read_mgm ( struct arbel *arbel, unsigned int index,
  342. struct arbelprm_mgm_entry *mgm ) {
  343. return arbel_cmd ( arbel,
  344. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_READ_MGM,
  345. 1, sizeof ( *mgm ) ),
  346. 0, NULL, index, mgm );
  347. }
  348. static inline int
  349. arbel_cmd_write_mgm ( struct arbel *arbel, unsigned int index,
  350. const struct arbelprm_mgm_entry *mgm ) {
  351. return arbel_cmd ( arbel,
  352. ARBEL_HCR_IN_CMD ( ARBEL_HCR_WRITE_MGM,
  353. 1, sizeof ( *mgm ) ),
  354. 0, mgm, index, NULL );
  355. }
  356. static inline int
  357. arbel_cmd_mgid_hash ( struct arbel *arbel, const struct ib_gid *gid,
  358. struct arbelprm_mgm_hash *hash ) {
  359. return arbel_cmd ( arbel,
  360. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_MGID_HASH,
  361. 1, sizeof ( *gid ),
  362. 0, sizeof ( *hash ) ),
  363. 0, gid, 0, hash );
  364. }
  365. static inline int
  366. arbel_cmd_run_fw ( struct arbel *arbel ) {
  367. return arbel_cmd ( arbel,
  368. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_RUN_FW ),
  369. 0, NULL, 0, NULL );
  370. }
  371. static inline int
  372. arbel_cmd_disable_lam ( struct arbel *arbel ) {
  373. return arbel_cmd ( arbel,
  374. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_DISABLE_LAM ),
  375. 0, NULL, 0, NULL );
  376. }
  377. static inline int
  378. arbel_cmd_enable_lam ( struct arbel *arbel, struct arbelprm_access_lam *lam ) {
  379. return arbel_cmd ( arbel,
  380. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_ENABLE_LAM,
  381. 1, sizeof ( *lam ) ),
  382. 1, NULL, 0, lam );
  383. }
  384. static inline int
  385. arbel_cmd_unmap_icm ( struct arbel *arbel, unsigned int page_count ) {
  386. return arbel_cmd ( arbel,
  387. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_ICM ),
  388. 0, NULL, page_count, NULL );
  389. }
  390. static inline int
  391. arbel_cmd_map_icm ( struct arbel *arbel,
  392. const struct arbelprm_virtual_physical_mapping *map ) {
  393. return arbel_cmd ( arbel,
  394. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_ICM,
  395. 1, sizeof ( *map ) ),
  396. 0, map, 1, NULL );
  397. }
  398. static inline int
  399. arbel_cmd_unmap_icm_aux ( struct arbel *arbel ) {
  400. return arbel_cmd ( arbel,
  401. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_ICM_AUX ),
  402. 0, NULL, 0, NULL );
  403. }
  404. static inline int
  405. arbel_cmd_map_icm_aux ( struct arbel *arbel,
  406. const struct arbelprm_virtual_physical_mapping *map ) {
  407. return arbel_cmd ( arbel,
  408. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_ICM_AUX,
  409. 1, sizeof ( *map ) ),
  410. 0, map, 1, NULL );
  411. }
  412. static inline int
  413. arbel_cmd_set_icm_size ( struct arbel *arbel,
  414. const struct arbelprm_scalar_parameter *icm_size,
  415. struct arbelprm_scalar_parameter *icm_aux_size ) {
  416. return arbel_cmd ( arbel,
  417. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_SET_ICM_SIZE,
  418. 0, sizeof ( *icm_size ),
  419. 0, sizeof ( *icm_aux_size ) ),
  420. 0, icm_size, 0, icm_aux_size );
  421. }
  422. static inline int
  423. arbel_cmd_unmap_fa ( struct arbel *arbel ) {
  424. return arbel_cmd ( arbel,
  425. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_FA ),
  426. 0, NULL, 0, NULL );
  427. }
  428. static inline int
  429. arbel_cmd_map_fa ( struct arbel *arbel,
  430. const struct arbelprm_virtual_physical_mapping *map ) {
  431. return arbel_cmd ( arbel,
  432. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_FA,
  433. 1, sizeof ( *map ) ),
  434. 0, map, 1, NULL );
  435. }
  436. /***************************************************************************
  437. *
  438. * MAD operations
  439. *
  440. ***************************************************************************
  441. */
  442. /**
  443. * Issue management datagram
  444. *
  445. * @v ibdev Infiniband device
  446. * @v mad Management datagram
  447. * @ret rc Return status code
  448. */
  449. static int arbel_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
  450. struct arbel *arbel = ib_get_drvdata ( ibdev );
  451. union arbelprm_mad mad_ifc;
  452. int rc;
  453. linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
  454. mad_size_mismatch );
  455. /* Copy in request packet */
  456. memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
  457. /* Issue MAD */
  458. if ( ( rc = arbel_cmd_mad_ifc ( arbel, ibdev->port,
  459. &mad_ifc ) ) != 0 ) {
  460. DBGC ( arbel, "Arbel %p could not issue MAD IFC: %s\n",
  461. arbel, strerror ( rc ) );
  462. return rc;
  463. }
  464. /* Copy out reply packet */
  465. memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
  466. if ( mad->hdr.status != 0 ) {
  467. DBGC ( arbel, "Arbel %p MAD IFC status %04x\n",
  468. arbel, ntohs ( mad->hdr.status ) );
  469. return -EIO;
  470. }
  471. return 0;
  472. }
  473. /***************************************************************************
  474. *
  475. * Completion queue operations
  476. *
  477. ***************************************************************************
  478. */
  479. /**
  480. * Create completion queue
  481. *
  482. * @v ibdev Infiniband device
  483. * @v cq Completion queue
  484. * @ret rc Return status code
  485. */
  486. static int arbel_create_cq ( struct ib_device *ibdev,
  487. struct ib_completion_queue *cq ) {
  488. struct arbel *arbel = ib_get_drvdata ( ibdev );
  489. struct arbel_completion_queue *arbel_cq;
  490. struct arbelprm_completion_queue_context cqctx;
  491. struct arbelprm_cq_ci_db_record *ci_db_rec;
  492. struct arbelprm_cq_arm_db_record *arm_db_rec;
  493. int cqn_offset;
  494. unsigned int i;
  495. int rc;
  496. /* Find a free completion queue number */
  497. cqn_offset = arbel_alloc_qn_offset ( arbel->cq_inuse, ARBEL_MAX_CQS );
  498. if ( cqn_offset < 0 ) {
  499. DBGC ( arbel, "Arbel %p out of completion queues\n", arbel );
  500. rc = cqn_offset;
  501. goto err_cqn_offset;
  502. }
  503. cq->cqn = ( arbel->limits.reserved_cqs + cqn_offset );
  504. /* Allocate control structures */
  505. arbel_cq = zalloc ( sizeof ( *arbel_cq ) );
  506. if ( ! arbel_cq ) {
  507. rc = -ENOMEM;
  508. goto err_arbel_cq;
  509. }
  510. arbel_cq->ci_doorbell_idx = arbel_cq_ci_doorbell_idx ( cqn_offset );
  511. arbel_cq->arm_doorbell_idx = arbel_cq_arm_doorbell_idx ( cqn_offset );
  512. /* Allocate completion queue itself */
  513. arbel_cq->cqe_size = ( cq->num_cqes * sizeof ( arbel_cq->cqe[0] ) );
  514. arbel_cq->cqe = malloc_dma ( arbel_cq->cqe_size,
  515. sizeof ( arbel_cq->cqe[0] ) );
  516. if ( ! arbel_cq->cqe ) {
  517. rc = -ENOMEM;
  518. goto err_cqe;
  519. }
  520. memset ( arbel_cq->cqe, 0, arbel_cq->cqe_size );
  521. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  522. MLX_FILL_1 ( &arbel_cq->cqe[i].normal, 7, owner, 1 );
  523. }
  524. barrier();
  525. /* Initialise doorbell records */
  526. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  527. MLX_FILL_1 ( ci_db_rec, 0, counter, 0 );
  528. MLX_FILL_2 ( ci_db_rec, 1,
  529. res, ARBEL_UAR_RES_CQ_CI,
  530. cq_number, cq->cqn );
  531. arm_db_rec = &arbel->db_rec[arbel_cq->arm_doorbell_idx].cq_arm;
  532. MLX_FILL_1 ( arm_db_rec, 0, counter, 0 );
  533. MLX_FILL_2 ( arm_db_rec, 1,
  534. res, ARBEL_UAR_RES_CQ_ARM,
  535. cq_number, cq->cqn );
  536. /* Hand queue over to hardware */
  537. memset ( &cqctx, 0, sizeof ( cqctx ) );
  538. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  539. MLX_FILL_1 ( &cqctx, 2, start_address_l,
  540. virt_to_bus ( arbel_cq->cqe ) );
  541. MLX_FILL_2 ( &cqctx, 3,
  542. usr_page, arbel->limits.reserved_uars,
  543. log_cq_size, fls ( cq->num_cqes - 1 ) );
  544. MLX_FILL_1 ( &cqctx, 5, c_eqn, ARBEL_NO_EQ );
  545. MLX_FILL_1 ( &cqctx, 6, pd, ARBEL_GLOBAL_PD );
  546. MLX_FILL_1 ( &cqctx, 7, l_key, arbel->reserved_lkey );
  547. MLX_FILL_1 ( &cqctx, 12, cqn, cq->cqn );
  548. MLX_FILL_1 ( &cqctx, 13,
  549. cq_ci_db_record, arbel_cq->ci_doorbell_idx );
  550. MLX_FILL_1 ( &cqctx, 14,
  551. cq_state_db_record, arbel_cq->arm_doorbell_idx );
  552. if ( ( rc = arbel_cmd_sw2hw_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  553. DBGC ( arbel, "Arbel %p SW2HW_CQ failed: %s\n",
  554. arbel, strerror ( rc ) );
  555. goto err_sw2hw_cq;
  556. }
  557. DBGC ( arbel, "Arbel %p CQN %#lx ring at [%p,%p)\n",
  558. arbel, cq->cqn, arbel_cq->cqe,
  559. ( ( ( void * ) arbel_cq->cqe ) + arbel_cq->cqe_size ) );
  560. ib_cq_set_drvdata ( cq, arbel_cq );
  561. return 0;
  562. err_sw2hw_cq:
  563. MLX_FILL_1 ( ci_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  564. MLX_FILL_1 ( arm_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  565. free_dma ( arbel_cq->cqe, arbel_cq->cqe_size );
  566. err_cqe:
  567. free ( arbel_cq );
  568. err_arbel_cq:
  569. arbel_free_qn_offset ( arbel->cq_inuse, cqn_offset );
  570. err_cqn_offset:
  571. return rc;
  572. }
  573. /**
  574. * Destroy completion queue
  575. *
  576. * @v ibdev Infiniband device
  577. * @v cq Completion queue
  578. */
  579. static void arbel_destroy_cq ( struct ib_device *ibdev,
  580. struct ib_completion_queue *cq ) {
  581. struct arbel *arbel = ib_get_drvdata ( ibdev );
  582. struct arbel_completion_queue *arbel_cq = ib_cq_get_drvdata ( cq );
  583. struct arbelprm_completion_queue_context cqctx;
  584. struct arbelprm_cq_ci_db_record *ci_db_rec;
  585. struct arbelprm_cq_arm_db_record *arm_db_rec;
  586. int cqn_offset;
  587. int rc;
  588. /* Take ownership back from hardware */
  589. if ( ( rc = arbel_cmd_hw2sw_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  590. DBGC ( arbel, "Arbel %p FATAL HW2SW_CQ failed on CQN %#lx: "
  591. "%s\n", arbel, cq->cqn, strerror ( rc ) );
  592. /* Leak memory and return; at least we avoid corruption */
  593. return;
  594. }
  595. /* Clear doorbell records */
  596. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  597. arm_db_rec = &arbel->db_rec[arbel_cq->arm_doorbell_idx].cq_arm;
  598. MLX_FILL_1 ( ci_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  599. MLX_FILL_1 ( arm_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  600. /* Free memory */
  601. free_dma ( arbel_cq->cqe, arbel_cq->cqe_size );
  602. free ( arbel_cq );
  603. /* Mark queue number as free */
  604. cqn_offset = ( cq->cqn - arbel->limits.reserved_cqs );
  605. arbel_free_qn_offset ( arbel->cq_inuse, cqn_offset );
  606. ib_cq_set_drvdata ( cq, NULL );
  607. }
  608. /***************************************************************************
  609. *
  610. * Queue pair operations
  611. *
  612. ***************************************************************************
  613. */
  614. /**
  615. * Create send work queue
  616. *
  617. * @v arbel_send_wq Send work queue
  618. * @v num_wqes Number of work queue entries
  619. * @ret rc Return status code
  620. */
  621. static int arbel_create_send_wq ( struct arbel_send_work_queue *arbel_send_wq,
  622. unsigned int num_wqes ) {
  623. struct arbelprm_ud_send_wqe *wqe;
  624. struct arbelprm_ud_send_wqe *next_wqe;
  625. unsigned int wqe_idx_mask;
  626. unsigned int i;
  627. /* Allocate work queue */
  628. arbel_send_wq->wqe_size = ( num_wqes *
  629. sizeof ( arbel_send_wq->wqe[0] ) );
  630. arbel_send_wq->wqe = malloc_dma ( arbel_send_wq->wqe_size,
  631. sizeof ( arbel_send_wq->wqe[0] ) );
  632. if ( ! arbel_send_wq->wqe )
  633. return -ENOMEM;
  634. memset ( arbel_send_wq->wqe, 0, arbel_send_wq->wqe_size );
  635. /* Link work queue entries */
  636. wqe_idx_mask = ( num_wqes - 1 );
  637. for ( i = 0 ; i < num_wqes ; i++ ) {
  638. wqe = &arbel_send_wq->wqe[i].ud;
  639. next_wqe = &arbel_send_wq->wqe[ ( i + 1 ) & wqe_idx_mask ].ud;
  640. MLX_FILL_1 ( &wqe->next, 0, nda_31_6,
  641. ( virt_to_bus ( next_wqe ) >> 6 ) );
  642. }
  643. return 0;
  644. }
  645. /**
  646. * Create receive work queue
  647. *
  648. * @v arbel_recv_wq Receive work queue
  649. * @v num_wqes Number of work queue entries
  650. * @ret rc Return status code
  651. */
  652. static int arbel_create_recv_wq ( struct arbel_recv_work_queue *arbel_recv_wq,
  653. unsigned int num_wqes ) {
  654. struct arbelprm_recv_wqe *wqe;
  655. struct arbelprm_recv_wqe *next_wqe;
  656. unsigned int wqe_idx_mask;
  657. size_t nds;
  658. unsigned int i;
  659. unsigned int j;
  660. /* Allocate work queue */
  661. arbel_recv_wq->wqe_size = ( num_wqes *
  662. sizeof ( arbel_recv_wq->wqe[0] ) );
  663. arbel_recv_wq->wqe = malloc_dma ( arbel_recv_wq->wqe_size,
  664. sizeof ( arbel_recv_wq->wqe[0] ) );
  665. if ( ! arbel_recv_wq->wqe )
  666. return -ENOMEM;
  667. memset ( arbel_recv_wq->wqe, 0, arbel_recv_wq->wqe_size );
  668. /* Link work queue entries */
  669. wqe_idx_mask = ( num_wqes - 1 );
  670. nds = ( ( offsetof ( typeof ( *wqe ), data ) +
  671. sizeof ( wqe->data[0] ) ) >> 4 );
  672. for ( i = 0 ; i < num_wqes ; i++ ) {
  673. wqe = &arbel_recv_wq->wqe[i].recv;
  674. next_wqe = &arbel_recv_wq->wqe[( i + 1 ) & wqe_idx_mask].recv;
  675. MLX_FILL_1 ( &wqe->next, 0, nda_31_6,
  676. ( virt_to_bus ( next_wqe ) >> 6 ) );
  677. MLX_FILL_1 ( &wqe->next, 1, nds, ( sizeof ( *wqe ) / 16 ) );
  678. for ( j = 0 ; ( ( ( void * ) &wqe->data[j] ) <
  679. ( ( void * ) ( wqe + 1 ) ) ) ; j++ ) {
  680. MLX_FILL_1 ( &wqe->data[j], 1,
  681. l_key, ARBEL_INVALID_LKEY );
  682. }
  683. }
  684. return 0;
  685. }
  686. /**
  687. * Create queue pair
  688. *
  689. * @v ibdev Infiniband device
  690. * @v qp Queue pair
  691. * @ret rc Return status code
  692. */
  693. static int arbel_create_qp ( struct ib_device *ibdev,
  694. struct ib_queue_pair *qp ) {
  695. struct arbel *arbel = ib_get_drvdata ( ibdev );
  696. struct arbel_queue_pair *arbel_qp;
  697. struct arbelprm_qp_ee_state_transitions qpctx;
  698. struct arbelprm_qp_db_record *send_db_rec;
  699. struct arbelprm_qp_db_record *recv_db_rec;
  700. int qpn_offset;
  701. int rc;
  702. /* Find a free queue pair number */
  703. qpn_offset = arbel_alloc_qn_offset ( arbel->qp_inuse, ARBEL_MAX_QPS );
  704. if ( qpn_offset < 0 ) {
  705. DBGC ( arbel, "Arbel %p out of queue pairs\n", arbel );
  706. rc = qpn_offset;
  707. goto err_qpn_offset;
  708. }
  709. qp->qpn = ( ARBEL_QPN_BASE + arbel->limits.reserved_qps + qpn_offset );
  710. /* Allocate control structures */
  711. arbel_qp = zalloc ( sizeof ( *arbel_qp ) );
  712. if ( ! arbel_qp ) {
  713. rc = -ENOMEM;
  714. goto err_arbel_qp;
  715. }
  716. arbel_qp->send.doorbell_idx = arbel_send_doorbell_idx ( qpn_offset );
  717. arbel_qp->recv.doorbell_idx = arbel_recv_doorbell_idx ( qpn_offset );
  718. /* Create send and receive work queues */
  719. if ( ( rc = arbel_create_send_wq ( &arbel_qp->send,
  720. qp->send.num_wqes ) ) != 0 )
  721. goto err_create_send_wq;
  722. if ( ( rc = arbel_create_recv_wq ( &arbel_qp->recv,
  723. qp->recv.num_wqes ) ) != 0 )
  724. goto err_create_recv_wq;
  725. /* Initialise doorbell records */
  726. send_db_rec = &arbel->db_rec[arbel_qp->send.doorbell_idx].qp;
  727. MLX_FILL_1 ( send_db_rec, 0, counter, 0 );
  728. MLX_FILL_2 ( send_db_rec, 1,
  729. res, ARBEL_UAR_RES_SQ,
  730. qp_number, qp->qpn );
  731. recv_db_rec = &arbel->db_rec[arbel_qp->recv.doorbell_idx].qp;
  732. MLX_FILL_1 ( recv_db_rec, 0, counter, 0 );
  733. MLX_FILL_2 ( recv_db_rec, 1,
  734. res, ARBEL_UAR_RES_RQ,
  735. qp_number, qp->qpn );
  736. /* Hand queue over to hardware */
  737. memset ( &qpctx, 0, sizeof ( qpctx ) );
  738. MLX_FILL_3 ( &qpctx, 2,
  739. qpc_eec_data.de, 1,
  740. qpc_eec_data.pm_state, 0x03 /* Always 0x03 for UD */,
  741. qpc_eec_data.st, ARBEL_ST_UD );
  742. MLX_FILL_6 ( &qpctx, 4,
  743. qpc_eec_data.mtu, ARBEL_MTU_2048,
  744. qpc_eec_data.msg_max, 11 /* 2^11 = 2048 */,
  745. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  746. qpc_eec_data.log_rq_stride,
  747. ( fls ( sizeof ( arbel_qp->recv.wqe[0] ) - 1 ) - 4 ),
  748. qpc_eec_data.log_sq_size, fls ( qp->send.num_wqes - 1 ),
  749. qpc_eec_data.log_sq_stride,
  750. ( fls ( sizeof ( arbel_qp->send.wqe[0] ) - 1 ) - 4 ) );
  751. MLX_FILL_1 ( &qpctx, 5,
  752. qpc_eec_data.usr_page, arbel->limits.reserved_uars );
  753. MLX_FILL_1 ( &qpctx, 10, qpc_eec_data.primary_address_path.port_number,
  754. ibdev->port );
  755. MLX_FILL_1 ( &qpctx, 27, qpc_eec_data.pd, ARBEL_GLOBAL_PD );
  756. MLX_FILL_1 ( &qpctx, 29, qpc_eec_data.wqe_lkey, arbel->reserved_lkey );
  757. MLX_FILL_1 ( &qpctx, 30, qpc_eec_data.ssc, 1 );
  758. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  759. MLX_FILL_1 ( &qpctx, 34, qpc_eec_data.snd_wqe_base_adr_l,
  760. ( virt_to_bus ( arbel_qp->send.wqe ) >> 6 ) );
  761. MLX_FILL_1 ( &qpctx, 35, qpc_eec_data.snd_db_record_index,
  762. arbel_qp->send.doorbell_idx );
  763. MLX_FILL_1 ( &qpctx, 38, qpc_eec_data.rsc, 1 );
  764. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  765. MLX_FILL_1 ( &qpctx, 42, qpc_eec_data.rcv_wqe_base_adr_l,
  766. ( virt_to_bus ( arbel_qp->recv.wqe ) >> 6 ) );
  767. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.rcv_db_record_index,
  768. arbel_qp->recv.doorbell_idx );
  769. if ( ( rc = arbel_cmd_rst2init_qpee ( arbel, qp->qpn, &qpctx )) != 0 ){
  770. DBGC ( arbel, "Arbel %p RST2INIT_QPEE failed: %s\n",
  771. arbel, strerror ( rc ) );
  772. goto err_rst2init_qpee;
  773. }
  774. memset ( &qpctx, 0, sizeof ( qpctx ) );
  775. MLX_FILL_2 ( &qpctx, 4,
  776. qpc_eec_data.mtu, ARBEL_MTU_2048,
  777. qpc_eec_data.msg_max, 11 /* 2^11 = 2048 */ );
  778. if ( ( rc = arbel_cmd_init2rtr_qpee ( arbel, qp->qpn, &qpctx )) != 0 ){
  779. DBGC ( arbel, "Arbel %p INIT2RTR_QPEE failed: %s\n",
  780. arbel, strerror ( rc ) );
  781. goto err_init2rtr_qpee;
  782. }
  783. memset ( &qpctx, 0, sizeof ( qpctx ) );
  784. if ( ( rc = arbel_cmd_rtr2rts_qpee ( arbel, qp->qpn, &qpctx ) ) != 0 ){
  785. DBGC ( arbel, "Arbel %p RTR2RTS_QPEE failed: %s\n",
  786. arbel, strerror ( rc ) );
  787. goto err_rtr2rts_qpee;
  788. }
  789. DBGC ( arbel, "Arbel %p QPN %#lx send ring at [%p,%p)\n",
  790. arbel, qp->qpn, arbel_qp->send.wqe,
  791. ( ( (void *) arbel_qp->send.wqe ) + arbel_qp->send.wqe_size ) );
  792. DBGC ( arbel, "Arbel %p QPN %#lx receive ring at [%p,%p)\n",
  793. arbel, qp->qpn, arbel_qp->recv.wqe,
  794. ( ( (void *) arbel_qp->recv.wqe ) + arbel_qp->recv.wqe_size ) );
  795. ib_qp_set_drvdata ( qp, arbel_qp );
  796. return 0;
  797. err_rtr2rts_qpee:
  798. err_init2rtr_qpee:
  799. arbel_cmd_2rst_qpee ( arbel, qp->qpn );
  800. err_rst2init_qpee:
  801. MLX_FILL_1 ( send_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  802. MLX_FILL_1 ( recv_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  803. free_dma ( arbel_qp->recv.wqe, arbel_qp->recv.wqe_size );
  804. err_create_recv_wq:
  805. free_dma ( arbel_qp->send.wqe, arbel_qp->send.wqe_size );
  806. err_create_send_wq:
  807. free ( arbel_qp );
  808. err_arbel_qp:
  809. arbel_free_qn_offset ( arbel->qp_inuse, qpn_offset );
  810. err_qpn_offset:
  811. return rc;
  812. }
  813. /**
  814. * Modify queue pair
  815. *
  816. * @v ibdev Infiniband device
  817. * @v qp Queue pair
  818. * @ret rc Return status code
  819. */
  820. static int arbel_modify_qp ( struct ib_device *ibdev,
  821. struct ib_queue_pair *qp ) {
  822. struct arbel *arbel = ib_get_drvdata ( ibdev );
  823. struct arbelprm_qp_ee_state_transitions qpctx;
  824. int rc;
  825. /* Issue RTS2RTS_QP */
  826. memset ( &qpctx, 0, sizeof ( qpctx ) );
  827. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, ARBEL_QPEE_OPT_PARAM_QKEY );
  828. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  829. if ( ( rc = arbel_cmd_rts2rts_qp ( arbel, qp->qpn, &qpctx ) ) != 0 ){
  830. DBGC ( arbel, "Arbel %p RTS2RTS_QP failed: %s\n",
  831. arbel, strerror ( rc ) );
  832. return rc;
  833. }
  834. return 0;
  835. }
  836. /**
  837. * Destroy queue pair
  838. *
  839. * @v ibdev Infiniband device
  840. * @v qp Queue pair
  841. */
  842. static void arbel_destroy_qp ( struct ib_device *ibdev,
  843. struct ib_queue_pair *qp ) {
  844. struct arbel *arbel = ib_get_drvdata ( ibdev );
  845. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  846. struct arbelprm_qp_db_record *send_db_rec;
  847. struct arbelprm_qp_db_record *recv_db_rec;
  848. int qpn_offset;
  849. int rc;
  850. /* Take ownership back from hardware */
  851. if ( ( rc = arbel_cmd_2rst_qpee ( arbel, qp->qpn ) ) != 0 ) {
  852. DBGC ( arbel, "Arbel %p FATAL 2RST_QPEE failed on QPN %#lx: "
  853. "%s\n", arbel, qp->qpn, strerror ( rc ) );
  854. /* Leak memory and return; at least we avoid corruption */
  855. return;
  856. }
  857. /* Clear doorbell records */
  858. send_db_rec = &arbel->db_rec[arbel_qp->send.doorbell_idx].qp;
  859. recv_db_rec = &arbel->db_rec[arbel_qp->recv.doorbell_idx].qp;
  860. MLX_FILL_1 ( send_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  861. MLX_FILL_1 ( recv_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  862. /* Free memory */
  863. free_dma ( arbel_qp->send.wqe, arbel_qp->send.wqe_size );
  864. free_dma ( arbel_qp->recv.wqe, arbel_qp->recv.wqe_size );
  865. free ( arbel_qp );
  866. /* Mark queue number as free */
  867. qpn_offset = ( qp->qpn - ARBEL_QPN_BASE - arbel->limits.reserved_qps );
  868. arbel_free_qn_offset ( arbel->qp_inuse, qpn_offset );
  869. ib_qp_set_drvdata ( qp, NULL );
  870. }
  871. /***************************************************************************
  872. *
  873. * Work request operations
  874. *
  875. ***************************************************************************
  876. */
  877. /**
  878. * Ring doorbell register in UAR
  879. *
  880. * @v arbel Arbel device
  881. * @v db_reg Doorbell register structure
  882. * @v offset Address of doorbell
  883. */
  884. static void arbel_ring_doorbell ( struct arbel *arbel,
  885. union arbelprm_doorbell_register *db_reg,
  886. unsigned int offset ) {
  887. DBGC2 ( arbel, "Arbel %p ringing doorbell %08x:%08x at %lx\n",
  888. arbel, db_reg->dword[0], db_reg->dword[1],
  889. virt_to_phys ( arbel->uar + offset ) );
  890. barrier();
  891. writel ( db_reg->dword[0], ( arbel->uar + offset + 0 ) );
  892. barrier();
  893. writel ( db_reg->dword[1], ( arbel->uar + offset + 4 ) );
  894. }
  895. /** GID used for GID-less send work queue entries */
  896. static const struct ib_gid arbel_no_gid = {
  897. { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0 } }
  898. };
  899. /**
  900. * Post send work queue entry
  901. *
  902. * @v ibdev Infiniband device
  903. * @v qp Queue pair
  904. * @v av Address vector
  905. * @v iobuf I/O buffer
  906. * @ret rc Return status code
  907. */
  908. static int arbel_post_send ( struct ib_device *ibdev,
  909. struct ib_queue_pair *qp,
  910. struct ib_address_vector *av,
  911. struct io_buffer *iobuf ) {
  912. struct arbel *arbel = ib_get_drvdata ( ibdev );
  913. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  914. struct ib_work_queue *wq = &qp->send;
  915. struct arbel_send_work_queue *arbel_send_wq = &arbel_qp->send;
  916. struct arbelprm_ud_send_wqe *prev_wqe;
  917. struct arbelprm_ud_send_wqe *wqe;
  918. struct arbelprm_qp_db_record *qp_db_rec;
  919. union arbelprm_doorbell_register db_reg;
  920. const struct ib_gid *gid;
  921. unsigned int wqe_idx_mask;
  922. size_t nds;
  923. /* Allocate work queue entry */
  924. wqe_idx_mask = ( wq->num_wqes - 1 );
  925. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  926. DBGC ( arbel, "Arbel %p send queue full", arbel );
  927. return -ENOBUFS;
  928. }
  929. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  930. prev_wqe = &arbel_send_wq->wqe[(wq->next_idx - 1) & wqe_idx_mask].ud;
  931. wqe = &arbel_send_wq->wqe[wq->next_idx & wqe_idx_mask].ud;
  932. /* Construct work queue entry */
  933. MLX_FILL_1 ( &wqe->next, 1, always1, 1 );
  934. memset ( &wqe->ctrl, 0, sizeof ( wqe->ctrl ) );
  935. MLX_FILL_1 ( &wqe->ctrl, 0, always1, 1 );
  936. memset ( &wqe->ud, 0, sizeof ( wqe->ud ) );
  937. MLX_FILL_2 ( &wqe->ud, 0,
  938. ud_address_vector.pd, ARBEL_GLOBAL_PD,
  939. ud_address_vector.port_number, ibdev->port );
  940. MLX_FILL_2 ( &wqe->ud, 1,
  941. ud_address_vector.rlid, av->lid,
  942. ud_address_vector.g, av->gid_present );
  943. MLX_FILL_2 ( &wqe->ud, 2,
  944. ud_address_vector.max_stat_rate,
  945. ( ( av->rate >= 3 ) ? 0 : 1 ),
  946. ud_address_vector.msg, 3 );
  947. MLX_FILL_1 ( &wqe->ud, 3, ud_address_vector.sl, av->sl );
  948. gid = ( av->gid_present ? &av->gid : &arbel_no_gid );
  949. memcpy ( &wqe->ud.u.dwords[4], gid, sizeof ( *gid ) );
  950. MLX_FILL_1 ( &wqe->ud, 8, destination_qp, av->qpn );
  951. MLX_FILL_1 ( &wqe->ud, 9, q_key, av->qkey );
  952. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_len ( iobuf ) );
  953. MLX_FILL_1 ( &wqe->data[0], 1, l_key, arbel->reserved_lkey );
  954. MLX_FILL_1 ( &wqe->data[0], 3,
  955. local_address_l, virt_to_bus ( iobuf->data ) );
  956. /* Update previous work queue entry's "next" field */
  957. nds = ( ( offsetof ( typeof ( *wqe ), data ) +
  958. sizeof ( wqe->data[0] ) ) >> 4 );
  959. MLX_SET ( &prev_wqe->next, nopcode, ARBEL_OPCODE_SEND );
  960. MLX_FILL_3 ( &prev_wqe->next, 1,
  961. nds, nds,
  962. f, 1,
  963. always1, 1 );
  964. /* Update doorbell record */
  965. barrier();
  966. qp_db_rec = &arbel->db_rec[arbel_send_wq->doorbell_idx].qp;
  967. MLX_FILL_1 ( qp_db_rec, 0,
  968. counter, ( ( wq->next_idx + 1 ) & 0xffff ) );
  969. /* Ring doorbell register */
  970. MLX_FILL_4 ( &db_reg.send, 0,
  971. nopcode, ARBEL_OPCODE_SEND,
  972. f, 1,
  973. wqe_counter, ( wq->next_idx & 0xffff ),
  974. wqe_cnt, 1 );
  975. MLX_FILL_2 ( &db_reg.send, 1,
  976. nds, nds,
  977. qpn, qp->qpn );
  978. arbel_ring_doorbell ( arbel, &db_reg, ARBEL_DB_POST_SND_OFFSET );
  979. /* Update work queue's index */
  980. wq->next_idx++;
  981. return 0;
  982. }
  983. /**
  984. * Post receive work queue entry
  985. *
  986. * @v ibdev Infiniband device
  987. * @v qp Queue pair
  988. * @v iobuf I/O buffer
  989. * @ret rc Return status code
  990. */
  991. static int arbel_post_recv ( struct ib_device *ibdev,
  992. struct ib_queue_pair *qp,
  993. struct io_buffer *iobuf ) {
  994. struct arbel *arbel = ib_get_drvdata ( ibdev );
  995. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  996. struct ib_work_queue *wq = &qp->recv;
  997. struct arbel_recv_work_queue *arbel_recv_wq = &arbel_qp->recv;
  998. struct arbelprm_recv_wqe *wqe;
  999. union arbelprm_doorbell_record *db_rec;
  1000. unsigned int wqe_idx_mask;
  1001. /* Allocate work queue entry */
  1002. wqe_idx_mask = ( wq->num_wqes - 1 );
  1003. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1004. DBGC ( arbel, "Arbel %p receive queue full", arbel );
  1005. return -ENOBUFS;
  1006. }
  1007. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1008. wqe = &arbel_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  1009. /* Construct work queue entry */
  1010. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
  1011. MLX_FILL_1 ( &wqe->data[0], 1, l_key, arbel->reserved_lkey );
  1012. MLX_FILL_1 ( &wqe->data[0], 3,
  1013. local_address_l, virt_to_bus ( iobuf->data ) );
  1014. /* Update doorbell record */
  1015. barrier();
  1016. db_rec = &arbel->db_rec[arbel_recv_wq->doorbell_idx];
  1017. MLX_FILL_1 ( &db_rec->qp, 0,
  1018. counter, ( ( wq->next_idx + 1 ) & 0xffff ) );
  1019. /* Update work queue's index */
  1020. wq->next_idx++;
  1021. return 0;
  1022. }
  1023. /**
  1024. * Handle completion
  1025. *
  1026. * @v ibdev Infiniband device
  1027. * @v cq Completion queue
  1028. * @v cqe Hardware completion queue entry
  1029. * @ret rc Return status code
  1030. */
  1031. static int arbel_complete ( struct ib_device *ibdev,
  1032. struct ib_completion_queue *cq,
  1033. union arbelprm_completion_entry *cqe ) {
  1034. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1035. struct ib_work_queue *wq;
  1036. struct ib_queue_pair *qp;
  1037. struct arbel_queue_pair *arbel_qp;
  1038. struct arbel_send_work_queue *arbel_send_wq;
  1039. struct arbel_recv_work_queue *arbel_recv_wq;
  1040. struct arbelprm_recv_wqe *recv_wqe;
  1041. struct io_buffer *iobuf;
  1042. struct ib_address_vector av;
  1043. struct ib_global_route_header *grh;
  1044. unsigned int opcode;
  1045. unsigned long qpn;
  1046. int is_send;
  1047. unsigned long wqe_adr;
  1048. unsigned int wqe_idx;
  1049. size_t len;
  1050. int rc = 0;
  1051. /* Parse completion */
  1052. qpn = MLX_GET ( &cqe->normal, my_qpn );
  1053. is_send = MLX_GET ( &cqe->normal, s );
  1054. wqe_adr = ( MLX_GET ( &cqe->normal, wqe_adr ) << 6 );
  1055. opcode = MLX_GET ( &cqe->normal, opcode );
  1056. if ( opcode >= ARBEL_OPCODE_RECV_ERROR ) {
  1057. /* "s" field is not valid for error opcodes */
  1058. is_send = ( opcode == ARBEL_OPCODE_SEND_ERROR );
  1059. DBGC ( arbel, "Arbel %p CPN %lx syndrome %x vendor %x\n",
  1060. arbel, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
  1061. MLX_GET ( &cqe->error, vendor_code ) );
  1062. rc = -EIO;
  1063. /* Don't return immediately; propagate error to completer */
  1064. }
  1065. /* Identify work queue */
  1066. wq = ib_find_wq ( cq, qpn, is_send );
  1067. if ( ! wq ) {
  1068. DBGC ( arbel, "Arbel %p CQN %lx unknown %s QPN %lx\n",
  1069. arbel, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1070. return -EIO;
  1071. }
  1072. qp = wq->qp;
  1073. arbel_qp = ib_qp_get_drvdata ( qp );
  1074. arbel_send_wq = &arbel_qp->send;
  1075. arbel_recv_wq = &arbel_qp->recv;
  1076. /* Identify work queue entry index */
  1077. if ( is_send ) {
  1078. wqe_idx = ( ( wqe_adr - virt_to_bus ( arbel_send_wq->wqe ) ) /
  1079. sizeof ( arbel_send_wq->wqe[0] ) );
  1080. assert ( wqe_idx < qp->send.num_wqes );
  1081. } else {
  1082. wqe_idx = ( ( wqe_adr - virt_to_bus ( arbel_recv_wq->wqe ) ) /
  1083. sizeof ( arbel_recv_wq->wqe[0] ) );
  1084. assert ( wqe_idx < qp->recv.num_wqes );
  1085. }
  1086. /* Identify I/O buffer */
  1087. iobuf = wq->iobufs[wqe_idx];
  1088. if ( ! iobuf ) {
  1089. DBGC ( arbel, "Arbel %p CQN %lx QPN %lx empty WQE %x\n",
  1090. arbel, cq->cqn, qpn, wqe_idx );
  1091. return -EIO;
  1092. }
  1093. wq->iobufs[wqe_idx] = NULL;
  1094. if ( is_send ) {
  1095. /* Hand off to completion handler */
  1096. ib_complete_send ( ibdev, qp, iobuf, rc );
  1097. } else {
  1098. /* Set received length */
  1099. len = MLX_GET ( &cqe->normal, byte_cnt );
  1100. recv_wqe = &arbel_recv_wq->wqe[wqe_idx].recv;
  1101. assert ( MLX_GET ( &recv_wqe->data[0], local_address_l ) ==
  1102. virt_to_bus ( iobuf->data ) );
  1103. assert ( MLX_GET ( &recv_wqe->data[0], byte_count ) ==
  1104. iob_tailroom ( iobuf ) );
  1105. MLX_FILL_1 ( &recv_wqe->data[0], 0, byte_count, 0 );
  1106. MLX_FILL_1 ( &recv_wqe->data[0], 1,
  1107. l_key, ARBEL_INVALID_LKEY );
  1108. assert ( len <= iob_tailroom ( iobuf ) );
  1109. iob_put ( iobuf, len );
  1110. assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
  1111. grh = iobuf->data;
  1112. iob_pull ( iobuf, sizeof ( *grh ) );
  1113. /* Construct address vector */
  1114. memset ( &av, 0, sizeof ( av ) );
  1115. av.qpn = MLX_GET ( &cqe->normal, rqpn );
  1116. av.lid = MLX_GET ( &cqe->normal, rlid );
  1117. av.sl = MLX_GET ( &cqe->normal, sl );
  1118. av.gid_present = MLX_GET ( &cqe->normal, g );
  1119. memcpy ( &av.gid, &grh->sgid, sizeof ( av.gid ) );
  1120. /* Hand off to completion handler */
  1121. ib_complete_recv ( ibdev, qp, &av, iobuf, rc );
  1122. }
  1123. return rc;
  1124. }
  1125. /**
  1126. * Poll completion queue
  1127. *
  1128. * @v ibdev Infiniband device
  1129. * @v cq Completion queue
  1130. */
  1131. static void arbel_poll_cq ( struct ib_device *ibdev,
  1132. struct ib_completion_queue *cq ) {
  1133. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1134. struct arbel_completion_queue *arbel_cq = ib_cq_get_drvdata ( cq );
  1135. struct arbelprm_cq_ci_db_record *ci_db_rec;
  1136. union arbelprm_completion_entry *cqe;
  1137. unsigned int cqe_idx_mask;
  1138. int rc;
  1139. while ( 1 ) {
  1140. /* Look for completion entry */
  1141. cqe_idx_mask = ( cq->num_cqes - 1 );
  1142. cqe = &arbel_cq->cqe[cq->next_idx & cqe_idx_mask];
  1143. if ( MLX_GET ( &cqe->normal, owner ) != 0 ) {
  1144. /* Entry still owned by hardware; end of poll */
  1145. break;
  1146. }
  1147. /* Handle completion */
  1148. if ( ( rc = arbel_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1149. DBGC ( arbel, "Arbel %p failed to complete: %s\n",
  1150. arbel, strerror ( rc ) );
  1151. DBGC_HD ( arbel, cqe, sizeof ( *cqe ) );
  1152. }
  1153. /* Return ownership to hardware */
  1154. MLX_FILL_1 ( &cqe->normal, 7, owner, 1 );
  1155. barrier();
  1156. /* Update completion queue's index */
  1157. cq->next_idx++;
  1158. /* Update doorbell record */
  1159. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  1160. MLX_FILL_1 ( ci_db_rec, 0,
  1161. counter, ( cq->next_idx & 0xffffffffUL ) );
  1162. }
  1163. }
  1164. /***************************************************************************
  1165. *
  1166. * Event queues
  1167. *
  1168. ***************************************************************************
  1169. */
  1170. /**
  1171. * Create event queue
  1172. *
  1173. * @v arbel Arbel device
  1174. * @ret rc Return status code
  1175. */
  1176. static int arbel_create_eq ( struct arbel *arbel ) {
  1177. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1178. struct arbelprm_eqc eqctx;
  1179. struct arbelprm_event_mask mask;
  1180. unsigned int i;
  1181. int rc;
  1182. /* Select event queue number */
  1183. arbel_eq->eqn = arbel->limits.reserved_eqs;
  1184. /* Calculate doorbell address */
  1185. arbel_eq->doorbell = ( arbel->eq_ci_doorbells +
  1186. ARBEL_DB_EQ_OFFSET ( arbel_eq->eqn ) );
  1187. /* Allocate event queue itself */
  1188. arbel_eq->eqe_size =
  1189. ( ARBEL_NUM_EQES * sizeof ( arbel_eq->eqe[0] ) );
  1190. arbel_eq->eqe = malloc_dma ( arbel_eq->eqe_size,
  1191. sizeof ( arbel_eq->eqe[0] ) );
  1192. if ( ! arbel_eq->eqe ) {
  1193. rc = -ENOMEM;
  1194. goto err_eqe;
  1195. }
  1196. memset ( arbel_eq->eqe, 0, arbel_eq->eqe_size );
  1197. for ( i = 0 ; i < ARBEL_NUM_EQES ; i++ ) {
  1198. MLX_FILL_1 ( &arbel_eq->eqe[i].generic, 7, owner, 1 );
  1199. }
  1200. barrier();
  1201. /* Hand queue over to hardware */
  1202. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1203. MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
  1204. MLX_FILL_1 ( &eqctx, 2,
  1205. start_address_l, virt_to_phys ( arbel_eq->eqe ) );
  1206. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( ARBEL_NUM_EQES - 1 ) );
  1207. MLX_FILL_1 ( &eqctx, 6, pd, ARBEL_GLOBAL_PD );
  1208. MLX_FILL_1 ( &eqctx, 7, lkey, arbel->reserved_lkey );
  1209. if ( ( rc = arbel_cmd_sw2hw_eq ( arbel, arbel_eq->eqn,
  1210. &eqctx ) ) != 0 ) {
  1211. DBGC ( arbel, "Arbel %p SW2HW_EQ failed: %s\n",
  1212. arbel, strerror ( rc ) );
  1213. goto err_sw2hw_eq;
  1214. }
  1215. /* Map events to this event queue */
  1216. memset ( &mask, 0, sizeof ( mask ) );
  1217. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1218. if ( ( rc = arbel_cmd_map_eq ( arbel,
  1219. ( ARBEL_MAP_EQ | arbel_eq->eqn ),
  1220. &mask ) ) != 0 ) {
  1221. DBGC ( arbel, "Arbel %p MAP_EQ failed: %s\n",
  1222. arbel, strerror ( rc ) );
  1223. goto err_map_eq;
  1224. }
  1225. DBGC ( arbel, "Arbel %p EQN %#lx ring at [%p,%p])\n",
  1226. arbel, arbel_eq->eqn, arbel_eq->eqe,
  1227. ( ( ( void * ) arbel_eq->eqe ) + arbel_eq->eqe_size ) );
  1228. return 0;
  1229. err_map_eq:
  1230. arbel_cmd_hw2sw_eq ( arbel, arbel_eq->eqn, &eqctx );
  1231. err_sw2hw_eq:
  1232. free_dma ( arbel_eq->eqe, arbel_eq->eqe_size );
  1233. err_eqe:
  1234. memset ( arbel_eq, 0, sizeof ( *arbel_eq ) );
  1235. return rc;
  1236. }
  1237. /**
  1238. * Destroy event queue
  1239. *
  1240. * @v arbel Arbel device
  1241. */
  1242. static void arbel_destroy_eq ( struct arbel *arbel ) {
  1243. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1244. struct arbelprm_eqc eqctx;
  1245. struct arbelprm_event_mask mask;
  1246. int rc;
  1247. /* Unmap events from event queue */
  1248. memset ( &mask, 0, sizeof ( mask ) );
  1249. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1250. if ( ( rc = arbel_cmd_map_eq ( arbel,
  1251. ( ARBEL_UNMAP_EQ | arbel_eq->eqn ),
  1252. &mask ) ) != 0 ) {
  1253. DBGC ( arbel, "Arbel %p FATAL MAP_EQ failed to unmap: %s\n",
  1254. arbel, strerror ( rc ) );
  1255. /* Continue; HCA may die but system should survive */
  1256. }
  1257. /* Take ownership back from hardware */
  1258. if ( ( rc = arbel_cmd_hw2sw_eq ( arbel, arbel_eq->eqn,
  1259. &eqctx ) ) != 0 ) {
  1260. DBGC ( arbel, "Arbel %p FATAL HW2SW_EQ failed: %s\n",
  1261. arbel, strerror ( rc ) );
  1262. /* Leak memory and return; at least we avoid corruption */
  1263. return;
  1264. }
  1265. /* Free memory */
  1266. free_dma ( arbel_eq->eqe, arbel_eq->eqe_size );
  1267. memset ( arbel_eq, 0, sizeof ( *arbel_eq ) );
  1268. }
  1269. /**
  1270. * Handle port state event
  1271. *
  1272. * @v arbel Arbel device
  1273. * @v eqe Port state change event queue entry
  1274. */
  1275. static void arbel_event_port_state_change ( struct arbel *arbel,
  1276. union arbelprm_event_entry *eqe){
  1277. unsigned int port;
  1278. int link_up;
  1279. /* Get port and link status */
  1280. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1281. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1282. DBGC ( arbel, "Arbel %p port %d link %s\n", arbel, ( port + 1 ),
  1283. ( link_up ? "up" : "down" ) );
  1284. /* Sanity check */
  1285. if ( port >= ARBEL_NUM_PORTS ) {
  1286. DBGC ( arbel, "Arbel %p port %d does not exist!\n",
  1287. arbel, ( port + 1 ) );
  1288. return;
  1289. }
  1290. /* Update MAD parameters */
  1291. ib_smc_update ( arbel->ibdev[port], arbel_mad );
  1292. /* Notify Infiniband core of link state change */
  1293. ib_link_state_changed ( arbel->ibdev[port] );
  1294. }
  1295. /**
  1296. * Poll event queue
  1297. *
  1298. * @v ibdev Infiniband device
  1299. */
  1300. static void arbel_poll_eq ( struct ib_device *ibdev ) {
  1301. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1302. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1303. union arbelprm_event_entry *eqe;
  1304. union arbelprm_eq_doorbell_register db_reg;
  1305. unsigned int eqe_idx_mask;
  1306. unsigned int event_type;
  1307. while ( 1 ) {
  1308. /* Look for event entry */
  1309. eqe_idx_mask = ( ARBEL_NUM_EQES - 1 );
  1310. eqe = &arbel_eq->eqe[arbel_eq->next_idx & eqe_idx_mask];
  1311. if ( MLX_GET ( &eqe->generic, owner ) != 0 ) {
  1312. /* Entry still owned by hardware; end of poll */
  1313. break;
  1314. }
  1315. DBGCP ( arbel, "Arbel %p event:\n", arbel );
  1316. DBGCP_HD ( arbel, eqe, sizeof ( *eqe ) );
  1317. /* Handle event */
  1318. event_type = MLX_GET ( &eqe->generic, event_type );
  1319. switch ( event_type ) {
  1320. case ARBEL_EV_PORT_STATE_CHANGE:
  1321. arbel_event_port_state_change ( arbel, eqe );
  1322. break;
  1323. default:
  1324. DBGC ( arbel, "Arbel %p unrecognised event type "
  1325. "%#x:\n", arbel, event_type );
  1326. DBGC_HD ( arbel, eqe, sizeof ( *eqe ) );
  1327. break;
  1328. }
  1329. /* Return ownership to hardware */
  1330. MLX_FILL_1 ( &eqe->generic, 7, owner, 1 );
  1331. barrier();
  1332. /* Update event queue's index */
  1333. arbel_eq->next_idx++;
  1334. /* Ring doorbell */
  1335. MLX_FILL_1 ( &db_reg.ci, 0, ci, arbel_eq->next_idx );
  1336. DBGCP ( arbel, "Ringing doorbell %08lx with %08x\n",
  1337. virt_to_phys ( arbel_eq->doorbell ),
  1338. db_reg.dword[0] );
  1339. writel ( db_reg.dword[0], arbel_eq->doorbell );
  1340. }
  1341. }
  1342. /***************************************************************************
  1343. *
  1344. * Infiniband link-layer operations
  1345. *
  1346. ***************************************************************************
  1347. */
  1348. /**
  1349. * Initialise Infiniband link
  1350. *
  1351. * @v ibdev Infiniband device
  1352. * @ret rc Return status code
  1353. */
  1354. static int arbel_open ( struct ib_device *ibdev ) {
  1355. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1356. struct arbelprm_init_ib init_ib;
  1357. int rc;
  1358. memset ( &init_ib, 0, sizeof ( init_ib ) );
  1359. MLX_FILL_3 ( &init_ib, 0,
  1360. mtu_cap, ARBEL_MTU_2048,
  1361. port_width_cap, 3,
  1362. vl_cap, 1 );
  1363. MLX_FILL_1 ( &init_ib, 1, max_gid, 1 );
  1364. MLX_FILL_1 ( &init_ib, 2, max_pkey, 64 );
  1365. if ( ( rc = arbel_cmd_init_ib ( arbel, ibdev->port,
  1366. &init_ib ) ) != 0 ) {
  1367. DBGC ( arbel, "Arbel %p could not intialise IB: %s\n",
  1368. arbel, strerror ( rc ) );
  1369. return rc;
  1370. }
  1371. /* Update MAD parameters */
  1372. ib_smc_update ( ibdev, arbel_mad );
  1373. return 0;
  1374. }
  1375. /**
  1376. * Close Infiniband link
  1377. *
  1378. * @v ibdev Infiniband device
  1379. */
  1380. static void arbel_close ( struct ib_device *ibdev ) {
  1381. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1382. int rc;
  1383. if ( ( rc = arbel_cmd_close_ib ( arbel, ibdev->port ) ) != 0 ) {
  1384. DBGC ( arbel, "Arbel %p could not close IB: %s\n",
  1385. arbel, strerror ( rc ) );
  1386. /* Nothing we can do about this */
  1387. }
  1388. }
  1389. /***************************************************************************
  1390. *
  1391. * Multicast group operations
  1392. *
  1393. ***************************************************************************
  1394. */
  1395. /**
  1396. * Attach to multicast group
  1397. *
  1398. * @v ibdev Infiniband device
  1399. * @v qp Queue pair
  1400. * @v gid Multicast GID
  1401. * @ret rc Return status code
  1402. */
  1403. static int arbel_mcast_attach ( struct ib_device *ibdev,
  1404. struct ib_queue_pair *qp,
  1405. struct ib_gid *gid ) {
  1406. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1407. struct arbelprm_mgm_hash hash;
  1408. struct arbelprm_mgm_entry mgm;
  1409. unsigned int index;
  1410. int rc;
  1411. /* Generate hash table index */
  1412. if ( ( rc = arbel_cmd_mgid_hash ( arbel, gid, &hash ) ) != 0 ) {
  1413. DBGC ( arbel, "Arbel %p could not hash GID: %s\n",
  1414. arbel, strerror ( rc ) );
  1415. return rc;
  1416. }
  1417. index = MLX_GET ( &hash, hash );
  1418. /* Check for existing hash table entry */
  1419. if ( ( rc = arbel_cmd_read_mgm ( arbel, index, &mgm ) ) != 0 ) {
  1420. DBGC ( arbel, "Arbel %p could not read MGM %#x: %s\n",
  1421. arbel, index, strerror ( rc ) );
  1422. return rc;
  1423. }
  1424. if ( MLX_GET ( &mgm, mgmqp_0.qi ) != 0 ) {
  1425. /* FIXME: this implementation allows only a single QP
  1426. * per multicast group, and doesn't handle hash
  1427. * collisions. Sufficient for IPoIB but may need to
  1428. * be extended in future.
  1429. */
  1430. DBGC ( arbel, "Arbel %p MGID index %#x already in use\n",
  1431. arbel, index );
  1432. return -EBUSY;
  1433. }
  1434. /* Update hash table entry */
  1435. MLX_FILL_2 ( &mgm, 8,
  1436. mgmqp_0.qpn_i, qp->qpn,
  1437. mgmqp_0.qi, 1 );
  1438. memcpy ( &mgm.u.dwords[4], gid, sizeof ( *gid ) );
  1439. if ( ( rc = arbel_cmd_write_mgm ( arbel, index, &mgm ) ) != 0 ) {
  1440. DBGC ( arbel, "Arbel %p could not write MGM %#x: %s\n",
  1441. arbel, index, strerror ( rc ) );
  1442. return rc;
  1443. }
  1444. return 0;
  1445. }
  1446. /**
  1447. * Detach from multicast group
  1448. *
  1449. * @v ibdev Infiniband device
  1450. * @v qp Queue pair
  1451. * @v gid Multicast GID
  1452. */
  1453. static void arbel_mcast_detach ( struct ib_device *ibdev,
  1454. struct ib_queue_pair *qp __unused,
  1455. struct ib_gid *gid ) {
  1456. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1457. struct arbelprm_mgm_hash hash;
  1458. struct arbelprm_mgm_entry mgm;
  1459. unsigned int index;
  1460. int rc;
  1461. /* Generate hash table index */
  1462. if ( ( rc = arbel_cmd_mgid_hash ( arbel, gid, &hash ) ) != 0 ) {
  1463. DBGC ( arbel, "Arbel %p could not hash GID: %s\n",
  1464. arbel, strerror ( rc ) );
  1465. return;
  1466. }
  1467. index = MLX_GET ( &hash, hash );
  1468. /* Clear hash table entry */
  1469. memset ( &mgm, 0, sizeof ( mgm ) );
  1470. if ( ( rc = arbel_cmd_write_mgm ( arbel, index, &mgm ) ) != 0 ) {
  1471. DBGC ( arbel, "Arbel %p could not write MGM %#x: %s\n",
  1472. arbel, index, strerror ( rc ) );
  1473. return;
  1474. }
  1475. }
  1476. /** Arbel Infiniband operations */
  1477. static struct ib_device_operations arbel_ib_operations = {
  1478. .create_cq = arbel_create_cq,
  1479. .destroy_cq = arbel_destroy_cq,
  1480. .create_qp = arbel_create_qp,
  1481. .modify_qp = arbel_modify_qp,
  1482. .destroy_qp = arbel_destroy_qp,
  1483. .post_send = arbel_post_send,
  1484. .post_recv = arbel_post_recv,
  1485. .poll_cq = arbel_poll_cq,
  1486. .poll_eq = arbel_poll_eq,
  1487. .open = arbel_open,
  1488. .close = arbel_close,
  1489. .mcast_attach = arbel_mcast_attach,
  1490. .mcast_detach = arbel_mcast_detach,
  1491. };
  1492. /***************************************************************************
  1493. *
  1494. * Firmware control
  1495. *
  1496. ***************************************************************************
  1497. */
  1498. /**
  1499. * Start firmware running
  1500. *
  1501. * @v arbel Arbel device
  1502. * @ret rc Return status code
  1503. */
  1504. static int arbel_start_firmware ( struct arbel *arbel ) {
  1505. struct arbelprm_query_fw fw;
  1506. struct arbelprm_access_lam lam;
  1507. struct arbelprm_virtual_physical_mapping map_fa;
  1508. unsigned int fw_pages;
  1509. unsigned int log2_fw_pages;
  1510. size_t fw_size;
  1511. physaddr_t fw_base;
  1512. uint64_t eq_set_ci_base_addr;
  1513. int rc;
  1514. /* Get firmware parameters */
  1515. if ( ( rc = arbel_cmd_query_fw ( arbel, &fw ) ) != 0 ) {
  1516. DBGC ( arbel, "Arbel %p could not query firmware: %s\n",
  1517. arbel, strerror ( rc ) );
  1518. goto err_query_fw;
  1519. }
  1520. DBGC ( arbel, "Arbel %p firmware version %d.%d.%d\n", arbel,
  1521. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  1522. MLX_GET ( &fw, fw_rev_subminor ) );
  1523. fw_pages = MLX_GET ( &fw, fw_pages );
  1524. log2_fw_pages = fls ( fw_pages - 1 );
  1525. fw_pages = ( 1 << log2_fw_pages );
  1526. DBGC ( arbel, "Arbel %p requires %d kB for firmware\n",
  1527. arbel, ( fw_pages * 4 ) );
  1528. eq_set_ci_base_addr =
  1529. ( ( (uint64_t) MLX_GET ( &fw, eq_set_ci_base_addr_h ) << 32 ) |
  1530. ( (uint64_t) MLX_GET ( &fw, eq_set_ci_base_addr_l ) ) );
  1531. arbel->eq_ci_doorbells = ioremap ( eq_set_ci_base_addr, 0x200 );
  1532. /* Enable locally-attached memory. Ignore failure; there may
  1533. * be no attached memory.
  1534. */
  1535. arbel_cmd_enable_lam ( arbel, &lam );
  1536. /* Allocate firmware pages and map firmware area */
  1537. fw_size = ( fw_pages * 4096 );
  1538. arbel->firmware_area = umalloc ( fw_size * 2 );
  1539. if ( ! arbel->firmware_area ) {
  1540. rc = -ENOMEM;
  1541. goto err_alloc_fa;
  1542. }
  1543. fw_base = ( user_to_phys ( arbel->firmware_area, fw_size ) &
  1544. ~( fw_size - 1 ) );
  1545. DBGC ( arbel, "Arbel %p firmware area at physical [%lx,%lx)\n",
  1546. arbel, fw_base, ( fw_base + fw_size ) );
  1547. memset ( &map_fa, 0, sizeof ( map_fa ) );
  1548. MLX_FILL_2 ( &map_fa, 3,
  1549. log2size, log2_fw_pages,
  1550. pa_l, ( fw_base >> 12 ) );
  1551. if ( ( rc = arbel_cmd_map_fa ( arbel, &map_fa ) ) != 0 ) {
  1552. DBGC ( arbel, "Arbel %p could not map firmware: %s\n",
  1553. arbel, strerror ( rc ) );
  1554. goto err_map_fa;
  1555. }
  1556. /* Start firmware */
  1557. if ( ( rc = arbel_cmd_run_fw ( arbel ) ) != 0 ) {
  1558. DBGC ( arbel, "Arbel %p could not run firmware: %s\n",
  1559. arbel, strerror ( rc ) );
  1560. goto err_run_fw;
  1561. }
  1562. DBGC ( arbel, "Arbel %p firmware started\n", arbel );
  1563. return 0;
  1564. err_run_fw:
  1565. arbel_cmd_unmap_fa ( arbel );
  1566. err_map_fa:
  1567. ufree ( arbel->firmware_area );
  1568. arbel->firmware_area = UNULL;
  1569. err_alloc_fa:
  1570. err_query_fw:
  1571. return rc;
  1572. }
  1573. /**
  1574. * Stop firmware running
  1575. *
  1576. * @v arbel Arbel device
  1577. */
  1578. static void arbel_stop_firmware ( struct arbel *arbel ) {
  1579. int rc;
  1580. if ( ( rc = arbel_cmd_unmap_fa ( arbel ) ) != 0 ) {
  1581. DBGC ( arbel, "Arbel %p FATAL could not stop firmware: %s\n",
  1582. arbel, strerror ( rc ) );
  1583. /* Leak memory and return; at least we avoid corruption */
  1584. return;
  1585. }
  1586. ufree ( arbel->firmware_area );
  1587. arbel->firmware_area = UNULL;
  1588. }
  1589. /***************************************************************************
  1590. *
  1591. * Infinihost Context Memory management
  1592. *
  1593. ***************************************************************************
  1594. */
  1595. /**
  1596. * Get device limits
  1597. *
  1598. * @v arbel Arbel device
  1599. * @ret rc Return status code
  1600. */
  1601. static int arbel_get_limits ( struct arbel *arbel ) {
  1602. struct arbelprm_query_dev_lim dev_lim;
  1603. int rc;
  1604. if ( ( rc = arbel_cmd_query_dev_lim ( arbel, &dev_lim ) ) != 0 ) {
  1605. DBGC ( arbel, "Arbel %p could not get device limits: %s\n",
  1606. arbel, strerror ( rc ) );
  1607. return rc;
  1608. }
  1609. arbel->limits.reserved_qps =
  1610. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_qps ) );
  1611. arbel->limits.qpc_entry_size = MLX_GET ( &dev_lim, qpc_entry_sz );
  1612. arbel->limits.eqpc_entry_size = MLX_GET ( &dev_lim, eqpc_entry_sz );
  1613. arbel->limits.reserved_srqs =
  1614. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_srqs ) );
  1615. arbel->limits.srqc_entry_size = MLX_GET ( &dev_lim, srq_entry_sz );
  1616. arbel->limits.reserved_ees =
  1617. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_ees ) );
  1618. arbel->limits.eec_entry_size = MLX_GET ( &dev_lim, eec_entry_sz );
  1619. arbel->limits.eeec_entry_size = MLX_GET ( &dev_lim, eeec_entry_sz );
  1620. arbel->limits.reserved_cqs =
  1621. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_cqs ) );
  1622. arbel->limits.cqc_entry_size = MLX_GET ( &dev_lim, cqc_entry_sz );
  1623. arbel->limits.reserved_eqs = MLX_GET ( &dev_lim, num_rsvd_eqs );
  1624. arbel->limits.reserved_mtts =
  1625. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_mtts ) );
  1626. arbel->limits.mtt_entry_size = MLX_GET ( &dev_lim, mtt_entry_sz );
  1627. arbel->limits.reserved_mrws =
  1628. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_mrws ) );
  1629. arbel->limits.mpt_entry_size = MLX_GET ( &dev_lim, mpt_entry_sz );
  1630. arbel->limits.reserved_rdbs =
  1631. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_rdbs ) );
  1632. arbel->limits.eqc_entry_size = MLX_GET ( &dev_lim, eqc_entry_sz );
  1633. arbel->limits.reserved_uars = MLX_GET ( &dev_lim, num_rsvd_uars );
  1634. return 0;
  1635. }
  1636. /**
  1637. * Get ICM usage
  1638. *
  1639. * @v log_num_entries Log2 of the number of entries
  1640. * @v entry_size Entry size
  1641. * @ret usage Usage size in ICM
  1642. */
  1643. static size_t icm_usage ( unsigned int log_num_entries, size_t entry_size ) {
  1644. size_t usage;
  1645. usage = ( ( 1 << log_num_entries ) * entry_size );
  1646. usage = ( ( usage + 4095 ) & ~4095 );
  1647. return usage;
  1648. }
  1649. /**
  1650. * Allocate ICM
  1651. *
  1652. * @v arbel Arbel device
  1653. * @v init_hca INIT_HCA structure to fill in
  1654. * @ret rc Return status code
  1655. */
  1656. static int arbel_alloc_icm ( struct arbel *arbel,
  1657. struct arbelprm_init_hca *init_hca ) {
  1658. struct arbelprm_scalar_parameter icm_size;
  1659. struct arbelprm_scalar_parameter icm_aux_size;
  1660. struct arbelprm_virtual_physical_mapping map_icm_aux;
  1661. struct arbelprm_virtual_physical_mapping map_icm;
  1662. union arbelprm_doorbell_record *db_rec;
  1663. size_t icm_offset = 0;
  1664. unsigned int log_num_qps, log_num_srqs, log_num_ees, log_num_cqs;
  1665. unsigned int log_num_mtts, log_num_mpts, log_num_rdbs, log_num_eqs;
  1666. int rc;
  1667. icm_offset = ( ( arbel->limits.reserved_uars + 1 ) << 12 );
  1668. /* Queue pair contexts */
  1669. log_num_qps = fls ( arbel->limits.reserved_qps + ARBEL_MAX_QPS - 1 );
  1670. MLX_FILL_2 ( init_hca, 13,
  1671. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  1672. ( icm_offset >> 7 ),
  1673. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  1674. log_num_qps );
  1675. DBGC ( arbel, "Arbel %p ICM QPC base = %zx\n", arbel, icm_offset );
  1676. icm_offset += icm_usage ( log_num_qps, arbel->limits.qpc_entry_size );
  1677. /* Extended queue pair contexts */
  1678. MLX_FILL_1 ( init_hca, 25,
  1679. qpc_eec_cqc_eqc_rdb_parameters.eqpc_base_addr_l,
  1680. icm_offset );
  1681. DBGC ( arbel, "Arbel %p ICM EQPC base = %zx\n", arbel, icm_offset );
  1682. // icm_offset += icm_usage ( log_num_qps, arbel->limits.eqpc_entry_size );
  1683. icm_offset += icm_usage ( log_num_qps, arbel->limits.qpc_entry_size );
  1684. /* Shared receive queue contexts */
  1685. log_num_srqs = fls ( arbel->limits.reserved_srqs - 1 );
  1686. MLX_FILL_2 ( init_hca, 19,
  1687. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  1688. ( icm_offset >> 5 ),
  1689. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  1690. log_num_srqs );
  1691. DBGC ( arbel, "Arbel %p ICM SRQC base = %zx\n", arbel, icm_offset );
  1692. icm_offset += icm_usage ( log_num_srqs, arbel->limits.srqc_entry_size );
  1693. /* End-to-end contexts */
  1694. log_num_ees = fls ( arbel->limits.reserved_ees - 1 );
  1695. MLX_FILL_2 ( init_hca, 17,
  1696. qpc_eec_cqc_eqc_rdb_parameters.eec_base_addr_l,
  1697. ( icm_offset >> 7 ),
  1698. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_ee,
  1699. log_num_ees );
  1700. DBGC ( arbel, "Arbel %p ICM EEC base = %zx\n", arbel, icm_offset );
  1701. icm_offset += icm_usage ( log_num_ees, arbel->limits.eec_entry_size );
  1702. /* Extended end-to-end contexts */
  1703. MLX_FILL_1 ( init_hca, 29,
  1704. qpc_eec_cqc_eqc_rdb_parameters.eeec_base_addr_l,
  1705. icm_offset );
  1706. DBGC ( arbel, "Arbel %p ICM EEEC base = %zx\n", arbel, icm_offset );
  1707. icm_offset += icm_usage ( log_num_ees, arbel->limits.eeec_entry_size );
  1708. /* Completion queue contexts */
  1709. log_num_cqs = fls ( arbel->limits.reserved_cqs + ARBEL_MAX_CQS - 1 );
  1710. MLX_FILL_2 ( init_hca, 21,
  1711. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  1712. ( icm_offset >> 6 ),
  1713. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  1714. log_num_cqs );
  1715. DBGC ( arbel, "Arbel %p ICM CQC base = %zx\n", arbel, icm_offset );
  1716. icm_offset += icm_usage ( log_num_cqs, arbel->limits.cqc_entry_size );
  1717. /* Memory translation table */
  1718. log_num_mtts = fls ( arbel->limits.reserved_mtts - 1 );
  1719. MLX_FILL_1 ( init_hca, 65,
  1720. tpt_parameters.mtt_base_addr_l, icm_offset );
  1721. DBGC ( arbel, "Arbel %p ICM MTT base = %zx\n", arbel, icm_offset );
  1722. icm_offset += icm_usage ( log_num_mtts, arbel->limits.mtt_entry_size );
  1723. /* Memory protection table */
  1724. log_num_mpts = fls ( arbel->limits.reserved_mrws + 1 - 1 );
  1725. MLX_FILL_1 ( init_hca, 61,
  1726. tpt_parameters.mpt_base_adr_l, icm_offset );
  1727. MLX_FILL_1 ( init_hca, 62,
  1728. tpt_parameters.log_mpt_sz, log_num_mpts );
  1729. DBGC ( arbel, "Arbel %p ICM MTT base = %zx\n", arbel, icm_offset );
  1730. icm_offset += icm_usage ( log_num_mpts, arbel->limits.mpt_entry_size );
  1731. /* RDMA something or other */
  1732. log_num_rdbs = fls ( arbel->limits.reserved_rdbs - 1 );
  1733. MLX_FILL_1 ( init_hca, 37,
  1734. qpc_eec_cqc_eqc_rdb_parameters.rdb_base_addr_l,
  1735. icm_offset );
  1736. DBGC ( arbel, "Arbel %p ICM RDB base = %zx\n", arbel, icm_offset );
  1737. icm_offset += icm_usage ( log_num_rdbs, 32 );
  1738. /* Event queue contexts */
  1739. log_num_eqs = fls ( arbel->limits.reserved_eqs + ARBEL_MAX_EQS - 1 );
  1740. MLX_FILL_2 ( init_hca, 33,
  1741. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  1742. ( icm_offset >> 6 ),
  1743. qpc_eec_cqc_eqc_rdb_parameters.log_num_eq,
  1744. log_num_eqs );
  1745. DBGC ( arbel, "Arbel %p ICM EQ base = %zx\n", arbel, icm_offset );
  1746. icm_offset += ( ( 1 << log_num_eqs ) * arbel->limits.eqc_entry_size );
  1747. /* Multicast table */
  1748. MLX_FILL_1 ( init_hca, 49,
  1749. multicast_parameters.mc_base_addr_l, icm_offset );
  1750. MLX_FILL_1 ( init_hca, 52,
  1751. multicast_parameters.log_mc_table_entry_sz,
  1752. fls ( sizeof ( struct arbelprm_mgm_entry ) - 1 ) );
  1753. MLX_FILL_1 ( init_hca, 53,
  1754. multicast_parameters.mc_table_hash_sz, 8 );
  1755. MLX_FILL_1 ( init_hca, 54,
  1756. multicast_parameters.log_mc_table_sz, 3 );
  1757. DBGC ( arbel, "Arbel %p ICM MC base = %zx\n", arbel, icm_offset );
  1758. icm_offset += ( 8 * sizeof ( struct arbelprm_mgm_entry ) );
  1759. arbel->icm_len = icm_offset;
  1760. arbel->icm_len = ( ( arbel->icm_len + 4095 ) & ~4095 );
  1761. /* Get ICM auxiliary area size */
  1762. memset ( &icm_size, 0, sizeof ( icm_size ) );
  1763. MLX_FILL_1 ( &icm_size, 1, value, arbel->icm_len );
  1764. if ( ( rc = arbel_cmd_set_icm_size ( arbel, &icm_size,
  1765. &icm_aux_size ) ) != 0 ) {
  1766. DBGC ( arbel, "Arbel %p could not set ICM size: %s\n",
  1767. arbel, strerror ( rc ) );
  1768. goto err_set_icm_size;
  1769. }
  1770. arbel->icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * 4096 );
  1771. /* Allocate ICM data and auxiliary area */
  1772. DBGC ( arbel, "Arbel %p requires %zd kB ICM and %zd kB AUX ICM\n",
  1773. arbel, ( arbel->icm_len / 1024 ),
  1774. ( arbel->icm_aux_len / 1024 ) );
  1775. arbel->icm = umalloc ( arbel->icm_len + arbel->icm_aux_len );
  1776. if ( ! arbel->icm ) {
  1777. rc = -ENOMEM;
  1778. goto err_alloc;
  1779. }
  1780. /* Map ICM auxiliary area */
  1781. memset ( &map_icm_aux, 0, sizeof ( map_icm_aux ) );
  1782. MLX_FILL_2 ( &map_icm_aux, 3,
  1783. log2size, fls ( ( arbel->icm_aux_len / 4096 ) - 1 ),
  1784. pa_l,
  1785. ( user_to_phys ( arbel->icm, arbel->icm_len ) >> 12 ) );
  1786. if ( ( rc = arbel_cmd_map_icm_aux ( arbel, &map_icm_aux ) ) != 0 ) {
  1787. DBGC ( arbel, "Arbel %p could not map AUX ICM: %s\n",
  1788. arbel, strerror ( rc ) );
  1789. goto err_map_icm_aux;
  1790. }
  1791. /* MAP ICM area */
  1792. memset ( &map_icm, 0, sizeof ( map_icm ) );
  1793. MLX_FILL_2 ( &map_icm, 3,
  1794. log2size, fls ( ( arbel->icm_len / 4096 ) - 1 ),
  1795. pa_l, ( user_to_phys ( arbel->icm, 0 ) >> 12 ) );
  1796. if ( ( rc = arbel_cmd_map_icm ( arbel, &map_icm ) ) != 0 ) {
  1797. DBGC ( arbel, "Arbel %p could not map ICM: %s\n",
  1798. arbel, strerror ( rc ) );
  1799. goto err_map_icm;
  1800. }
  1801. /* Initialise UAR context */
  1802. arbel->db_rec = phys_to_virt ( user_to_phys ( arbel->icm, 0 ) +
  1803. ( arbel->limits.reserved_uars *
  1804. ARBEL_PAGE_SIZE ) );
  1805. memset ( arbel->db_rec, 0, ARBEL_PAGE_SIZE );
  1806. db_rec = &arbel->db_rec[ARBEL_GROUP_SEPARATOR_DOORBELL];
  1807. MLX_FILL_1 ( &db_rec->qp, 1, res, ARBEL_UAR_RES_GROUP_SEP );
  1808. return 0;
  1809. arbel_cmd_unmap_icm ( arbel, ( arbel->icm_len / 4096 ) );
  1810. err_map_icm:
  1811. arbel_cmd_unmap_icm_aux ( arbel );
  1812. err_map_icm_aux:
  1813. ufree ( arbel->icm );
  1814. arbel->icm = UNULL;
  1815. err_alloc:
  1816. err_set_icm_size:
  1817. return rc;
  1818. }
  1819. /**
  1820. * Free ICM
  1821. *
  1822. * @v arbel Arbel device
  1823. */
  1824. static void arbel_free_icm ( struct arbel *arbel ) {
  1825. arbel_cmd_unmap_icm ( arbel, ( arbel->icm_len / 4096 ) );
  1826. arbel_cmd_unmap_icm_aux ( arbel );
  1827. ufree ( arbel->icm );
  1828. arbel->icm = UNULL;
  1829. }
  1830. /***************************************************************************
  1831. *
  1832. * PCI interface
  1833. *
  1834. ***************************************************************************
  1835. */
  1836. /**
  1837. * Set up memory protection table
  1838. *
  1839. * @v arbel Arbel device
  1840. * @ret rc Return status code
  1841. */
  1842. static int arbel_setup_mpt ( struct arbel *arbel ) {
  1843. struct arbelprm_mpt mpt;
  1844. uint32_t key;
  1845. int rc;
  1846. /* Derive key */
  1847. key = ( arbel->limits.reserved_mrws | ARBEL_MKEY_PREFIX );
  1848. arbel->reserved_lkey = ( ( key << 8 ) | ( key >> 24 ) );
  1849. /* Initialise memory protection table */
  1850. memset ( &mpt, 0, sizeof ( mpt ) );
  1851. MLX_FILL_4 ( &mpt, 0,
  1852. r_w, 1,
  1853. pa, 1,
  1854. lr, 1,
  1855. lw, 1 );
  1856. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  1857. MLX_FILL_1 ( &mpt, 3, pd, ARBEL_GLOBAL_PD );
  1858. MLX_FILL_1 ( &mpt, 6, reg_wnd_len_h, 0xffffffffUL );
  1859. MLX_FILL_1 ( &mpt, 7, reg_wnd_len_l, 0xffffffffUL );
  1860. if ( ( rc = arbel_cmd_sw2hw_mpt ( arbel, arbel->limits.reserved_mrws,
  1861. &mpt ) ) != 0 ) {
  1862. DBGC ( arbel, "Arbel %p could not set up MPT: %s\n",
  1863. arbel, strerror ( rc ) );
  1864. return rc;
  1865. }
  1866. return 0;
  1867. }
  1868. /**
  1869. * Probe PCI device
  1870. *
  1871. * @v pci PCI device
  1872. * @v id PCI ID
  1873. * @ret rc Return status code
  1874. */
  1875. static int arbel_probe ( struct pci_device *pci,
  1876. const struct pci_device_id *id __unused ) {
  1877. struct arbel *arbel;
  1878. struct ib_device *ibdev;
  1879. struct arbelprm_init_hca init_hca;
  1880. int i;
  1881. int rc;
  1882. /* Allocate Arbel device */
  1883. arbel = zalloc ( sizeof ( *arbel ) );
  1884. if ( ! arbel ) {
  1885. rc = -ENOMEM;
  1886. goto err_alloc_arbel;
  1887. }
  1888. pci_set_drvdata ( pci, arbel );
  1889. /* Allocate Infiniband devices */
  1890. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ ) {
  1891. ibdev = alloc_ibdev ( 0 );
  1892. if ( ! ibdev ) {
  1893. rc = -ENOMEM;
  1894. goto err_alloc_ibdev;
  1895. }
  1896. arbel->ibdev[i] = ibdev;
  1897. ibdev->op = &arbel_ib_operations;
  1898. ibdev->dev = &pci->dev;
  1899. ibdev->port = ( ARBEL_PORT_BASE + i );
  1900. ib_set_drvdata ( ibdev, arbel );
  1901. }
  1902. /* Fix up PCI device */
  1903. adjust_pci_device ( pci );
  1904. /* Get PCI BARs */
  1905. arbel->config = ioremap ( pci_bar_start ( pci, ARBEL_PCI_CONFIG_BAR ),
  1906. ARBEL_PCI_CONFIG_BAR_SIZE );
  1907. arbel->uar = ioremap ( ( pci_bar_start ( pci, ARBEL_PCI_UAR_BAR ) +
  1908. ARBEL_PCI_UAR_IDX * ARBEL_PCI_UAR_SIZE ),
  1909. ARBEL_PCI_UAR_SIZE );
  1910. /* Allocate space for mailboxes */
  1911. arbel->mailbox_in = malloc_dma ( ARBEL_MBOX_SIZE, ARBEL_MBOX_ALIGN );
  1912. if ( ! arbel->mailbox_in ) {
  1913. rc = -ENOMEM;
  1914. goto err_mailbox_in;
  1915. }
  1916. arbel->mailbox_out = malloc_dma ( ARBEL_MBOX_SIZE, ARBEL_MBOX_ALIGN );
  1917. if ( ! arbel->mailbox_out ) {
  1918. rc = -ENOMEM;
  1919. goto err_mailbox_out;
  1920. }
  1921. /* Start firmware */
  1922. if ( ( rc = arbel_start_firmware ( arbel ) ) != 0 )
  1923. goto err_start_firmware;
  1924. /* Get device limits */
  1925. if ( ( rc = arbel_get_limits ( arbel ) ) != 0 )
  1926. goto err_get_limits;
  1927. /* Allocate ICM */
  1928. memset ( &init_hca, 0, sizeof ( init_hca ) );
  1929. if ( ( rc = arbel_alloc_icm ( arbel, &init_hca ) ) != 0 )
  1930. goto err_alloc_icm;
  1931. /* Initialise HCA */
  1932. MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 1 );
  1933. if ( ( rc = arbel_cmd_init_hca ( arbel, &init_hca ) ) != 0 ) {
  1934. DBGC ( arbel, "Arbel %p could not initialise HCA: %s\n",
  1935. arbel, strerror ( rc ) );
  1936. goto err_init_hca;
  1937. }
  1938. /* Set up memory protection */
  1939. if ( ( rc = arbel_setup_mpt ( arbel ) ) != 0 )
  1940. goto err_setup_mpt;
  1941. /* Set up event queue */
  1942. if ( ( rc = arbel_create_eq ( arbel ) ) != 0 )
  1943. goto err_create_eq;
  1944. /* Update MAD parameters */
  1945. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ )
  1946. ib_smc_update ( arbel->ibdev[i], arbel_mad );
  1947. /* Register Infiniband devices */
  1948. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ ) {
  1949. if ( ( rc = register_ibdev ( arbel->ibdev[i] ) ) != 0 ) {
  1950. DBGC ( arbel, "Arbel %p could not register IB "
  1951. "device: %s\n", arbel, strerror ( rc ) );
  1952. goto err_register_ibdev;
  1953. }
  1954. }
  1955. return 0;
  1956. i = ARBEL_NUM_PORTS;
  1957. err_register_ibdev:
  1958. for ( i-- ; i >= 0 ; i-- )
  1959. unregister_ibdev ( arbel->ibdev[i] );
  1960. arbel_destroy_eq ( arbel );
  1961. err_create_eq:
  1962. err_setup_mpt:
  1963. arbel_cmd_close_hca ( arbel );
  1964. err_init_hca:
  1965. arbel_free_icm ( arbel );
  1966. err_alloc_icm:
  1967. err_get_limits:
  1968. arbel_stop_firmware ( arbel );
  1969. err_start_firmware:
  1970. free_dma ( arbel->mailbox_out, ARBEL_MBOX_SIZE );
  1971. err_mailbox_out:
  1972. free_dma ( arbel->mailbox_in, ARBEL_MBOX_SIZE );
  1973. err_mailbox_in:
  1974. i = ARBEL_NUM_PORTS;
  1975. err_alloc_ibdev:
  1976. for ( i-- ; i >= 0 ; i-- )
  1977. ibdev_put ( arbel->ibdev[i] );
  1978. free ( arbel );
  1979. err_alloc_arbel:
  1980. return rc;
  1981. }
  1982. /**
  1983. * Remove PCI device
  1984. *
  1985. * @v pci PCI device
  1986. */
  1987. static void arbel_remove ( struct pci_device *pci ) {
  1988. struct arbel *arbel = pci_get_drvdata ( pci );
  1989. int i;
  1990. for ( i = ( ARBEL_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
  1991. unregister_ibdev ( arbel->ibdev[i] );
  1992. arbel_destroy_eq ( arbel );
  1993. arbel_cmd_close_hca ( arbel );
  1994. arbel_free_icm ( arbel );
  1995. arbel_stop_firmware ( arbel );
  1996. arbel_stop_firmware ( arbel );
  1997. free_dma ( arbel->mailbox_out, ARBEL_MBOX_SIZE );
  1998. free_dma ( arbel->mailbox_in, ARBEL_MBOX_SIZE );
  1999. for ( i = ( ARBEL_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
  2000. ibdev_put ( arbel->ibdev[i] );
  2001. free ( arbel );
  2002. }
  2003. static struct pci_device_id arbel_nics[] = {
  2004. PCI_ROM ( 0x15b3, 0x6282, "mt25218", "MT25218 HCA driver", 0 ),
  2005. PCI_ROM ( 0x15b3, 0x6274, "mt25204", "MT25204 HCA driver", 0 ),
  2006. };
  2007. struct pci_driver arbel_driver __pci_driver = {
  2008. .ids = arbel_nics,
  2009. .id_count = ( sizeof ( arbel_nics ) / sizeof ( arbel_nics[0] ) ),
  2010. .probe = arbel_probe,
  2011. .remove = arbel_remove,
  2012. };