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hermon.c 82KB

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  1. /*
  2. * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
  3. * Copyright (C) 2008 Mellanox Technologies Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of the
  8. * License, or any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. FILE_LICENCE ( GPL2_OR_LATER );
  20. #include <stdint.h>
  21. #include <stdlib.h>
  22. #include <stdio.h>
  23. #include <string.h>
  24. #include <strings.h>
  25. #include <unistd.h>
  26. #include <errno.h>
  27. #include <byteswap.h>
  28. #include <ipxe/io.h>
  29. #include <ipxe/pci.h>
  30. #include <ipxe/pcibackup.h>
  31. #include <ipxe/malloc.h>
  32. #include <ipxe/umalloc.h>
  33. #include <ipxe/iobuf.h>
  34. #include <ipxe/netdevice.h>
  35. #include <ipxe/infiniband.h>
  36. #include <ipxe/ib_smc.h>
  37. #include "hermon.h"
  38. /**
  39. * @file
  40. *
  41. * Mellanox Hermon Infiniband HCA
  42. *
  43. */
  44. /***************************************************************************
  45. *
  46. * Queue number allocation
  47. *
  48. ***************************************************************************
  49. */
  50. /**
  51. * Allocate offsets within usage bitmask
  52. *
  53. * @v bits Usage bitmask
  54. * @v bits_len Length of usage bitmask
  55. * @v num_bits Number of contiguous bits to allocate within bitmask
  56. * @ret bit First free bit within bitmask, or negative error
  57. */
  58. static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
  59. unsigned int bits_len,
  60. unsigned int num_bits ) {
  61. unsigned int bit = 0;
  62. hermon_bitmask_t mask = 1;
  63. unsigned int found = 0;
  64. /* Search bits for num_bits contiguous free bits */
  65. while ( bit < bits_len ) {
  66. if ( ( mask & *bits ) == 0 ) {
  67. if ( ++found == num_bits )
  68. goto found;
  69. } else {
  70. found = 0;
  71. }
  72. bit++;
  73. mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
  74. if ( mask == 1 )
  75. bits++;
  76. }
  77. return -ENFILE;
  78. found:
  79. /* Mark bits as in-use */
  80. do {
  81. *bits |= mask;
  82. if ( mask == 1 )
  83. bits--;
  84. mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
  85. } while ( --found );
  86. return ( bit - num_bits + 1 );
  87. }
  88. /**
  89. * Free offsets within usage bitmask
  90. *
  91. * @v bits Usage bitmask
  92. * @v bit Starting bit within bitmask
  93. * @v num_bits Number of contiguous bits to free within bitmask
  94. */
  95. static void hermon_bitmask_free ( hermon_bitmask_t *bits,
  96. int bit, unsigned int num_bits ) {
  97. hermon_bitmask_t mask;
  98. for ( ; num_bits ; bit++, num_bits-- ) {
  99. mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
  100. bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
  101. }
  102. }
  103. /***************************************************************************
  104. *
  105. * HCA commands
  106. *
  107. ***************************************************************************
  108. */
  109. /**
  110. * Wait for Hermon command completion
  111. *
  112. * @v hermon Hermon device
  113. * @v hcr HCA command registers
  114. * @ret rc Return status code
  115. */
  116. static int hermon_cmd_wait ( struct hermon *hermon,
  117. struct hermonprm_hca_command_register *hcr ) {
  118. unsigned int wait;
  119. for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  120. hcr->u.dwords[6] =
  121. readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
  122. if ( ( MLX_GET ( hcr, go ) == 0 ) &&
  123. ( MLX_GET ( hcr, t ) == hermon->toggle ) )
  124. return 0;
  125. mdelay ( 1 );
  126. }
  127. return -EBUSY;
  128. }
  129. /**
  130. * Issue HCA command
  131. *
  132. * @v hermon Hermon device
  133. * @v command Command opcode, flags and input/output lengths
  134. * @v op_mod Opcode modifier (0 if no modifier applicable)
  135. * @v in Input parameters
  136. * @v in_mod Input modifier (0 if no modifier applicable)
  137. * @v out Output parameters
  138. * @ret rc Return status code
  139. */
  140. static int hermon_cmd ( struct hermon *hermon, unsigned long command,
  141. unsigned int op_mod, const void *in,
  142. unsigned int in_mod, void *out ) {
  143. struct hermonprm_hca_command_register hcr;
  144. unsigned int opcode = HERMON_HCR_OPCODE ( command );
  145. size_t in_len = HERMON_HCR_IN_LEN ( command );
  146. size_t out_len = HERMON_HCR_OUT_LEN ( command );
  147. void *in_buffer;
  148. void *out_buffer;
  149. unsigned int status;
  150. unsigned int i;
  151. int rc;
  152. assert ( in_len <= HERMON_MBOX_SIZE );
  153. assert ( out_len <= HERMON_MBOX_SIZE );
  154. DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
  155. hermon, opcode, in_len,
  156. ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  157. ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  158. /* Check that HCR is free */
  159. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  160. DBGC ( hermon, "Hermon %p command interface locked\n",
  161. hermon );
  162. return rc;
  163. }
  164. /* Flip HCR toggle */
  165. hermon->toggle = ( 1 - hermon->toggle );
  166. /* Prepare HCR */
  167. memset ( &hcr, 0, sizeof ( hcr ) );
  168. in_buffer = &hcr.u.dwords[0];
  169. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  170. in_buffer = hermon->mailbox_in;
  171. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  172. }
  173. memcpy ( in_buffer, in, in_len );
  174. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  175. out_buffer = &hcr.u.dwords[3];
  176. if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
  177. out_buffer = hermon->mailbox_out;
  178. MLX_FILL_1 ( &hcr, 4, out_param_l,
  179. virt_to_bus ( out_buffer ) );
  180. }
  181. MLX_FILL_4 ( &hcr, 6,
  182. opcode, opcode,
  183. opcode_modifier, op_mod,
  184. go, 1,
  185. t, hermon->toggle );
  186. DBGC ( hermon, "Hermon %p issuing command %04x\n",
  187. hermon, opcode );
  188. DBGC2_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  189. &hcr, sizeof ( hcr ) );
  190. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  191. DBGC2 ( hermon, "Input mailbox:\n" );
  192. DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
  193. ( ( in_len < 512 ) ? in_len : 512 ) );
  194. }
  195. /* Issue command */
  196. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  197. i++ ) {
  198. writel ( hcr.u.dwords[i],
  199. hermon->config + HERMON_HCR_REG ( i ) );
  200. barrier();
  201. }
  202. /* Wait for command completion */
  203. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  204. DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
  205. hermon );
  206. DBGC_HDA ( hermon,
  207. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  208. &hcr, sizeof ( hcr ) );
  209. return rc;
  210. }
  211. /* Check command status */
  212. status = MLX_GET ( &hcr, status );
  213. if ( status != 0 ) {
  214. DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
  215. hermon, status );
  216. DBGC_HDA ( hermon,
  217. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  218. &hcr, sizeof ( hcr ) );
  219. return -EIO;
  220. }
  221. /* Read output parameters, if any */
  222. hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
  223. hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
  224. memcpy ( out, out_buffer, out_len );
  225. if ( out_len ) {
  226. DBGC2 ( hermon, "Output%s:\n",
  227. ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
  228. DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
  229. ( ( out_len < 512 ) ? out_len : 512 ) );
  230. }
  231. return 0;
  232. }
  233. static inline int
  234. hermon_cmd_query_dev_cap ( struct hermon *hermon,
  235. struct hermonprm_query_dev_cap *dev_cap ) {
  236. return hermon_cmd ( hermon,
  237. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
  238. 1, sizeof ( *dev_cap ) ),
  239. 0, NULL, 0, dev_cap );
  240. }
  241. static inline int
  242. hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
  243. return hermon_cmd ( hermon,
  244. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
  245. 1, sizeof ( *fw ) ),
  246. 0, NULL, 0, fw );
  247. }
  248. static inline int
  249. hermon_cmd_init_hca ( struct hermon *hermon,
  250. const struct hermonprm_init_hca *init_hca ) {
  251. return hermon_cmd ( hermon,
  252. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
  253. 1, sizeof ( *init_hca ) ),
  254. 0, init_hca, 0, NULL );
  255. }
  256. static inline int
  257. hermon_cmd_close_hca ( struct hermon *hermon ) {
  258. return hermon_cmd ( hermon,
  259. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
  260. 0, NULL, 0, NULL );
  261. }
  262. static inline int
  263. hermon_cmd_init_port ( struct hermon *hermon, unsigned int port,
  264. const struct hermonprm_init_port *init_port ) {
  265. return hermon_cmd ( hermon,
  266. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_PORT,
  267. 1, sizeof ( *init_port ) ),
  268. 0, init_port, port, NULL );
  269. }
  270. static inline int
  271. hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
  272. return hermon_cmd ( hermon,
  273. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
  274. 0, NULL, port, NULL );
  275. }
  276. static inline int
  277. hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
  278. const struct hermonprm_mpt *mpt ) {
  279. return hermon_cmd ( hermon,
  280. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
  281. 1, sizeof ( *mpt ) ),
  282. 0, mpt, index, NULL );
  283. }
  284. static inline int
  285. hermon_cmd_write_mtt ( struct hermon *hermon,
  286. const struct hermonprm_write_mtt *write_mtt ) {
  287. return hermon_cmd ( hermon,
  288. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
  289. 1, sizeof ( *write_mtt ) ),
  290. 0, write_mtt, 1, NULL );
  291. }
  292. static inline int
  293. hermon_cmd_map_eq ( struct hermon *hermon, unsigned long index_map,
  294. const struct hermonprm_event_mask *mask ) {
  295. return hermon_cmd ( hermon,
  296. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_EQ,
  297. 0, sizeof ( *mask ) ),
  298. 0, mask, index_map, NULL );
  299. }
  300. static inline int
  301. hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
  302. const struct hermonprm_eqc *eqctx ) {
  303. return hermon_cmd ( hermon,
  304. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
  305. 1, sizeof ( *eqctx ) ),
  306. 0, eqctx, index, NULL );
  307. }
  308. static inline int
  309. hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index,
  310. struct hermonprm_eqc *eqctx ) {
  311. return hermon_cmd ( hermon,
  312. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_EQ,
  313. 1, sizeof ( *eqctx ) ),
  314. 1, NULL, index, eqctx );
  315. }
  316. static inline int
  317. hermon_cmd_query_eq ( struct hermon *hermon, unsigned int index,
  318. struct hermonprm_eqc *eqctx ) {
  319. return hermon_cmd ( hermon,
  320. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_EQ,
  321. 1, sizeof ( *eqctx ) ),
  322. 0, NULL, index, eqctx );
  323. }
  324. static inline int
  325. hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
  326. const struct hermonprm_completion_queue_context *cqctx ){
  327. return hermon_cmd ( hermon,
  328. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
  329. 1, sizeof ( *cqctx ) ),
  330. 0, cqctx, cqn, NULL );
  331. }
  332. static inline int
  333. hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
  334. struct hermonprm_completion_queue_context *cqctx) {
  335. return hermon_cmd ( hermon,
  336. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
  337. 1, sizeof ( *cqctx ) ),
  338. 0, NULL, cqn, cqctx );
  339. }
  340. static inline int
  341. hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
  342. const struct hermonprm_qp_ee_state_transitions *ctx ){
  343. return hermon_cmd ( hermon,
  344. HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
  345. 1, sizeof ( *ctx ) ),
  346. 0, ctx, qpn, NULL );
  347. }
  348. static inline int
  349. hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
  350. const struct hermonprm_qp_ee_state_transitions *ctx ){
  351. return hermon_cmd ( hermon,
  352. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
  353. 1, sizeof ( *ctx ) ),
  354. 0, ctx, qpn, NULL );
  355. }
  356. static inline int
  357. hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
  358. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  359. return hermon_cmd ( hermon,
  360. HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
  361. 1, sizeof ( *ctx ) ),
  362. 0, ctx, qpn, NULL );
  363. }
  364. static inline int
  365. hermon_cmd_rts2rts_qp ( struct hermon *hermon, unsigned long qpn,
  366. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  367. return hermon_cmd ( hermon,
  368. HERMON_HCR_IN_CMD ( HERMON_HCR_RTS2RTS_QP,
  369. 1, sizeof ( *ctx ) ),
  370. 0, ctx, qpn, NULL );
  371. }
  372. static inline int
  373. hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
  374. return hermon_cmd ( hermon,
  375. HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
  376. 0x03, NULL, qpn, NULL );
  377. }
  378. static inline int
  379. hermon_cmd_query_qp ( struct hermon *hermon, unsigned long qpn,
  380. struct hermonprm_qp_ee_state_transitions *ctx ) {
  381. return hermon_cmd ( hermon,
  382. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_QP,
  383. 1, sizeof ( *ctx ) ),
  384. 0, NULL, qpn, ctx );
  385. }
  386. static inline int
  387. hermon_cmd_conf_special_qp ( struct hermon *hermon, unsigned int internal_qps,
  388. unsigned long base_qpn ) {
  389. return hermon_cmd ( hermon,
  390. HERMON_HCR_VOID_CMD ( HERMON_HCR_CONF_SPECIAL_QP ),
  391. internal_qps, NULL, base_qpn, NULL );
  392. }
  393. static inline int
  394. hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
  395. union hermonprm_mad *mad ) {
  396. return hermon_cmd ( hermon,
  397. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
  398. 1, sizeof ( *mad ),
  399. 1, sizeof ( *mad ) ),
  400. 0x03, mad, port, mad );
  401. }
  402. static inline int
  403. hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
  404. struct hermonprm_mcg_entry *mcg ) {
  405. return hermon_cmd ( hermon,
  406. HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
  407. 1, sizeof ( *mcg ) ),
  408. 0, NULL, index, mcg );
  409. }
  410. static inline int
  411. hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
  412. const struct hermonprm_mcg_entry *mcg ) {
  413. return hermon_cmd ( hermon,
  414. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
  415. 1, sizeof ( *mcg ) ),
  416. 0, mcg, index, NULL );
  417. }
  418. static inline int
  419. hermon_cmd_mgid_hash ( struct hermon *hermon, const struct ib_gid *gid,
  420. struct hermonprm_mgm_hash *hash ) {
  421. return hermon_cmd ( hermon,
  422. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
  423. 1, sizeof ( *gid ),
  424. 0, sizeof ( *hash ) ),
  425. 0, gid, 0, hash );
  426. }
  427. static inline int
  428. hermon_cmd_run_fw ( struct hermon *hermon ) {
  429. return hermon_cmd ( hermon,
  430. HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
  431. 0, NULL, 0, NULL );
  432. }
  433. static inline int
  434. hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
  435. const struct hermonprm_scalar_parameter *offset ) {
  436. return hermon_cmd ( hermon,
  437. HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
  438. 0, sizeof ( *offset ) ),
  439. 0, offset, page_count, NULL );
  440. }
  441. static inline int
  442. hermon_cmd_map_icm ( struct hermon *hermon,
  443. const struct hermonprm_virtual_physical_mapping *map ) {
  444. return hermon_cmd ( hermon,
  445. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
  446. 1, sizeof ( *map ) ),
  447. 0, map, 1, NULL );
  448. }
  449. static inline int
  450. hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
  451. return hermon_cmd ( hermon,
  452. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
  453. 0, NULL, 0, NULL );
  454. }
  455. static inline int
  456. hermon_cmd_map_icm_aux ( struct hermon *hermon,
  457. const struct hermonprm_virtual_physical_mapping *map ) {
  458. return hermon_cmd ( hermon,
  459. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
  460. 1, sizeof ( *map ) ),
  461. 0, map, 1, NULL );
  462. }
  463. static inline int
  464. hermon_cmd_set_icm_size ( struct hermon *hermon,
  465. const struct hermonprm_scalar_parameter *icm_size,
  466. struct hermonprm_scalar_parameter *icm_aux_size ) {
  467. return hermon_cmd ( hermon,
  468. HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
  469. 0, sizeof ( *icm_size ),
  470. 0, sizeof (*icm_aux_size) ),
  471. 0, icm_size, 0, icm_aux_size );
  472. }
  473. static inline int
  474. hermon_cmd_unmap_fa ( struct hermon *hermon ) {
  475. return hermon_cmd ( hermon,
  476. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
  477. 0, NULL, 0, NULL );
  478. }
  479. static inline int
  480. hermon_cmd_map_fa ( struct hermon *hermon,
  481. const struct hermonprm_virtual_physical_mapping *map ) {
  482. return hermon_cmd ( hermon,
  483. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
  484. 1, sizeof ( *map ) ),
  485. 0, map, 1, NULL );
  486. }
  487. static inline int
  488. hermon_cmd_sense_port ( struct hermon *hermon, unsigned int port,
  489. struct hermonprm_sense_port *port_type ) {
  490. return hermon_cmd ( hermon,
  491. HERMON_HCR_OUT_CMD ( HERMON_HCR_SENSE_PORT,
  492. 1, sizeof ( *port_type ) ),
  493. 0, NULL, port, port_type );
  494. }
  495. /***************************************************************************
  496. *
  497. * Memory translation table operations
  498. *
  499. ***************************************************************************
  500. */
  501. /**
  502. * Allocate MTT entries
  503. *
  504. * @v hermon Hermon device
  505. * @v memory Memory to map into MTT
  506. * @v len Length of memory to map
  507. * @v mtt MTT descriptor to fill in
  508. * @ret rc Return status code
  509. */
  510. static int hermon_alloc_mtt ( struct hermon *hermon,
  511. const void *memory, size_t len,
  512. struct hermon_mtt *mtt ) {
  513. struct hermonprm_write_mtt write_mtt;
  514. physaddr_t start;
  515. unsigned int page_offset;
  516. unsigned int num_pages;
  517. int mtt_offset;
  518. unsigned int mtt_base_addr;
  519. unsigned int i;
  520. int rc;
  521. /* Find available MTT entries */
  522. start = virt_to_phys ( memory );
  523. page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
  524. start -= page_offset;
  525. len += page_offset;
  526. num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
  527. mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
  528. num_pages );
  529. if ( mtt_offset < 0 ) {
  530. DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
  531. hermon, num_pages );
  532. rc = mtt_offset;
  533. goto err_mtt_offset;
  534. }
  535. mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
  536. hermon->cap.mtt_entry_size );
  537. /* Fill in MTT structure */
  538. mtt->mtt_offset = mtt_offset;
  539. mtt->num_pages = num_pages;
  540. mtt->mtt_base_addr = mtt_base_addr;
  541. mtt->page_offset = page_offset;
  542. /* Construct and issue WRITE_MTT commands */
  543. for ( i = 0 ; i < num_pages ; i++ ) {
  544. memset ( &write_mtt, 0, sizeof ( write_mtt ) );
  545. MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
  546. value, mtt_base_addr );
  547. MLX_FILL_2 ( &write_mtt.mtt, 1,
  548. p, 1,
  549. ptag_l, ( start >> 3 ) );
  550. if ( ( rc = hermon_cmd_write_mtt ( hermon,
  551. &write_mtt ) ) != 0 ) {
  552. DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
  553. hermon, mtt_base_addr );
  554. goto err_write_mtt;
  555. }
  556. start += HERMON_PAGE_SIZE;
  557. mtt_base_addr += hermon->cap.mtt_entry_size;
  558. }
  559. return 0;
  560. err_write_mtt:
  561. hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
  562. err_mtt_offset:
  563. return rc;
  564. }
  565. /**
  566. * Free MTT entries
  567. *
  568. * @v hermon Hermon device
  569. * @v mtt MTT descriptor
  570. */
  571. static void hermon_free_mtt ( struct hermon *hermon,
  572. struct hermon_mtt *mtt ) {
  573. hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
  574. mtt->num_pages );
  575. }
  576. /***************************************************************************
  577. *
  578. * MAD operations
  579. *
  580. ***************************************************************************
  581. */
  582. /**
  583. * Issue management datagram
  584. *
  585. * @v ibdev Infiniband device
  586. * @v mad Management datagram
  587. * @ret rc Return status code
  588. */
  589. static int hermon_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
  590. struct hermon *hermon = ib_get_drvdata ( ibdev );
  591. union hermonprm_mad mad_ifc;
  592. int rc;
  593. linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
  594. mad_size_mismatch );
  595. /* Copy in request packet */
  596. memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
  597. /* Issue MAD */
  598. if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
  599. &mad_ifc ) ) != 0 ) {
  600. DBGC ( hermon, "Hermon %p could not issue MAD IFC: %s\n",
  601. hermon, strerror ( rc ) );
  602. return rc;
  603. }
  604. /* Copy out reply packet */
  605. memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
  606. if ( mad->hdr.status != 0 ) {
  607. DBGC ( hermon, "Hermon %p MAD IFC status %04x\n",
  608. hermon, ntohs ( mad->hdr.status ) );
  609. return -EIO;
  610. }
  611. return 0;
  612. }
  613. /***************************************************************************
  614. *
  615. * Completion queue operations
  616. *
  617. ***************************************************************************
  618. */
  619. /**
  620. * Create completion queue
  621. *
  622. * @v ibdev Infiniband device
  623. * @v cq Completion queue
  624. * @ret rc Return status code
  625. */
  626. static int hermon_create_cq ( struct ib_device *ibdev,
  627. struct ib_completion_queue *cq ) {
  628. struct hermon *hermon = ib_get_drvdata ( ibdev );
  629. struct hermon_completion_queue *hermon_cq;
  630. struct hermonprm_completion_queue_context cqctx;
  631. int cqn_offset;
  632. unsigned int i;
  633. int rc;
  634. /* Find a free completion queue number */
  635. cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
  636. HERMON_MAX_CQS, 1 );
  637. if ( cqn_offset < 0 ) {
  638. DBGC ( hermon, "Hermon %p out of completion queues\n",
  639. hermon );
  640. rc = cqn_offset;
  641. goto err_cqn_offset;
  642. }
  643. cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
  644. /* Allocate control structures */
  645. hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
  646. if ( ! hermon_cq ) {
  647. rc = -ENOMEM;
  648. goto err_hermon_cq;
  649. }
  650. /* Allocate completion queue itself */
  651. hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
  652. hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
  653. sizeof ( hermon_cq->cqe[0] ) );
  654. if ( ! hermon_cq->cqe ) {
  655. rc = -ENOMEM;
  656. goto err_cqe;
  657. }
  658. memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
  659. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  660. MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
  661. }
  662. barrier();
  663. /* Allocate MTT entries */
  664. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
  665. hermon_cq->cqe_size,
  666. &hermon_cq->mtt ) ) != 0 )
  667. goto err_alloc_mtt;
  668. /* Hand queue over to hardware */
  669. memset ( &cqctx, 0, sizeof ( cqctx ) );
  670. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  671. MLX_FILL_1 ( &cqctx, 2,
  672. page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
  673. MLX_FILL_2 ( &cqctx, 3,
  674. usr_page, HERMON_UAR_NON_EQ_PAGE,
  675. log_cq_size, fls ( cq->num_cqes - 1 ) );
  676. MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
  677. ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
  678. MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
  679. ( virt_to_phys ( &hermon_cq->doorbell ) >> 3 ) );
  680. if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  681. DBGC ( hermon, "Hermon %p SW2HW_CQ failed: %s\n",
  682. hermon, strerror ( rc ) );
  683. goto err_sw2hw_cq;
  684. }
  685. DBGC ( hermon, "Hermon %p CQN %#lx ring at [%p,%p)\n",
  686. hermon, cq->cqn, hermon_cq->cqe,
  687. ( ( ( void * ) hermon_cq->cqe ) + hermon_cq->cqe_size ) );
  688. ib_cq_set_drvdata ( cq, hermon_cq );
  689. return 0;
  690. err_sw2hw_cq:
  691. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  692. err_alloc_mtt:
  693. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  694. err_cqe:
  695. free ( hermon_cq );
  696. err_hermon_cq:
  697. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  698. err_cqn_offset:
  699. return rc;
  700. }
  701. /**
  702. * Destroy completion queue
  703. *
  704. * @v ibdev Infiniband device
  705. * @v cq Completion queue
  706. */
  707. static void hermon_destroy_cq ( struct ib_device *ibdev,
  708. struct ib_completion_queue *cq ) {
  709. struct hermon *hermon = ib_get_drvdata ( ibdev );
  710. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  711. struct hermonprm_completion_queue_context cqctx;
  712. int cqn_offset;
  713. int rc;
  714. /* Take ownership back from hardware */
  715. if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  716. DBGC ( hermon, "Hermon %p FATAL HW2SW_CQ failed on CQN %#lx: "
  717. "%s\n", hermon, cq->cqn, strerror ( rc ) );
  718. /* Leak memory and return; at least we avoid corruption */
  719. return;
  720. }
  721. /* Free MTT entries */
  722. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  723. /* Free memory */
  724. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  725. free ( hermon_cq );
  726. /* Mark queue number as free */
  727. cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
  728. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  729. ib_cq_set_drvdata ( cq, NULL );
  730. }
  731. /***************************************************************************
  732. *
  733. * Queue pair operations
  734. *
  735. ***************************************************************************
  736. */
  737. /**
  738. * Assign queue pair number
  739. *
  740. * @v ibdev Infiniband device
  741. * @v qp Queue pair
  742. * @ret rc Return status code
  743. */
  744. static int hermon_alloc_qpn ( struct ib_device *ibdev,
  745. struct ib_queue_pair *qp ) {
  746. struct hermon *hermon = ib_get_drvdata ( ibdev );
  747. unsigned int port_offset;
  748. int qpn_offset;
  749. /* Calculate queue pair number */
  750. port_offset = ( ibdev->port - HERMON_PORT_BASE );
  751. switch ( qp->type ) {
  752. case IB_QPT_SMI:
  753. qp->qpn = ( hermon->special_qpn_base + port_offset );
  754. return 0;
  755. case IB_QPT_GSI:
  756. qp->qpn = ( hermon->special_qpn_base + 2 + port_offset );
  757. return 0;
  758. case IB_QPT_UD:
  759. case IB_QPT_RC:
  760. /* Find a free queue pair number */
  761. qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
  762. HERMON_MAX_QPS, 1 );
  763. if ( qpn_offset < 0 ) {
  764. DBGC ( hermon, "Hermon %p out of queue pairs\n",
  765. hermon );
  766. return qpn_offset;
  767. }
  768. qp->qpn = ( ( random() & HERMON_QPN_RANDOM_MASK ) |
  769. ( hermon->qpn_base + qpn_offset ) );
  770. return 0;
  771. default:
  772. DBGC ( hermon, "Hermon %p unsupported QP type %d\n",
  773. hermon, qp->type );
  774. return -ENOTSUP;
  775. }
  776. }
  777. /**
  778. * Free queue pair number
  779. *
  780. * @v ibdev Infiniband device
  781. * @v qp Queue pair
  782. */
  783. static void hermon_free_qpn ( struct ib_device *ibdev,
  784. struct ib_queue_pair *qp ) {
  785. struct hermon *hermon = ib_get_drvdata ( ibdev );
  786. int qpn_offset;
  787. qpn_offset = ( ( qp->qpn & ~HERMON_QPN_RANDOM_MASK )
  788. - hermon->qpn_base );
  789. if ( qpn_offset >= 0 )
  790. hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
  791. }
  792. /**
  793. * Calculate transmission rate
  794. *
  795. * @v av Address vector
  796. * @ret hermon_rate Hermon rate
  797. */
  798. static unsigned int hermon_rate ( struct ib_address_vector *av ) {
  799. return ( ( ( av->rate >= IB_RATE_2_5 ) && ( av->rate <= IB_RATE_120 ) )
  800. ? ( av->rate + 5 ) : 0 );
  801. }
  802. /**
  803. * Calculate schedule queue
  804. *
  805. * @v ibdev Infiniband device
  806. * @v qp Queue pair
  807. * @ret sched_queue Schedule queue
  808. */
  809. static unsigned int hermon_sched_queue ( struct ib_device *ibdev,
  810. struct ib_queue_pair *qp ) {
  811. return ( ( ( qp->type == IB_QPT_SMI ) ?
  812. HERMON_SCHED_QP0 : HERMON_SCHED_DEFAULT ) |
  813. ( ( ibdev->port - 1 ) << 6 ) );
  814. }
  815. /** Queue pair transport service type map */
  816. static uint8_t hermon_qp_st[] = {
  817. [IB_QPT_SMI] = HERMON_ST_MLX,
  818. [IB_QPT_GSI] = HERMON_ST_MLX,
  819. [IB_QPT_UD] = HERMON_ST_UD,
  820. [IB_QPT_RC] = HERMON_ST_RC,
  821. };
  822. /**
  823. * Dump queue pair context (for debugging only)
  824. *
  825. * @v hermon Hermon device
  826. * @v qp Queue pair
  827. * @ret rc Return status code
  828. */
  829. static inline int hermon_dump_qpctx ( struct hermon *hermon,
  830. struct ib_queue_pair *qp ) {
  831. struct hermonprm_qp_ee_state_transitions qpctx;
  832. int rc;
  833. memset ( &qpctx, 0, sizeof ( qpctx ) );
  834. if ( ( rc = hermon_cmd_query_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ) {
  835. DBGC ( hermon, "Hermon %p QUERY_QP failed: %s\n",
  836. hermon, strerror ( rc ) );
  837. return rc;
  838. }
  839. DBGC ( hermon, "Hermon %p QPN %lx context:\n", hermon, qp->qpn );
  840. DBGC_HDA ( hermon, 0, &qpctx.u.dwords[2],
  841. ( sizeof ( qpctx ) - 8 ) );
  842. return 0;
  843. }
  844. /**
  845. * Create queue pair
  846. *
  847. * @v ibdev Infiniband device
  848. * @v qp Queue pair
  849. * @ret rc Return status code
  850. */
  851. static int hermon_create_qp ( struct ib_device *ibdev,
  852. struct ib_queue_pair *qp ) {
  853. struct hermon *hermon = ib_get_drvdata ( ibdev );
  854. struct hermon_queue_pair *hermon_qp;
  855. struct hermonprm_qp_ee_state_transitions qpctx;
  856. int rc;
  857. /* Calculate queue pair number */
  858. if ( ( rc = hermon_alloc_qpn ( ibdev, qp ) ) != 0 )
  859. goto err_alloc_qpn;
  860. /* Allocate control structures */
  861. hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
  862. if ( ! hermon_qp ) {
  863. rc = -ENOMEM;
  864. goto err_hermon_qp;
  865. }
  866. /* Calculate doorbell address */
  867. hermon_qp->send.doorbell =
  868. ( hermon->uar + HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE +
  869. HERMON_DB_POST_SND_OFFSET );
  870. /* Allocate work queue buffer */
  871. hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
  872. ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
  873. hermon_qp->send.num_wqes =
  874. ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
  875. hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
  876. sizeof ( hermon_qp->send.wqe[0] ) );
  877. hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
  878. sizeof ( hermon_qp->recv.wqe[0] ) );
  879. hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
  880. hermon_qp->recv.wqe_size );
  881. hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
  882. sizeof ( hermon_qp->send.wqe[0] ) );
  883. if ( ! hermon_qp->wqe ) {
  884. rc = -ENOMEM;
  885. goto err_alloc_wqe;
  886. }
  887. hermon_qp->send.wqe = hermon_qp->wqe;
  888. memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
  889. hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
  890. memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
  891. /* Allocate MTT entries */
  892. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
  893. hermon_qp->wqe_size,
  894. &hermon_qp->mtt ) ) != 0 ) {
  895. goto err_alloc_mtt;
  896. }
  897. /* Transition queue to INIT state */
  898. memset ( &qpctx, 0, sizeof ( qpctx ) );
  899. MLX_FILL_2 ( &qpctx, 2,
  900. qpc_eec_data.pm_state, HERMON_PM_STATE_MIGRATED,
  901. qpc_eec_data.st, hermon_qp_st[qp->type] );
  902. MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
  903. MLX_FILL_4 ( &qpctx, 4,
  904. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  905. qpc_eec_data.log_rq_stride,
  906. ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
  907. qpc_eec_data.log_sq_size,
  908. fls ( hermon_qp->send.num_wqes - 1 ),
  909. qpc_eec_data.log_sq_stride,
  910. ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
  911. MLX_FILL_1 ( &qpctx, 5,
  912. qpc_eec_data.usr_page, HERMON_UAR_NON_EQ_PAGE );
  913. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  914. MLX_FILL_4 ( &qpctx, 38,
  915. qpc_eec_data.rre, 1,
  916. qpc_eec_data.rwe, 1,
  917. qpc_eec_data.rae, 1,
  918. qpc_eec_data.page_offset,
  919. ( hermon_qp->mtt.page_offset >> 6 ) );
  920. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  921. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
  922. ( virt_to_phys ( &hermon_qp->recv.doorbell ) >> 2 ) );
  923. MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
  924. ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
  925. if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
  926. &qpctx ) ) != 0 ) {
  927. DBGC ( hermon, "Hermon %p RST2INIT_QP failed: %s\n",
  928. hermon, strerror ( rc ) );
  929. goto err_rst2init_qp;
  930. }
  931. hermon_qp->state = HERMON_QP_ST_INIT;
  932. DBGC ( hermon, "Hermon %p QPN %#lx send ring at [%p,%p)\n",
  933. hermon, qp->qpn, hermon_qp->send.wqe,
  934. ( ((void *)hermon_qp->send.wqe ) + hermon_qp->send.wqe_size ) );
  935. DBGC ( hermon, "Hermon %p QPN %#lx receive ring at [%p,%p)\n",
  936. hermon, qp->qpn, hermon_qp->recv.wqe,
  937. ( ((void *)hermon_qp->recv.wqe ) + hermon_qp->recv.wqe_size ) );
  938. ib_qp_set_drvdata ( qp, hermon_qp );
  939. return 0;
  940. hermon_cmd_2rst_qp ( hermon, qp->qpn );
  941. err_rst2init_qp:
  942. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  943. err_alloc_mtt:
  944. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  945. err_alloc_wqe:
  946. free ( hermon_qp );
  947. err_hermon_qp:
  948. hermon_free_qpn ( ibdev, qp );
  949. err_alloc_qpn:
  950. return rc;
  951. }
  952. /**
  953. * Modify queue pair
  954. *
  955. * @v ibdev Infiniband device
  956. * @v qp Queue pair
  957. * @ret rc Return status code
  958. */
  959. static int hermon_modify_qp ( struct ib_device *ibdev,
  960. struct ib_queue_pair *qp ) {
  961. struct hermon *hermon = ib_get_drvdata ( ibdev );
  962. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  963. struct hermonprm_qp_ee_state_transitions qpctx;
  964. int rc;
  965. /* Transition queue to RTR state, if applicable */
  966. if ( hermon_qp->state < HERMON_QP_ST_RTR ) {
  967. memset ( &qpctx, 0, sizeof ( qpctx ) );
  968. MLX_FILL_2 ( &qpctx, 4,
  969. qpc_eec_data.mtu, HERMON_MTU_2048,
  970. qpc_eec_data.msg_max, 31 );
  971. MLX_FILL_1 ( &qpctx, 7,
  972. qpc_eec_data.remote_qpn_een, qp->av.qpn );
  973. MLX_FILL_1 ( &qpctx, 9,
  974. qpc_eec_data.primary_address_path.rlid,
  975. qp->av.lid );
  976. MLX_FILL_1 ( &qpctx, 10,
  977. qpc_eec_data.primary_address_path.max_stat_rate,
  978. hermon_rate ( &qp->av ) );
  979. memcpy ( &qpctx.u.dwords[12], &qp->av.gid,
  980. sizeof ( qp->av.gid ) );
  981. MLX_FILL_1 ( &qpctx, 16,
  982. qpc_eec_data.primary_address_path.sched_queue,
  983. hermon_sched_queue ( ibdev, qp ) );
  984. MLX_FILL_1 ( &qpctx, 39,
  985. qpc_eec_data.next_rcv_psn, qp->recv.psn );
  986. if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
  987. &qpctx ) ) != 0 ) {
  988. DBGC ( hermon, "Hermon %p INIT2RTR_QP failed: %s\n",
  989. hermon, strerror ( rc ) );
  990. return rc;
  991. }
  992. hermon_qp->state = HERMON_QP_ST_RTR;
  993. }
  994. /* Transition queue to RTS state */
  995. if ( hermon_qp->state < HERMON_QP_ST_RTS ) {
  996. memset ( &qpctx, 0, sizeof ( qpctx ) );
  997. MLX_FILL_1 ( &qpctx, 10,
  998. qpc_eec_data.primary_address_path.ack_timeout,
  999. 14 /* 4.096us * 2^(14) = 67ms */ );
  1000. MLX_FILL_2 ( &qpctx, 30,
  1001. qpc_eec_data.retry_count, HERMON_RETRY_MAX,
  1002. qpc_eec_data.rnr_retry, HERMON_RETRY_MAX );
  1003. MLX_FILL_1 ( &qpctx, 32,
  1004. qpc_eec_data.next_send_psn, qp->send.psn );
  1005. if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn,
  1006. &qpctx ) ) != 0 ) {
  1007. DBGC ( hermon, "Hermon %p RTR2RTS_QP failed: %s\n",
  1008. hermon, strerror ( rc ) );
  1009. return rc;
  1010. }
  1011. hermon_qp->state = HERMON_QP_ST_RTS;
  1012. }
  1013. /* Update parameters in RTS state */
  1014. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1015. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, HERMON_QP_OPT_PARAM_QKEY );
  1016. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  1017. if ( ( rc = hermon_cmd_rts2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
  1018. DBGC ( hermon, "Hermon %p RTS2RTS_QP failed: %s\n",
  1019. hermon, strerror ( rc ) );
  1020. return rc;
  1021. }
  1022. return 0;
  1023. }
  1024. /**
  1025. * Destroy queue pair
  1026. *
  1027. * @v ibdev Infiniband device
  1028. * @v qp Queue pair
  1029. */
  1030. static void hermon_destroy_qp ( struct ib_device *ibdev,
  1031. struct ib_queue_pair *qp ) {
  1032. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1033. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1034. int rc;
  1035. /* Take ownership back from hardware */
  1036. if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
  1037. DBGC ( hermon, "Hermon %p FATAL 2RST_QP failed on QPN %#lx: "
  1038. "%s\n", hermon, qp->qpn, strerror ( rc ) );
  1039. /* Leak memory and return; at least we avoid corruption */
  1040. return;
  1041. }
  1042. /* Free MTT entries */
  1043. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1044. /* Free memory */
  1045. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1046. free ( hermon_qp );
  1047. /* Mark queue number as free */
  1048. hermon_free_qpn ( ibdev, qp );
  1049. ib_qp_set_drvdata ( qp, NULL );
  1050. }
  1051. /***************************************************************************
  1052. *
  1053. * Work request operations
  1054. *
  1055. ***************************************************************************
  1056. */
  1057. /**
  1058. * Construct UD send work queue entry
  1059. *
  1060. * @v ibdev Infiniband device
  1061. * @v qp Queue pair
  1062. * @v av Address vector
  1063. * @v iobuf I/O buffer
  1064. * @v wqe Send work queue entry
  1065. * @ret opcode Control opcode
  1066. */
  1067. static unsigned int
  1068. hermon_fill_ud_send_wqe ( struct ib_device *ibdev,
  1069. struct ib_queue_pair *qp __unused,
  1070. struct ib_address_vector *av,
  1071. struct io_buffer *iobuf,
  1072. union hermon_send_wqe *wqe ) {
  1073. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1074. MLX_FILL_1 ( &wqe->ud.ctrl, 1, ds,
  1075. ( ( offsetof ( typeof ( wqe->ud ), data[1] ) / 16 ) ) );
  1076. MLX_FILL_1 ( &wqe->ud.ctrl, 2, c, 0x03 /* generate completion */ );
  1077. MLX_FILL_2 ( &wqe->ud.ud, 0,
  1078. ud_address_vector.pd, HERMON_GLOBAL_PD,
  1079. ud_address_vector.port_number, ibdev->port );
  1080. MLX_FILL_2 ( &wqe->ud.ud, 1,
  1081. ud_address_vector.rlid, av->lid,
  1082. ud_address_vector.g, av->gid_present );
  1083. MLX_FILL_1 ( &wqe->ud.ud, 2,
  1084. ud_address_vector.max_stat_rate, hermon_rate ( av ) );
  1085. MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, av->sl );
  1086. memcpy ( &wqe->ud.ud.u.dwords[4], &av->gid, sizeof ( av->gid ) );
  1087. MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, av->qpn );
  1088. MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, av->qkey );
  1089. MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
  1090. MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, hermon->lkey );
  1091. MLX_FILL_1 ( &wqe->ud.data[0], 3,
  1092. local_address_l, virt_to_bus ( iobuf->data ) );
  1093. return HERMON_OPCODE_SEND;
  1094. }
  1095. /**
  1096. * Construct MLX send work queue entry
  1097. *
  1098. * @v ibdev Infiniband device
  1099. * @v qp Queue pair
  1100. * @v av Address vector
  1101. * @v iobuf I/O buffer
  1102. * @v wqe Send work queue entry
  1103. * @ret opcode Control opcode
  1104. */
  1105. static unsigned int
  1106. hermon_fill_mlx_send_wqe ( struct ib_device *ibdev,
  1107. struct ib_queue_pair *qp,
  1108. struct ib_address_vector *av,
  1109. struct io_buffer *iobuf,
  1110. union hermon_send_wqe *wqe ) {
  1111. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1112. struct io_buffer headers;
  1113. /* Construct IB headers */
  1114. iob_populate ( &headers, &wqe->mlx.headers, 0,
  1115. sizeof ( wqe->mlx.headers ) );
  1116. iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
  1117. ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
  1118. /* Fill work queue entry */
  1119. MLX_FILL_1 ( &wqe->mlx.ctrl, 1, ds,
  1120. ( ( offsetof ( typeof ( wqe->mlx ), data[2] ) / 16 ) ) );
  1121. MLX_FILL_5 ( &wqe->mlx.ctrl, 2,
  1122. c, 0x03 /* generate completion */,
  1123. icrc, 0 /* generate ICRC */,
  1124. max_statrate, hermon_rate ( av ),
  1125. slr, 0,
  1126. v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
  1127. MLX_FILL_1 ( &wqe->mlx.ctrl, 3, rlid, av->lid );
  1128. MLX_FILL_1 ( &wqe->mlx.data[0], 0,
  1129. byte_count, iob_len ( &headers ) );
  1130. MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, hermon->lkey );
  1131. MLX_FILL_1 ( &wqe->mlx.data[0], 3,
  1132. local_address_l, virt_to_bus ( headers.data ) );
  1133. MLX_FILL_1 ( &wqe->mlx.data[1], 0,
  1134. byte_count, ( iob_len ( iobuf ) + 4 /* ICRC */ ) );
  1135. MLX_FILL_1 ( &wqe->mlx.data[1], 1, l_key, hermon->lkey );
  1136. MLX_FILL_1 ( &wqe->mlx.data[1], 3,
  1137. local_address_l, virt_to_bus ( iobuf->data ) );
  1138. return HERMON_OPCODE_SEND;
  1139. }
  1140. /**
  1141. * Construct RC send work queue entry
  1142. *
  1143. * @v ibdev Infiniband device
  1144. * @v qp Queue pair
  1145. * @v av Address vector
  1146. * @v iobuf I/O buffer
  1147. * @v wqe Send work queue entry
  1148. * @ret opcode Control opcode
  1149. */
  1150. static unsigned int
  1151. hermon_fill_rc_send_wqe ( struct ib_device *ibdev,
  1152. struct ib_queue_pair *qp __unused,
  1153. struct ib_address_vector *av __unused,
  1154. struct io_buffer *iobuf,
  1155. union hermon_send_wqe *wqe ) {
  1156. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1157. MLX_FILL_1 ( &wqe->rc.ctrl, 1, ds,
  1158. ( ( offsetof ( typeof ( wqe->rc ), data[1] ) / 16 ) ) );
  1159. MLX_FILL_1 ( &wqe->rc.ctrl, 2, c, 0x03 /* generate completion */ );
  1160. MLX_FILL_1 ( &wqe->rc.data[0], 0, byte_count, iob_len ( iobuf ) );
  1161. MLX_FILL_1 ( &wqe->rc.data[0], 1, l_key, hermon->lkey );
  1162. MLX_FILL_1 ( &wqe->rc.data[0], 3,
  1163. local_address_l, virt_to_bus ( iobuf->data ) );
  1164. return HERMON_OPCODE_SEND;
  1165. }
  1166. /** Work queue entry constructors */
  1167. static unsigned int
  1168. ( * hermon_fill_send_wqe[] ) ( struct ib_device *ibdev,
  1169. struct ib_queue_pair *qp,
  1170. struct ib_address_vector *av,
  1171. struct io_buffer *iobuf,
  1172. union hermon_send_wqe *wqe ) = {
  1173. [IB_QPT_SMI] = hermon_fill_mlx_send_wqe,
  1174. [IB_QPT_GSI] = hermon_fill_mlx_send_wqe,
  1175. [IB_QPT_UD] = hermon_fill_ud_send_wqe,
  1176. [IB_QPT_RC] = hermon_fill_rc_send_wqe,
  1177. };
  1178. /**
  1179. * Post send work queue entry
  1180. *
  1181. * @v ibdev Infiniband device
  1182. * @v qp Queue pair
  1183. * @v av Address vector
  1184. * @v iobuf I/O buffer
  1185. * @ret rc Return status code
  1186. */
  1187. static int hermon_post_send ( struct ib_device *ibdev,
  1188. struct ib_queue_pair *qp,
  1189. struct ib_address_vector *av,
  1190. struct io_buffer *iobuf ) {
  1191. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1192. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1193. struct ib_work_queue *wq = &qp->send;
  1194. struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
  1195. union hermon_send_wqe *wqe;
  1196. union hermonprm_doorbell_register db_reg;
  1197. unsigned int wqe_idx_mask;
  1198. unsigned int opcode;
  1199. /* Allocate work queue entry */
  1200. wqe_idx_mask = ( wq->num_wqes - 1 );
  1201. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1202. DBGC ( hermon, "Hermon %p send queue full", hermon );
  1203. return -ENOBUFS;
  1204. }
  1205. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1206. wqe = &hermon_send_wq->wqe[ wq->next_idx &
  1207. ( hermon_send_wq->num_wqes - 1 ) ];
  1208. /* Construct work queue entry */
  1209. memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
  1210. ( sizeof ( *wqe ) - 4 ) );
  1211. assert ( qp->type < ( sizeof ( hermon_fill_send_wqe ) /
  1212. sizeof ( hermon_fill_send_wqe[0] ) ) );
  1213. assert ( hermon_fill_send_wqe[qp->type] != NULL );
  1214. opcode = hermon_fill_send_wqe[qp->type] ( ibdev, qp, av, iobuf, wqe );
  1215. barrier();
  1216. MLX_FILL_2 ( &wqe->ctrl, 0,
  1217. opcode, opcode,
  1218. owner,
  1219. ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 ) );
  1220. DBGCP ( hermon, "Hermon %p posting send WQE:\n", hermon );
  1221. DBGCP_HD ( hermon, wqe, sizeof ( *wqe ) );
  1222. barrier();
  1223. /* Ring doorbell register */
  1224. MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
  1225. DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
  1226. virt_to_phys ( hermon_send_wq->doorbell ), db_reg.dword[0] );
  1227. writel ( db_reg.dword[0], ( hermon_send_wq->doorbell ) );
  1228. /* Update work queue's index */
  1229. wq->next_idx++;
  1230. return 0;
  1231. }
  1232. /**
  1233. * Post receive work queue entry
  1234. *
  1235. * @v ibdev Infiniband device
  1236. * @v qp Queue pair
  1237. * @v iobuf I/O buffer
  1238. * @ret rc Return status code
  1239. */
  1240. static int hermon_post_recv ( struct ib_device *ibdev,
  1241. struct ib_queue_pair *qp,
  1242. struct io_buffer *iobuf ) {
  1243. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1244. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1245. struct ib_work_queue *wq = &qp->recv;
  1246. struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
  1247. struct hermonprm_recv_wqe *wqe;
  1248. unsigned int wqe_idx_mask;
  1249. /* Allocate work queue entry */
  1250. wqe_idx_mask = ( wq->num_wqes - 1 );
  1251. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1252. DBGC ( hermon, "Hermon %p receive queue full", hermon );
  1253. return -ENOBUFS;
  1254. }
  1255. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1256. wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  1257. /* Construct work queue entry */
  1258. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
  1259. MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->lkey );
  1260. MLX_FILL_1 ( &wqe->data[0], 3,
  1261. local_address_l, virt_to_bus ( iobuf->data ) );
  1262. /* Update work queue's index */
  1263. wq->next_idx++;
  1264. /* Update doorbell record */
  1265. barrier();
  1266. MLX_FILL_1 ( &hermon_recv_wq->doorbell, 0, receive_wqe_counter,
  1267. ( wq->next_idx & 0xffff ) );
  1268. return 0;
  1269. }
  1270. /**
  1271. * Handle completion
  1272. *
  1273. * @v ibdev Infiniband device
  1274. * @v cq Completion queue
  1275. * @v cqe Hardware completion queue entry
  1276. * @ret rc Return status code
  1277. */
  1278. static int hermon_complete ( struct ib_device *ibdev,
  1279. struct ib_completion_queue *cq,
  1280. union hermonprm_completion_entry *cqe ) {
  1281. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1282. struct ib_work_queue *wq;
  1283. struct ib_queue_pair *qp;
  1284. struct hermon_queue_pair *hermon_qp;
  1285. struct io_buffer *iobuf;
  1286. struct ib_address_vector recv_av;
  1287. struct ib_global_route_header *grh;
  1288. struct ib_address_vector *av;
  1289. unsigned int opcode;
  1290. unsigned long qpn;
  1291. int is_send;
  1292. unsigned int wqe_idx;
  1293. size_t len;
  1294. int rc = 0;
  1295. /* Parse completion */
  1296. qpn = MLX_GET ( &cqe->normal, qpn );
  1297. is_send = MLX_GET ( &cqe->normal, s_r );
  1298. opcode = MLX_GET ( &cqe->normal, opcode );
  1299. if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
  1300. /* "s" field is not valid for error opcodes */
  1301. is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
  1302. DBGC ( hermon, "Hermon %p CQN %lx syndrome %x vendor %x\n",
  1303. hermon, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
  1304. MLX_GET ( &cqe->error, vendor_error_syndrome ) );
  1305. rc = -EIO;
  1306. /* Don't return immediately; propagate error to completer */
  1307. }
  1308. /* Identify work queue */
  1309. wq = ib_find_wq ( cq, qpn, is_send );
  1310. if ( ! wq ) {
  1311. DBGC ( hermon, "Hermon %p CQN %lx unknown %s QPN %lx\n",
  1312. hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1313. return -EIO;
  1314. }
  1315. qp = wq->qp;
  1316. hermon_qp = ib_qp_get_drvdata ( qp );
  1317. /* Identify I/O buffer */
  1318. wqe_idx = ( MLX_GET ( &cqe->normal, wqe_counter ) &
  1319. ( wq->num_wqes - 1 ) );
  1320. iobuf = wq->iobufs[wqe_idx];
  1321. if ( ! iobuf ) {
  1322. DBGC ( hermon, "Hermon %p CQN %lx QPN %lx empty WQE %x\n",
  1323. hermon, cq->cqn, qp->qpn, wqe_idx );
  1324. return -EIO;
  1325. }
  1326. wq->iobufs[wqe_idx] = NULL;
  1327. if ( is_send ) {
  1328. /* Hand off to completion handler */
  1329. ib_complete_send ( ibdev, qp, iobuf, rc );
  1330. } else {
  1331. /* Set received length */
  1332. len = MLX_GET ( &cqe->normal, byte_cnt );
  1333. assert ( len <= iob_tailroom ( iobuf ) );
  1334. iob_put ( iobuf, len );
  1335. switch ( qp->type ) {
  1336. case IB_QPT_SMI:
  1337. case IB_QPT_GSI:
  1338. case IB_QPT_UD:
  1339. assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
  1340. grh = iobuf->data;
  1341. iob_pull ( iobuf, sizeof ( *grh ) );
  1342. /* Construct address vector */
  1343. av = &recv_av;
  1344. memset ( av, 0, sizeof ( *av ) );
  1345. av->qpn = MLX_GET ( &cqe->normal, srq_rqpn );
  1346. av->lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
  1347. av->sl = MLX_GET ( &cqe->normal, sl );
  1348. av->gid_present = MLX_GET ( &cqe->normal, g );
  1349. memcpy ( &av->gid, &grh->sgid, sizeof ( av->gid ) );
  1350. break;
  1351. case IB_QPT_RC:
  1352. av = &qp->av;
  1353. break;
  1354. default:
  1355. assert ( 0 );
  1356. return -EINVAL;
  1357. }
  1358. /* Hand off to completion handler */
  1359. ib_complete_recv ( ibdev, qp, av, iobuf, rc );
  1360. }
  1361. return rc;
  1362. }
  1363. /**
  1364. * Poll completion queue
  1365. *
  1366. * @v ibdev Infiniband device
  1367. * @v cq Completion queue
  1368. */
  1369. static void hermon_poll_cq ( struct ib_device *ibdev,
  1370. struct ib_completion_queue *cq ) {
  1371. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1372. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  1373. union hermonprm_completion_entry *cqe;
  1374. unsigned int cqe_idx_mask;
  1375. int rc;
  1376. while ( 1 ) {
  1377. /* Look for completion entry */
  1378. cqe_idx_mask = ( cq->num_cqes - 1 );
  1379. cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
  1380. if ( MLX_GET ( &cqe->normal, owner ) ^
  1381. ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
  1382. /* Entry still owned by hardware; end of poll */
  1383. break;
  1384. }
  1385. DBGCP ( hermon, "Hermon %p completion:\n", hermon );
  1386. DBGCP_HD ( hermon, cqe, sizeof ( *cqe ) );
  1387. /* Handle completion */
  1388. if ( ( rc = hermon_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1389. DBGC ( hermon, "Hermon %p failed to complete: %s\n",
  1390. hermon, strerror ( rc ) );
  1391. DBGC_HD ( hermon, cqe, sizeof ( *cqe ) );
  1392. }
  1393. /* Update completion queue's index */
  1394. cq->next_idx++;
  1395. /* Update doorbell record */
  1396. MLX_FILL_1 ( &hermon_cq->doorbell, 0, update_ci,
  1397. ( cq->next_idx & 0x00ffffffUL ) );
  1398. }
  1399. }
  1400. /***************************************************************************
  1401. *
  1402. * Event queues
  1403. *
  1404. ***************************************************************************
  1405. */
  1406. /**
  1407. * Create event queue
  1408. *
  1409. * @v hermon Hermon device
  1410. * @ret rc Return status code
  1411. */
  1412. static int hermon_create_eq ( struct hermon *hermon ) {
  1413. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1414. struct hermonprm_eqc eqctx;
  1415. struct hermonprm_event_mask mask;
  1416. unsigned int i;
  1417. int rc;
  1418. /* Select event queue number */
  1419. hermon_eq->eqn = ( 4 * hermon->cap.reserved_uars );
  1420. if ( hermon_eq->eqn < hermon->cap.reserved_eqs )
  1421. hermon_eq->eqn = hermon->cap.reserved_eqs;
  1422. /* Calculate doorbell address */
  1423. hermon_eq->doorbell =
  1424. ( hermon->uar + HERMON_DB_EQ_OFFSET ( hermon_eq->eqn ) );
  1425. /* Allocate event queue itself */
  1426. hermon_eq->eqe_size =
  1427. ( HERMON_NUM_EQES * sizeof ( hermon_eq->eqe[0] ) );
  1428. hermon_eq->eqe = malloc_dma ( hermon_eq->eqe_size,
  1429. sizeof ( hermon_eq->eqe[0] ) );
  1430. if ( ! hermon_eq->eqe ) {
  1431. rc = -ENOMEM;
  1432. goto err_eqe;
  1433. }
  1434. memset ( hermon_eq->eqe, 0, hermon_eq->eqe_size );
  1435. for ( i = 0 ; i < HERMON_NUM_EQES ; i++ ) {
  1436. MLX_FILL_1 ( &hermon_eq->eqe[i].generic, 7, owner, 1 );
  1437. }
  1438. barrier();
  1439. /* Allocate MTT entries */
  1440. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_eq->eqe,
  1441. hermon_eq->eqe_size,
  1442. &hermon_eq->mtt ) ) != 0 )
  1443. goto err_alloc_mtt;
  1444. /* Hand queue over to hardware */
  1445. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1446. MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
  1447. MLX_FILL_1 ( &eqctx, 2,
  1448. page_offset, ( hermon_eq->mtt.page_offset >> 5 ) );
  1449. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( HERMON_NUM_EQES - 1 ) );
  1450. MLX_FILL_1 ( &eqctx, 7, mtt_base_addr_l,
  1451. ( hermon_eq->mtt.mtt_base_addr >> 3 ) );
  1452. if ( ( rc = hermon_cmd_sw2hw_eq ( hermon, hermon_eq->eqn,
  1453. &eqctx ) ) != 0 ) {
  1454. DBGC ( hermon, "Hermon %p SW2HW_EQ failed: %s\n",
  1455. hermon, strerror ( rc ) );
  1456. goto err_sw2hw_eq;
  1457. }
  1458. /* Map events to this event queue */
  1459. memset ( &mask, 0, sizeof ( mask ) );
  1460. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1461. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1462. ( HERMON_MAP_EQ | hermon_eq->eqn ),
  1463. &mask ) ) != 0 ) {
  1464. DBGC ( hermon, "Hermon %p MAP_EQ failed: %s\n",
  1465. hermon, strerror ( rc ) );
  1466. goto err_map_eq;
  1467. }
  1468. DBGC ( hermon, "Hermon %p EQN %#lx ring at [%p,%p])\n",
  1469. hermon, hermon_eq->eqn, hermon_eq->eqe,
  1470. ( ( ( void * ) hermon_eq->eqe ) + hermon_eq->eqe_size ) );
  1471. return 0;
  1472. err_map_eq:
  1473. hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn, &eqctx );
  1474. err_sw2hw_eq:
  1475. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1476. err_alloc_mtt:
  1477. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1478. err_eqe:
  1479. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1480. return rc;
  1481. }
  1482. /**
  1483. * Destroy event queue
  1484. *
  1485. * @v hermon Hermon device
  1486. */
  1487. static void hermon_destroy_eq ( struct hermon *hermon ) {
  1488. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1489. struct hermonprm_eqc eqctx;
  1490. struct hermonprm_event_mask mask;
  1491. int rc;
  1492. /* Unmap events from event queue */
  1493. memset ( &mask, 0, sizeof ( mask ) );
  1494. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1495. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1496. ( HERMON_UNMAP_EQ | hermon_eq->eqn ),
  1497. &mask ) ) != 0 ) {
  1498. DBGC ( hermon, "Hermon %p FATAL MAP_EQ failed to unmap: %s\n",
  1499. hermon, strerror ( rc ) );
  1500. /* Continue; HCA may die but system should survive */
  1501. }
  1502. /* Take ownership back from hardware */
  1503. if ( ( rc = hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn,
  1504. &eqctx ) ) != 0 ) {
  1505. DBGC ( hermon, "Hermon %p FATAL HW2SW_EQ failed: %s\n",
  1506. hermon, strerror ( rc ) );
  1507. /* Leak memory and return; at least we avoid corruption */
  1508. return;
  1509. }
  1510. /* Free MTT entries */
  1511. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1512. /* Free memory */
  1513. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1514. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1515. }
  1516. /**
  1517. * Handle port state event
  1518. *
  1519. * @v hermon Hermon device
  1520. * @v eqe Port state change event queue entry
  1521. */
  1522. static void hermon_event_port_state_change ( struct hermon *hermon,
  1523. union hermonprm_event_entry *eqe){
  1524. unsigned int port;
  1525. int link_up;
  1526. /* Get port and link status */
  1527. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1528. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1529. DBGC ( hermon, "Hermon %p port %d link %s\n", hermon, ( port + 1 ),
  1530. ( link_up ? "up" : "down" ) );
  1531. /* Sanity check */
  1532. if ( port >= hermon->cap.num_ports ) {
  1533. DBGC ( hermon, "Hermon %p port %d does not exist!\n",
  1534. hermon, ( port + 1 ) );
  1535. return;
  1536. }
  1537. /* Update MAD parameters */
  1538. ib_smc_update ( hermon->ibdev[port], hermon_mad );
  1539. /* Notify Infiniband core of link state change */
  1540. ib_link_state_changed ( hermon->ibdev[port] );
  1541. }
  1542. /**
  1543. * Poll event queue
  1544. *
  1545. * @v ibdev Infiniband device
  1546. */
  1547. static void hermon_poll_eq ( struct ib_device *ibdev ) {
  1548. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1549. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1550. union hermonprm_event_entry *eqe;
  1551. union hermonprm_doorbell_register db_reg;
  1552. unsigned int eqe_idx_mask;
  1553. unsigned int event_type;
  1554. while ( 1 ) {
  1555. /* Look for event entry */
  1556. eqe_idx_mask = ( HERMON_NUM_EQES - 1 );
  1557. eqe = &hermon_eq->eqe[hermon_eq->next_idx & eqe_idx_mask];
  1558. if ( MLX_GET ( &eqe->generic, owner ) ^
  1559. ( ( hermon_eq->next_idx & HERMON_NUM_EQES ) ? 1 : 0 ) ) {
  1560. /* Entry still owned by hardware; end of poll */
  1561. break;
  1562. }
  1563. DBGCP ( hermon, "Hermon %p event:\n", hermon );
  1564. DBGCP_HD ( hermon, eqe, sizeof ( *eqe ) );
  1565. /* Handle event */
  1566. event_type = MLX_GET ( &eqe->generic, event_type );
  1567. switch ( event_type ) {
  1568. case HERMON_EV_PORT_STATE_CHANGE:
  1569. hermon_event_port_state_change ( hermon, eqe );
  1570. break;
  1571. default:
  1572. DBGC ( hermon, "Hermon %p unrecognised event type "
  1573. "%#x:\n", hermon, event_type );
  1574. DBGC_HD ( hermon, eqe, sizeof ( *eqe ) );
  1575. break;
  1576. }
  1577. /* Update event queue's index */
  1578. hermon_eq->next_idx++;
  1579. /* Ring doorbell */
  1580. MLX_FILL_1 ( &db_reg.event, 0,
  1581. ci, ( hermon_eq->next_idx & 0x00ffffffUL ) );
  1582. DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
  1583. virt_to_phys ( hermon_eq->doorbell ),
  1584. db_reg.dword[0] );
  1585. writel ( db_reg.dword[0], hermon_eq->doorbell );
  1586. }
  1587. }
  1588. /***************************************************************************
  1589. *
  1590. * Infiniband link-layer operations
  1591. *
  1592. ***************************************************************************
  1593. */
  1594. /**
  1595. * Sense port type
  1596. *
  1597. * @v ibdev Infiniband device
  1598. * @ret port_type Port type, or negative error
  1599. */
  1600. static int hermon_sense_port_type ( struct ib_device *ibdev ) {
  1601. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1602. struct hermonprm_sense_port sense_port;
  1603. int port_type;
  1604. int rc;
  1605. /* If DPDP is not supported, always assume Infiniband */
  1606. if ( ! hermon->cap.dpdp )
  1607. return HERMON_PORT_TYPE_IB;
  1608. /* Sense the port type */
  1609. if ( ( rc = hermon_cmd_sense_port ( hermon, ibdev->port,
  1610. &sense_port ) ) != 0 ) {
  1611. DBGC ( hermon, "Hermon %p port %d sense failed: %s\n",
  1612. hermon, ibdev->port, strerror ( rc ) );
  1613. return rc;
  1614. }
  1615. port_type = MLX_GET ( &sense_port, port_type );
  1616. DBGC ( hermon, "Hermon %p port %d type %d\n",
  1617. hermon, ibdev->port, port_type );
  1618. return port_type;
  1619. }
  1620. /**
  1621. * Initialise Infiniband link
  1622. *
  1623. * @v ibdev Infiniband device
  1624. * @ret rc Return status code
  1625. */
  1626. static int hermon_open ( struct ib_device *ibdev ) {
  1627. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1628. struct hermonprm_init_port init_port;
  1629. int port_type;
  1630. int rc;
  1631. /* Check we are connected to an Infiniband network */
  1632. if ( ( rc = port_type = hermon_sense_port_type ( ibdev ) ) < 0 )
  1633. return rc;
  1634. if ( port_type != HERMON_PORT_TYPE_IB ) {
  1635. DBGC ( hermon, "Hermon %p port %d not connected to an "
  1636. "Infiniband network", hermon, ibdev->port );
  1637. return -ENOTCONN;
  1638. }
  1639. /* Init Port */
  1640. memset ( &init_port, 0, sizeof ( init_port ) );
  1641. MLX_FILL_2 ( &init_port, 0,
  1642. port_width_cap, 3,
  1643. vl_cap, 1 );
  1644. MLX_FILL_2 ( &init_port, 1,
  1645. mtu, HERMON_MTU_2048,
  1646. max_gid, 1 );
  1647. MLX_FILL_1 ( &init_port, 2, max_pkey, 64 );
  1648. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port,
  1649. &init_port ) ) != 0 ) {
  1650. DBGC ( hermon, "Hermon %p could not intialise port: %s\n",
  1651. hermon, strerror ( rc ) );
  1652. return rc;
  1653. }
  1654. /* Update MAD parameters */
  1655. ib_smc_update ( ibdev, hermon_mad );
  1656. return 0;
  1657. }
  1658. /**
  1659. * Close Infiniband link
  1660. *
  1661. * @v ibdev Infiniband device
  1662. */
  1663. static void hermon_close ( struct ib_device *ibdev ) {
  1664. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1665. int rc;
  1666. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  1667. DBGC ( hermon, "Hermon %p could not close port: %s\n",
  1668. hermon, strerror ( rc ) );
  1669. /* Nothing we can do about this */
  1670. }
  1671. }
  1672. /**
  1673. * Inform embedded subnet management agent of a received MAD
  1674. *
  1675. * @v ibdev Infiniband device
  1676. * @v mad MAD
  1677. * @ret rc Return status code
  1678. */
  1679. static int hermon_inform_sma ( struct ib_device *ibdev,
  1680. union ib_mad *mad ) {
  1681. int rc;
  1682. /* Send the MAD to the embedded SMA */
  1683. if ( ( rc = hermon_mad ( ibdev, mad ) ) != 0 )
  1684. return rc;
  1685. /* Update parameters held in software */
  1686. ib_smc_update ( ibdev, hermon_mad );
  1687. return 0;
  1688. }
  1689. /***************************************************************************
  1690. *
  1691. * Multicast group operations
  1692. *
  1693. ***************************************************************************
  1694. */
  1695. /**
  1696. * Attach to multicast group
  1697. *
  1698. * @v ibdev Infiniband device
  1699. * @v qp Queue pair
  1700. * @v gid Multicast GID
  1701. * @ret rc Return status code
  1702. */
  1703. static int hermon_mcast_attach ( struct ib_device *ibdev,
  1704. struct ib_queue_pair *qp,
  1705. struct ib_gid *gid ) {
  1706. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1707. struct hermonprm_mgm_hash hash;
  1708. struct hermonprm_mcg_entry mcg;
  1709. unsigned int index;
  1710. int rc;
  1711. /* Generate hash table index */
  1712. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  1713. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  1714. hermon, strerror ( rc ) );
  1715. return rc;
  1716. }
  1717. index = MLX_GET ( &hash, hash );
  1718. /* Check for existing hash table entry */
  1719. if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1720. DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
  1721. hermon, index, strerror ( rc ) );
  1722. return rc;
  1723. }
  1724. if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
  1725. /* FIXME: this implementation allows only a single QP
  1726. * per multicast group, and doesn't handle hash
  1727. * collisions. Sufficient for IPoIB but may need to
  1728. * be extended in future.
  1729. */
  1730. DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
  1731. hermon, index );
  1732. return -EBUSY;
  1733. }
  1734. /* Update hash table entry */
  1735. MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
  1736. MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
  1737. memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
  1738. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1739. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  1740. hermon, index, strerror ( rc ) );
  1741. return rc;
  1742. }
  1743. return 0;
  1744. }
  1745. /**
  1746. * Detach from multicast group
  1747. *
  1748. * @v ibdev Infiniband device
  1749. * @v qp Queue pair
  1750. * @v gid Multicast GID
  1751. */
  1752. static void hermon_mcast_detach ( struct ib_device *ibdev,
  1753. struct ib_queue_pair *qp __unused,
  1754. struct ib_gid *gid ) {
  1755. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1756. struct hermonprm_mgm_hash hash;
  1757. struct hermonprm_mcg_entry mcg;
  1758. unsigned int index;
  1759. int rc;
  1760. /* Generate hash table index */
  1761. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  1762. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  1763. hermon, strerror ( rc ) );
  1764. return;
  1765. }
  1766. index = MLX_GET ( &hash, hash );
  1767. /* Clear hash table entry */
  1768. memset ( &mcg, 0, sizeof ( mcg ) );
  1769. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1770. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  1771. hermon, index, strerror ( rc ) );
  1772. return;
  1773. }
  1774. }
  1775. /** Hermon Infiniband operations */
  1776. static struct ib_device_operations hermon_ib_operations = {
  1777. .create_cq = hermon_create_cq,
  1778. .destroy_cq = hermon_destroy_cq,
  1779. .create_qp = hermon_create_qp,
  1780. .modify_qp = hermon_modify_qp,
  1781. .destroy_qp = hermon_destroy_qp,
  1782. .post_send = hermon_post_send,
  1783. .post_recv = hermon_post_recv,
  1784. .poll_cq = hermon_poll_cq,
  1785. .poll_eq = hermon_poll_eq,
  1786. .open = hermon_open,
  1787. .close = hermon_close,
  1788. .mcast_attach = hermon_mcast_attach,
  1789. .mcast_detach = hermon_mcast_detach,
  1790. .set_port_info = hermon_inform_sma,
  1791. .set_pkey_table = hermon_inform_sma,
  1792. };
  1793. /***************************************************************************
  1794. *
  1795. * Firmware control
  1796. *
  1797. ***************************************************************************
  1798. */
  1799. /**
  1800. * Map virtual to physical address for firmware usage
  1801. *
  1802. * @v hermon Hermon device
  1803. * @v map Mapping function
  1804. * @v va Virtual address
  1805. * @v pa Physical address
  1806. * @v len Length of region
  1807. * @ret rc Return status code
  1808. */
  1809. static int hermon_map_vpm ( struct hermon *hermon,
  1810. int ( *map ) ( struct hermon *hermon,
  1811. const struct hermonprm_virtual_physical_mapping* ),
  1812. uint64_t va, physaddr_t pa, size_t len ) {
  1813. struct hermonprm_virtual_physical_mapping mapping;
  1814. int rc;
  1815. assert ( ( va & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1816. assert ( ( pa & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1817. assert ( ( len & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1818. /* These mappings tend to generate huge volumes of
  1819. * uninteresting debug data, which basically makes it
  1820. * impossible to use debugging otherwise.
  1821. */
  1822. DBG_DISABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1823. while ( len ) {
  1824. memset ( &mapping, 0, sizeof ( mapping ) );
  1825. MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
  1826. MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
  1827. MLX_FILL_2 ( &mapping, 3,
  1828. log2size, 0,
  1829. pa_l, ( pa >> 12 ) );
  1830. if ( ( rc = map ( hermon, &mapping ) ) != 0 ) {
  1831. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1832. DBGC ( hermon, "Hermon %p could not map %llx => %lx: "
  1833. "%s\n", hermon, va, pa, strerror ( rc ) );
  1834. return rc;
  1835. }
  1836. pa += HERMON_PAGE_SIZE;
  1837. va += HERMON_PAGE_SIZE;
  1838. len -= HERMON_PAGE_SIZE;
  1839. }
  1840. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1841. return 0;
  1842. }
  1843. /**
  1844. * Start firmware running
  1845. *
  1846. * @v hermon Hermon device
  1847. * @ret rc Return status code
  1848. */
  1849. static int hermon_start_firmware ( struct hermon *hermon ) {
  1850. struct hermonprm_query_fw fw;
  1851. unsigned int fw_pages;
  1852. size_t fw_size;
  1853. physaddr_t fw_base;
  1854. int rc;
  1855. /* Get firmware parameters */
  1856. if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
  1857. DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
  1858. hermon, strerror ( rc ) );
  1859. goto err_query_fw;
  1860. }
  1861. DBGC ( hermon, "Hermon %p firmware version %d.%d.%d\n", hermon,
  1862. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  1863. MLX_GET ( &fw, fw_rev_subminor ) );
  1864. fw_pages = MLX_GET ( &fw, fw_pages );
  1865. DBGC ( hermon, "Hermon %p requires %d pages (%d kB) for firmware\n",
  1866. hermon, fw_pages, ( fw_pages * ( HERMON_PAGE_SIZE / 1024 ) ) );
  1867. /* Allocate firmware pages and map firmware area */
  1868. fw_size = ( fw_pages * HERMON_PAGE_SIZE );
  1869. hermon->firmware_area = umalloc ( fw_size );
  1870. if ( ! hermon->firmware_area ) {
  1871. rc = -ENOMEM;
  1872. goto err_alloc_fa;
  1873. }
  1874. fw_base = user_to_phys ( hermon->firmware_area, 0 );
  1875. DBGC ( hermon, "Hermon %p firmware area at physical [%lx,%lx)\n",
  1876. hermon, fw_base, ( fw_base + fw_size ) );
  1877. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_fa,
  1878. 0, fw_base, fw_size ) ) != 0 ) {
  1879. DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
  1880. hermon, strerror ( rc ) );
  1881. goto err_map_fa;
  1882. }
  1883. /* Start firmware */
  1884. if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
  1885. DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
  1886. hermon, strerror ( rc ) );
  1887. goto err_run_fw;
  1888. }
  1889. DBGC ( hermon, "Hermon %p firmware started\n", hermon );
  1890. return 0;
  1891. err_run_fw:
  1892. err_map_fa:
  1893. hermon_cmd_unmap_fa ( hermon );
  1894. ufree ( hermon->firmware_area );
  1895. hermon->firmware_area = UNULL;
  1896. err_alloc_fa:
  1897. err_query_fw:
  1898. return rc;
  1899. }
  1900. /**
  1901. * Stop firmware running
  1902. *
  1903. * @v hermon Hermon device
  1904. */
  1905. static void hermon_stop_firmware ( struct hermon *hermon ) {
  1906. int rc;
  1907. if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
  1908. DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
  1909. hermon, strerror ( rc ) );
  1910. /* Leak memory and return; at least we avoid corruption */
  1911. return;
  1912. }
  1913. ufree ( hermon->firmware_area );
  1914. hermon->firmware_area = UNULL;
  1915. }
  1916. /***************************************************************************
  1917. *
  1918. * Infinihost Context Memory management
  1919. *
  1920. ***************************************************************************
  1921. */
  1922. /**
  1923. * Get device limits
  1924. *
  1925. * @v hermon Hermon device
  1926. * @ret rc Return status code
  1927. */
  1928. static int hermon_get_cap ( struct hermon *hermon ) {
  1929. struct hermonprm_query_dev_cap dev_cap;
  1930. int rc;
  1931. if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
  1932. DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
  1933. hermon, strerror ( rc ) );
  1934. return rc;
  1935. }
  1936. hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
  1937. hermon->cap.reserved_qps =
  1938. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
  1939. hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
  1940. hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
  1941. hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
  1942. hermon->cap.reserved_srqs =
  1943. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
  1944. hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
  1945. hermon->cap.reserved_cqs =
  1946. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
  1947. hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
  1948. hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
  1949. hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
  1950. hermon->cap.reserved_mtts =
  1951. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
  1952. hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
  1953. hermon->cap.reserved_mrws =
  1954. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
  1955. hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
  1956. hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
  1957. hermon->cap.num_ports = MLX_GET ( &dev_cap, num_ports );
  1958. hermon->cap.dpdp = MLX_GET ( &dev_cap, dpdp );
  1959. /* Sanity check */
  1960. if ( hermon->cap.num_ports > HERMON_MAX_PORTS ) {
  1961. DBGC ( hermon, "Hermon %p has %d ports (only %d supported)\n",
  1962. hermon, hermon->cap.num_ports, HERMON_MAX_PORTS );
  1963. hermon->cap.num_ports = HERMON_MAX_PORTS;
  1964. }
  1965. return 0;
  1966. }
  1967. /**
  1968. * Get ICM usage
  1969. *
  1970. * @v log_num_entries Log2 of the number of entries
  1971. * @v entry_size Entry size
  1972. * @ret usage Usage size in ICM
  1973. */
  1974. static size_t icm_usage ( unsigned int log_num_entries, size_t entry_size ) {
  1975. size_t usage;
  1976. usage = ( ( 1 << log_num_entries ) * entry_size );
  1977. usage = ( ( usage + HERMON_PAGE_SIZE - 1 ) &
  1978. ~( HERMON_PAGE_SIZE - 1 ) );
  1979. return usage;
  1980. }
  1981. /**
  1982. * Align ICM
  1983. *
  1984. * @v member_size Member size
  1985. * @v cur_icm_offset Current ICM offset
  1986. * @ret align_offset Align to offset
  1987. */
  1988. static size_t icm_align ( u32 member_size,
  1989. u64 cur_icm_offset ) {
  1990. size_t align_offset = 0;
  1991. member_size = member_size & 0xfffff000;
  1992. if ( member_size ) {
  1993. while ( ( cur_icm_offset + align_offset ) % member_size ) {
  1994. align_offset += HERMON_PAGE_SIZE;
  1995. }
  1996. }
  1997. return align_offset;
  1998. }
  1999. /**
  2000. * Allocate ICM
  2001. *
  2002. * @v hermon Hermon device
  2003. * @v init_hca INIT_HCA structure to fill in
  2004. * @ret rc Return status code
  2005. */
  2006. static int hermon_alloc_icm ( struct hermon *hermon,
  2007. struct hermonprm_init_hca *init_hca ) {
  2008. struct hermonprm_scalar_parameter icm_size;
  2009. struct hermonprm_scalar_parameter icm_aux_size;
  2010. uint64_t icm_offset = 0;
  2011. u32 icm_member_size = 0;
  2012. unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
  2013. unsigned int log_num_mtts, log_num_mpts;
  2014. size_t cmpt_max_len;
  2015. size_t qp_cmpt_len, srq_cmpt_len, cq_cmpt_len, eq_cmpt_len;
  2016. size_t icm_len, icm_aux_len;
  2017. physaddr_t icm_phys;
  2018. int i;
  2019. int rc;
  2020. /*
  2021. * Start by carving up the ICM virtual address space
  2022. *
  2023. */
  2024. /* Calculate number of each object type within ICM */
  2025. log_num_qps = fls ( hermon->cap.reserved_qps +
  2026. HERMON_RSVD_SPECIAL_QPS + HERMON_MAX_QPS - 1 );
  2027. log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
  2028. log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
  2029. log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
  2030. log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
  2031. /* ICM starts with the cMPT tables, which are sparse */
  2032. cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
  2033. ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
  2034. qp_cmpt_len = icm_usage ( log_num_qps, hermon->cap.cmpt_entry_size );
  2035. hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
  2036. hermon->icm_map[HERMON_ICM_QP_CMPT].len = qp_cmpt_len;
  2037. icm_offset += cmpt_max_len;
  2038. srq_cmpt_len = icm_usage ( log_num_srqs, hermon->cap.cmpt_entry_size );
  2039. hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
  2040. hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = srq_cmpt_len;
  2041. icm_offset += cmpt_max_len;
  2042. cq_cmpt_len = icm_usage ( log_num_cqs, hermon->cap.cmpt_entry_size );
  2043. hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
  2044. hermon->icm_map[HERMON_ICM_CQ_CMPT].len = cq_cmpt_len;
  2045. icm_offset += cmpt_max_len;
  2046. eq_cmpt_len = icm_usage ( log_num_eqs, hermon->cap.cmpt_entry_size );
  2047. hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
  2048. hermon->icm_map[HERMON_ICM_EQ_CMPT].len = eq_cmpt_len;
  2049. icm_offset += cmpt_max_len;
  2050. hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
  2051. /* Queue pair contexts */
  2052. icm_member_size = icm_usage ( log_num_qps, hermon->cap.qpc_entry_size );
  2053. icm_offset += icm_align ( icm_member_size, icm_offset );
  2054. MLX_FILL_1 ( init_hca, 12,
  2055. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
  2056. ( icm_offset >> 32 ) );
  2057. MLX_FILL_2 ( init_hca, 13,
  2058. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  2059. ( icm_offset >> 5 ),
  2060. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  2061. log_num_qps );
  2062. DBGC ( hermon, "Hermon %p ICM QPC base = %llx\n", hermon, icm_offset );
  2063. icm_offset += icm_member_size;
  2064. /* Extended alternate path contexts */
  2065. icm_member_size = icm_usage ( log_num_qps,
  2066. hermon->cap.altc_entry_size );
  2067. icm_offset += icm_align ( icm_member_size, icm_offset );
  2068. MLX_FILL_1 ( init_hca, 24,
  2069. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
  2070. ( icm_offset >> 32 ) );
  2071. MLX_FILL_1 ( init_hca, 25,
  2072. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
  2073. icm_offset );
  2074. DBGC ( hermon, "Hermon %p ICM ALTC base = %llx\n", hermon, icm_offset);
  2075. icm_offset += icm_member_size;
  2076. /* Extended auxiliary contexts */
  2077. icm_member_size = icm_usage ( log_num_qps,
  2078. hermon->cap.auxc_entry_size );
  2079. icm_offset += icm_align ( icm_member_size, icm_offset );
  2080. MLX_FILL_1 ( init_hca, 28,
  2081. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
  2082. ( icm_offset >> 32 ) );
  2083. MLX_FILL_1 ( init_hca, 29,
  2084. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
  2085. icm_offset );
  2086. DBGC ( hermon, "Hermon %p ICM AUXC base = %llx\n", hermon, icm_offset);
  2087. icm_offset += icm_member_size;
  2088. /* Shared receive queue contexts */
  2089. icm_member_size = icm_usage ( log_num_srqs,
  2090. hermon->cap.srqc_entry_size );
  2091. icm_offset += icm_align ( icm_member_size, icm_offset );
  2092. MLX_FILL_1 ( init_hca, 18,
  2093. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
  2094. ( icm_offset >> 32 ) );
  2095. MLX_FILL_2 ( init_hca, 19,
  2096. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  2097. ( icm_offset >> 5 ),
  2098. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  2099. log_num_srqs );
  2100. DBGC ( hermon, "Hermon %p ICM SRQC base = %llx\n", hermon, icm_offset);
  2101. icm_offset += icm_member_size;
  2102. /* Completion queue contexts */
  2103. icm_member_size = icm_usage ( log_num_cqs, hermon->cap.cqc_entry_size );
  2104. icm_offset += icm_align ( icm_member_size, icm_offset );
  2105. MLX_FILL_1 ( init_hca, 20,
  2106. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
  2107. ( icm_offset >> 32 ) );
  2108. MLX_FILL_2 ( init_hca, 21,
  2109. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  2110. ( icm_offset >> 5 ),
  2111. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  2112. log_num_cqs );
  2113. DBGC ( hermon, "Hermon %p ICM CQC base = %llx\n", hermon, icm_offset );
  2114. icm_offset += icm_member_size;
  2115. /* Event queue contexts */
  2116. icm_member_size = icm_usage ( log_num_eqs, hermon->cap.eqc_entry_size );
  2117. icm_offset += icm_align ( icm_member_size, icm_offset );
  2118. MLX_FILL_1 ( init_hca, 32,
  2119. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
  2120. ( icm_offset >> 32 ) );
  2121. MLX_FILL_2 ( init_hca, 33,
  2122. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  2123. ( icm_offset >> 5 ),
  2124. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
  2125. log_num_eqs );
  2126. DBGC ( hermon, "Hermon %p ICM EQC base = %llx\n", hermon, icm_offset );
  2127. icm_offset += icm_member_size;
  2128. /* Memory translation table */
  2129. icm_member_size = icm_usage ( log_num_mtts,
  2130. hermon->cap.mtt_entry_size );
  2131. icm_offset += icm_align ( icm_member_size, icm_offset );
  2132. MLX_FILL_1 ( init_hca, 64,
  2133. tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
  2134. MLX_FILL_1 ( init_hca, 65,
  2135. tpt_parameters.mtt_base_addr_l, icm_offset );
  2136. DBGC ( hermon, "Hermon %p ICM MTT base = %llx\n", hermon, icm_offset );
  2137. icm_offset += icm_member_size;
  2138. /* Memory protection table */
  2139. log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
  2140. icm_member_size = icm_usage ( log_num_mpts,
  2141. hermon->cap.dmpt_entry_size );
  2142. icm_offset += icm_align ( icm_member_size, icm_offset );
  2143. MLX_FILL_1 ( init_hca, 60,
  2144. tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
  2145. MLX_FILL_1 ( init_hca, 61,
  2146. tpt_parameters.dmpt_base_adr_l, icm_offset );
  2147. MLX_FILL_1 ( init_hca, 62,
  2148. tpt_parameters.log_dmpt_sz, log_num_mpts );
  2149. DBGC ( hermon, "Hermon %p ICM DMPT base = %llx\n", hermon, icm_offset);
  2150. icm_offset += icm_usage ( log_num_mpts,
  2151. hermon->cap.dmpt_entry_size );
  2152. /* Multicast table */
  2153. icm_member_size = ( ( 128 * sizeof ( struct hermonprm_mcg_entry ) +
  2154. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2155. icm_offset += icm_align ( icm_member_size, icm_offset );
  2156. MLX_FILL_1 ( init_hca, 48,
  2157. multicast_parameters.mc_base_addr_h,
  2158. ( icm_offset >> 32 ) );
  2159. MLX_FILL_1 ( init_hca, 49,
  2160. multicast_parameters.mc_base_addr_l, icm_offset );
  2161. MLX_FILL_1 ( init_hca, 52,
  2162. multicast_parameters.log_mc_table_entry_sz,
  2163. fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
  2164. MLX_FILL_1 ( init_hca, 53,
  2165. multicast_parameters.log_mc_table_hash_sz, 7 );
  2166. MLX_FILL_1 ( init_hca, 54,
  2167. multicast_parameters.log_mc_table_sz, 7 );
  2168. DBGC ( hermon, "Hermon %p ICM MC base = %llx\n", hermon, icm_offset );
  2169. icm_offset += icm_member_size;
  2170. hermon->icm_map[HERMON_ICM_OTHER].len =
  2171. ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
  2172. /*
  2173. * Allocate and map physical memory for (portions of) ICM
  2174. *
  2175. * Map is:
  2176. * ICM AUX area (aligned to its own size)
  2177. * cMPT areas
  2178. * Other areas
  2179. */
  2180. /* Calculate physical memory required for ICM */
  2181. icm_len = 0;
  2182. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2183. icm_len += hermon->icm_map[i].len;
  2184. }
  2185. /* Get ICM auxiliary area size */
  2186. memset ( &icm_size, 0, sizeof ( icm_size ) );
  2187. MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
  2188. MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
  2189. if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
  2190. &icm_aux_size ) ) != 0 ) {
  2191. DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
  2192. hermon, strerror ( rc ) );
  2193. goto err_set_icm_size;
  2194. }
  2195. icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
  2196. /* Allocate ICM data and auxiliary area */
  2197. DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
  2198. hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
  2199. hermon->icm = umalloc ( icm_aux_len + icm_len );
  2200. if ( ! hermon->icm ) {
  2201. rc = -ENOMEM;
  2202. goto err_alloc;
  2203. }
  2204. icm_phys = user_to_phys ( hermon->icm, 0 );
  2205. /* Map ICM auxiliary area */
  2206. DBGC ( hermon, "Hermon %p mapping ICM AUX => %08lx\n",
  2207. hermon, icm_phys );
  2208. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm_aux,
  2209. 0, icm_phys, icm_aux_len ) ) != 0 ) {
  2210. DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
  2211. hermon, strerror ( rc ) );
  2212. goto err_map_icm_aux;
  2213. }
  2214. icm_phys += icm_aux_len;
  2215. /* MAP ICM area */
  2216. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2217. DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx => %08lx\n",
  2218. hermon, hermon->icm_map[i].offset,
  2219. hermon->icm_map[i].len, icm_phys );
  2220. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm,
  2221. hermon->icm_map[i].offset,
  2222. icm_phys,
  2223. hermon->icm_map[i].len ) ) != 0 ){
  2224. DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
  2225. hermon, strerror ( rc ) );
  2226. goto err_map_icm;
  2227. }
  2228. icm_phys += hermon->icm_map[i].len;
  2229. }
  2230. return 0;
  2231. err_map_icm:
  2232. assert ( i == 0 ); /* We don't handle partial failure at present */
  2233. err_map_icm_aux:
  2234. hermon_cmd_unmap_icm_aux ( hermon );
  2235. ufree ( hermon->icm );
  2236. hermon->icm = UNULL;
  2237. err_alloc:
  2238. err_set_icm_size:
  2239. return rc;
  2240. }
  2241. /**
  2242. * Free ICM
  2243. *
  2244. * @v hermon Hermon device
  2245. */
  2246. static void hermon_free_icm ( struct hermon *hermon ) {
  2247. struct hermonprm_scalar_parameter unmap_icm;
  2248. int i;
  2249. for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
  2250. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2251. MLX_FILL_1 ( &unmap_icm, 0, value_hi,
  2252. ( hermon->icm_map[i].offset >> 32 ) );
  2253. MLX_FILL_1 ( &unmap_icm, 1, value,
  2254. hermon->icm_map[i].offset );
  2255. hermon_cmd_unmap_icm ( hermon,
  2256. ( 1 << fls ( ( hermon->icm_map[i].len /
  2257. HERMON_PAGE_SIZE ) - 1)),
  2258. &unmap_icm );
  2259. }
  2260. hermon_cmd_unmap_icm_aux ( hermon );
  2261. ufree ( hermon->icm );
  2262. hermon->icm = UNULL;
  2263. }
  2264. /***************************************************************************
  2265. *
  2266. * PCI interface
  2267. *
  2268. ***************************************************************************
  2269. */
  2270. /**
  2271. * Set up memory protection table
  2272. *
  2273. * @v hermon Hermon device
  2274. * @ret rc Return status code
  2275. */
  2276. static int hermon_setup_mpt ( struct hermon *hermon ) {
  2277. struct hermonprm_mpt mpt;
  2278. uint32_t key;
  2279. int rc;
  2280. /* Derive key */
  2281. key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
  2282. hermon->lkey = ( ( key << 8 ) | ( key >> 24 ) );
  2283. /* Initialise memory protection table */
  2284. memset ( &mpt, 0, sizeof ( mpt ) );
  2285. MLX_FILL_7 ( &mpt, 0,
  2286. atomic, 1,
  2287. rw, 1,
  2288. rr, 1,
  2289. lw, 1,
  2290. lr, 1,
  2291. pa, 1,
  2292. r_w, 1 );
  2293. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  2294. MLX_FILL_1 ( &mpt, 3,
  2295. pd, HERMON_GLOBAL_PD );
  2296. MLX_FILL_1 ( &mpt, 10, len64, 1 );
  2297. if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
  2298. hermon->cap.reserved_mrws,
  2299. &mpt ) ) != 0 ) {
  2300. DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
  2301. hermon, strerror ( rc ) );
  2302. return rc;
  2303. }
  2304. return 0;
  2305. }
  2306. /**
  2307. * Configure special queue pairs
  2308. *
  2309. * @v hermon Hermon device
  2310. * @ret rc Return status code
  2311. */
  2312. static int hermon_configure_special_qps ( struct hermon *hermon ) {
  2313. int rc;
  2314. /* Special QP block must be aligned on its own size */
  2315. hermon->special_qpn_base = ( ( hermon->cap.reserved_qps +
  2316. HERMON_NUM_SPECIAL_QPS - 1 )
  2317. & ~( HERMON_NUM_SPECIAL_QPS - 1 ) );
  2318. hermon->qpn_base = ( hermon->special_qpn_base +
  2319. HERMON_NUM_SPECIAL_QPS );
  2320. DBGC ( hermon, "Hermon %p special QPs at [%lx,%lx]\n", hermon,
  2321. hermon->special_qpn_base, ( hermon->qpn_base - 1 ) );
  2322. /* Issue command to configure special QPs */
  2323. if ( ( rc = hermon_cmd_conf_special_qp ( hermon, 0x00,
  2324. hermon->special_qpn_base ) ) != 0 ) {
  2325. DBGC ( hermon, "Hermon %p could not configure special QPs: "
  2326. "%s\n", hermon, strerror ( rc ) );
  2327. return rc;
  2328. }
  2329. return 0;
  2330. }
  2331. /**
  2332. * Reset device
  2333. *
  2334. * @v hermon Hermon device
  2335. * @v pci PCI device
  2336. */
  2337. static void hermon_reset ( struct hermon *hermon,
  2338. struct pci_device *pci ) {
  2339. struct pci_config_backup backup;
  2340. static const uint8_t backup_exclude[] =
  2341. PCI_CONFIG_BACKUP_EXCLUDE ( 0x58, 0x5c );
  2342. pci_backup ( pci, &backup, backup_exclude );
  2343. writel ( HERMON_RESET_MAGIC,
  2344. ( hermon->config + HERMON_RESET_OFFSET ) );
  2345. mdelay ( HERMON_RESET_WAIT_TIME_MS );
  2346. pci_restore ( pci, &backup, backup_exclude );
  2347. }
  2348. /**
  2349. * Probe PCI device
  2350. *
  2351. * @v pci PCI device
  2352. * @v id PCI ID
  2353. * @ret rc Return status code
  2354. */
  2355. static int hermon_probe ( struct pci_device *pci,
  2356. const struct pci_device_id *id __unused ) {
  2357. struct hermon *hermon;
  2358. struct ib_device *ibdev;
  2359. struct hermonprm_init_hca init_hca;
  2360. unsigned int i;
  2361. int rc;
  2362. /* Allocate Hermon device */
  2363. hermon = zalloc ( sizeof ( *hermon ) );
  2364. if ( ! hermon ) {
  2365. rc = -ENOMEM;
  2366. goto err_alloc_hermon;
  2367. }
  2368. pci_set_drvdata ( pci, hermon );
  2369. /* Fix up PCI device */
  2370. adjust_pci_device ( pci );
  2371. /* Get PCI BARs */
  2372. hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR),
  2373. HERMON_PCI_CONFIG_BAR_SIZE );
  2374. hermon->uar = ioremap ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ),
  2375. HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE );
  2376. /* Reset device */
  2377. hermon_reset ( hermon, pci );
  2378. /* Allocate space for mailboxes */
  2379. hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
  2380. HERMON_MBOX_ALIGN );
  2381. if ( ! hermon->mailbox_in ) {
  2382. rc = -ENOMEM;
  2383. goto err_mailbox_in;
  2384. }
  2385. hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
  2386. HERMON_MBOX_ALIGN );
  2387. if ( ! hermon->mailbox_out ) {
  2388. rc = -ENOMEM;
  2389. goto err_mailbox_out;
  2390. }
  2391. /* Start firmware */
  2392. if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
  2393. goto err_start_firmware;
  2394. /* Get device limits */
  2395. if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
  2396. goto err_get_cap;
  2397. /* Allocate Infiniband devices */
  2398. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  2399. ibdev = alloc_ibdev ( 0 );
  2400. if ( ! ibdev ) {
  2401. rc = -ENOMEM;
  2402. goto err_alloc_ibdev;
  2403. }
  2404. hermon->ibdev[i] = ibdev;
  2405. ibdev->op = &hermon_ib_operations;
  2406. ibdev->dev = &pci->dev;
  2407. ibdev->port = ( HERMON_PORT_BASE + i );
  2408. ib_set_drvdata ( ibdev, hermon );
  2409. }
  2410. /* Allocate ICM */
  2411. memset ( &init_hca, 0, sizeof ( init_hca ) );
  2412. if ( ( rc = hermon_alloc_icm ( hermon, &init_hca ) ) != 0 )
  2413. goto err_alloc_icm;
  2414. /* Initialise HCA */
  2415. MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
  2416. MLX_FILL_1 ( &init_hca, 5, udp, 1 );
  2417. MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
  2418. if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
  2419. DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
  2420. hermon, strerror ( rc ) );
  2421. goto err_init_hca;
  2422. }
  2423. /* Set up memory protection */
  2424. if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
  2425. goto err_setup_mpt;
  2426. for ( i = 0 ; i < hermon->cap.num_ports ; i++ )
  2427. hermon->ibdev[i]->rdma_key = hermon->lkey;
  2428. /* Set up event queue */
  2429. if ( ( rc = hermon_create_eq ( hermon ) ) != 0 )
  2430. goto err_create_eq;
  2431. /* Configure special QPs */
  2432. if ( ( rc = hermon_configure_special_qps ( hermon ) ) != 0 )
  2433. goto err_conf_special_qps;
  2434. /* Update IPoIB MAC address */
  2435. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  2436. ib_smc_update ( hermon->ibdev[i], hermon_mad );
  2437. }
  2438. /* Register Infiniband devices */
  2439. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  2440. if ( ( rc = register_ibdev ( hermon->ibdev[i] ) ) != 0 ) {
  2441. DBGC ( hermon, "Hermon %p could not register IB "
  2442. "device: %s\n", hermon, strerror ( rc ) );
  2443. goto err_register_ibdev;
  2444. }
  2445. }
  2446. return 0;
  2447. i = hermon->cap.num_ports;
  2448. err_register_ibdev:
  2449. for ( i-- ; ( signed int ) i >= 0 ; i-- )
  2450. unregister_ibdev ( hermon->ibdev[i] );
  2451. err_conf_special_qps:
  2452. hermon_destroy_eq ( hermon );
  2453. err_create_eq:
  2454. err_setup_mpt:
  2455. hermon_cmd_close_hca ( hermon );
  2456. err_init_hca:
  2457. hermon_free_icm ( hermon );
  2458. err_alloc_icm:
  2459. i = hermon->cap.num_ports;
  2460. err_alloc_ibdev:
  2461. for ( i-- ; ( signed int ) i >= 0 ; i-- )
  2462. ibdev_put ( hermon->ibdev[i] );
  2463. err_get_cap:
  2464. hermon_stop_firmware ( hermon );
  2465. err_start_firmware:
  2466. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  2467. err_mailbox_out:
  2468. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  2469. err_mailbox_in:
  2470. free ( hermon );
  2471. err_alloc_hermon:
  2472. return rc;
  2473. }
  2474. /**
  2475. * Remove PCI device
  2476. *
  2477. * @v pci PCI device
  2478. */
  2479. static void hermon_remove ( struct pci_device *pci ) {
  2480. struct hermon *hermon = pci_get_drvdata ( pci );
  2481. int i;
  2482. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
  2483. unregister_ibdev ( hermon->ibdev[i] );
  2484. hermon_destroy_eq ( hermon );
  2485. hermon_cmd_close_hca ( hermon );
  2486. hermon_free_icm ( hermon );
  2487. hermon_stop_firmware ( hermon );
  2488. hermon_stop_firmware ( hermon );
  2489. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  2490. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  2491. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
  2492. ibdev_put ( hermon->ibdev[i] );
  2493. free ( hermon );
  2494. }
  2495. static struct pci_device_id hermon_nics[] = {
  2496. PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver", 0 ),
  2497. PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver", 0 ),
  2498. PCI_ROM ( 0x15b3, 0x6732, "mt26418", "MT26418 HCA driver", 0 ),
  2499. PCI_ROM ( 0x15b3, 0x673c, "mt26428", "MT26428 HCA driver", 0 ),
  2500. };
  2501. struct pci_driver hermon_driver __pci_driver = {
  2502. .ids = hermon_nics,
  2503. .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
  2504. .probe = hermon_probe,
  2505. .remove = hermon_remove,
  2506. };