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pcibios.c 3.2KB

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  1. /*
  2. * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of the
  7. * License, or any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17. * 02110-1301, USA.
  18. */
  19. FILE_LICENCE ( GPL2_OR_LATER );
  20. #include <stdint.h>
  21. #include <ipxe/pci.h>
  22. #include <realmode.h>
  23. /** @file
  24. *
  25. * PCI configuration space access via PCI BIOS
  26. *
  27. */
  28. /**
  29. * Determine number of PCI buses within system
  30. *
  31. * @ret num_bus Number of buses
  32. */
  33. static int pcibios_num_bus ( void ) {
  34. int discard_a, discard_D;
  35. uint8_t max_bus;
  36. __asm__ __volatile__ ( REAL_CODE ( "stc\n\t"
  37. "int $0x1a\n\t"
  38. "jnc 1f\n\t"
  39. "xorw %%cx, %%cx\n\t"
  40. "\n1:\n\t" )
  41. : "=c" ( max_bus ), "=a" ( discard_a ),
  42. "=D" ( discard_D )
  43. : "a" ( PCIBIOS_INSTALLATION_CHECK >> 16 ),
  44. "D" ( 0 )
  45. : "ebx", "edx" );
  46. return ( max_bus + 1 );
  47. }
  48. /**
  49. * Read configuration space via PCI BIOS
  50. *
  51. * @v pci PCI device
  52. * @v command PCI BIOS command
  53. * @v value Value read
  54. * @ret rc Return status code
  55. */
  56. int pcibios_read ( struct pci_device *pci, uint32_t command, uint32_t *value ){
  57. int discard_b, discard_D;
  58. int status;
  59. __asm__ __volatile__ ( REAL_CODE ( "stc\n\t"
  60. "int $0x1a\n\t"
  61. "jnc 1f\n\t"
  62. "xorl %%eax, %%eax\n\t"
  63. "decl %%eax\n\t"
  64. "movl %%eax, %%ecx\n\t"
  65. "\n1:\n\t" )
  66. : "=a" ( status ), "=b" ( discard_b ),
  67. "=c" ( *value ), "=D" ( discard_D )
  68. : "a" ( command >> 16 ), "D" ( command ),
  69. "b" ( pci->busdevfn )
  70. : "edx" );
  71. return ( ( status >> 8 ) & 0xff );
  72. }
  73. /**
  74. * Write configuration space via PCI BIOS
  75. *
  76. * @v pci PCI device
  77. * @v command PCI BIOS command
  78. * @v value Value to be written
  79. * @ret rc Return status code
  80. */
  81. int pcibios_write ( struct pci_device *pci, uint32_t command, uint32_t value ){
  82. int discard_b, discard_c, discard_D;
  83. int status;
  84. __asm__ __volatile__ ( REAL_CODE ( "stc\n\t"
  85. "int $0x1a\n\t"
  86. "jnc 1f\n\t"
  87. "movb $0xff, %%ah\n\t"
  88. "\n1:\n\t" )
  89. : "=a" ( status ), "=b" ( discard_b ),
  90. "=c" ( discard_c ), "=D" ( discard_D )
  91. : "a" ( command >> 16 ), "D" ( command ),
  92. "b" ( pci->busdevfn ), "c" ( value )
  93. : "edx" );
  94. return ( ( status >> 8 ) & 0xff );
  95. }
  96. PROVIDE_PCIAPI ( pcbios, pci_num_bus, pcibios_num_bus );
  97. PROVIDE_PCIAPI_INLINE ( pcbios, pci_read_config_byte );
  98. PROVIDE_PCIAPI_INLINE ( pcbios, pci_read_config_word );
  99. PROVIDE_PCIAPI_INLINE ( pcbios, pci_read_config_dword );
  100. PROVIDE_PCIAPI_INLINE ( pcbios, pci_write_config_byte );
  101. PROVIDE_PCIAPI_INLINE ( pcbios, pci_write_config_word );
  102. PROVIDE_PCIAPI_INLINE ( pcbios, pci_write_config_dword );