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  1. /** @file
  2. CPU Architectural Protocol as defined in PI spec Volume 2 DXE
  3. This code abstracts the DXE core from processor implementation details.
  4. Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
  5. This program and the accompanying materials
  6. are licensed and made available under the terms and conditions of the BSD License
  7. which accompanies this distribution. The full text of the license may be found at
  8. http://opensource.org/licenses/bsd-license.php
  9. THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10. WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11. **/
  12. #ifndef __ARCH_PROTOCOL_CPU_H__
  13. #define __ARCH_PROTOCOL_CPU_H__
  14. FILE_LICENCE ( BSD3 );
  15. #include <ipxe/efi/Protocol/DebugSupport.h>
  16. #define EFI_CPU_ARCH_PROTOCOL_GUID \
  17. { 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }
  18. typedef struct _EFI_CPU_ARCH_PROTOCOL EFI_CPU_ARCH_PROTOCOL;
  19. ///
  20. /// The type of flush operation
  21. ///
  22. typedef enum {
  23. EfiCpuFlushTypeWriteBackInvalidate,
  24. EfiCpuFlushTypeWriteBack,
  25. EfiCpuFlushTypeInvalidate,
  26. EfiCpuMaxFlushType
  27. } EFI_CPU_FLUSH_TYPE;
  28. ///
  29. /// The type of processor INIT.
  30. ///
  31. typedef enum {
  32. EfiCpuInit,
  33. EfiCpuMaxInitType
  34. } EFI_CPU_INIT_TYPE;
  35. /**
  36. EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
  37. @param InterruptType Defines the type of interrupt or exception that
  38. occurred on the processor.This parameter is processor architecture specific.
  39. @param SystemContext A pointer to the processor context when
  40. the interrupt occurred on the processor.
  41. @return None
  42. **/
  43. typedef
  44. VOID
  45. (EFIAPI *EFI_CPU_INTERRUPT_HANDLER)(
  46. IN CONST EFI_EXCEPTION_TYPE InterruptType,
  47. IN CONST EFI_SYSTEM_CONTEXT SystemContext
  48. );
  49. /**
  50. This function flushes the range of addresses from Start to Start+Length
  51. from the processor's data cache. If Start is not aligned to a cache line
  52. boundary, then the bytes before Start to the preceding cache line boundary
  53. are also flushed. If Start+Length is not aligned to a cache line boundary,
  54. then the bytes past Start+Length to the end of the next cache line boundary
  55. are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
  56. supported. If the data cache is fully coherent with all DMA operations, then
  57. this function can just return EFI_SUCCESS. If the processor does not support
  58. flushing a range of the data cache, then the entire data cache can be flushed.
  59. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  60. @param Start The beginning physical address to flush from the processor's data
  61. cache.
  62. @param Length The number of bytes to flush from the processor's data cache. This
  63. function may flush more bytes than Length specifies depending upon
  64. the granularity of the flush operation that the processor supports.
  65. @param FlushType Specifies the type of flush operation to perform.
  66. @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
  67. the processor's data cache.
  68. @retval EFI_UNSUPPORTEDT The processor does not support the cache flush type specified
  69. by FlushType.
  70. @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
  71. from the processor's data cache.
  72. **/
  73. typedef
  74. EFI_STATUS
  75. (EFIAPI *EFI_CPU_FLUSH_DATA_CACHE)(
  76. IN EFI_CPU_ARCH_PROTOCOL *This,
  77. IN EFI_PHYSICAL_ADDRESS Start,
  78. IN UINT64 Length,
  79. IN EFI_CPU_FLUSH_TYPE FlushType
  80. );
  81. /**
  82. This function enables interrupt processing by the processor.
  83. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  84. @retval EFI_SUCCESS Interrupts are enabled on the processor.
  85. @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
  86. **/
  87. typedef
  88. EFI_STATUS
  89. (EFIAPI *EFI_CPU_ENABLE_INTERRUPT)(
  90. IN EFI_CPU_ARCH_PROTOCOL *This
  91. );
  92. /**
  93. This function disables interrupt processing by the processor.
  94. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  95. @retval EFI_SUCCESS Interrupts are disabled on the processor.
  96. @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
  97. **/
  98. typedef
  99. EFI_STATUS
  100. (EFIAPI *EFI_CPU_DISABLE_INTERRUPT)(
  101. IN EFI_CPU_ARCH_PROTOCOL *This
  102. );
  103. /**
  104. This function retrieves the processor's current interrupt state a returns it in
  105. State. If interrupts are currently enabled, then TRUE is returned. If interrupts
  106. are currently disabled, then FALSE is returned.
  107. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  108. @param State A pointer to the processor's current interrupt state. Set to TRUE if
  109. interrupts are enabled and FALSE if interrupts are disabled.
  110. @retval EFI_SUCCESS The processor's current interrupt state was returned in State.
  111. @retval EFI_INVALID_PARAMETER State is NULL.
  112. **/
  113. typedef
  114. EFI_STATUS
  115. (EFIAPI *EFI_CPU_GET_INTERRUPT_STATE)(
  116. IN EFI_CPU_ARCH_PROTOCOL *This,
  117. OUT BOOLEAN *State
  118. );
  119. /**
  120. This function generates an INIT on the processor. If this function succeeds, then the
  121. processor will be reset, and control will not be returned to the caller. If InitType is
  122. not supported by this processor, or the processor cannot programmatically generate an
  123. INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
  124. occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
  125. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  126. @param InitType The type of processor INIT to perform.
  127. @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
  128. @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported
  129. by this processor.
  130. @retval EFI_DEVICE_ERROR The processor INIT failed.
  131. **/
  132. typedef
  133. EFI_STATUS
  134. (EFIAPI *EFI_CPU_INIT)(
  135. IN EFI_CPU_ARCH_PROTOCOL *This,
  136. IN EFI_CPU_INIT_TYPE InitType
  137. );
  138. /**
  139. This function registers and enables the handler specified by InterruptHandler for a processor
  140. interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
  141. handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
  142. The installed handler is called once for each processor interrupt or exception.
  143. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  144. @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
  145. are enabled and FALSE if interrupts are disabled.
  146. @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
  147. when a processor interrupt occurs. If this parameter is NULL, then the handler
  148. will be uninstalled.
  149. @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
  150. @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
  151. previously installed.
  152. @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
  153. previously installed.
  154. @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
  155. **/
  156. typedef
  157. EFI_STATUS
  158. (EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER)(
  159. IN EFI_CPU_ARCH_PROTOCOL *This,
  160. IN EFI_EXCEPTION_TYPE InterruptType,
  161. IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
  162. );
  163. /**
  164. This function reads the processor timer specified by TimerIndex and returns it in TimerValue.
  165. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  166. @param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter
  167. must be between 0 and NumberOfTimers-1.
  168. @param TimerValue Pointer to the returned timer value.
  169. @param TimerPeriod A pointer to the amount of time that passes in femtoseconds for each increment
  170. of TimerValue. If TimerValue does not increment at a predictable rate, then 0 is
  171. returned. This parameter is optional and may be NULL.
  172. @retval EFI_SUCCESS The processor timer value specified by TimerIndex was returned in TimerValue.
  173. @retval EFI_DEVICE_ERROR An error occurred attempting to read one of the processor's timers.
  174. @retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid.
  175. @retval EFI_UNSUPPORTED The processor does not have any readable timers.
  176. **/
  177. typedef
  178. EFI_STATUS
  179. (EFIAPI *EFI_CPU_GET_TIMER_VALUE)(
  180. IN EFI_CPU_ARCH_PROTOCOL *This,
  181. IN UINT32 TimerIndex,
  182. OUT UINT64 *TimerValue,
  183. OUT UINT64 *TimerPeriod OPTIONAL
  184. );
  185. /**
  186. This function modifies the attributes for the memory region specified by BaseAddress and
  187. Length from their current attributes to the attributes specified by Attributes.
  188. @param This The EFI_CPU_ARCH_PROTOCOL instance.
  189. @param BaseAddress The physical address that is the start address of a memory region.
  190. @param Length The size in bytes of the memory region.
  191. @param Attributes The bit mask of attributes to set for the memory region.
  192. @retval EFI_SUCCESS The attributes were set for the memory region.
  193. @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
  194. BaseAddress and Length cannot be modified.
  195. @retval EFI_INVALID_PARAMETER Length is zero.
  196. Attributes specified an illegal combination of attributes that
  197. cannot be set together.
  198. @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
  199. the memory resource range.
  200. @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
  201. resource range specified by BaseAddress and Length.
  202. The bit mask of attributes is not support for the memory resource
  203. range specified by BaseAddress and Length.
  204. **/
  205. typedef
  206. EFI_STATUS
  207. (EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES)(
  208. IN EFI_CPU_ARCH_PROTOCOL *This,
  209. IN EFI_PHYSICAL_ADDRESS BaseAddress,
  210. IN UINT64 Length,
  211. IN UINT64 Attributes
  212. );
  213. ///
  214. /// The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE
  215. /// Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt
  216. /// vectors and exception vectors, reading internal processor timers, resetting the processor, and
  217. /// determining the processor frequency.
  218. ///
  219. struct _EFI_CPU_ARCH_PROTOCOL {
  220. EFI_CPU_FLUSH_DATA_CACHE FlushDataCache;
  221. EFI_CPU_ENABLE_INTERRUPT EnableInterrupt;
  222. EFI_CPU_DISABLE_INTERRUPT DisableInterrupt;
  223. EFI_CPU_GET_INTERRUPT_STATE GetInterruptState;
  224. EFI_CPU_INIT Init;
  225. EFI_CPU_REGISTER_INTERRUPT_HANDLER RegisterInterruptHandler;
  226. EFI_CPU_GET_TIMER_VALUE GetTimerValue;
  227. EFI_CPU_SET_MEMORY_ATTRIBUTES SetMemoryAttributes;
  228. ///
  229. /// The number of timers that are available in a processor. The value in this
  230. /// field is a constant that must not be modified after the CPU Architectural
  231. /// Protocol is installed. All consumers must treat this as a read-only field.
  232. ///
  233. UINT32 NumberOfTimers;
  234. ///
  235. /// The size, in bytes, of the alignment required for DMA buffer allocations.
  236. /// This is typically the size of the largest data cache line in the platform.
  237. /// The value in this field is a constant that must not be modified after the
  238. /// CPU Architectural Protocol is installed. All consumers must treat this as
  239. /// a read-only field.
  240. ///
  241. UINT32 DmaBufferAlignment;
  242. };
  243. extern EFI_GUID gEfiCpuArchProtocolGuid;
  244. #endif