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ehci.c 53KB

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  1. /*
  2. * Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of the
  7. * License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17. * 02110-1301, USA.
  18. *
  19. * You can also choose to distribute this program under the terms of
  20. * the Unmodified Binary Distribution Licence (as given in the file
  21. * COPYING.UBDL), provided that you have satisfied its requirements.
  22. */
  23. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  24. #include <stdlib.h>
  25. #include <unistd.h>
  26. #include <string.h>
  27. #include <strings.h>
  28. #include <errno.h>
  29. #include <byteswap.h>
  30. #include <ipxe/malloc.h>
  31. #include <ipxe/pci.h>
  32. #include <ipxe/usb.h>
  33. #include <ipxe/init.h>
  34. #include "ehci.h"
  35. /** @file
  36. *
  37. * USB Enhanced Host Controller Interface (EHCI) driver
  38. *
  39. */
  40. /**
  41. * Construct error code from transfer descriptor status
  42. *
  43. * @v status Transfer descriptor status
  44. * @ret rc Error code
  45. *
  46. * Bits 2-5 of the status code provide some indication as to the root
  47. * cause of the error. We incorporate these into the error code as
  48. * reported to usb_complete_err().
  49. */
  50. #define EIO_STATUS( status ) EUNIQ ( EINFO_EIO, ( ( (status) >> 2 ) & 0xf ) )
  51. /******************************************************************************
  52. *
  53. * Register access
  54. *
  55. ******************************************************************************
  56. */
  57. /**
  58. * Initialise device
  59. *
  60. * @v ehci EHCI device
  61. * @v regs MMIO registers
  62. */
  63. static void ehci_init ( struct ehci_device *ehci, void *regs ) {
  64. uint32_t hcsparams;
  65. uint32_t hccparams;
  66. size_t caplength;
  67. /* Locate capability and operational registers */
  68. ehci->cap = regs;
  69. caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
  70. ehci->op = ( ehci->cap + caplength );
  71. DBGC2 ( ehci, "EHCI %s cap %08lx op %08lx\n", ehci->name,
  72. virt_to_phys ( ehci->cap ), virt_to_phys ( ehci->op ) );
  73. /* Read structural parameters */
  74. hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
  75. ehci->ports = EHCI_HCSPARAMS_PORTS ( hcsparams );
  76. DBGC ( ehci, "EHCI %s has %d ports\n", ehci->name, ehci->ports );
  77. /* Read capability parameters 1 */
  78. hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
  79. ehci->addr64 = EHCI_HCCPARAMS_ADDR64 ( hccparams );
  80. ehci->flsize = ( EHCI_HCCPARAMS_FLSIZE ( hccparams ) ?
  81. EHCI_FLSIZE_SMALL : EHCI_FLSIZE_DEFAULT );
  82. ehci->eecp = EHCI_HCCPARAMS_EECP ( hccparams );
  83. DBGC2 ( ehci, "EHCI %s %d-bit flsize %d\n", ehci->name,
  84. ( ehci->addr64 ? 64 : 32 ), ehci->flsize );
  85. }
  86. /**
  87. * Find extended capability
  88. *
  89. * @v ehci EHCI device
  90. * @v pci PCI device
  91. * @v id Capability ID
  92. * @v offset Offset to previous extended capability instance, or zero
  93. * @ret offset Offset to extended capability, or zero if not found
  94. */
  95. static unsigned int ehci_extended_capability ( struct ehci_device *ehci,
  96. struct pci_device *pci,
  97. unsigned int id,
  98. unsigned int offset ) {
  99. uint32_t eecp;
  100. /* Locate the extended capability */
  101. while ( 1 ) {
  102. /* Locate first or next capability as applicable */
  103. if ( offset ) {
  104. pci_read_config_dword ( pci, offset, &eecp );
  105. offset = EHCI_EECP_NEXT ( eecp );
  106. } else {
  107. offset = ehci->eecp;
  108. }
  109. if ( ! offset )
  110. return 0;
  111. /* Check if this is the requested capability */
  112. pci_read_config_dword ( pci, offset, &eecp );
  113. if ( EHCI_EECP_ID ( eecp ) == id )
  114. return offset;
  115. }
  116. }
  117. /**
  118. * Calculate buffer alignment
  119. *
  120. * @v len Length
  121. * @ret align Buffer alignment
  122. *
  123. * Determine alignment required for a buffer which must be aligned to
  124. * at least EHCI_MIN_ALIGN and which must not cross a page boundary.
  125. */
  126. static inline size_t ehci_align ( size_t len ) {
  127. size_t align;
  128. /* Align to own length (rounded up to a power of two) */
  129. align = ( 1 << fls ( len - 1 ) );
  130. /* Round up to EHCI_MIN_ALIGN if needed */
  131. if ( align < EHCI_MIN_ALIGN )
  132. align = EHCI_MIN_ALIGN;
  133. return align;
  134. }
  135. /**
  136. * Check control data structure reachability
  137. *
  138. * @v ehci EHCI device
  139. * @v ptr Data structure pointer
  140. * @ret rc Return status code
  141. */
  142. static int ehci_ctrl_reachable ( struct ehci_device *ehci, void *ptr ) {
  143. physaddr_t phys = virt_to_phys ( ptr );
  144. uint32_t segment;
  145. /* Always reachable in a 32-bit build */
  146. if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
  147. return 0;
  148. /* Reachable only if control segment matches in a 64-bit build */
  149. segment = ( ( ( uint64_t ) phys ) >> 32 );
  150. if ( segment == ehci->ctrldssegment )
  151. return 0;
  152. return -ENOTSUP;
  153. }
  154. /******************************************************************************
  155. *
  156. * Diagnostics
  157. *
  158. ******************************************************************************
  159. */
  160. /**
  161. * Dump host controller registers
  162. *
  163. * @v ehci EHCI device
  164. */
  165. static __unused void ehci_dump ( struct ehci_device *ehci ) {
  166. uint8_t caplength;
  167. uint16_t hciversion;
  168. uint32_t hcsparams;
  169. uint32_t hccparams;
  170. uint32_t usbcmd;
  171. uint32_t usbsts;
  172. uint32_t usbintr;
  173. uint32_t frindex;
  174. uint32_t ctrldssegment;
  175. uint32_t periodiclistbase;
  176. uint32_t asynclistaddr;
  177. uint32_t configflag;
  178. /* Do nothing unless debugging is enabled */
  179. if ( ! DBG_LOG )
  180. return;
  181. /* Dump capability registers */
  182. caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
  183. hciversion = readw ( ehci->cap + EHCI_CAP_HCIVERSION );
  184. hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
  185. hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
  186. DBGC ( ehci, "EHCI %s caplen %02x hciversion %04x hcsparams %08x "
  187. "hccparams %08x\n", ehci->name, caplength, hciversion,
  188. hcsparams, hccparams );
  189. /* Dump operational registers */
  190. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  191. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  192. usbintr = readl ( ehci->op + EHCI_OP_USBINTR );
  193. frindex = readl ( ehci->op + EHCI_OP_FRINDEX );
  194. ctrldssegment = readl ( ehci->op + EHCI_OP_CTRLDSSEGMENT );
  195. periodiclistbase = readl ( ehci->op + EHCI_OP_PERIODICLISTBASE );
  196. asynclistaddr = readl ( ehci->op + EHCI_OP_ASYNCLISTADDR );
  197. configflag = readl ( ehci->op + EHCI_OP_CONFIGFLAG );
  198. DBGC ( ehci, "EHCI %s usbcmd %08x usbsts %08x usbint %08x frindx "
  199. "%08x\n", ehci->name, usbcmd, usbsts, usbintr, frindex );
  200. DBGC ( ehci, "EHCI %s ctrlds %08x period %08x asyncl %08x cfgflg "
  201. "%08x\n", ehci->name, ctrldssegment, periodiclistbase,
  202. asynclistaddr, configflag );
  203. }
  204. /******************************************************************************
  205. *
  206. * USB legacy support
  207. *
  208. ******************************************************************************
  209. */
  210. /** Prevent the release of ownership back to BIOS */
  211. static int ehci_legacy_prevent_release;
  212. /**
  213. * Initialise USB legacy support
  214. *
  215. * @v ehci EHCI device
  216. * @v pci PCI device
  217. */
  218. static void ehci_legacy_init ( struct ehci_device *ehci,
  219. struct pci_device *pci ) {
  220. unsigned int legacy;
  221. uint8_t bios;
  222. /* Locate USB legacy support capability (if present) */
  223. legacy = ehci_extended_capability ( ehci, pci, EHCI_EECP_ID_LEGACY, 0 );
  224. if ( ! legacy ) {
  225. /* Not an error; capability may not be present */
  226. DBGC ( ehci, "EHCI %s has no USB legacy support capability\n",
  227. ehci->name );
  228. return;
  229. }
  230. /* Check if legacy USB support is enabled */
  231. pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ), &bios );
  232. if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
  233. /* Not an error; already owned by OS */
  234. DBGC ( ehci, "EHCI %s USB legacy support already disabled\n",
  235. ehci->name );
  236. return;
  237. }
  238. /* Record presence of USB legacy support capability */
  239. ehci->legacy = legacy;
  240. }
  241. /**
  242. * Claim ownership from BIOS
  243. *
  244. * @v ehci EHCI device
  245. * @v pci PCI device
  246. */
  247. static void ehci_legacy_claim ( struct ehci_device *ehci,
  248. struct pci_device *pci ) {
  249. unsigned int legacy = ehci->legacy;
  250. uint32_t ctlsts;
  251. uint8_t bios;
  252. unsigned int i;
  253. /* Do nothing unless legacy support capability is present */
  254. if ( ! legacy )
  255. return;
  256. /* Dump original SMI usage */
  257. pci_read_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ),
  258. &ctlsts );
  259. if ( ctlsts ) {
  260. DBGC ( ehci, "EHCI %s BIOS using SMIs: %08x\n",
  261. ehci->name, ctlsts );
  262. }
  263. /* Claim ownership */
  264. pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ),
  265. EHCI_USBLEGSUP_OS_OWNED );
  266. /* Wait for BIOS to release ownership */
  267. for ( i = 0 ; i < EHCI_USBLEGSUP_MAX_WAIT_MS ; i++ ) {
  268. /* Check if BIOS has released ownership */
  269. pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ),
  270. &bios );
  271. if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
  272. DBGC ( ehci, "EHCI %s claimed ownership from BIOS\n",
  273. ehci->name );
  274. pci_read_config_dword ( pci, ( legacy +
  275. EHCI_USBLEGSUP_CTLSTS ),
  276. &ctlsts );
  277. if ( ctlsts ) {
  278. DBGC ( ehci, "EHCI %s warning: BIOS retained "
  279. "SMIs: %08x\n", ehci->name, ctlsts );
  280. }
  281. return;
  282. }
  283. /* Delay */
  284. mdelay ( 1 );
  285. }
  286. /* BIOS did not release ownership. Claim it forcibly by
  287. * disabling all SMIs.
  288. */
  289. DBGC ( ehci, "EHCI %s could not claim ownership from BIOS: forcibly "
  290. "disabling SMIs\n", ehci->name );
  291. pci_write_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ), 0 );
  292. }
  293. /**
  294. * Release ownership back to BIOS
  295. *
  296. * @v ehci EHCI device
  297. * @v pci PCI device
  298. */
  299. static void ehci_legacy_release ( struct ehci_device *ehci,
  300. struct pci_device *pci ) {
  301. unsigned int legacy = ehci->legacy;
  302. uint32_t ctlsts;
  303. /* Do nothing unless legacy support capability is present */
  304. if ( ! legacy )
  305. return;
  306. /* Do nothing if releasing ownership is prevented */
  307. if ( ehci_legacy_prevent_release ) {
  308. DBGC ( ehci, "EHCI %s not releasing ownership to BIOS\n",
  309. ehci->name );
  310. return;
  311. }
  312. /* Release ownership */
  313. pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ), 0 );
  314. DBGC ( ehci, "EHCI %s released ownership to BIOS\n", ehci->name );
  315. /* Dump restored SMI usage */
  316. pci_read_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ),
  317. &ctlsts );
  318. DBGC ( ehci, "EHCI %s BIOS reclaimed SMIs: %08x\n",
  319. ehci->name, ctlsts );
  320. }
  321. /******************************************************************************
  322. *
  323. * Companion controllers
  324. *
  325. ******************************************************************************
  326. */
  327. /**
  328. * Poll child companion controllers
  329. *
  330. * @v ehci EHCI device
  331. */
  332. static void ehci_poll_companions ( struct ehci_device *ehci ) {
  333. struct usb_bus *bus;
  334. struct device_description *desc;
  335. /* Poll any USB buses belonging to child companion controllers */
  336. for_each_usb_bus ( bus ) {
  337. /* Get underlying devices description */
  338. desc = &bus->dev->desc;
  339. /* Skip buses that are not PCI devices */
  340. if ( desc->bus_type != BUS_TYPE_PCI )
  341. continue;
  342. /* Skip buses that are not part of the same PCI device */
  343. if ( PCI_FIRST_FUNC ( desc->location ) !=
  344. PCI_FIRST_FUNC ( ehci->bus->dev->desc.location ) )
  345. continue;
  346. /* Skip buses that are not UHCI or OHCI PCI devices */
  347. if ( ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
  348. PCI_CLASS_SERIAL_USB,
  349. PCI_CLASS_SERIAL_USB_UHCI ))&&
  350. ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
  351. PCI_CLASS_SERIAL_USB,
  352. PCI_CLASS_SERIAL_USB_OHCI ) ))
  353. continue;
  354. /* Poll child companion controller bus */
  355. DBGC2 ( ehci, "EHCI %s polling companion %s\n",
  356. ehci->name, bus->name );
  357. usb_poll ( bus );
  358. }
  359. }
  360. /**
  361. * Locate EHCI companion controller
  362. *
  363. * @v pci PCI device
  364. * @ret busdevfn EHCI companion controller bus:dev.fn (if any)
  365. */
  366. unsigned int ehci_companion ( struct pci_device *pci ) {
  367. struct pci_device tmp;
  368. unsigned int busdevfn;
  369. int rc;
  370. /* Look for an EHCI function on the same PCI device */
  371. busdevfn = pci->busdevfn;
  372. while ( ++busdevfn <= PCI_LAST_FUNC ( pci->busdevfn ) ) {
  373. pci_init ( &tmp, busdevfn );
  374. if ( ( rc = pci_read_config ( &tmp ) ) != 0 )
  375. continue;
  376. if ( tmp.class == PCI_CLASS ( PCI_CLASS_SERIAL,
  377. PCI_CLASS_SERIAL_USB,
  378. PCI_CLASS_SERIAL_USB_EHCI ) )
  379. return busdevfn;
  380. }
  381. return 0;
  382. }
  383. /******************************************************************************
  384. *
  385. * Run / stop / reset
  386. *
  387. ******************************************************************************
  388. */
  389. /**
  390. * Start EHCI device
  391. *
  392. * @v ehci EHCI device
  393. */
  394. static void ehci_run ( struct ehci_device *ehci ) {
  395. uint32_t usbcmd;
  396. /* Set run/stop bit */
  397. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  398. usbcmd &= ~EHCI_USBCMD_FLSIZE_MASK;
  399. usbcmd |= ( EHCI_USBCMD_RUN | EHCI_USBCMD_FLSIZE ( ehci->flsize ) |
  400. EHCI_USBCMD_PERIODIC | EHCI_USBCMD_ASYNC );
  401. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  402. }
  403. /**
  404. * Stop EHCI device
  405. *
  406. * @v ehci EHCI device
  407. * @ret rc Return status code
  408. */
  409. static int ehci_stop ( struct ehci_device *ehci ) {
  410. uint32_t usbcmd;
  411. uint32_t usbsts;
  412. unsigned int i;
  413. /* Clear run/stop bit */
  414. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  415. usbcmd &= ~( EHCI_USBCMD_RUN | EHCI_USBCMD_PERIODIC |
  416. EHCI_USBCMD_ASYNC );
  417. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  418. /* Wait for device to stop */
  419. for ( i = 0 ; i < EHCI_STOP_MAX_WAIT_MS ; i++ ) {
  420. /* Check if device is stopped */
  421. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  422. if ( usbsts & EHCI_USBSTS_HCH )
  423. return 0;
  424. /* Delay */
  425. mdelay ( 1 );
  426. }
  427. DBGC ( ehci, "EHCI %s timed out waiting for stop\n", ehci->name );
  428. return -ETIMEDOUT;
  429. }
  430. /**
  431. * Reset EHCI device
  432. *
  433. * @v ehci EHCI device
  434. * @ret rc Return status code
  435. */
  436. static int ehci_reset ( struct ehci_device *ehci ) {
  437. uint32_t usbcmd;
  438. unsigned int i;
  439. int rc;
  440. /* The EHCI specification states that resetting a running
  441. * device may result in undefined behaviour, so try stopping
  442. * it first.
  443. */
  444. if ( ( rc = ehci_stop ( ehci ) ) != 0 ) {
  445. /* Ignore errors and attempt to reset the device anyway */
  446. }
  447. /* Reset device */
  448. writel ( EHCI_USBCMD_HCRST, ehci->op + EHCI_OP_USBCMD );
  449. /* Wait for reset to complete */
  450. for ( i = 0 ; i < EHCI_RESET_MAX_WAIT_MS ; i++ ) {
  451. /* Check if reset is complete */
  452. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  453. if ( ! ( usbcmd & EHCI_USBCMD_HCRST ) )
  454. return 0;
  455. /* Delay */
  456. mdelay ( 1 );
  457. }
  458. DBGC ( ehci, "EHCI %s timed out waiting for reset\n", ehci->name );
  459. return -ETIMEDOUT;
  460. }
  461. /******************************************************************************
  462. *
  463. * Transfer descriptor rings
  464. *
  465. ******************************************************************************
  466. */
  467. /**
  468. * Allocate transfer descriptor ring
  469. *
  470. * @v ehci EHCI device
  471. * @v ring Transfer descriptor ring
  472. * @ret rc Return status code
  473. */
  474. static int ehci_ring_alloc ( struct ehci_device *ehci,
  475. struct ehci_ring *ring ) {
  476. struct ehci_transfer_descriptor *desc;
  477. struct ehci_transfer_descriptor *next;
  478. unsigned int i;
  479. size_t len;
  480. uint32_t link;
  481. int rc;
  482. /* Initialise structure */
  483. memset ( ring, 0, sizeof ( *ring ) );
  484. /* Allocate I/O buffers */
  485. ring->iobuf = zalloc ( EHCI_RING_COUNT * sizeof ( ring->iobuf[0] ) );
  486. if ( ! ring->iobuf ) {
  487. rc = -ENOMEM;
  488. goto err_alloc_iobuf;
  489. }
  490. /* Allocate queue head */
  491. ring->head = malloc_dma ( sizeof ( *ring->head ),
  492. ehci_align ( sizeof ( *ring->head ) ) );
  493. if ( ! ring->head ) {
  494. rc = -ENOMEM;
  495. goto err_alloc_queue;
  496. }
  497. if ( ( rc = ehci_ctrl_reachable ( ehci, ring->head ) ) != 0 ) {
  498. DBGC ( ehci, "EHCI %s queue head unreachable\n", ehci->name );
  499. goto err_unreachable_queue;
  500. }
  501. memset ( ring->head, 0, sizeof ( *ring->head ) );
  502. /* Allocate transfer descriptors */
  503. len = ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) );
  504. ring->desc = malloc_dma ( len, sizeof ( ring->desc[0] ) );
  505. if ( ! ring->desc ) {
  506. rc = -ENOMEM;
  507. goto err_alloc_desc;
  508. }
  509. memset ( ring->desc, 0, len );
  510. /* Initialise transfer descriptors */
  511. for ( i = 0 ; i < EHCI_RING_COUNT ; i++ ) {
  512. desc = &ring->desc[i];
  513. if ( ( rc = ehci_ctrl_reachable ( ehci, desc ) ) != 0 ) {
  514. DBGC ( ehci, "EHCI %s descriptor unreachable\n",
  515. ehci->name );
  516. goto err_unreachable_desc;
  517. }
  518. next = &ring->desc[ ( i + 1 ) % EHCI_RING_COUNT ];
  519. link = virt_to_phys ( next );
  520. desc->next = cpu_to_le32 ( link );
  521. desc->alt = cpu_to_le32 ( link );
  522. }
  523. /* Initialise queue head */
  524. link = virt_to_phys ( &ring->desc[0] );
  525. ring->head->cache.next = cpu_to_le32 ( link );
  526. return 0;
  527. err_unreachable_desc:
  528. free_dma ( ring->desc, len );
  529. err_alloc_desc:
  530. err_unreachable_queue:
  531. free_dma ( ring->head, sizeof ( *ring->head ) );
  532. err_alloc_queue:
  533. free ( ring->iobuf );
  534. err_alloc_iobuf:
  535. return rc;
  536. }
  537. /**
  538. * Free transfer descriptor ring
  539. *
  540. * @v ring Transfer descriptor ring
  541. */
  542. static void ehci_ring_free ( struct ehci_ring *ring ) {
  543. unsigned int i;
  544. /* Sanity checks */
  545. assert ( ehci_ring_fill ( ring ) == 0 );
  546. for ( i = 0 ; i < EHCI_RING_COUNT ; i++ )
  547. assert ( ring->iobuf[i] == NULL );
  548. /* Free transfer descriptors */
  549. free_dma ( ring->desc, ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) ) );
  550. /* Free queue head */
  551. free_dma ( ring->head, sizeof ( *ring->head ) );
  552. /* Free I/O buffers */
  553. free ( ring->iobuf );
  554. }
  555. /**
  556. * Enqueue transfer descriptors
  557. *
  558. * @v ehci EHCI device
  559. * @v ring Transfer descriptor ring
  560. * @v iobuf I/O buffer
  561. * @v xfers Transfers
  562. * @v count Number of transfers
  563. * @ret rc Return status code
  564. */
  565. static int ehci_enqueue ( struct ehci_device *ehci, struct ehci_ring *ring,
  566. struct io_buffer *iobuf,
  567. const struct ehci_transfer *xfer,
  568. unsigned int count ) {
  569. struct ehci_transfer_descriptor *desc;
  570. physaddr_t phys;
  571. void *data;
  572. size_t len;
  573. size_t offset;
  574. size_t frag_len;
  575. unsigned int toggle;
  576. unsigned int index;
  577. unsigned int i;
  578. /* Sanity check */
  579. assert ( iobuf != NULL );
  580. assert ( count > 0 );
  581. /* Fail if ring does not have sufficient space */
  582. if ( ehci_ring_remaining ( ring ) < count )
  583. return -ENOBUFS;
  584. /* Fail if any portion is unreachable */
  585. for ( i = 0 ; i < count ; i++ ) {
  586. if ( ! xfer[i].len )
  587. continue;
  588. phys = ( virt_to_phys ( xfer[i].data ) + xfer[i].len - 1 );
  589. if ( ( phys > 0xffffffffUL ) && ( ! ehci->addr64 ) )
  590. return -ENOTSUP;
  591. }
  592. /* Enqueue each transfer, recording the I/O buffer with the last */
  593. for ( ; count ; ring->prod++, xfer++ ) {
  594. /* Populate descriptor header */
  595. index = ( ring->prod % EHCI_RING_COUNT );
  596. desc = &ring->desc[index];
  597. toggle = ( xfer->flags & EHCI_FL_TOGGLE );
  598. assert ( xfer->len <= EHCI_LEN_MASK );
  599. assert ( EHCI_FL_TOGGLE == EHCI_LEN_TOGGLE );
  600. desc->len = cpu_to_le16 ( xfer->len | toggle );
  601. desc->flags = ( xfer->flags | EHCI_FL_CERR_MAX );
  602. /* Populate buffer pointers */
  603. data = xfer->data;
  604. len = xfer->len;
  605. for ( i = 0 ; len ; i++ ) {
  606. /* Calculate length of this fragment */
  607. phys = virt_to_phys ( data );
  608. offset = ( phys & ( EHCI_PAGE_ALIGN - 1 ) );
  609. frag_len = ( EHCI_PAGE_ALIGN - offset );
  610. if ( frag_len > len )
  611. frag_len = len;
  612. /* Sanity checks */
  613. assert ( ( i == 0 ) || ( offset == 0 ) );
  614. assert ( i < ( sizeof ( desc->low ) /
  615. sizeof ( desc->low[0] ) ) );
  616. /* Populate buffer pointer */
  617. desc->low[i] = cpu_to_le32 ( phys );
  618. if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
  619. desc->high[i] =
  620. cpu_to_le32 ( ((uint64_t) phys) >> 32 );
  621. }
  622. /* Move to next fragment */
  623. data += frag_len;
  624. len -= frag_len;
  625. }
  626. /* Ensure everything is valid before activating descriptor */
  627. wmb();
  628. desc->status = EHCI_STATUS_ACTIVE;
  629. /* Record I/O buffer against last ring index */
  630. if ( --count == 0 )
  631. ring->iobuf[index] = iobuf;
  632. }
  633. return 0;
  634. }
  635. /**
  636. * Dequeue a transfer descriptor
  637. *
  638. * @v ring Transfer descriptor ring
  639. * @ret iobuf I/O buffer (or NULL)
  640. */
  641. static struct io_buffer * ehci_dequeue ( struct ehci_ring *ring ) {
  642. struct ehci_transfer_descriptor *desc;
  643. struct io_buffer *iobuf;
  644. unsigned int index = ( ring->cons % EHCI_RING_COUNT );
  645. /* Sanity check */
  646. assert ( ehci_ring_fill ( ring ) > 0 );
  647. /* Mark descriptor as inactive (and not halted) */
  648. desc = &ring->desc[index];
  649. desc->status = 0;
  650. /* Retrieve I/O buffer */
  651. iobuf = ring->iobuf[index];
  652. ring->iobuf[index] = NULL;
  653. /* Update consumer counter */
  654. ring->cons++;
  655. return iobuf;
  656. }
  657. /******************************************************************************
  658. *
  659. * Schedule management
  660. *
  661. ******************************************************************************
  662. */
  663. /**
  664. * Get link value for a queue head
  665. *
  666. * @v queue Queue head
  667. * @ret link Link value
  668. */
  669. static inline uint32_t ehci_link_qh ( struct ehci_queue_head *queue ) {
  670. return ( virt_to_phys ( queue ) | EHCI_LINK_TYPE_QH );
  671. }
  672. /**
  673. * (Re)build asynchronous schedule
  674. *
  675. * @v ehci EHCI device
  676. */
  677. static void ehci_async_schedule ( struct ehci_device *ehci ) {
  678. struct ehci_endpoint *endpoint;
  679. struct ehci_queue_head *queue;
  680. uint32_t link;
  681. /* Build schedule in reverse order of execution. Provided
  682. * that we only ever add or remove single endpoints, this can
  683. * safely run concurrently with hardware execution of the
  684. * schedule.
  685. */
  686. link = ehci_link_qh ( ehci->head );
  687. list_for_each_entry_reverse ( endpoint, &ehci->async, schedule ) {
  688. queue = endpoint->ring.head;
  689. queue->link = cpu_to_le32 ( link );
  690. wmb();
  691. link = ehci_link_qh ( queue );
  692. }
  693. ehci->head->link = cpu_to_le32 ( link );
  694. wmb();
  695. }
  696. /**
  697. * Add endpoint to asynchronous schedule
  698. *
  699. * @v endpoint Endpoint
  700. */
  701. static void ehci_async_add ( struct ehci_endpoint *endpoint ) {
  702. struct ehci_device *ehci = endpoint->ehci;
  703. /* Add to end of schedule */
  704. list_add_tail ( &endpoint->schedule, &ehci->async );
  705. /* Rebuild schedule */
  706. ehci_async_schedule ( ehci );
  707. }
  708. /**
  709. * Remove endpoint from asynchronous schedule
  710. *
  711. * @v endpoint Endpoint
  712. * @ret rc Return status code
  713. */
  714. static int ehci_async_del ( struct ehci_endpoint *endpoint ) {
  715. struct ehci_device *ehci = endpoint->ehci;
  716. uint32_t usbcmd;
  717. uint32_t usbsts;
  718. unsigned int i;
  719. /* Remove from schedule */
  720. list_check_contains_entry ( endpoint, &ehci->async, schedule );
  721. list_del ( &endpoint->schedule );
  722. /* Rebuild schedule */
  723. ehci_async_schedule ( ehci );
  724. /* Request notification when asynchronous schedule advances */
  725. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  726. usbcmd |= EHCI_USBCMD_ASYNC_ADVANCE;
  727. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  728. /* Wait for asynchronous schedule to advance */
  729. for ( i = 0 ; i < EHCI_ASYNC_ADVANCE_MAX_WAIT_MS ; i++ ) {
  730. /* Check for asynchronous schedule advancing */
  731. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  732. if ( usbsts & EHCI_USBSTS_ASYNC_ADVANCE ) {
  733. usbsts &= ~EHCI_USBSTS_CHANGE;
  734. usbsts |= EHCI_USBSTS_ASYNC_ADVANCE;
  735. writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
  736. return 0;
  737. }
  738. /* Delay */
  739. mdelay ( 1 );
  740. }
  741. /* Bad things will probably happen now */
  742. DBGC ( ehci, "EHCI %s timed out waiting for asynchronous schedule "
  743. "to advance\n", ehci->name );
  744. return -ETIMEDOUT;
  745. }
  746. /**
  747. * (Re)build periodic schedule
  748. *
  749. * @v ehci EHCI device
  750. */
  751. static void ehci_periodic_schedule ( struct ehci_device *ehci ) {
  752. struct ehci_endpoint *endpoint;
  753. struct ehci_queue_head *queue;
  754. uint32_t link;
  755. unsigned int frames;
  756. unsigned int max_interval;
  757. unsigned int i;
  758. /* Build schedule in reverse order of execution. Provided
  759. * that we only ever add or remove single endpoints, this can
  760. * safely run concurrently with hardware execution of the
  761. * schedule.
  762. */
  763. DBGCP ( ehci, "EHCI %s periodic schedule: ", ehci->name );
  764. link = EHCI_LINK_TERMINATE;
  765. list_for_each_entry_reverse ( endpoint, &ehci->periodic, schedule ) {
  766. queue = endpoint->ring.head;
  767. queue->link = cpu_to_le32 ( link );
  768. wmb();
  769. DBGCP ( ehci, "%s%d",
  770. ( ( link == EHCI_LINK_TERMINATE ) ? "" : "<-" ),
  771. endpoint->ep->interval );
  772. link = ehci_link_qh ( queue );
  773. }
  774. DBGCP ( ehci, "\n" );
  775. /* Populate periodic frame list */
  776. DBGCP ( ehci, "EHCI %s periodic frame list:", ehci->name );
  777. frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  778. for ( i = 0 ; i < frames ; i++ ) {
  779. /* Calculate maximum interval (in microframes) which
  780. * may appear as part of this frame list.
  781. */
  782. if ( i == 0 ) {
  783. /* Start of list: include all endpoints */
  784. max_interval = -1U;
  785. } else {
  786. /* Calculate highest power-of-two frame interval */
  787. max_interval = ( 1 << ( ffs ( i ) - 1 ) );
  788. /* Convert to microframes */
  789. max_interval <<= 3;
  790. /* Round up to nearest 2^n-1 */
  791. max_interval = ( ( max_interval << 1 ) - 1 );
  792. }
  793. /* Find first endpoint in schedule satisfying this
  794. * maximum interval constraint.
  795. */
  796. link = EHCI_LINK_TERMINATE;
  797. list_for_each_entry ( endpoint, &ehci->periodic, schedule ) {
  798. if ( endpoint->ep->interval <= max_interval ) {
  799. queue = endpoint->ring.head;
  800. link = ehci_link_qh ( queue );
  801. DBGCP ( ehci, " %d:%d",
  802. i, endpoint->ep->interval );
  803. break;
  804. }
  805. }
  806. ehci->frame[i].link = cpu_to_le32 ( link );
  807. }
  808. wmb();
  809. DBGCP ( ehci, "\n" );
  810. }
  811. /**
  812. * Add endpoint to periodic schedule
  813. *
  814. * @v endpoint Endpoint
  815. */
  816. static void ehci_periodic_add ( struct ehci_endpoint *endpoint ) {
  817. struct ehci_device *ehci = endpoint->ehci;
  818. struct ehci_endpoint *before;
  819. unsigned int interval = endpoint->ep->interval;
  820. /* Find first endpoint with a smaller interval */
  821. list_for_each_entry ( before, &ehci->periodic, schedule ) {
  822. if ( before->ep->interval < interval )
  823. break;
  824. }
  825. list_add_tail ( &endpoint->schedule, &before->schedule );
  826. /* Rebuild schedule */
  827. ehci_periodic_schedule ( ehci );
  828. }
  829. /**
  830. * Remove endpoint from periodic schedule
  831. *
  832. * @v endpoint Endpoint
  833. * @ret rc Return status code
  834. */
  835. static int ehci_periodic_del ( struct ehci_endpoint *endpoint ) {
  836. struct ehci_device *ehci = endpoint->ehci;
  837. /* Remove from schedule */
  838. list_check_contains_entry ( endpoint, &ehci->periodic, schedule );
  839. list_del ( &endpoint->schedule );
  840. /* Rebuild schedule */
  841. ehci_periodic_schedule ( ehci );
  842. /* Delay for a whole USB frame (with a 100% safety margin) */
  843. mdelay ( 2 );
  844. return 0;
  845. }
  846. /**
  847. * Add endpoint to appropriate schedule
  848. *
  849. * @v endpoint Endpoint
  850. */
  851. static void ehci_schedule_add ( struct ehci_endpoint *endpoint ) {
  852. struct usb_endpoint *ep = endpoint->ep;
  853. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  854. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  855. ehci_periodic_add ( endpoint );
  856. } else {
  857. ehci_async_add ( endpoint );
  858. }
  859. }
  860. /**
  861. * Remove endpoint from appropriate schedule
  862. *
  863. * @v endpoint Endpoint
  864. * @ret rc Return status code
  865. */
  866. static int ehci_schedule_del ( struct ehci_endpoint *endpoint ) {
  867. struct usb_endpoint *ep = endpoint->ep;
  868. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  869. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  870. return ehci_periodic_del ( endpoint );
  871. } else {
  872. return ehci_async_del ( endpoint );
  873. }
  874. }
  875. /******************************************************************************
  876. *
  877. * Endpoint operations
  878. *
  879. ******************************************************************************
  880. */
  881. /**
  882. * Determine endpoint characteristics
  883. *
  884. * @v ep USB endpoint
  885. * @ret chr Endpoint characteristics
  886. */
  887. static uint32_t ehci_endpoint_characteristics ( struct usb_endpoint *ep ) {
  888. struct usb_device *usb = ep->usb;
  889. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  890. uint32_t chr;
  891. /* Determine basic characteristics */
  892. chr = ( EHCI_CHR_ADDRESS ( usb->address ) |
  893. EHCI_CHR_ENDPOINT ( ep->address ) |
  894. EHCI_CHR_MAX_LEN ( ep->mtu ) );
  895. /* Control endpoints require manual control of the data toggle */
  896. if ( attr == USB_ENDPOINT_ATTR_CONTROL )
  897. chr |= EHCI_CHR_TOGGLE;
  898. /* Determine endpoint speed */
  899. if ( usb->speed == USB_SPEED_HIGH ) {
  900. chr |= EHCI_CHR_EPS_HIGH;
  901. } else {
  902. if ( usb->speed == USB_SPEED_FULL ) {
  903. chr |= EHCI_CHR_EPS_FULL;
  904. } else {
  905. chr |= EHCI_CHR_EPS_LOW;
  906. }
  907. if ( attr == USB_ENDPOINT_ATTR_CONTROL )
  908. chr |= EHCI_CHR_CONTROL;
  909. }
  910. return chr;
  911. }
  912. /**
  913. * Determine endpoint capabilities
  914. *
  915. * @v ep USB endpoint
  916. * @ret cap Endpoint capabilities
  917. */
  918. static uint32_t ehci_endpoint_capabilities ( struct usb_endpoint *ep ) {
  919. struct usb_device *usb = ep->usb;
  920. struct usb_port *tt = usb_transaction_translator ( usb );
  921. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  922. uint32_t cap;
  923. unsigned int i;
  924. /* Determine basic capabilities */
  925. cap = EHCI_CAP_MULT ( ep->burst + 1 );
  926. /* Determine interrupt schedule mask, if applicable */
  927. if ( ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) &&
  928. ( ( ep->interval != 0 ) /* avoid infinite loop */ ) ) {
  929. for ( i = 0 ; i < 8 /* microframes per frame */ ;
  930. i += ep->interval ) {
  931. cap |= EHCI_CAP_INTR_SCHED ( i );
  932. }
  933. }
  934. /* Set transaction translator hub address and port, if applicable */
  935. if ( tt ) {
  936. assert ( tt->hub->usb );
  937. cap |= ( EHCI_CAP_TT_HUB ( tt->hub->usb->address ) |
  938. EHCI_CAP_TT_PORT ( tt->address ) );
  939. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT )
  940. cap |= EHCI_CAP_SPLIT_SCHED_DEFAULT;
  941. }
  942. return cap;
  943. }
  944. /**
  945. * Update endpoint characteristics and capabilities
  946. *
  947. * @v ep USB endpoint
  948. */
  949. static void ehci_endpoint_update ( struct usb_endpoint *ep ) {
  950. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  951. struct ehci_queue_head *head;
  952. /* Update queue characteristics and capabilities */
  953. head = endpoint->ring.head;
  954. head->chr = cpu_to_le32 ( ehci_endpoint_characteristics ( ep ) );
  955. head->cap = cpu_to_le32 ( ehci_endpoint_capabilities ( ep ) );
  956. }
  957. /**
  958. * Open endpoint
  959. *
  960. * @v ep USB endpoint
  961. * @ret rc Return status code
  962. */
  963. static int ehci_endpoint_open ( struct usb_endpoint *ep ) {
  964. struct usb_device *usb = ep->usb;
  965. struct ehci_device *ehci = usb_get_hostdata ( usb );
  966. struct ehci_endpoint *endpoint;
  967. int rc;
  968. /* Allocate and initialise structure */
  969. endpoint = zalloc ( sizeof ( *endpoint ) );
  970. if ( ! endpoint ) {
  971. rc = -ENOMEM;
  972. goto err_alloc;
  973. }
  974. endpoint->ehci = ehci;
  975. endpoint->ep = ep;
  976. usb_endpoint_set_hostdata ( ep, endpoint );
  977. /* Initialise descriptor ring */
  978. if ( ( rc = ehci_ring_alloc ( ehci, &endpoint->ring ) ) != 0 )
  979. goto err_ring_alloc;
  980. /* Update queue characteristics and capabilities */
  981. ehci_endpoint_update ( ep );
  982. /* Add to list of endpoints */
  983. list_add_tail ( &endpoint->list, &ehci->endpoints );
  984. /* Add to schedule */
  985. ehci_schedule_add ( endpoint );
  986. return 0;
  987. ehci_ring_free ( &endpoint->ring );
  988. err_ring_alloc:
  989. free ( endpoint );
  990. err_alloc:
  991. return rc;
  992. }
  993. /**
  994. * Close endpoint
  995. *
  996. * @v ep USB endpoint
  997. */
  998. static void ehci_endpoint_close ( struct usb_endpoint *ep ) {
  999. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  1000. struct ehci_device *ehci = endpoint->ehci;
  1001. struct usb_device *usb = ep->usb;
  1002. struct io_buffer *iobuf;
  1003. int rc;
  1004. /* Remove from schedule */
  1005. if ( ( rc = ehci_schedule_del ( endpoint ) ) != 0 ) {
  1006. /* No way to prevent hardware from continuing to
  1007. * access the memory, so leak it.
  1008. */
  1009. DBGC ( ehci, "EHCI %s %s could not unschedule: %s\n",
  1010. usb->name, usb_endpoint_name ( ep ), strerror ( rc ) );
  1011. return;
  1012. }
  1013. /* Cancel any incomplete transfers */
  1014. while ( ehci_ring_fill ( &endpoint->ring ) ) {
  1015. iobuf = ehci_dequeue ( &endpoint->ring );
  1016. if ( iobuf )
  1017. usb_complete_err ( ep, iobuf, -ECANCELED );
  1018. }
  1019. /* Remove from list of endpoints */
  1020. list_del ( &endpoint->list );
  1021. /* Free descriptor ring */
  1022. ehci_ring_free ( &endpoint->ring );
  1023. /* Free endpoint */
  1024. free ( endpoint );
  1025. }
  1026. /**
  1027. * Reset endpoint
  1028. *
  1029. * @v ep USB endpoint
  1030. * @ret rc Return status code
  1031. */
  1032. static int ehci_endpoint_reset ( struct usb_endpoint *ep ) {
  1033. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  1034. struct ehci_ring *ring = &endpoint->ring;
  1035. struct ehci_transfer_descriptor *cache = &ring->head->cache;
  1036. uint32_t link;
  1037. /* Sanity checks */
  1038. assert ( ! ( cache->status & EHCI_STATUS_ACTIVE ) );
  1039. assert ( cache->status & EHCI_STATUS_HALTED );
  1040. /* Reset residual count */
  1041. ring->residual = 0;
  1042. /* Reset data toggle */
  1043. cache->len = 0;
  1044. /* Prepare to restart at next unconsumed descriptor */
  1045. link = virt_to_phys ( &ring->desc[ ring->cons % EHCI_RING_COUNT ] );
  1046. cache->next = cpu_to_le32 ( link );
  1047. /* Restart ring */
  1048. wmb();
  1049. cache->status = 0;
  1050. return 0;
  1051. }
  1052. /**
  1053. * Update MTU
  1054. *
  1055. * @v ep USB endpoint
  1056. * @ret rc Return status code
  1057. */
  1058. static int ehci_endpoint_mtu ( struct usb_endpoint *ep ) {
  1059. /* Update endpoint characteristics and capabilities */
  1060. ehci_endpoint_update ( ep );
  1061. return 0;
  1062. }
  1063. /**
  1064. * Enqueue message transfer
  1065. *
  1066. * @v ep USB endpoint
  1067. * @v iobuf I/O buffer
  1068. * @ret rc Return status code
  1069. */
  1070. static int ehci_endpoint_message ( struct usb_endpoint *ep,
  1071. struct io_buffer *iobuf ) {
  1072. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  1073. struct ehci_device *ehci = endpoint->ehci;
  1074. struct usb_setup_packet *packet;
  1075. unsigned int input;
  1076. struct ehci_transfer xfers[3];
  1077. struct ehci_transfer *xfer = xfers;
  1078. size_t len;
  1079. int rc;
  1080. /* Construct setup stage */
  1081. assert ( iob_len ( iobuf ) >= sizeof ( *packet ) );
  1082. packet = iobuf->data;
  1083. iob_pull ( iobuf, sizeof ( *packet ) );
  1084. xfer->data = packet;
  1085. xfer->len = sizeof ( *packet );
  1086. xfer->flags = EHCI_FL_PID_SETUP;
  1087. xfer++;
  1088. /* Construct data stage, if applicable */
  1089. len = iob_len ( iobuf );
  1090. input = ( packet->request & cpu_to_le16 ( USB_DIR_IN ) );
  1091. if ( len ) {
  1092. xfer->data = iobuf->data;
  1093. xfer->len = len;
  1094. xfer->flags = ( EHCI_FL_TOGGLE |
  1095. ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
  1096. xfer++;
  1097. }
  1098. /* Construct status stage */
  1099. xfer->data = NULL;
  1100. xfer->len = 0;
  1101. xfer->flags = ( EHCI_FL_TOGGLE | EHCI_FL_IOC |
  1102. ( ( len && input ) ? EHCI_FL_PID_OUT : EHCI_FL_PID_IN));
  1103. xfer++;
  1104. /* Enqueue transfer */
  1105. if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
  1106. ( xfer - xfers ) ) ) != 0 )
  1107. return rc;
  1108. return 0;
  1109. }
  1110. /**
  1111. * Calculate number of transfer descriptors
  1112. *
  1113. * @v len Length of data
  1114. * @v zlp Append a zero-length packet
  1115. * @ret count Number of transfer descriptors
  1116. */
  1117. static unsigned int ehci_endpoint_count ( size_t len, int zlp ) {
  1118. unsigned int count;
  1119. /* Split into 16kB transfers. A single transfer can handle up
  1120. * to 20kB if it happens to be page-aligned, or up to 16kB
  1121. * with arbitrary alignment. We simplify the code by assuming
  1122. * that we can fit only 16kB into each transfer.
  1123. */
  1124. count = ( ( len + EHCI_MTU - 1 ) / EHCI_MTU );
  1125. /* Append a zero-length transfer if applicable */
  1126. if ( zlp || ( count == 0 ) )
  1127. count++;
  1128. return count;
  1129. }
  1130. /**
  1131. * Enqueue stream transfer
  1132. *
  1133. * @v ep USB endpoint
  1134. * @v iobuf I/O buffer
  1135. * @v zlp Append a zero-length packet
  1136. * @ret rc Return status code
  1137. */
  1138. static int ehci_endpoint_stream ( struct usb_endpoint *ep,
  1139. struct io_buffer *iobuf, int zlp ) {
  1140. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  1141. struct ehci_device *ehci = endpoint->ehci;
  1142. void *data = iobuf->data;
  1143. size_t len = iob_len ( iobuf );
  1144. unsigned int count = ehci_endpoint_count ( len, zlp );
  1145. unsigned int input = ( ep->address & USB_DIR_IN );
  1146. unsigned int flags = ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT );
  1147. struct ehci_transfer xfers[count];
  1148. struct ehci_transfer *xfer = xfers;
  1149. size_t xfer_len;
  1150. unsigned int i;
  1151. int rc;
  1152. /* Create transfers */
  1153. for ( i = 0 ; i < count ; i++ ) {
  1154. /* Calculate transfer length */
  1155. xfer_len = EHCI_MTU;
  1156. if ( xfer_len > len )
  1157. xfer_len = len;
  1158. /* Create transfer */
  1159. xfer->data = data;
  1160. xfer->len = xfer_len;
  1161. xfer->flags = flags;
  1162. /* Move to next transfer */
  1163. data += xfer_len;
  1164. len -= xfer_len;
  1165. xfer++;
  1166. }
  1167. xfer[-1].flags |= EHCI_FL_IOC;
  1168. /* Enqueue transfer */
  1169. if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
  1170. count ) ) != 0 )
  1171. return rc;
  1172. return 0;
  1173. }
  1174. /**
  1175. * Poll for completions
  1176. *
  1177. * @v endpoint Endpoint
  1178. */
  1179. static void ehci_endpoint_poll ( struct ehci_endpoint *endpoint ) {
  1180. struct ehci_device *ehci = endpoint->ehci;
  1181. struct ehci_ring *ring = &endpoint->ring;
  1182. struct ehci_transfer_descriptor *desc;
  1183. struct usb_endpoint *ep = endpoint->ep;
  1184. struct usb_device *usb = ep->usb;
  1185. struct io_buffer *iobuf;
  1186. unsigned int index;
  1187. unsigned int status;
  1188. int rc;
  1189. /* Consume all completed descriptors */
  1190. while ( ehci_ring_fill ( &endpoint->ring ) ) {
  1191. /* Stop if we reach an uncompleted descriptor */
  1192. rmb();
  1193. index = ( ring->cons % EHCI_RING_COUNT );
  1194. desc = &ring->desc[index];
  1195. status = desc->status;
  1196. if ( status & EHCI_STATUS_ACTIVE )
  1197. break;
  1198. /* Consume this descriptor */
  1199. iobuf = ehci_dequeue ( ring );
  1200. /* If we have encountered an error, then consume all
  1201. * remaining descriptors in this transaction, report
  1202. * the error to the USB core, and stop further
  1203. * processing.
  1204. */
  1205. if ( status & EHCI_STATUS_HALTED ) {
  1206. rc = -EIO_STATUS ( status );
  1207. DBGC ( ehci, "EHCI %s %s completion %d failed (status "
  1208. "%02x): %s\n", usb->name,
  1209. usb_endpoint_name ( ep ), index, status,
  1210. strerror ( rc ) );
  1211. while ( ! iobuf )
  1212. iobuf = ehci_dequeue ( ring );
  1213. usb_complete_err ( endpoint->ep, iobuf, rc );
  1214. return;
  1215. }
  1216. /* Accumulate residual data count */
  1217. ring->residual += ( le16_to_cpu ( desc->len ) & EHCI_LEN_MASK );
  1218. /* If this is not the end of a transaction (i.e. has
  1219. * no I/O buffer), then continue to next descriptor.
  1220. */
  1221. if ( ! iobuf )
  1222. continue;
  1223. /* Update I/O buffer length */
  1224. iob_unput ( iobuf, ring->residual );
  1225. ring->residual = 0;
  1226. /* Report completion to USB core */
  1227. usb_complete ( endpoint->ep, iobuf );
  1228. }
  1229. }
  1230. /******************************************************************************
  1231. *
  1232. * Device operations
  1233. *
  1234. ******************************************************************************
  1235. */
  1236. /**
  1237. * Open device
  1238. *
  1239. * @v usb USB device
  1240. * @ret rc Return status code
  1241. */
  1242. static int ehci_device_open ( struct usb_device *usb ) {
  1243. struct ehci_device *ehci = usb_bus_get_hostdata ( usb->port->hub->bus );
  1244. usb_set_hostdata ( usb, ehci );
  1245. return 0;
  1246. }
  1247. /**
  1248. * Close device
  1249. *
  1250. * @v usb USB device
  1251. */
  1252. static void ehci_device_close ( struct usb_device *usb ) {
  1253. struct ehci_device *ehci = usb_get_hostdata ( usb );
  1254. struct usb_bus *bus = ehci->bus;
  1255. /* Free device address, if assigned */
  1256. if ( usb->address )
  1257. usb_free_address ( bus, usb->address );
  1258. }
  1259. /**
  1260. * Assign device address
  1261. *
  1262. * @v usb USB device
  1263. * @ret rc Return status code
  1264. */
  1265. static int ehci_device_address ( struct usb_device *usb ) {
  1266. struct ehci_device *ehci = usb_get_hostdata ( usb );
  1267. struct usb_bus *bus = ehci->bus;
  1268. struct usb_endpoint *ep0 = usb_endpoint ( usb, USB_EP0_ADDRESS );
  1269. int address;
  1270. int rc;
  1271. /* Sanity checks */
  1272. assert ( usb->address == 0 );
  1273. assert ( ep0 != NULL );
  1274. /* Allocate device address */
  1275. address = usb_alloc_address ( bus );
  1276. if ( address < 0 ) {
  1277. rc = address;
  1278. DBGC ( ehci, "EHCI %s could not allocate address: %s\n",
  1279. usb->name, strerror ( rc ) );
  1280. goto err_alloc_address;
  1281. }
  1282. /* Set address */
  1283. if ( ( rc = usb_set_address ( usb, address ) ) != 0 )
  1284. goto err_set_address;
  1285. /* Update device address */
  1286. usb->address = address;
  1287. /* Update control endpoint characteristics and capabilities */
  1288. ehci_endpoint_update ( ep0 );
  1289. return 0;
  1290. err_set_address:
  1291. usb_free_address ( bus, address );
  1292. err_alloc_address:
  1293. return rc;
  1294. }
  1295. /******************************************************************************
  1296. *
  1297. * Hub operations
  1298. *
  1299. ******************************************************************************
  1300. */
  1301. /**
  1302. * Open hub
  1303. *
  1304. * @v hub USB hub
  1305. * @ret rc Return status code
  1306. */
  1307. static int ehci_hub_open ( struct usb_hub *hub __unused ) {
  1308. /* Nothing to do */
  1309. return 0;
  1310. }
  1311. /**
  1312. * Close hub
  1313. *
  1314. * @v hub USB hub
  1315. */
  1316. static void ehci_hub_close ( struct usb_hub *hub __unused ) {
  1317. /* Nothing to do */
  1318. }
  1319. /******************************************************************************
  1320. *
  1321. * Root hub operations
  1322. *
  1323. ******************************************************************************
  1324. */
  1325. /**
  1326. * Open root hub
  1327. *
  1328. * @v hub USB hub
  1329. * @ret rc Return status code
  1330. */
  1331. static int ehci_root_open ( struct usb_hub *hub ) {
  1332. struct usb_bus *bus = hub->bus;
  1333. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1334. uint32_t portsc;
  1335. unsigned int i;
  1336. /* Route all ports to EHCI controller */
  1337. writel ( EHCI_CONFIGFLAG_CF, ehci->op + EHCI_OP_CONFIGFLAG );
  1338. /* Enable power to all ports */
  1339. for ( i = 1 ; i <= ehci->ports ; i++ ) {
  1340. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( i ) );
  1341. portsc &= ~EHCI_PORTSC_CHANGE;
  1342. portsc |= EHCI_PORTSC_PP;
  1343. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( i ) );
  1344. }
  1345. /* Wait 20ms after potentially enabling power to a port */
  1346. mdelay ( EHCI_PORT_POWER_DELAY_MS );
  1347. /* Record hub driver private data */
  1348. usb_hub_set_drvdata ( hub, ehci );
  1349. return 0;
  1350. }
  1351. /**
  1352. * Close root hub
  1353. *
  1354. * @v hub USB hub
  1355. */
  1356. static void ehci_root_close ( struct usb_hub *hub ) {
  1357. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1358. /* Route all ports back to companion controllers */
  1359. writel ( 0, ehci->op + EHCI_OP_CONFIGFLAG );
  1360. /* Clear hub driver private data */
  1361. usb_hub_set_drvdata ( hub, NULL );
  1362. }
  1363. /**
  1364. * Enable port
  1365. *
  1366. * @v hub USB hub
  1367. * @v port USB port
  1368. * @ret rc Return status code
  1369. */
  1370. static int ehci_root_enable ( struct usb_hub *hub, struct usb_port *port ) {
  1371. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1372. uint32_t portsc;
  1373. unsigned int line;
  1374. unsigned int i;
  1375. /* Check for a low-speed device */
  1376. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1377. line = EHCI_PORTSC_LINE_STATUS ( portsc );
  1378. if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
  1379. DBGC ( ehci, "EHCI %s-%d detected low-speed device: "
  1380. "disowning\n", ehci->name, port->address );
  1381. goto disown;
  1382. }
  1383. /* Reset port */
  1384. portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
  1385. portsc |= EHCI_PORTSC_PR;
  1386. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1387. mdelay ( USB_RESET_DELAY_MS );
  1388. portsc &= ~EHCI_PORTSC_PR;
  1389. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1390. /* Wait for reset to complete */
  1391. for ( i = 0 ; i < EHCI_PORT_RESET_MAX_WAIT_MS ; i++ ) {
  1392. /* Check port status */
  1393. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1394. if ( ! ( portsc & EHCI_PORTSC_PR ) ) {
  1395. if ( portsc & EHCI_PORTSC_PED )
  1396. return 0;
  1397. DBGC ( ehci, "EHCI %s-%d not enabled after reset: "
  1398. "disowning\n", ehci->name, port->address );
  1399. goto disown;
  1400. }
  1401. /* Delay */
  1402. mdelay ( 1 );
  1403. }
  1404. DBGC ( ehci, "EHCI %s-%d timed out waiting for port to reset\n",
  1405. ehci->name, port->address );
  1406. return -ETIMEDOUT;
  1407. disown:
  1408. /* Disown port */
  1409. portsc &= ~EHCI_PORTSC_CHANGE;
  1410. portsc |= EHCI_PORTSC_OWNER;
  1411. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1412. /* Delay to allow child companion controllers to settle */
  1413. mdelay ( EHCI_DISOWN_DELAY_MS );
  1414. /* Poll child companion controllers */
  1415. ehci_poll_companions ( ehci );
  1416. return -ENODEV;
  1417. }
  1418. /**
  1419. * Disable port
  1420. *
  1421. * @v hub USB hub
  1422. * @v port USB port
  1423. * @ret rc Return status code
  1424. */
  1425. static int ehci_root_disable ( struct usb_hub *hub, struct usb_port *port ) {
  1426. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1427. uint32_t portsc;
  1428. /* Disable port */
  1429. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1430. portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
  1431. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1432. return 0;
  1433. }
  1434. /**
  1435. * Update root hub port speed
  1436. *
  1437. * @v hub USB hub
  1438. * @v port USB port
  1439. * @ret rc Return status code
  1440. */
  1441. static int ehci_root_speed ( struct usb_hub *hub, struct usb_port *port ) {
  1442. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1443. uint32_t portsc;
  1444. unsigned int speed;
  1445. unsigned int line;
  1446. int ccs;
  1447. int csc;
  1448. int ped;
  1449. /* Read port status */
  1450. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1451. DBGC2 ( ehci, "EHCI %s-%d status is %08x\n",
  1452. ehci->name, port->address, portsc );
  1453. ccs = ( portsc & EHCI_PORTSC_CCS );
  1454. csc = ( portsc & EHCI_PORTSC_CSC );
  1455. ped = ( portsc & EHCI_PORTSC_PED );
  1456. line = EHCI_PORTSC_LINE_STATUS ( portsc );
  1457. /* Record disconnections and clear changes */
  1458. port->disconnected |= csc;
  1459. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1460. /* Determine port speed */
  1461. if ( ! ccs ) {
  1462. /* Port not connected */
  1463. speed = USB_SPEED_NONE;
  1464. } else if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
  1465. /* Detected as low-speed */
  1466. speed = USB_SPEED_LOW;
  1467. } else if ( ped ) {
  1468. /* Port already enabled: must be high-speed */
  1469. speed = USB_SPEED_HIGH;
  1470. } else {
  1471. /* Not low-speed and not yet enabled. Could be either
  1472. * full-speed or high-speed; we can't yet tell.
  1473. */
  1474. speed = USB_SPEED_FULL;
  1475. }
  1476. port->speed = speed;
  1477. return 0;
  1478. }
  1479. /**
  1480. * Clear transaction translator buffer
  1481. *
  1482. * @v hub USB hub
  1483. * @v port USB port
  1484. * @v ep USB endpoint
  1485. * @ret rc Return status code
  1486. */
  1487. static int ehci_root_clear_tt ( struct usb_hub *hub, struct usb_port *port,
  1488. struct usb_endpoint *ep ) {
  1489. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1490. /* Should never be called; this is a root hub */
  1491. DBGC ( ehci, "EHCI %s-%d nonsensical CLEAR_TT for %s %s\n", ehci->name,
  1492. port->address, ep->usb->name, usb_endpoint_name ( ep ) );
  1493. return -ENOTSUP;
  1494. }
  1495. /**
  1496. * Poll for port status changes
  1497. *
  1498. * @v hub USB hub
  1499. * @v port USB port
  1500. */
  1501. static void ehci_root_poll ( struct usb_hub *hub, struct usb_port *port ) {
  1502. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1503. uint32_t portsc;
  1504. uint32_t change;
  1505. /* Do nothing unless something has changed */
  1506. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1507. change = ( portsc & EHCI_PORTSC_CHANGE );
  1508. if ( ! change )
  1509. return;
  1510. /* Record disconnections and clear changes */
  1511. port->disconnected |= ( portsc & EHCI_PORTSC_CSC );
  1512. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1513. /* Report port status change */
  1514. usb_port_changed ( port );
  1515. }
  1516. /******************************************************************************
  1517. *
  1518. * Bus operations
  1519. *
  1520. ******************************************************************************
  1521. */
  1522. /**
  1523. * Open USB bus
  1524. *
  1525. * @v bus USB bus
  1526. * @ret rc Return status code
  1527. */
  1528. static int ehci_bus_open ( struct usb_bus *bus ) {
  1529. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1530. unsigned int frames;
  1531. size_t len;
  1532. int rc;
  1533. /* Sanity checks */
  1534. assert ( list_empty ( &ehci->async ) );
  1535. assert ( list_empty ( &ehci->periodic ) );
  1536. /* Allocate and initialise asynchronous queue head */
  1537. ehci->head = malloc_dma ( sizeof ( *ehci->head ),
  1538. ehci_align ( sizeof ( *ehci->head ) ) );
  1539. if ( ! ehci->head ) {
  1540. rc = -ENOMEM;
  1541. goto err_alloc_head;
  1542. }
  1543. memset ( ehci->head, 0, sizeof ( *ehci->head ) );
  1544. ehci->head->chr = cpu_to_le32 ( EHCI_CHR_HEAD );
  1545. ehci->head->cache.next = cpu_to_le32 ( EHCI_LINK_TERMINATE );
  1546. ehci->head->cache.status = EHCI_STATUS_HALTED;
  1547. ehci_async_schedule ( ehci );
  1548. writel ( virt_to_phys ( ehci->head ),
  1549. ehci->op + EHCI_OP_ASYNCLISTADDR );
  1550. /* Use async queue head to determine control data structure segment */
  1551. ehci->ctrldssegment =
  1552. ( ( ( uint64_t ) virt_to_phys ( ehci->head ) ) >> 32 );
  1553. if ( ehci->addr64 ) {
  1554. writel ( ehci->ctrldssegment, ehci->op + EHCI_OP_CTRLDSSEGMENT);
  1555. } else if ( ehci->ctrldssegment ) {
  1556. DBGC ( ehci, "EHCI %s CTRLDSSEGMENT not supported\n",
  1557. ehci->name );
  1558. rc = -ENOTSUP;
  1559. goto err_ctrldssegment;
  1560. }
  1561. /* Allocate periodic frame list */
  1562. frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  1563. len = ( frames * sizeof ( ehci->frame[0] ) );
  1564. ehci->frame = malloc_dma ( len, EHCI_PAGE_ALIGN );
  1565. if ( ! ehci->frame ) {
  1566. rc = -ENOMEM;
  1567. goto err_alloc_frame;
  1568. }
  1569. if ( ( rc = ehci_ctrl_reachable ( ehci, ehci->frame ) ) != 0 ) {
  1570. DBGC ( ehci, "EHCI %s frame list unreachable\n", ehci->name );
  1571. goto err_unreachable_frame;
  1572. }
  1573. ehci_periodic_schedule ( ehci );
  1574. writel ( virt_to_phys ( ehci->frame ),
  1575. ehci->op + EHCI_OP_PERIODICLISTBASE );
  1576. /* Start controller */
  1577. ehci_run ( ehci );
  1578. return 0;
  1579. ehci_stop ( ehci );
  1580. err_unreachable_frame:
  1581. free_dma ( ehci->frame, len );
  1582. err_alloc_frame:
  1583. err_ctrldssegment:
  1584. free_dma ( ehci->head, sizeof ( *ehci->head ) );
  1585. err_alloc_head:
  1586. return rc;
  1587. }
  1588. /**
  1589. * Close USB bus
  1590. *
  1591. * @v bus USB bus
  1592. */
  1593. static void ehci_bus_close ( struct usb_bus *bus ) {
  1594. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1595. unsigned int frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  1596. /* Sanity checks */
  1597. assert ( list_empty ( &ehci->async ) );
  1598. assert ( list_empty ( &ehci->periodic ) );
  1599. /* Stop controller */
  1600. ehci_stop ( ehci );
  1601. /* Free periodic frame list */
  1602. free_dma ( ehci->frame, ( frames * sizeof ( ehci->frame[0] ) ) );
  1603. /* Free asynchronous schedule */
  1604. free_dma ( ehci->head, sizeof ( *ehci->head ) );
  1605. }
  1606. /**
  1607. * Poll USB bus
  1608. *
  1609. * @v bus USB bus
  1610. */
  1611. static void ehci_bus_poll ( struct usb_bus *bus ) {
  1612. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1613. struct usb_hub *hub = bus->hub;
  1614. struct ehci_endpoint *endpoint;
  1615. unsigned int i;
  1616. uint32_t usbsts;
  1617. uint32_t change;
  1618. /* Do nothing unless something has changed */
  1619. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  1620. assert ( usbsts & EHCI_USBSTS_ASYNC );
  1621. assert ( usbsts & EHCI_USBSTS_PERIODIC );
  1622. assert ( ! ( usbsts & EHCI_USBSTS_HCH ) );
  1623. change = ( usbsts & EHCI_USBSTS_CHANGE );
  1624. if ( ! change )
  1625. return;
  1626. /* Acknowledge changes */
  1627. writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
  1628. /* Process completions, if applicable */
  1629. if ( change & ( EHCI_USBSTS_USBINT | EHCI_USBSTS_USBERRINT ) ) {
  1630. /* Iterate over all endpoints looking for completed
  1631. * descriptors. We trust that completion handlers are
  1632. * minimal and will not do anything that could
  1633. * plausibly affect the endpoint list itself.
  1634. */
  1635. list_for_each_entry ( endpoint, &ehci->endpoints, list )
  1636. ehci_endpoint_poll ( endpoint );
  1637. }
  1638. /* Process port status changes, if applicable */
  1639. if ( change & EHCI_USBSTS_PORT ) {
  1640. /* Iterate over all ports looking for status changes */
  1641. for ( i = 1 ; i <= ehci->ports ; i++ )
  1642. ehci_root_poll ( hub, usb_port ( hub, i ) );
  1643. }
  1644. /* Report fatal errors */
  1645. if ( change & EHCI_USBSTS_SYSERR )
  1646. DBGC ( ehci, "EHCI %s host system error\n", ehci->name );
  1647. }
  1648. /******************************************************************************
  1649. *
  1650. * PCI interface
  1651. *
  1652. ******************************************************************************
  1653. */
  1654. /** USB host controller operations */
  1655. static struct usb_host_operations ehci_operations = {
  1656. .endpoint = {
  1657. .open = ehci_endpoint_open,
  1658. .close = ehci_endpoint_close,
  1659. .reset = ehci_endpoint_reset,
  1660. .mtu = ehci_endpoint_mtu,
  1661. .message = ehci_endpoint_message,
  1662. .stream = ehci_endpoint_stream,
  1663. },
  1664. .device = {
  1665. .open = ehci_device_open,
  1666. .close = ehci_device_close,
  1667. .address = ehci_device_address,
  1668. },
  1669. .bus = {
  1670. .open = ehci_bus_open,
  1671. .close = ehci_bus_close,
  1672. .poll = ehci_bus_poll,
  1673. },
  1674. .hub = {
  1675. .open = ehci_hub_open,
  1676. .close = ehci_hub_close,
  1677. },
  1678. .root = {
  1679. .open = ehci_root_open,
  1680. .close = ehci_root_close,
  1681. .enable = ehci_root_enable,
  1682. .disable = ehci_root_disable,
  1683. .speed = ehci_root_speed,
  1684. .clear_tt = ehci_root_clear_tt,
  1685. },
  1686. };
  1687. /**
  1688. * Probe PCI device
  1689. *
  1690. * @v pci PCI device
  1691. * @ret rc Return status code
  1692. */
  1693. static int ehci_probe ( struct pci_device *pci ) {
  1694. struct ehci_device *ehci;
  1695. struct usb_port *port;
  1696. unsigned long bar_start;
  1697. size_t bar_size;
  1698. unsigned int i;
  1699. int rc;
  1700. /* Allocate and initialise structure */
  1701. ehci = zalloc ( sizeof ( *ehci ) );
  1702. if ( ! ehci ) {
  1703. rc = -ENOMEM;
  1704. goto err_alloc;
  1705. }
  1706. ehci->name = pci->dev.name;
  1707. INIT_LIST_HEAD ( &ehci->endpoints );
  1708. INIT_LIST_HEAD ( &ehci->async );
  1709. INIT_LIST_HEAD ( &ehci->periodic );
  1710. /* Fix up PCI device */
  1711. adjust_pci_device ( pci );
  1712. /* Map registers */
  1713. bar_start = pci_bar_start ( pci, EHCI_BAR );
  1714. bar_size = pci_bar_size ( pci, EHCI_BAR );
  1715. ehci->regs = ioremap ( bar_start, bar_size );
  1716. if ( ! ehci->regs ) {
  1717. rc = -ENODEV;
  1718. goto err_ioremap;
  1719. }
  1720. /* Initialise EHCI device */
  1721. ehci_init ( ehci, ehci->regs );
  1722. /* Initialise USB legacy support and claim ownership */
  1723. ehci_legacy_init ( ehci, pci );
  1724. ehci_legacy_claim ( ehci, pci );
  1725. /* Reset device */
  1726. if ( ( rc = ehci_reset ( ehci ) ) != 0 )
  1727. goto err_reset;
  1728. /* Allocate USB bus */
  1729. ehci->bus = alloc_usb_bus ( &pci->dev, ehci->ports, EHCI_MTU,
  1730. &ehci_operations );
  1731. if ( ! ehci->bus ) {
  1732. rc = -ENOMEM;
  1733. goto err_alloc_bus;
  1734. }
  1735. usb_bus_set_hostdata ( ehci->bus, ehci );
  1736. usb_hub_set_drvdata ( ehci->bus->hub, ehci );
  1737. /* Set port protocols */
  1738. for ( i = 1 ; i <= ehci->ports ; i++ ) {
  1739. port = usb_port ( ehci->bus->hub, i );
  1740. port->protocol = USB_PROTO_2_0;
  1741. }
  1742. /* Register USB bus */
  1743. if ( ( rc = register_usb_bus ( ehci->bus ) ) != 0 )
  1744. goto err_register;
  1745. pci_set_drvdata ( pci, ehci );
  1746. return 0;
  1747. unregister_usb_bus ( ehci->bus );
  1748. err_register:
  1749. free_usb_bus ( ehci->bus );
  1750. err_alloc_bus:
  1751. ehci_reset ( ehci );
  1752. err_reset:
  1753. ehci_legacy_release ( ehci, pci );
  1754. iounmap ( ehci->regs );
  1755. err_ioremap:
  1756. free ( ehci );
  1757. err_alloc:
  1758. return rc;
  1759. }
  1760. /**
  1761. * Remove PCI device
  1762. *
  1763. * @v pci PCI device
  1764. */
  1765. static void ehci_remove ( struct pci_device *pci ) {
  1766. struct ehci_device *ehci = pci_get_drvdata ( pci );
  1767. struct usb_bus *bus = ehci->bus;
  1768. unregister_usb_bus ( bus );
  1769. assert ( list_empty ( &ehci->async ) );
  1770. assert ( list_empty ( &ehci->periodic ) );
  1771. free_usb_bus ( bus );
  1772. ehci_reset ( ehci );
  1773. ehci_legacy_release ( ehci, pci );
  1774. iounmap ( ehci->regs );
  1775. free ( ehci );
  1776. }
  1777. /** EHCI PCI device IDs */
  1778. static struct pci_device_id ehci_ids[] = {
  1779. PCI_ROM ( 0xffff, 0xffff, "ehci", "EHCI", 0 ),
  1780. };
  1781. /** EHCI PCI driver */
  1782. struct pci_driver ehci_driver __pci_driver = {
  1783. .ids = ehci_ids,
  1784. .id_count = ( sizeof ( ehci_ids ) / sizeof ( ehci_ids[0] ) ),
  1785. .class = PCI_CLASS_ID ( PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB,
  1786. PCI_CLASS_SERIAL_USB_EHCI ),
  1787. .probe = ehci_probe,
  1788. .remove = ehci_remove,
  1789. };
  1790. /**
  1791. * Prepare for exit
  1792. *
  1793. * @v booting System is shutting down for OS boot
  1794. */
  1795. static void ehci_shutdown ( int booting ) {
  1796. /* If we are shutting down to boot an OS, then prevent the
  1797. * release of ownership back to BIOS.
  1798. */
  1799. ehci_legacy_prevent_release = booting;
  1800. }
  1801. /** Startup/shutdown function */
  1802. struct startup_fn ehci_startup __startup_fn ( STARTUP_LATE ) = {
  1803. .shutdown = ehci_shutdown,
  1804. };