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arbel.c 76KB

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  1. /*
  2. * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * Based in part upon the original driver by Mellanox Technologies
  5. * Ltd. Portions may be Copyright (c) Mellanox Technologies Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of the
  10. * License, or any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. FILE_LICENCE ( GPL2_OR_LATER );
  22. #include <stdint.h>
  23. #include <stdlib.h>
  24. #include <stdio.h>
  25. #include <string.h>
  26. #include <strings.h>
  27. #include <unistd.h>
  28. #include <errno.h>
  29. #include <byteswap.h>
  30. #include <ipxe/io.h>
  31. #include <ipxe/pci.h>
  32. #include <ipxe/malloc.h>
  33. #include <ipxe/umalloc.h>
  34. #include <ipxe/iobuf.h>
  35. #include <ipxe/netdevice.h>
  36. #include <ipxe/infiniband.h>
  37. #include <ipxe/ib_smc.h>
  38. #include "arbel.h"
  39. /**
  40. * @file
  41. *
  42. * Mellanox Arbel Infiniband HCA
  43. *
  44. */
  45. /***************************************************************************
  46. *
  47. * Queue number allocation
  48. *
  49. ***************************************************************************
  50. */
  51. /**
  52. * Allocate offset within usage bitmask
  53. *
  54. * @v bits Usage bitmask
  55. * @v bits_len Length of usage bitmask
  56. * @ret bit First free bit within bitmask, or negative error
  57. */
  58. static int arbel_bitmask_alloc ( arbel_bitmask_t *bits,
  59. unsigned int bits_len ) {
  60. unsigned int bit = 0;
  61. arbel_bitmask_t mask = 1;
  62. while ( bit < bits_len ) {
  63. if ( ( mask & *bits ) == 0 ) {
  64. *bits |= mask;
  65. return bit;
  66. }
  67. bit++;
  68. mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
  69. if ( mask == 1 )
  70. bits++;
  71. }
  72. return -ENFILE;
  73. }
  74. /**
  75. * Free offset within usage bitmask
  76. *
  77. * @v bits Usage bitmask
  78. * @v bit Bit within bitmask
  79. */
  80. static void arbel_bitmask_free ( arbel_bitmask_t *bits, int bit ) {
  81. arbel_bitmask_t mask;
  82. mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
  83. bits += ( bit / ( 8 * sizeof ( mask ) ) );
  84. *bits &= ~mask;
  85. }
  86. /***************************************************************************
  87. *
  88. * HCA commands
  89. *
  90. ***************************************************************************
  91. */
  92. /**
  93. * Wait for Arbel command completion
  94. *
  95. * @v arbel Arbel device
  96. * @ret rc Return status code
  97. */
  98. static int arbel_cmd_wait ( struct arbel *arbel,
  99. struct arbelprm_hca_command_register *hcr ) {
  100. unsigned int wait;
  101. for ( wait = ARBEL_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  102. hcr->u.dwords[6] =
  103. readl ( arbel->config + ARBEL_HCR_REG ( 6 ) );
  104. if ( MLX_GET ( hcr, go ) == 0 )
  105. return 0;
  106. mdelay ( 1 );
  107. }
  108. return -EBUSY;
  109. }
  110. /**
  111. * Issue HCA command
  112. *
  113. * @v arbel Arbel device
  114. * @v command Command opcode, flags and input/output lengths
  115. * @v op_mod Opcode modifier (0 if no modifier applicable)
  116. * @v in Input parameters
  117. * @v in_mod Input modifier (0 if no modifier applicable)
  118. * @v out Output parameters
  119. * @ret rc Return status code
  120. */
  121. static int arbel_cmd ( struct arbel *arbel, unsigned long command,
  122. unsigned int op_mod, const void *in,
  123. unsigned int in_mod, void *out ) {
  124. struct arbelprm_hca_command_register hcr;
  125. unsigned int opcode = ARBEL_HCR_OPCODE ( command );
  126. size_t in_len = ARBEL_HCR_IN_LEN ( command );
  127. size_t out_len = ARBEL_HCR_OUT_LEN ( command );
  128. void *in_buffer;
  129. void *out_buffer;
  130. unsigned int status;
  131. unsigned int i;
  132. int rc;
  133. assert ( in_len <= ARBEL_MBOX_SIZE );
  134. assert ( out_len <= ARBEL_MBOX_SIZE );
  135. DBGC2 ( arbel, "Arbel %p command %02x in %zx%s out %zx%s\n",
  136. arbel, opcode, in_len,
  137. ( ( command & ARBEL_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  138. ( ( command & ARBEL_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  139. /* Check that HCR is free */
  140. if ( ( rc = arbel_cmd_wait ( arbel, &hcr ) ) != 0 ) {
  141. DBGC ( arbel, "Arbel %p command interface locked\n", arbel );
  142. return rc;
  143. }
  144. /* Prepare HCR */
  145. memset ( &hcr, 0, sizeof ( hcr ) );
  146. in_buffer = &hcr.u.dwords[0];
  147. if ( in_len && ( command & ARBEL_HCR_IN_MBOX ) ) {
  148. in_buffer = arbel->mailbox_in;
  149. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  150. }
  151. memcpy ( in_buffer, in, in_len );
  152. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  153. out_buffer = &hcr.u.dwords[3];
  154. if ( out_len && ( command & ARBEL_HCR_OUT_MBOX ) ) {
  155. out_buffer = arbel->mailbox_out;
  156. MLX_FILL_1 ( &hcr, 4, out_param_l,
  157. virt_to_bus ( out_buffer ) );
  158. }
  159. MLX_FILL_3 ( &hcr, 6,
  160. opcode, opcode,
  161. opcode_modifier, op_mod,
  162. go, 1 );
  163. DBGC ( arbel, "Arbel %p issuing command %04x\n", arbel, opcode );
  164. DBGC2_HDA ( arbel, virt_to_phys ( arbel->config + ARBEL_HCR_BASE ),
  165. &hcr, sizeof ( hcr ) );
  166. if ( in_len && ( command & ARBEL_HCR_IN_MBOX ) ) {
  167. DBGC2 ( arbel, "Input mailbox:\n" );
  168. DBGC2_HDA ( arbel, virt_to_phys ( in_buffer ), in_buffer,
  169. ( ( in_len < 512 ) ? in_len : 512 ) );
  170. }
  171. /* Issue command */
  172. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  173. i++ ) {
  174. writel ( hcr.u.dwords[i],
  175. arbel->config + ARBEL_HCR_REG ( i ) );
  176. barrier();
  177. }
  178. /* Wait for command completion */
  179. if ( ( rc = arbel_cmd_wait ( arbel, &hcr ) ) != 0 ) {
  180. DBGC ( arbel, "Arbel %p timed out waiting for command:\n",
  181. arbel );
  182. DBGC_HD ( arbel, &hcr, sizeof ( hcr ) );
  183. return rc;
  184. }
  185. /* Check command status */
  186. status = MLX_GET ( &hcr, status );
  187. if ( status != 0 ) {
  188. DBGC ( arbel, "Arbel %p command failed with status %02x:\n",
  189. arbel, status );
  190. DBGC_HD ( arbel, &hcr, sizeof ( hcr ) );
  191. return -EIO;
  192. }
  193. /* Read output parameters, if any */
  194. hcr.u.dwords[3] = readl ( arbel->config + ARBEL_HCR_REG ( 3 ) );
  195. hcr.u.dwords[4] = readl ( arbel->config + ARBEL_HCR_REG ( 4 ) );
  196. memcpy ( out, out_buffer, out_len );
  197. if ( out_len ) {
  198. DBGC2 ( arbel, "Output%s:\n",
  199. ( command & ARBEL_HCR_OUT_MBOX ) ? " mailbox" : "" );
  200. DBGC2_HDA ( arbel, virt_to_phys ( out_buffer ), out_buffer,
  201. ( ( out_len < 512 ) ? out_len : 512 ) );
  202. }
  203. return 0;
  204. }
  205. static inline int
  206. arbel_cmd_query_dev_lim ( struct arbel *arbel,
  207. struct arbelprm_query_dev_lim *dev_lim ) {
  208. return arbel_cmd ( arbel,
  209. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_DEV_LIM,
  210. 1, sizeof ( *dev_lim ) ),
  211. 0, NULL, 0, dev_lim );
  212. }
  213. static inline int
  214. arbel_cmd_query_fw ( struct arbel *arbel, struct arbelprm_query_fw *fw ) {
  215. return arbel_cmd ( arbel,
  216. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_FW,
  217. 1, sizeof ( *fw ) ),
  218. 0, NULL, 0, fw );
  219. }
  220. static inline int
  221. arbel_cmd_init_hca ( struct arbel *arbel,
  222. const struct arbelprm_init_hca *init_hca ) {
  223. return arbel_cmd ( arbel,
  224. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT_HCA,
  225. 1, sizeof ( *init_hca ) ),
  226. 0, init_hca, 0, NULL );
  227. }
  228. static inline int
  229. arbel_cmd_close_hca ( struct arbel *arbel ) {
  230. return arbel_cmd ( arbel,
  231. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CLOSE_HCA ),
  232. 0, NULL, 0, NULL );
  233. }
  234. static inline int
  235. arbel_cmd_init_ib ( struct arbel *arbel, unsigned int port,
  236. const struct arbelprm_init_ib *init_ib ) {
  237. return arbel_cmd ( arbel,
  238. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT_IB,
  239. 1, sizeof ( *init_ib ) ),
  240. 0, init_ib, port, NULL );
  241. }
  242. static inline int
  243. arbel_cmd_close_ib ( struct arbel *arbel, unsigned int port ) {
  244. return arbel_cmd ( arbel,
  245. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CLOSE_IB ),
  246. 0, NULL, port, NULL );
  247. }
  248. static inline int
  249. arbel_cmd_sw2hw_mpt ( struct arbel *arbel, unsigned int index,
  250. const struct arbelprm_mpt *mpt ) {
  251. return arbel_cmd ( arbel,
  252. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_MPT,
  253. 1, sizeof ( *mpt ) ),
  254. 0, mpt, index, NULL );
  255. }
  256. static inline int
  257. arbel_cmd_map_eq ( struct arbel *arbel, unsigned long index_map,
  258. const struct arbelprm_event_mask *mask ) {
  259. return arbel_cmd ( arbel,
  260. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_EQ,
  261. 0, sizeof ( *mask ) ),
  262. 0, mask, index_map, NULL );
  263. }
  264. static inline int
  265. arbel_cmd_sw2hw_eq ( struct arbel *arbel, unsigned int index,
  266. const struct arbelprm_eqc *eqctx ) {
  267. return arbel_cmd ( arbel,
  268. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_EQ,
  269. 1, sizeof ( *eqctx ) ),
  270. 0, eqctx, index, NULL );
  271. }
  272. static inline int
  273. arbel_cmd_hw2sw_eq ( struct arbel *arbel, unsigned int index,
  274. struct arbelprm_eqc *eqctx ) {
  275. return arbel_cmd ( arbel,
  276. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_HW2SW_EQ,
  277. 1, sizeof ( *eqctx ) ),
  278. 1, NULL, index, eqctx );
  279. }
  280. static inline int
  281. arbel_cmd_sw2hw_cq ( struct arbel *arbel, unsigned long cqn,
  282. const struct arbelprm_completion_queue_context *cqctx ) {
  283. return arbel_cmd ( arbel,
  284. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_CQ,
  285. 1, sizeof ( *cqctx ) ),
  286. 0, cqctx, cqn, NULL );
  287. }
  288. static inline int
  289. arbel_cmd_hw2sw_cq ( struct arbel *arbel, unsigned long cqn,
  290. struct arbelprm_completion_queue_context *cqctx) {
  291. return arbel_cmd ( arbel,
  292. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_HW2SW_CQ,
  293. 1, sizeof ( *cqctx ) ),
  294. 0, NULL, cqn, cqctx );
  295. }
  296. static inline int
  297. arbel_cmd_query_cq ( struct arbel *arbel, unsigned long cqn,
  298. struct arbelprm_completion_queue_context *cqctx ) {
  299. return arbel_cmd ( arbel,
  300. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_CQ,
  301. 1, sizeof ( *cqctx ) ),
  302. 0, NULL, cqn, cqctx );
  303. }
  304. static inline int
  305. arbel_cmd_rst2init_qpee ( struct arbel *arbel, unsigned long qpn,
  306. const struct arbelprm_qp_ee_state_transitions *ctx ){
  307. return arbel_cmd ( arbel,
  308. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RST2INIT_QPEE,
  309. 1, sizeof ( *ctx ) ),
  310. 0, ctx, qpn, NULL );
  311. }
  312. static inline int
  313. arbel_cmd_init2rtr_qpee ( struct arbel *arbel, unsigned long qpn,
  314. const struct arbelprm_qp_ee_state_transitions *ctx ){
  315. return arbel_cmd ( arbel,
  316. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT2RTR_QPEE,
  317. 1, sizeof ( *ctx ) ),
  318. 0, ctx, qpn, NULL );
  319. }
  320. static inline int
  321. arbel_cmd_rtr2rts_qpee ( struct arbel *arbel, unsigned long qpn,
  322. const struct arbelprm_qp_ee_state_transitions *ctx ) {
  323. return arbel_cmd ( arbel,
  324. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RTR2RTS_QPEE,
  325. 1, sizeof ( *ctx ) ),
  326. 0, ctx, qpn, NULL );
  327. }
  328. static inline int
  329. arbel_cmd_rts2rts_qpee ( struct arbel *arbel, unsigned long qpn,
  330. const struct arbelprm_qp_ee_state_transitions *ctx ) {
  331. return arbel_cmd ( arbel,
  332. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RTS2RTS_QPEE,
  333. 1, sizeof ( *ctx ) ),
  334. 0, ctx, qpn, NULL );
  335. }
  336. static inline int
  337. arbel_cmd_2rst_qpee ( struct arbel *arbel, unsigned long qpn ) {
  338. return arbel_cmd ( arbel,
  339. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_2RST_QPEE ),
  340. 0x03, NULL, qpn, NULL );
  341. }
  342. static inline int
  343. arbel_cmd_query_qpee ( struct arbel *arbel, unsigned long qpn,
  344. struct arbelprm_qp_ee_state_transitions *ctx ) {
  345. return arbel_cmd ( arbel,
  346. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_QPEE,
  347. 1, sizeof ( *ctx ) ),
  348. 0, NULL, qpn, ctx );
  349. }
  350. static inline int
  351. arbel_cmd_conf_special_qp ( struct arbel *arbel, unsigned int qp_type,
  352. unsigned long base_qpn ) {
  353. return arbel_cmd ( arbel,
  354. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CONF_SPECIAL_QP ),
  355. qp_type, NULL, base_qpn, NULL );
  356. }
  357. static inline int
  358. arbel_cmd_mad_ifc ( struct arbel *arbel, unsigned int port,
  359. union arbelprm_mad *mad ) {
  360. return arbel_cmd ( arbel,
  361. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_MAD_IFC,
  362. 1, sizeof ( *mad ),
  363. 1, sizeof ( *mad ) ),
  364. 0x03, mad, port, mad );
  365. }
  366. static inline int
  367. arbel_cmd_read_mgm ( struct arbel *arbel, unsigned int index,
  368. struct arbelprm_mgm_entry *mgm ) {
  369. return arbel_cmd ( arbel,
  370. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_READ_MGM,
  371. 1, sizeof ( *mgm ) ),
  372. 0, NULL, index, mgm );
  373. }
  374. static inline int
  375. arbel_cmd_write_mgm ( struct arbel *arbel, unsigned int index,
  376. const struct arbelprm_mgm_entry *mgm ) {
  377. return arbel_cmd ( arbel,
  378. ARBEL_HCR_IN_CMD ( ARBEL_HCR_WRITE_MGM,
  379. 1, sizeof ( *mgm ) ),
  380. 0, mgm, index, NULL );
  381. }
  382. static inline int
  383. arbel_cmd_mgid_hash ( struct arbel *arbel, const union ib_gid *gid,
  384. struct arbelprm_mgm_hash *hash ) {
  385. return arbel_cmd ( arbel,
  386. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_MGID_HASH,
  387. 1, sizeof ( *gid ),
  388. 0, sizeof ( *hash ) ),
  389. 0, gid, 0, hash );
  390. }
  391. static inline int
  392. arbel_cmd_run_fw ( struct arbel *arbel ) {
  393. return arbel_cmd ( arbel,
  394. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_RUN_FW ),
  395. 0, NULL, 0, NULL );
  396. }
  397. static inline int
  398. arbel_cmd_disable_lam ( struct arbel *arbel ) {
  399. return arbel_cmd ( arbel,
  400. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_DISABLE_LAM ),
  401. 0, NULL, 0, NULL );
  402. }
  403. static inline int
  404. arbel_cmd_enable_lam ( struct arbel *arbel, struct arbelprm_access_lam *lam ) {
  405. return arbel_cmd ( arbel,
  406. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_ENABLE_LAM,
  407. 1, sizeof ( *lam ) ),
  408. 1, NULL, 0, lam );
  409. }
  410. static inline int
  411. arbel_cmd_unmap_icm ( struct arbel *arbel, unsigned int page_count ) {
  412. return arbel_cmd ( arbel,
  413. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_ICM ),
  414. 0, NULL, page_count, NULL );
  415. }
  416. static inline int
  417. arbel_cmd_map_icm ( struct arbel *arbel,
  418. const struct arbelprm_virtual_physical_mapping *map ) {
  419. return arbel_cmd ( arbel,
  420. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_ICM,
  421. 1, sizeof ( *map ) ),
  422. 0, map, 1, NULL );
  423. }
  424. static inline int
  425. arbel_cmd_unmap_icm_aux ( struct arbel *arbel ) {
  426. return arbel_cmd ( arbel,
  427. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_ICM_AUX ),
  428. 0, NULL, 0, NULL );
  429. }
  430. static inline int
  431. arbel_cmd_map_icm_aux ( struct arbel *arbel,
  432. const struct arbelprm_virtual_physical_mapping *map ) {
  433. return arbel_cmd ( arbel,
  434. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_ICM_AUX,
  435. 1, sizeof ( *map ) ),
  436. 0, map, 1, NULL );
  437. }
  438. static inline int
  439. arbel_cmd_set_icm_size ( struct arbel *arbel,
  440. const struct arbelprm_scalar_parameter *icm_size,
  441. struct arbelprm_scalar_parameter *icm_aux_size ) {
  442. return arbel_cmd ( arbel,
  443. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_SET_ICM_SIZE,
  444. 0, sizeof ( *icm_size ),
  445. 0, sizeof ( *icm_aux_size ) ),
  446. 0, icm_size, 0, icm_aux_size );
  447. }
  448. static inline int
  449. arbel_cmd_unmap_fa ( struct arbel *arbel ) {
  450. return arbel_cmd ( arbel,
  451. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_FA ),
  452. 0, NULL, 0, NULL );
  453. }
  454. static inline int
  455. arbel_cmd_map_fa ( struct arbel *arbel,
  456. const struct arbelprm_virtual_physical_mapping *map ) {
  457. return arbel_cmd ( arbel,
  458. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_FA,
  459. 1, sizeof ( *map ) ),
  460. 0, map, 1, NULL );
  461. }
  462. /***************************************************************************
  463. *
  464. * MAD operations
  465. *
  466. ***************************************************************************
  467. */
  468. /**
  469. * Issue management datagram
  470. *
  471. * @v ibdev Infiniband device
  472. * @v mad Management datagram
  473. * @ret rc Return status code
  474. */
  475. static int arbel_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
  476. struct arbel *arbel = ib_get_drvdata ( ibdev );
  477. union arbelprm_mad mad_ifc;
  478. int rc;
  479. linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
  480. mad_size_mismatch );
  481. /* Copy in request packet */
  482. memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
  483. /* Issue MAD */
  484. if ( ( rc = arbel_cmd_mad_ifc ( arbel, ibdev->port,
  485. &mad_ifc ) ) != 0 ) {
  486. DBGC ( arbel, "Arbel %p port %d could not issue MAD IFC: %s\n",
  487. arbel, ibdev->port, strerror ( rc ) );
  488. return rc;
  489. }
  490. /* Copy out reply packet */
  491. memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
  492. if ( mad->hdr.status != 0 ) {
  493. DBGC ( arbel, "Arbel %p port %d MAD IFC status %04x\n",
  494. arbel, ibdev->port, ntohs ( mad->hdr.status ) );
  495. return -EIO;
  496. }
  497. return 0;
  498. }
  499. /***************************************************************************
  500. *
  501. * Completion queue operations
  502. *
  503. ***************************************************************************
  504. */
  505. /**
  506. * Dump completion queue context (for debugging only)
  507. *
  508. * @v arbel Arbel device
  509. * @v cq Completion queue
  510. * @ret rc Return status code
  511. */
  512. static __attribute__ (( unused )) int
  513. arbel_dump_cqctx ( struct arbel *arbel, struct ib_completion_queue *cq ) {
  514. struct arbelprm_completion_queue_context cqctx;
  515. int rc;
  516. memset ( &cqctx, 0, sizeof ( cqctx ) );
  517. if ( ( rc = arbel_cmd_query_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  518. DBGC ( arbel, "Arbel %p CQN %#lx QUERY_CQ failed: %s\n",
  519. arbel, cq->cqn, strerror ( rc ) );
  520. return rc;
  521. }
  522. DBGC ( arbel, "Arbel %p CQN %#lx context:\n", arbel, cq->cqn );
  523. DBGC_HDA ( arbel, 0, &cqctx, sizeof ( cqctx ) );
  524. return 0;
  525. }
  526. /**
  527. * Create completion queue
  528. *
  529. * @v ibdev Infiniband device
  530. * @v cq Completion queue
  531. * @ret rc Return status code
  532. */
  533. static int arbel_create_cq ( struct ib_device *ibdev,
  534. struct ib_completion_queue *cq ) {
  535. struct arbel *arbel = ib_get_drvdata ( ibdev );
  536. struct arbel_completion_queue *arbel_cq;
  537. struct arbelprm_completion_queue_context cqctx;
  538. struct arbelprm_cq_ci_db_record *ci_db_rec;
  539. struct arbelprm_cq_arm_db_record *arm_db_rec;
  540. int cqn_offset;
  541. unsigned int i;
  542. int rc;
  543. /* Find a free completion queue number */
  544. cqn_offset = arbel_bitmask_alloc ( arbel->cq_inuse, ARBEL_MAX_CQS );
  545. if ( cqn_offset < 0 ) {
  546. DBGC ( arbel, "Arbel %p out of completion queues\n", arbel );
  547. rc = cqn_offset;
  548. goto err_cqn_offset;
  549. }
  550. cq->cqn = ( arbel->limits.reserved_cqs + cqn_offset );
  551. /* Allocate control structures */
  552. arbel_cq = zalloc ( sizeof ( *arbel_cq ) );
  553. if ( ! arbel_cq ) {
  554. rc = -ENOMEM;
  555. goto err_arbel_cq;
  556. }
  557. arbel_cq->ci_doorbell_idx = arbel_cq_ci_doorbell_idx ( arbel, cq );
  558. arbel_cq->arm_doorbell_idx = arbel_cq_arm_doorbell_idx ( arbel, cq );
  559. /* Allocate completion queue itself */
  560. arbel_cq->cqe_size = ( cq->num_cqes * sizeof ( arbel_cq->cqe[0] ) );
  561. arbel_cq->cqe = malloc_dma ( arbel_cq->cqe_size,
  562. sizeof ( arbel_cq->cqe[0] ) );
  563. if ( ! arbel_cq->cqe ) {
  564. rc = -ENOMEM;
  565. goto err_cqe;
  566. }
  567. memset ( arbel_cq->cqe, 0, arbel_cq->cqe_size );
  568. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  569. MLX_FILL_1 ( &arbel_cq->cqe[i].normal, 7, owner, 1 );
  570. }
  571. barrier();
  572. /* Initialise doorbell records */
  573. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  574. MLX_FILL_1 ( ci_db_rec, 0, counter, 0 );
  575. MLX_FILL_2 ( ci_db_rec, 1,
  576. res, ARBEL_UAR_RES_CQ_CI,
  577. cq_number, cq->cqn );
  578. arm_db_rec = &arbel->db_rec[arbel_cq->arm_doorbell_idx].cq_arm;
  579. MLX_FILL_1 ( arm_db_rec, 0, counter, 0 );
  580. MLX_FILL_2 ( arm_db_rec, 1,
  581. res, ARBEL_UAR_RES_CQ_ARM,
  582. cq_number, cq->cqn );
  583. /* Hand queue over to hardware */
  584. memset ( &cqctx, 0, sizeof ( cqctx ) );
  585. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  586. MLX_FILL_1 ( &cqctx, 2, start_address_l,
  587. virt_to_bus ( arbel_cq->cqe ) );
  588. MLX_FILL_2 ( &cqctx, 3,
  589. usr_page, arbel->limits.reserved_uars,
  590. log_cq_size, fls ( cq->num_cqes - 1 ) );
  591. MLX_FILL_1 ( &cqctx, 5, c_eqn, arbel->eq.eqn );
  592. MLX_FILL_1 ( &cqctx, 6, pd, ARBEL_GLOBAL_PD );
  593. MLX_FILL_1 ( &cqctx, 7, l_key, arbel->reserved_lkey );
  594. MLX_FILL_1 ( &cqctx, 12, cqn, cq->cqn );
  595. MLX_FILL_1 ( &cqctx, 13,
  596. cq_ci_db_record, arbel_cq->ci_doorbell_idx );
  597. MLX_FILL_1 ( &cqctx, 14,
  598. cq_state_db_record, arbel_cq->arm_doorbell_idx );
  599. if ( ( rc = arbel_cmd_sw2hw_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  600. DBGC ( arbel, "Arbel %p CQN %#lx SW2HW_CQ failed: %s\n",
  601. arbel, cq->cqn, strerror ( rc ) );
  602. goto err_sw2hw_cq;
  603. }
  604. DBGC ( arbel, "Arbel %p CQN %#lx ring [%08lx,%08lx), doorbell %08lx\n",
  605. arbel, cq->cqn, virt_to_phys ( arbel_cq->cqe ),
  606. ( virt_to_phys ( arbel_cq->cqe ) + arbel_cq->cqe_size ),
  607. virt_to_phys ( ci_db_rec ) );
  608. ib_cq_set_drvdata ( cq, arbel_cq );
  609. return 0;
  610. err_sw2hw_cq:
  611. MLX_FILL_1 ( ci_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  612. MLX_FILL_1 ( arm_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  613. free_dma ( arbel_cq->cqe, arbel_cq->cqe_size );
  614. err_cqe:
  615. free ( arbel_cq );
  616. err_arbel_cq:
  617. arbel_bitmask_free ( arbel->cq_inuse, cqn_offset );
  618. err_cqn_offset:
  619. return rc;
  620. }
  621. /**
  622. * Destroy completion queue
  623. *
  624. * @v ibdev Infiniband device
  625. * @v cq Completion queue
  626. */
  627. static void arbel_destroy_cq ( struct ib_device *ibdev,
  628. struct ib_completion_queue *cq ) {
  629. struct arbel *arbel = ib_get_drvdata ( ibdev );
  630. struct arbel_completion_queue *arbel_cq = ib_cq_get_drvdata ( cq );
  631. struct arbelprm_completion_queue_context cqctx;
  632. struct arbelprm_cq_ci_db_record *ci_db_rec;
  633. struct arbelprm_cq_arm_db_record *arm_db_rec;
  634. int cqn_offset;
  635. int rc;
  636. /* Take ownership back from hardware */
  637. if ( ( rc = arbel_cmd_hw2sw_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  638. DBGC ( arbel, "Arbel %p CQN %#lx FATAL HW2SW_CQ failed: "
  639. "%s\n", arbel, cq->cqn, strerror ( rc ) );
  640. /* Leak memory and return; at least we avoid corruption */
  641. return;
  642. }
  643. /* Clear doorbell records */
  644. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  645. arm_db_rec = &arbel->db_rec[arbel_cq->arm_doorbell_idx].cq_arm;
  646. MLX_FILL_1 ( ci_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  647. MLX_FILL_1 ( arm_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  648. /* Free memory */
  649. free_dma ( arbel_cq->cqe, arbel_cq->cqe_size );
  650. free ( arbel_cq );
  651. /* Mark queue number as free */
  652. cqn_offset = ( cq->cqn - arbel->limits.reserved_cqs );
  653. arbel_bitmask_free ( arbel->cq_inuse, cqn_offset );
  654. ib_cq_set_drvdata ( cq, NULL );
  655. }
  656. /***************************************************************************
  657. *
  658. * Queue pair operations
  659. *
  660. ***************************************************************************
  661. */
  662. /**
  663. * Assign queue pair number
  664. *
  665. * @v ibdev Infiniband device
  666. * @v qp Queue pair
  667. * @ret rc Return status code
  668. */
  669. static int arbel_alloc_qpn ( struct ib_device *ibdev,
  670. struct ib_queue_pair *qp ) {
  671. struct arbel *arbel = ib_get_drvdata ( ibdev );
  672. unsigned int port_offset;
  673. int qpn_offset;
  674. /* Calculate queue pair number */
  675. port_offset = ( ibdev->port - ARBEL_PORT_BASE );
  676. switch ( qp->type ) {
  677. case IB_QPT_SMI:
  678. qp->qpn = ( arbel->special_qpn_base + port_offset );
  679. return 0;
  680. case IB_QPT_GSI:
  681. qp->qpn = ( arbel->special_qpn_base + 2 + port_offset );
  682. return 0;
  683. case IB_QPT_UD:
  684. /* Find a free queue pair number */
  685. qpn_offset = arbel_bitmask_alloc ( arbel->qp_inuse,
  686. ARBEL_MAX_QPS );
  687. if ( qpn_offset < 0 ) {
  688. DBGC ( arbel, "Arbel %p out of queue pairs\n",
  689. arbel );
  690. return qpn_offset;
  691. }
  692. qp->qpn = ( ( random() & ARBEL_QPN_RANDOM_MASK ) |
  693. ( arbel->qpn_base + qpn_offset ) );
  694. return 0;
  695. default:
  696. DBGC ( arbel, "Arbel %p unsupported QP type %d\n",
  697. arbel, qp->type );
  698. return -ENOTSUP;
  699. }
  700. }
  701. /**
  702. * Free queue pair number
  703. *
  704. * @v ibdev Infiniband device
  705. * @v qp Queue pair
  706. */
  707. static void arbel_free_qpn ( struct ib_device *ibdev,
  708. struct ib_queue_pair *qp ) {
  709. struct arbel *arbel = ib_get_drvdata ( ibdev );
  710. int qpn_offset;
  711. qpn_offset = ( ( qp->qpn & ~ARBEL_QPN_RANDOM_MASK ) - arbel->qpn_base );
  712. if ( qpn_offset >= 0 )
  713. arbel_bitmask_free ( arbel->qp_inuse, qpn_offset );
  714. }
  715. /**
  716. * Dump queue pair context (for debugging only)
  717. *
  718. * @v arbel Arbel device
  719. * @v qp Queue pair
  720. * @ret rc Return status code
  721. */
  722. static __attribute__ (( unused )) int
  723. arbel_dump_qpctx ( struct arbel *arbel, struct ib_queue_pair *qp ) {
  724. struct arbelprm_qp_ee_state_transitions qpctx;
  725. int rc;
  726. memset ( &qpctx, 0, sizeof ( qpctx ) );
  727. if ( ( rc = arbel_cmd_query_qpee ( arbel, qp->qpn, &qpctx ) ) != 0 ) {
  728. DBGC ( arbel, "Arbel %p QPN %#lx QUERY_QPEE failed: %s\n",
  729. arbel, qp->qpn, strerror ( rc ) );
  730. return rc;
  731. }
  732. DBGC ( arbel, "Arbel %p QPN %#lx context:\n", arbel, qp->qpn );
  733. DBGC_HDA ( arbel, 0, &qpctx.u.dwords[2], ( sizeof ( qpctx ) - 8 ) );
  734. return 0;
  735. }
  736. /**
  737. * Create send work queue
  738. *
  739. * @v arbel_send_wq Send work queue
  740. * @v num_wqes Number of work queue entries
  741. * @ret rc Return status code
  742. */
  743. static int arbel_create_send_wq ( struct arbel_send_work_queue *arbel_send_wq,
  744. unsigned int num_wqes ) {
  745. struct arbelprm_ud_send_wqe *wqe;
  746. struct arbelprm_ud_send_wqe *next_wqe;
  747. unsigned int wqe_idx_mask;
  748. unsigned int i;
  749. /* Allocate work queue */
  750. arbel_send_wq->wqe_size = ( num_wqes *
  751. sizeof ( arbel_send_wq->wqe[0] ) );
  752. arbel_send_wq->wqe = malloc_dma ( arbel_send_wq->wqe_size,
  753. sizeof ( arbel_send_wq->wqe[0] ) );
  754. if ( ! arbel_send_wq->wqe )
  755. return -ENOMEM;
  756. memset ( arbel_send_wq->wqe, 0, arbel_send_wq->wqe_size );
  757. /* Link work queue entries */
  758. wqe_idx_mask = ( num_wqes - 1 );
  759. for ( i = 0 ; i < num_wqes ; i++ ) {
  760. wqe = &arbel_send_wq->wqe[i].ud;
  761. next_wqe = &arbel_send_wq->wqe[ ( i + 1 ) & wqe_idx_mask ].ud;
  762. MLX_FILL_1 ( &wqe->next, 0, nda_31_6,
  763. ( virt_to_bus ( next_wqe ) >> 6 ) );
  764. MLX_FILL_1 ( &wqe->next, 1, always1, 1 );
  765. }
  766. return 0;
  767. }
  768. /**
  769. * Create receive work queue
  770. *
  771. * @v arbel_recv_wq Receive work queue
  772. * @v num_wqes Number of work queue entries
  773. * @ret rc Return status code
  774. */
  775. static int arbel_create_recv_wq ( struct arbel_recv_work_queue *arbel_recv_wq,
  776. unsigned int num_wqes ) {
  777. struct arbelprm_recv_wqe *wqe;
  778. struct arbelprm_recv_wqe *next_wqe;
  779. unsigned int wqe_idx_mask;
  780. size_t nds;
  781. unsigned int i;
  782. unsigned int j;
  783. /* Allocate work queue */
  784. arbel_recv_wq->wqe_size = ( num_wqes *
  785. sizeof ( arbel_recv_wq->wqe[0] ) );
  786. arbel_recv_wq->wqe = malloc_dma ( arbel_recv_wq->wqe_size,
  787. sizeof ( arbel_recv_wq->wqe[0] ) );
  788. if ( ! arbel_recv_wq->wqe )
  789. return -ENOMEM;
  790. memset ( arbel_recv_wq->wqe, 0, arbel_recv_wq->wqe_size );
  791. /* Link work queue entries */
  792. wqe_idx_mask = ( num_wqes - 1 );
  793. nds = ( ( offsetof ( typeof ( *wqe ), data ) +
  794. sizeof ( wqe->data[0] ) ) >> 4 );
  795. for ( i = 0 ; i < num_wqes ; i++ ) {
  796. wqe = &arbel_recv_wq->wqe[i].recv;
  797. next_wqe = &arbel_recv_wq->wqe[( i + 1 ) & wqe_idx_mask].recv;
  798. MLX_FILL_1 ( &wqe->next, 0, nda_31_6,
  799. ( virt_to_bus ( next_wqe ) >> 6 ) );
  800. MLX_FILL_1 ( &wqe->next, 1, nds, ( sizeof ( *wqe ) / 16 ) );
  801. for ( j = 0 ; ( ( ( void * ) &wqe->data[j] ) <
  802. ( ( void * ) ( wqe + 1 ) ) ) ; j++ ) {
  803. MLX_FILL_1 ( &wqe->data[j], 1,
  804. l_key, ARBEL_INVALID_LKEY );
  805. }
  806. }
  807. return 0;
  808. }
  809. /**
  810. * Create queue pair
  811. *
  812. * @v ibdev Infiniband device
  813. * @v qp Queue pair
  814. * @ret rc Return status code
  815. */
  816. static int arbel_create_qp ( struct ib_device *ibdev,
  817. struct ib_queue_pair *qp ) {
  818. struct arbel *arbel = ib_get_drvdata ( ibdev );
  819. struct arbel_queue_pair *arbel_qp;
  820. struct arbelprm_qp_ee_state_transitions qpctx;
  821. struct arbelprm_qp_db_record *send_db_rec;
  822. struct arbelprm_qp_db_record *recv_db_rec;
  823. int rc;
  824. /* Calculate queue pair number */
  825. if ( ( rc = arbel_alloc_qpn ( ibdev, qp ) ) != 0 )
  826. goto err_alloc_qpn;
  827. /* Allocate control structures */
  828. arbel_qp = zalloc ( sizeof ( *arbel_qp ) );
  829. if ( ! arbel_qp ) {
  830. rc = -ENOMEM;
  831. goto err_arbel_qp;
  832. }
  833. arbel_qp->send.doorbell_idx = arbel_send_doorbell_idx ( arbel, qp );
  834. arbel_qp->recv.doorbell_idx = arbel_recv_doorbell_idx ( arbel, qp );
  835. /* Create send and receive work queues */
  836. if ( ( rc = arbel_create_send_wq ( &arbel_qp->send,
  837. qp->send.num_wqes ) ) != 0 )
  838. goto err_create_send_wq;
  839. if ( ( rc = arbel_create_recv_wq ( &arbel_qp->recv,
  840. qp->recv.num_wqes ) ) != 0 )
  841. goto err_create_recv_wq;
  842. /* Initialise doorbell records */
  843. send_db_rec = &arbel->db_rec[arbel_qp->send.doorbell_idx].qp;
  844. MLX_FILL_1 ( send_db_rec, 0, counter, 0 );
  845. MLX_FILL_2 ( send_db_rec, 1,
  846. res, ARBEL_UAR_RES_SQ,
  847. qp_number, qp->qpn );
  848. recv_db_rec = &arbel->db_rec[arbel_qp->recv.doorbell_idx].qp;
  849. MLX_FILL_1 ( recv_db_rec, 0, counter, 0 );
  850. MLX_FILL_2 ( recv_db_rec, 1,
  851. res, ARBEL_UAR_RES_RQ,
  852. qp_number, qp->qpn );
  853. /* Hand queue over to hardware */
  854. memset ( &qpctx, 0, sizeof ( qpctx ) );
  855. MLX_FILL_3 ( &qpctx, 2,
  856. qpc_eec_data.de, 1,
  857. qpc_eec_data.pm_state, 0x03 /* Always 0x03 for UD */,
  858. qpc_eec_data.st,
  859. ( ( qp->type == IB_QPT_UD ) ?
  860. ARBEL_ST_UD : ARBEL_ST_MLX ) );
  861. MLX_FILL_6 ( &qpctx, 4,
  862. qpc_eec_data.mtu, ARBEL_MTU_2048,
  863. qpc_eec_data.msg_max, 11 /* 2^11 = 2048 */,
  864. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  865. qpc_eec_data.log_rq_stride,
  866. ( fls ( sizeof ( arbel_qp->recv.wqe[0] ) - 1 ) - 4 ),
  867. qpc_eec_data.log_sq_size, fls ( qp->send.num_wqes - 1 ),
  868. qpc_eec_data.log_sq_stride,
  869. ( fls ( sizeof ( arbel_qp->send.wqe[0] ) - 1 ) - 4 ) );
  870. MLX_FILL_1 ( &qpctx, 5,
  871. qpc_eec_data.usr_page, arbel->limits.reserved_uars );
  872. MLX_FILL_1 ( &qpctx, 10, qpc_eec_data.primary_address_path.port_number,
  873. ibdev->port );
  874. MLX_FILL_1 ( &qpctx, 27, qpc_eec_data.pd, ARBEL_GLOBAL_PD );
  875. MLX_FILL_1 ( &qpctx, 29, qpc_eec_data.wqe_lkey, arbel->reserved_lkey );
  876. MLX_FILL_1 ( &qpctx, 30, qpc_eec_data.ssc, 1 );
  877. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  878. MLX_FILL_1 ( &qpctx, 34, qpc_eec_data.snd_wqe_base_adr_l,
  879. ( virt_to_bus ( arbel_qp->send.wqe ) >> 6 ) );
  880. MLX_FILL_1 ( &qpctx, 35, qpc_eec_data.snd_db_record_index,
  881. arbel_qp->send.doorbell_idx );
  882. MLX_FILL_1 ( &qpctx, 38, qpc_eec_data.rsc, 1 );
  883. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  884. MLX_FILL_1 ( &qpctx, 42, qpc_eec_data.rcv_wqe_base_adr_l,
  885. ( virt_to_bus ( arbel_qp->recv.wqe ) >> 6 ) );
  886. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.rcv_db_record_index,
  887. arbel_qp->recv.doorbell_idx );
  888. if ( ( rc = arbel_cmd_rst2init_qpee ( arbel, qp->qpn, &qpctx )) != 0 ){
  889. DBGC ( arbel, "Arbel %p QPN %#lx RST2INIT_QPEE failed: %s\n",
  890. arbel, qp->qpn, strerror ( rc ) );
  891. goto err_rst2init_qpee;
  892. }
  893. memset ( &qpctx, 0, sizeof ( qpctx ) );
  894. MLX_FILL_2 ( &qpctx, 4,
  895. qpc_eec_data.mtu, ARBEL_MTU_2048,
  896. qpc_eec_data.msg_max, 11 /* 2^11 = 2048 */ );
  897. if ( ( rc = arbel_cmd_init2rtr_qpee ( arbel, qp->qpn, &qpctx )) != 0 ){
  898. DBGC ( arbel, "Arbel %p QPN %#lx INIT2RTR_QPEE failed: %s\n",
  899. arbel, qp->qpn, strerror ( rc ) );
  900. goto err_init2rtr_qpee;
  901. }
  902. memset ( &qpctx, 0, sizeof ( qpctx ) );
  903. if ( ( rc = arbel_cmd_rtr2rts_qpee ( arbel, qp->qpn, &qpctx ) ) != 0 ){
  904. DBGC ( arbel, "Arbel %p QPN %#lx RTR2RTS_QPEE failed: %s\n",
  905. arbel, qp->qpn, strerror ( rc ) );
  906. goto err_rtr2rts_qpee;
  907. }
  908. DBGC ( arbel, "Arbel %p QPN %#lx send ring [%08lx,%08lx), doorbell "
  909. "%08lx\n", arbel, qp->qpn, virt_to_phys ( arbel_qp->send.wqe ),
  910. ( virt_to_phys ( arbel_qp->send.wqe ) +
  911. arbel_qp->send.wqe_size ),
  912. virt_to_phys ( send_db_rec ) );
  913. DBGC ( arbel, "Arbel %p QPN %#lx receive ring [%08lx,%08lx), doorbell "
  914. "%08lx\n", arbel, qp->qpn, virt_to_phys ( arbel_qp->recv.wqe ),
  915. ( virt_to_phys ( arbel_qp->recv.wqe ) +
  916. arbel_qp->recv.wqe_size ),
  917. virt_to_phys ( recv_db_rec ) );
  918. DBGC ( arbel, "Arbel %p QPN %#lx send CQN %#lx receive CQN %#lx\n",
  919. arbel, qp->qpn, qp->send.cq->cqn, qp->recv.cq->cqn );
  920. ib_qp_set_drvdata ( qp, arbel_qp );
  921. return 0;
  922. err_rtr2rts_qpee:
  923. err_init2rtr_qpee:
  924. arbel_cmd_2rst_qpee ( arbel, qp->qpn );
  925. err_rst2init_qpee:
  926. MLX_FILL_1 ( send_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  927. MLX_FILL_1 ( recv_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  928. free_dma ( arbel_qp->recv.wqe, arbel_qp->recv.wqe_size );
  929. err_create_recv_wq:
  930. free_dma ( arbel_qp->send.wqe, arbel_qp->send.wqe_size );
  931. err_create_send_wq:
  932. free ( arbel_qp );
  933. err_arbel_qp:
  934. arbel_free_qpn ( ibdev, qp );
  935. err_alloc_qpn:
  936. return rc;
  937. }
  938. /**
  939. * Modify queue pair
  940. *
  941. * @v ibdev Infiniband device
  942. * @v qp Queue pair
  943. * @ret rc Return status code
  944. */
  945. static int arbel_modify_qp ( struct ib_device *ibdev,
  946. struct ib_queue_pair *qp ) {
  947. struct arbel *arbel = ib_get_drvdata ( ibdev );
  948. struct arbelprm_qp_ee_state_transitions qpctx;
  949. int rc;
  950. /* Issue RTS2RTS_QPEE */
  951. memset ( &qpctx, 0, sizeof ( qpctx ) );
  952. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, ARBEL_QPEE_OPT_PARAM_QKEY );
  953. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  954. if ( ( rc = arbel_cmd_rts2rts_qpee ( arbel, qp->qpn, &qpctx ) ) != 0 ){
  955. DBGC ( arbel, "Arbel %p QPN %#lx RTS2RTS_QPEE failed: %s\n",
  956. arbel, qp->qpn, strerror ( rc ) );
  957. return rc;
  958. }
  959. return 0;
  960. }
  961. /**
  962. * Destroy queue pair
  963. *
  964. * @v ibdev Infiniband device
  965. * @v qp Queue pair
  966. */
  967. static void arbel_destroy_qp ( struct ib_device *ibdev,
  968. struct ib_queue_pair *qp ) {
  969. struct arbel *arbel = ib_get_drvdata ( ibdev );
  970. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  971. struct arbelprm_qp_db_record *send_db_rec;
  972. struct arbelprm_qp_db_record *recv_db_rec;
  973. int rc;
  974. /* Take ownership back from hardware */
  975. if ( ( rc = arbel_cmd_2rst_qpee ( arbel, qp->qpn ) ) != 0 ) {
  976. DBGC ( arbel, "Arbel %p QPN %#lx FATAL 2RST_QPEE failed: "
  977. "%s\n", arbel, qp->qpn, strerror ( rc ) );
  978. /* Leak memory and return; at least we avoid corruption */
  979. return;
  980. }
  981. /* Clear doorbell records */
  982. send_db_rec = &arbel->db_rec[arbel_qp->send.doorbell_idx].qp;
  983. recv_db_rec = &arbel->db_rec[arbel_qp->recv.doorbell_idx].qp;
  984. MLX_FILL_1 ( send_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  985. MLX_FILL_1 ( recv_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  986. /* Free memory */
  987. free_dma ( arbel_qp->send.wqe, arbel_qp->send.wqe_size );
  988. free_dma ( arbel_qp->recv.wqe, arbel_qp->recv.wqe_size );
  989. free ( arbel_qp );
  990. /* Mark queue number as free */
  991. arbel_free_qpn ( ibdev, qp );
  992. ib_qp_set_drvdata ( qp, NULL );
  993. }
  994. /***************************************************************************
  995. *
  996. * Work request operations
  997. *
  998. ***************************************************************************
  999. */
  1000. /**
  1001. * Ring doorbell register in UAR
  1002. *
  1003. * @v arbel Arbel device
  1004. * @v db_reg Doorbell register structure
  1005. * @v offset Address of doorbell
  1006. */
  1007. static void arbel_ring_doorbell ( struct arbel *arbel,
  1008. union arbelprm_doorbell_register *db_reg,
  1009. unsigned int offset ) {
  1010. DBGC2 ( arbel, "Arbel %p ringing doorbell %08x:%08x at %lx\n",
  1011. arbel, db_reg->dword[0], db_reg->dword[1],
  1012. virt_to_phys ( arbel->uar + offset ) );
  1013. barrier();
  1014. writel ( db_reg->dword[0], ( arbel->uar + offset + 0 ) );
  1015. barrier();
  1016. writel ( db_reg->dword[1], ( arbel->uar + offset + 4 ) );
  1017. }
  1018. /** GID used for GID-less send work queue entries */
  1019. static const union ib_gid arbel_no_gid = {
  1020. .bytes = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0 },
  1021. };
  1022. /**
  1023. * Construct UD send work queue entry
  1024. *
  1025. * @v ibdev Infiniband device
  1026. * @v qp Queue pair
  1027. * @v av Address vector
  1028. * @v iobuf I/O buffer
  1029. * @v wqe Send work queue entry
  1030. * @ret nds Work queue entry size
  1031. */
  1032. static size_t arbel_fill_ud_send_wqe ( struct ib_device *ibdev,
  1033. struct ib_queue_pair *qp __unused,
  1034. struct ib_address_vector *av,
  1035. struct io_buffer *iobuf,
  1036. union arbel_send_wqe *wqe ) {
  1037. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1038. const union ib_gid *gid;
  1039. /* Construct this work queue entry */
  1040. MLX_FILL_1 ( &wqe->ud.ctrl, 0, always1, 1 );
  1041. MLX_FILL_2 ( &wqe->ud.ud, 0,
  1042. ud_address_vector.pd, ARBEL_GLOBAL_PD,
  1043. ud_address_vector.port_number, ibdev->port );
  1044. MLX_FILL_2 ( &wqe->ud.ud, 1,
  1045. ud_address_vector.rlid, av->lid,
  1046. ud_address_vector.g, av->gid_present );
  1047. MLX_FILL_2 ( &wqe->ud.ud, 2,
  1048. ud_address_vector.max_stat_rate,
  1049. ( ( av->rate >= 3 ) ? 0 : 1 ),
  1050. ud_address_vector.msg, 3 );
  1051. MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, av->sl );
  1052. gid = ( av->gid_present ? &av->gid : &arbel_no_gid );
  1053. memcpy ( &wqe->ud.ud.u.dwords[4], gid, sizeof ( *gid ) );
  1054. MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, av->qpn );
  1055. MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, av->qkey );
  1056. MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
  1057. MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, arbel->reserved_lkey );
  1058. MLX_FILL_1 ( &wqe->ud.data[0], 3,
  1059. local_address_l, virt_to_bus ( iobuf->data ) );
  1060. return ( offsetof ( typeof ( wqe->ud ), data[1] ) >> 4 );
  1061. }
  1062. /**
  1063. * Construct MLX send work queue entry
  1064. *
  1065. * @v ibdev Infiniband device
  1066. * @v qp Queue pair
  1067. * @v av Address vector
  1068. * @v iobuf I/O buffer
  1069. * @v wqe Send work queue entry
  1070. * @v next Previous work queue entry's "next" field
  1071. * @ret nds Work queue entry size
  1072. */
  1073. static size_t arbel_fill_mlx_send_wqe ( struct ib_device *ibdev,
  1074. struct ib_queue_pair *qp,
  1075. struct ib_address_vector *av,
  1076. struct io_buffer *iobuf,
  1077. union arbel_send_wqe *wqe ) {
  1078. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1079. struct io_buffer headers;
  1080. /* Construct IB headers */
  1081. iob_populate ( &headers, &wqe->mlx.headers, 0,
  1082. sizeof ( wqe->mlx.headers ) );
  1083. iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
  1084. ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
  1085. /* Construct this work queue entry */
  1086. MLX_FILL_5 ( &wqe->mlx.ctrl, 0,
  1087. c, 1 /* generate completion */,
  1088. icrc, 0 /* generate ICRC */,
  1089. max_statrate, ( ( ( av->rate < 2 ) || ( av->rate > 10 ) )
  1090. ? 8 : ( av->rate + 5 ) ),
  1091. slr, 0,
  1092. v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
  1093. MLX_FILL_1 ( &wqe->mlx.ctrl, 1, rlid, av->lid );
  1094. MLX_FILL_1 ( &wqe->mlx.data[0], 0,
  1095. byte_count, iob_len ( &headers ) );
  1096. MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, arbel->reserved_lkey );
  1097. MLX_FILL_1 ( &wqe->mlx.data[0], 3,
  1098. local_address_l, virt_to_bus ( headers.data ) );
  1099. MLX_FILL_1 ( &wqe->mlx.data[1], 0,
  1100. byte_count, ( iob_len ( iobuf ) + 4 /* ICRC */ ) );
  1101. MLX_FILL_1 ( &wqe->mlx.data[1], 1, l_key, arbel->reserved_lkey );
  1102. MLX_FILL_1 ( &wqe->mlx.data[1], 3,
  1103. local_address_l, virt_to_bus ( iobuf->data ) );
  1104. return ( offsetof ( typeof ( wqe->mlx ), data[2] ) >> 4 );
  1105. }
  1106. /** Work queue entry constructors */
  1107. static size_t
  1108. ( * arbel_fill_send_wqe[] ) ( struct ib_device *ibdev,
  1109. struct ib_queue_pair *qp,
  1110. struct ib_address_vector *av,
  1111. struct io_buffer *iobuf,
  1112. union arbel_send_wqe *wqe ) = {
  1113. [IB_QPT_SMI] = arbel_fill_mlx_send_wqe,
  1114. [IB_QPT_GSI] = arbel_fill_mlx_send_wqe,
  1115. [IB_QPT_UD] = arbel_fill_ud_send_wqe,
  1116. };
  1117. /**
  1118. * Post send work queue entry
  1119. *
  1120. * @v ibdev Infiniband device
  1121. * @v qp Queue pair
  1122. * @v av Address vector
  1123. * @v iobuf I/O buffer
  1124. * @ret rc Return status code
  1125. */
  1126. static int arbel_post_send ( struct ib_device *ibdev,
  1127. struct ib_queue_pair *qp,
  1128. struct ib_address_vector *av,
  1129. struct io_buffer *iobuf ) {
  1130. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1131. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  1132. struct ib_work_queue *wq = &qp->send;
  1133. struct arbel_send_work_queue *arbel_send_wq = &arbel_qp->send;
  1134. union arbel_send_wqe *prev_wqe;
  1135. union arbel_send_wqe *wqe;
  1136. struct arbelprm_qp_db_record *qp_db_rec;
  1137. union arbelprm_doorbell_register db_reg;
  1138. unsigned long wqe_idx_mask;
  1139. size_t nds;
  1140. /* Allocate work queue entry */
  1141. wqe_idx_mask = ( wq->num_wqes - 1 );
  1142. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1143. DBGC ( arbel, "Arbel %p QPN %#lx send queue full",
  1144. arbel, qp->qpn );
  1145. return -ENOBUFS;
  1146. }
  1147. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1148. prev_wqe = &arbel_send_wq->wqe[(wq->next_idx - 1) & wqe_idx_mask];
  1149. wqe = &arbel_send_wq->wqe[wq->next_idx & wqe_idx_mask];
  1150. /* Construct work queue entry */
  1151. memset ( ( ( ( void * ) wqe ) + sizeof ( wqe->next ) ), 0,
  1152. ( sizeof ( *wqe ) - sizeof ( wqe->next ) ) );
  1153. assert ( qp->type < ( sizeof ( arbel_fill_send_wqe ) /
  1154. sizeof ( arbel_fill_send_wqe[0] ) ) );
  1155. assert ( arbel_fill_send_wqe[qp->type] != NULL );
  1156. nds = arbel_fill_send_wqe[qp->type] ( ibdev, qp, av, iobuf, wqe );
  1157. DBGCP ( arbel, "Arbel %p QPN %#lx posting send WQE %#lx:\n",
  1158. arbel, qp->qpn, ( wq->next_idx & wqe_idx_mask ) );
  1159. DBGCP_HDA ( arbel, virt_to_phys ( wqe ), wqe, sizeof ( *wqe ) );
  1160. /* Update previous work queue entry's "next" field */
  1161. MLX_SET ( &prev_wqe->next, nopcode, ARBEL_OPCODE_SEND );
  1162. MLX_FILL_3 ( &prev_wqe->next, 1,
  1163. nds, nds,
  1164. f, 0,
  1165. always1, 1 );
  1166. /* Update doorbell record */
  1167. barrier();
  1168. qp_db_rec = &arbel->db_rec[arbel_send_wq->doorbell_idx].qp;
  1169. MLX_FILL_1 ( qp_db_rec, 0,
  1170. counter, ( ( wq->next_idx + 1 ) & 0xffff ) );
  1171. /* Ring doorbell register */
  1172. MLX_FILL_4 ( &db_reg.send, 0,
  1173. nopcode, ARBEL_OPCODE_SEND,
  1174. f, 1,
  1175. wqe_counter, ( wq->next_idx & 0xffff ),
  1176. wqe_cnt, 1 );
  1177. MLX_FILL_2 ( &db_reg.send, 1,
  1178. nds, nds,
  1179. qpn, qp->qpn );
  1180. arbel_ring_doorbell ( arbel, &db_reg, ARBEL_DB_POST_SND_OFFSET );
  1181. /* Update work queue's index */
  1182. wq->next_idx++;
  1183. return 0;
  1184. }
  1185. /**
  1186. * Post receive work queue entry
  1187. *
  1188. * @v ibdev Infiniband device
  1189. * @v qp Queue pair
  1190. * @v iobuf I/O buffer
  1191. * @ret rc Return status code
  1192. */
  1193. static int arbel_post_recv ( struct ib_device *ibdev,
  1194. struct ib_queue_pair *qp,
  1195. struct io_buffer *iobuf ) {
  1196. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1197. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  1198. struct ib_work_queue *wq = &qp->recv;
  1199. struct arbel_recv_work_queue *arbel_recv_wq = &arbel_qp->recv;
  1200. struct arbelprm_recv_wqe *wqe;
  1201. union arbelprm_doorbell_record *db_rec;
  1202. unsigned int wqe_idx_mask;
  1203. /* Allocate work queue entry */
  1204. wqe_idx_mask = ( wq->num_wqes - 1 );
  1205. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1206. DBGC ( arbel, "Arbel %p QPN %#lx receive queue full\n",
  1207. arbel, qp->qpn );
  1208. return -ENOBUFS;
  1209. }
  1210. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1211. wqe = &arbel_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  1212. /* Construct work queue entry */
  1213. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
  1214. MLX_FILL_1 ( &wqe->data[0], 1, l_key, arbel->reserved_lkey );
  1215. MLX_FILL_1 ( &wqe->data[0], 3,
  1216. local_address_l, virt_to_bus ( iobuf->data ) );
  1217. /* Update doorbell record */
  1218. barrier();
  1219. db_rec = &arbel->db_rec[arbel_recv_wq->doorbell_idx];
  1220. MLX_FILL_1 ( &db_rec->qp, 0,
  1221. counter, ( ( wq->next_idx + 1 ) & 0xffff ) );
  1222. /* Update work queue's index */
  1223. wq->next_idx++;
  1224. return 0;
  1225. }
  1226. /**
  1227. * Handle completion
  1228. *
  1229. * @v ibdev Infiniband device
  1230. * @v cq Completion queue
  1231. * @v cqe Hardware completion queue entry
  1232. * @ret rc Return status code
  1233. */
  1234. static int arbel_complete ( struct ib_device *ibdev,
  1235. struct ib_completion_queue *cq,
  1236. union arbelprm_completion_entry *cqe ) {
  1237. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1238. struct ib_work_queue *wq;
  1239. struct ib_queue_pair *qp;
  1240. struct arbel_queue_pair *arbel_qp;
  1241. struct arbel_send_work_queue *arbel_send_wq;
  1242. struct arbel_recv_work_queue *arbel_recv_wq;
  1243. struct arbelprm_recv_wqe *recv_wqe;
  1244. struct io_buffer *iobuf;
  1245. struct ib_address_vector av;
  1246. struct ib_global_route_header *grh;
  1247. unsigned int opcode;
  1248. unsigned long qpn;
  1249. int is_send;
  1250. unsigned long wqe_adr;
  1251. unsigned long wqe_idx;
  1252. size_t len;
  1253. int rc = 0;
  1254. /* Parse completion */
  1255. qpn = MLX_GET ( &cqe->normal, my_qpn );
  1256. is_send = MLX_GET ( &cqe->normal, s );
  1257. wqe_adr = ( MLX_GET ( &cqe->normal, wqe_adr ) << 6 );
  1258. opcode = MLX_GET ( &cqe->normal, opcode );
  1259. if ( opcode >= ARBEL_OPCODE_RECV_ERROR ) {
  1260. /* "s" field is not valid for error opcodes */
  1261. is_send = ( opcode == ARBEL_OPCODE_SEND_ERROR );
  1262. DBGC ( arbel, "Arbel %p CQN %#lx syndrome %x vendor %x\n",
  1263. arbel, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
  1264. MLX_GET ( &cqe->error, vendor_code ) );
  1265. rc = -EIO;
  1266. /* Don't return immediately; propagate error to completer */
  1267. }
  1268. /* Identify work queue */
  1269. wq = ib_find_wq ( cq, qpn, is_send );
  1270. if ( ! wq ) {
  1271. DBGC ( arbel, "Arbel %p CQN %#lx unknown %s QPN %#lx\n",
  1272. arbel, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1273. return -EIO;
  1274. }
  1275. qp = wq->qp;
  1276. arbel_qp = ib_qp_get_drvdata ( qp );
  1277. arbel_send_wq = &arbel_qp->send;
  1278. arbel_recv_wq = &arbel_qp->recv;
  1279. /* Identify work queue entry index */
  1280. if ( is_send ) {
  1281. wqe_idx = ( ( wqe_adr - virt_to_bus ( arbel_send_wq->wqe ) ) /
  1282. sizeof ( arbel_send_wq->wqe[0] ) );
  1283. assert ( wqe_idx < qp->send.num_wqes );
  1284. } else {
  1285. wqe_idx = ( ( wqe_adr - virt_to_bus ( arbel_recv_wq->wqe ) ) /
  1286. sizeof ( arbel_recv_wq->wqe[0] ) );
  1287. assert ( wqe_idx < qp->recv.num_wqes );
  1288. }
  1289. DBGCP ( arbel, "Arbel %p CQN %#lx QPN %#lx %s WQE %#lx completed:\n",
  1290. arbel, cq->cqn, qp->qpn, ( is_send ? "send" : "recv" ),
  1291. wqe_idx );
  1292. DBGCP_HDA ( arbel, virt_to_phys ( cqe ), cqe, sizeof ( *cqe ) );
  1293. /* Identify I/O buffer */
  1294. iobuf = wq->iobufs[wqe_idx];
  1295. if ( ! iobuf ) {
  1296. DBGC ( arbel, "Arbel %p CQN %#lx QPN %#lx empty %s WQE %#lx\n",
  1297. arbel, cq->cqn, qp->qpn, ( is_send ? "send" : "recv" ),
  1298. wqe_idx );
  1299. return -EIO;
  1300. }
  1301. wq->iobufs[wqe_idx] = NULL;
  1302. if ( is_send ) {
  1303. /* Hand off to completion handler */
  1304. ib_complete_send ( ibdev, qp, iobuf, rc );
  1305. } else {
  1306. /* Set received length */
  1307. len = MLX_GET ( &cqe->normal, byte_cnt );
  1308. recv_wqe = &arbel_recv_wq->wqe[wqe_idx].recv;
  1309. assert ( MLX_GET ( &recv_wqe->data[0], local_address_l ) ==
  1310. virt_to_bus ( iobuf->data ) );
  1311. assert ( MLX_GET ( &recv_wqe->data[0], byte_count ) ==
  1312. iob_tailroom ( iobuf ) );
  1313. MLX_FILL_1 ( &recv_wqe->data[0], 0, byte_count, 0 );
  1314. MLX_FILL_1 ( &recv_wqe->data[0], 1,
  1315. l_key, ARBEL_INVALID_LKEY );
  1316. assert ( len <= iob_tailroom ( iobuf ) );
  1317. iob_put ( iobuf, len );
  1318. assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
  1319. grh = iobuf->data;
  1320. iob_pull ( iobuf, sizeof ( *grh ) );
  1321. /* Construct address vector */
  1322. memset ( &av, 0, sizeof ( av ) );
  1323. av.qpn = MLX_GET ( &cqe->normal, rqpn );
  1324. av.lid = MLX_GET ( &cqe->normal, rlid );
  1325. av.sl = MLX_GET ( &cqe->normal, sl );
  1326. av.gid_present = MLX_GET ( &cqe->normal, g );
  1327. memcpy ( &av.gid, &grh->sgid, sizeof ( av.gid ) );
  1328. /* Hand off to completion handler */
  1329. ib_complete_recv ( ibdev, qp, &av, iobuf, rc );
  1330. }
  1331. return rc;
  1332. }
  1333. /**
  1334. * Poll completion queue
  1335. *
  1336. * @v ibdev Infiniband device
  1337. * @v cq Completion queue
  1338. */
  1339. static void arbel_poll_cq ( struct ib_device *ibdev,
  1340. struct ib_completion_queue *cq ) {
  1341. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1342. struct arbel_completion_queue *arbel_cq = ib_cq_get_drvdata ( cq );
  1343. struct arbelprm_cq_ci_db_record *ci_db_rec;
  1344. union arbelprm_completion_entry *cqe;
  1345. unsigned int cqe_idx_mask;
  1346. int rc;
  1347. while ( 1 ) {
  1348. /* Look for completion entry */
  1349. cqe_idx_mask = ( cq->num_cqes - 1 );
  1350. cqe = &arbel_cq->cqe[cq->next_idx & cqe_idx_mask];
  1351. if ( MLX_GET ( &cqe->normal, owner ) != 0 ) {
  1352. /* Entry still owned by hardware; end of poll */
  1353. break;
  1354. }
  1355. /* Handle completion */
  1356. if ( ( rc = arbel_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1357. DBGC ( arbel, "Arbel %p CQN %#lx failed to complete: "
  1358. "%s\n", arbel, cq->cqn, strerror ( rc ) );
  1359. DBGC_HD ( arbel, cqe, sizeof ( *cqe ) );
  1360. }
  1361. /* Return ownership to hardware */
  1362. MLX_FILL_1 ( &cqe->normal, 7, owner, 1 );
  1363. barrier();
  1364. /* Update completion queue's index */
  1365. cq->next_idx++;
  1366. /* Update doorbell record */
  1367. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  1368. MLX_FILL_1 ( ci_db_rec, 0,
  1369. counter, ( cq->next_idx & 0xffffffffUL ) );
  1370. }
  1371. }
  1372. /***************************************************************************
  1373. *
  1374. * Event queues
  1375. *
  1376. ***************************************************************************
  1377. */
  1378. /**
  1379. * Create event queue
  1380. *
  1381. * @v arbel Arbel device
  1382. * @ret rc Return status code
  1383. */
  1384. static int arbel_create_eq ( struct arbel *arbel ) {
  1385. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1386. struct arbelprm_eqc eqctx;
  1387. struct arbelprm_event_mask mask;
  1388. unsigned int i;
  1389. int rc;
  1390. /* Select event queue number */
  1391. arbel_eq->eqn = arbel->limits.reserved_eqs;
  1392. /* Calculate doorbell address */
  1393. arbel_eq->doorbell = ( arbel->eq_ci_doorbells +
  1394. ARBEL_DB_EQ_OFFSET ( arbel_eq->eqn ) );
  1395. /* Allocate event queue itself */
  1396. arbel_eq->eqe_size =
  1397. ( ARBEL_NUM_EQES * sizeof ( arbel_eq->eqe[0] ) );
  1398. arbel_eq->eqe = malloc_dma ( arbel_eq->eqe_size,
  1399. sizeof ( arbel_eq->eqe[0] ) );
  1400. if ( ! arbel_eq->eqe ) {
  1401. rc = -ENOMEM;
  1402. goto err_eqe;
  1403. }
  1404. memset ( arbel_eq->eqe, 0, arbel_eq->eqe_size );
  1405. for ( i = 0 ; i < ARBEL_NUM_EQES ; i++ ) {
  1406. MLX_FILL_1 ( &arbel_eq->eqe[i].generic, 7, owner, 1 );
  1407. }
  1408. barrier();
  1409. /* Hand queue over to hardware */
  1410. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1411. MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
  1412. MLX_FILL_1 ( &eqctx, 2,
  1413. start_address_l, virt_to_phys ( arbel_eq->eqe ) );
  1414. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( ARBEL_NUM_EQES - 1 ) );
  1415. MLX_FILL_1 ( &eqctx, 6, pd, ARBEL_GLOBAL_PD );
  1416. MLX_FILL_1 ( &eqctx, 7, lkey, arbel->reserved_lkey );
  1417. if ( ( rc = arbel_cmd_sw2hw_eq ( arbel, arbel_eq->eqn,
  1418. &eqctx ) ) != 0 ) {
  1419. DBGC ( arbel, "Arbel %p EQN %#lx SW2HW_EQ failed: %s\n",
  1420. arbel, arbel_eq->eqn, strerror ( rc ) );
  1421. goto err_sw2hw_eq;
  1422. }
  1423. /* Map events to this event queue */
  1424. memset ( &mask, 0xff, sizeof ( mask ) );
  1425. if ( ( rc = arbel_cmd_map_eq ( arbel,
  1426. ( ARBEL_MAP_EQ | arbel_eq->eqn ),
  1427. &mask ) ) != 0 ) {
  1428. DBGC ( arbel, "Arbel %p EQN %#lx MAP_EQ failed: %s\n",
  1429. arbel, arbel_eq->eqn, strerror ( rc ) );
  1430. goto err_map_eq;
  1431. }
  1432. DBGC ( arbel, "Arbel %p EQN %#lx ring [%08lx,%08lx), doorbell %08lx\n",
  1433. arbel, arbel_eq->eqn, virt_to_phys ( arbel_eq->eqe ),
  1434. ( virt_to_phys ( arbel_eq->eqe ) + arbel_eq->eqe_size ),
  1435. virt_to_phys ( arbel_eq->doorbell ) );
  1436. return 0;
  1437. err_map_eq:
  1438. arbel_cmd_hw2sw_eq ( arbel, arbel_eq->eqn, &eqctx );
  1439. err_sw2hw_eq:
  1440. free_dma ( arbel_eq->eqe, arbel_eq->eqe_size );
  1441. err_eqe:
  1442. memset ( arbel_eq, 0, sizeof ( *arbel_eq ) );
  1443. return rc;
  1444. }
  1445. /**
  1446. * Destroy event queue
  1447. *
  1448. * @v arbel Arbel device
  1449. */
  1450. static void arbel_destroy_eq ( struct arbel *arbel ) {
  1451. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1452. struct arbelprm_eqc eqctx;
  1453. struct arbelprm_event_mask mask;
  1454. int rc;
  1455. /* Unmap events from event queue */
  1456. memset ( &mask, 0, sizeof ( mask ) );
  1457. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1458. if ( ( rc = arbel_cmd_map_eq ( arbel,
  1459. ( ARBEL_UNMAP_EQ | arbel_eq->eqn ),
  1460. &mask ) ) != 0 ) {
  1461. DBGC ( arbel, "Arbel %p EQN %#lx FATAL MAP_EQ failed to "
  1462. "unmap: %s\n", arbel, arbel_eq->eqn, strerror ( rc ) );
  1463. /* Continue; HCA may die but system should survive */
  1464. }
  1465. /* Take ownership back from hardware */
  1466. if ( ( rc = arbel_cmd_hw2sw_eq ( arbel, arbel_eq->eqn,
  1467. &eqctx ) ) != 0 ) {
  1468. DBGC ( arbel, "Arbel %p EQN %#lx FATAL HW2SW_EQ failed: %s\n",
  1469. arbel, arbel_eq->eqn, strerror ( rc ) );
  1470. /* Leak memory and return; at least we avoid corruption */
  1471. return;
  1472. }
  1473. /* Free memory */
  1474. free_dma ( arbel_eq->eqe, arbel_eq->eqe_size );
  1475. memset ( arbel_eq, 0, sizeof ( *arbel_eq ) );
  1476. }
  1477. /**
  1478. * Handle port state event
  1479. *
  1480. * @v arbel Arbel device
  1481. * @v eqe Port state change event queue entry
  1482. */
  1483. static void arbel_event_port_state_change ( struct arbel *arbel,
  1484. union arbelprm_event_entry *eqe){
  1485. unsigned int port;
  1486. int link_up;
  1487. /* Get port and link status */
  1488. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1489. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1490. DBGC ( arbel, "Arbel %p port %d link %s\n", arbel, ( port + 1 ),
  1491. ( link_up ? "up" : "down" ) );
  1492. /* Sanity check */
  1493. if ( port >= ARBEL_NUM_PORTS ) {
  1494. DBGC ( arbel, "Arbel %p port %d does not exist!\n",
  1495. arbel, ( port + 1 ) );
  1496. return;
  1497. }
  1498. /* Update MAD parameters */
  1499. ib_smc_update ( arbel->ibdev[port], arbel_mad );
  1500. }
  1501. /**
  1502. * Poll event queue
  1503. *
  1504. * @v ibdev Infiniband device
  1505. */
  1506. static void arbel_poll_eq ( struct ib_device *ibdev ) {
  1507. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1508. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1509. union arbelprm_event_entry *eqe;
  1510. union arbelprm_eq_doorbell_register db_reg;
  1511. unsigned int eqe_idx_mask;
  1512. unsigned int event_type;
  1513. /* No event is generated upon reaching INIT, so we must poll
  1514. * separately for link state changes while we remain DOWN.
  1515. */
  1516. if ( ib_is_open ( ibdev ) &&
  1517. ( ibdev->port_state == IB_PORT_STATE_DOWN ) ) {
  1518. ib_smc_update ( ibdev, arbel_mad );
  1519. }
  1520. /* Poll event queue */
  1521. while ( 1 ) {
  1522. /* Look for event entry */
  1523. eqe_idx_mask = ( ARBEL_NUM_EQES - 1 );
  1524. eqe = &arbel_eq->eqe[arbel_eq->next_idx & eqe_idx_mask];
  1525. if ( MLX_GET ( &eqe->generic, owner ) != 0 ) {
  1526. /* Entry still owned by hardware; end of poll */
  1527. break;
  1528. }
  1529. DBGCP ( arbel, "Arbel %p EQN %#lx event:\n",
  1530. arbel, arbel_eq->eqn );
  1531. DBGCP_HDA ( arbel, virt_to_phys ( eqe ),
  1532. eqe, sizeof ( *eqe ) );
  1533. /* Handle event */
  1534. event_type = MLX_GET ( &eqe->generic, event_type );
  1535. switch ( event_type ) {
  1536. case ARBEL_EV_PORT_STATE_CHANGE:
  1537. arbel_event_port_state_change ( arbel, eqe );
  1538. break;
  1539. default:
  1540. DBGC ( arbel, "Arbel %p EQN %#lx unrecognised event "
  1541. "type %#x:\n",
  1542. arbel, arbel_eq->eqn, event_type );
  1543. DBGC_HDA ( arbel, virt_to_phys ( eqe ),
  1544. eqe, sizeof ( *eqe ) );
  1545. break;
  1546. }
  1547. /* Return ownership to hardware */
  1548. MLX_FILL_1 ( &eqe->generic, 7, owner, 1 );
  1549. barrier();
  1550. /* Update event queue's index */
  1551. arbel_eq->next_idx++;
  1552. /* Ring doorbell */
  1553. MLX_FILL_1 ( &db_reg.ci, 0, ci, arbel_eq->next_idx );
  1554. writel ( db_reg.dword[0], arbel_eq->doorbell );
  1555. }
  1556. }
  1557. /***************************************************************************
  1558. *
  1559. * Infiniband link-layer operations
  1560. *
  1561. ***************************************************************************
  1562. */
  1563. /**
  1564. * Initialise Infiniband link
  1565. *
  1566. * @v ibdev Infiniband device
  1567. * @ret rc Return status code
  1568. */
  1569. static int arbel_open ( struct ib_device *ibdev ) {
  1570. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1571. struct arbelprm_init_ib init_ib;
  1572. int rc;
  1573. memset ( &init_ib, 0, sizeof ( init_ib ) );
  1574. MLX_FILL_3 ( &init_ib, 0,
  1575. mtu_cap, ARBEL_MTU_2048,
  1576. port_width_cap, 3,
  1577. vl_cap, 1 );
  1578. MLX_FILL_1 ( &init_ib, 1, max_gid, 1 );
  1579. MLX_FILL_1 ( &init_ib, 2, max_pkey, 64 );
  1580. if ( ( rc = arbel_cmd_init_ib ( arbel, ibdev->port,
  1581. &init_ib ) ) != 0 ) {
  1582. DBGC ( arbel, "Arbel %p port %d could not intialise IB: %s\n",
  1583. arbel, ibdev->port, strerror ( rc ) );
  1584. return rc;
  1585. }
  1586. /* Update MAD parameters */
  1587. ib_smc_update ( ibdev, arbel_mad );
  1588. return 0;
  1589. }
  1590. /**
  1591. * Close Infiniband link
  1592. *
  1593. * @v ibdev Infiniband device
  1594. */
  1595. static void arbel_close ( struct ib_device *ibdev ) {
  1596. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1597. int rc;
  1598. if ( ( rc = arbel_cmd_close_ib ( arbel, ibdev->port ) ) != 0 ) {
  1599. DBGC ( arbel, "Arbel %p port %d could not close IB: %s\n",
  1600. arbel, ibdev->port, strerror ( rc ) );
  1601. /* Nothing we can do about this */
  1602. }
  1603. }
  1604. /**
  1605. * Inform embedded subnet management agent of a received MAD
  1606. *
  1607. * @v ibdev Infiniband device
  1608. * @v mad MAD
  1609. * @ret rc Return status code
  1610. */
  1611. static int arbel_inform_sma ( struct ib_device *ibdev, union ib_mad *mad ) {
  1612. int rc;
  1613. /* Send the MAD to the embedded SMA */
  1614. if ( ( rc = arbel_mad ( ibdev, mad ) ) != 0 )
  1615. return rc;
  1616. /* Update parameters held in software */
  1617. ib_smc_update ( ibdev, arbel_mad );
  1618. return 0;
  1619. }
  1620. /***************************************************************************
  1621. *
  1622. * Multicast group operations
  1623. *
  1624. ***************************************************************************
  1625. */
  1626. /**
  1627. * Attach to multicast group
  1628. *
  1629. * @v ibdev Infiniband device
  1630. * @v qp Queue pair
  1631. * @v gid Multicast GID
  1632. * @ret rc Return status code
  1633. */
  1634. static int arbel_mcast_attach ( struct ib_device *ibdev,
  1635. struct ib_queue_pair *qp,
  1636. union ib_gid *gid ) {
  1637. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1638. struct arbelprm_mgm_hash hash;
  1639. struct arbelprm_mgm_entry mgm;
  1640. unsigned int index;
  1641. int rc;
  1642. /* Generate hash table index */
  1643. if ( ( rc = arbel_cmd_mgid_hash ( arbel, gid, &hash ) ) != 0 ) {
  1644. DBGC ( arbel, "Arbel %p could not hash GID: %s\n",
  1645. arbel, strerror ( rc ) );
  1646. return rc;
  1647. }
  1648. index = MLX_GET ( &hash, hash );
  1649. /* Check for existing hash table entry */
  1650. if ( ( rc = arbel_cmd_read_mgm ( arbel, index, &mgm ) ) != 0 ) {
  1651. DBGC ( arbel, "Arbel %p could not read MGM %#x: %s\n",
  1652. arbel, index, strerror ( rc ) );
  1653. return rc;
  1654. }
  1655. if ( MLX_GET ( &mgm, mgmqp_0.qi ) != 0 ) {
  1656. /* FIXME: this implementation allows only a single QP
  1657. * per multicast group, and doesn't handle hash
  1658. * collisions. Sufficient for IPoIB but may need to
  1659. * be extended in future.
  1660. */
  1661. DBGC ( arbel, "Arbel %p MGID index %#x already in use\n",
  1662. arbel, index );
  1663. return -EBUSY;
  1664. }
  1665. /* Update hash table entry */
  1666. MLX_FILL_2 ( &mgm, 8,
  1667. mgmqp_0.qpn_i, qp->qpn,
  1668. mgmqp_0.qi, 1 );
  1669. memcpy ( &mgm.u.dwords[4], gid, sizeof ( *gid ) );
  1670. if ( ( rc = arbel_cmd_write_mgm ( arbel, index, &mgm ) ) != 0 ) {
  1671. DBGC ( arbel, "Arbel %p could not write MGM %#x: %s\n",
  1672. arbel, index, strerror ( rc ) );
  1673. return rc;
  1674. }
  1675. return 0;
  1676. }
  1677. /**
  1678. * Detach from multicast group
  1679. *
  1680. * @v ibdev Infiniband device
  1681. * @v qp Queue pair
  1682. * @v gid Multicast GID
  1683. */
  1684. static void arbel_mcast_detach ( struct ib_device *ibdev,
  1685. struct ib_queue_pair *qp __unused,
  1686. union ib_gid *gid ) {
  1687. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1688. struct arbelprm_mgm_hash hash;
  1689. struct arbelprm_mgm_entry mgm;
  1690. unsigned int index;
  1691. int rc;
  1692. /* Generate hash table index */
  1693. if ( ( rc = arbel_cmd_mgid_hash ( arbel, gid, &hash ) ) != 0 ) {
  1694. DBGC ( arbel, "Arbel %p could not hash GID: %s\n",
  1695. arbel, strerror ( rc ) );
  1696. return;
  1697. }
  1698. index = MLX_GET ( &hash, hash );
  1699. /* Clear hash table entry */
  1700. memset ( &mgm, 0, sizeof ( mgm ) );
  1701. if ( ( rc = arbel_cmd_write_mgm ( arbel, index, &mgm ) ) != 0 ) {
  1702. DBGC ( arbel, "Arbel %p could not write MGM %#x: %s\n",
  1703. arbel, index, strerror ( rc ) );
  1704. return;
  1705. }
  1706. }
  1707. /** Arbel Infiniband operations */
  1708. static struct ib_device_operations arbel_ib_operations = {
  1709. .create_cq = arbel_create_cq,
  1710. .destroy_cq = arbel_destroy_cq,
  1711. .create_qp = arbel_create_qp,
  1712. .modify_qp = arbel_modify_qp,
  1713. .destroy_qp = arbel_destroy_qp,
  1714. .post_send = arbel_post_send,
  1715. .post_recv = arbel_post_recv,
  1716. .poll_cq = arbel_poll_cq,
  1717. .poll_eq = arbel_poll_eq,
  1718. .open = arbel_open,
  1719. .close = arbel_close,
  1720. .mcast_attach = arbel_mcast_attach,
  1721. .mcast_detach = arbel_mcast_detach,
  1722. .set_port_info = arbel_inform_sma,
  1723. .set_pkey_table = arbel_inform_sma,
  1724. };
  1725. /***************************************************************************
  1726. *
  1727. * Firmware control
  1728. *
  1729. ***************************************************************************
  1730. */
  1731. /**
  1732. * Start firmware running
  1733. *
  1734. * @v arbel Arbel device
  1735. * @ret rc Return status code
  1736. */
  1737. static int arbel_start_firmware ( struct arbel *arbel ) {
  1738. struct arbelprm_query_fw fw;
  1739. struct arbelprm_access_lam lam;
  1740. struct arbelprm_virtual_physical_mapping map_fa;
  1741. unsigned int fw_pages;
  1742. unsigned int log2_fw_pages;
  1743. size_t fw_size;
  1744. physaddr_t fw_base;
  1745. uint64_t eq_set_ci_base_addr;
  1746. int rc;
  1747. /* Get firmware parameters */
  1748. if ( ( rc = arbel_cmd_query_fw ( arbel, &fw ) ) != 0 ) {
  1749. DBGC ( arbel, "Arbel %p could not query firmware: %s\n",
  1750. arbel, strerror ( rc ) );
  1751. goto err_query_fw;
  1752. }
  1753. DBGC ( arbel, "Arbel %p firmware version %d.%d.%d\n", arbel,
  1754. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  1755. MLX_GET ( &fw, fw_rev_subminor ) );
  1756. fw_pages = MLX_GET ( &fw, fw_pages );
  1757. log2_fw_pages = fls ( fw_pages - 1 );
  1758. fw_pages = ( 1 << log2_fw_pages );
  1759. DBGC ( arbel, "Arbel %p requires %d kB for firmware\n",
  1760. arbel, ( fw_pages * 4 ) );
  1761. eq_set_ci_base_addr =
  1762. ( ( (uint64_t) MLX_GET ( &fw, eq_set_ci_base_addr_h ) << 32 ) |
  1763. ( (uint64_t) MLX_GET ( &fw, eq_set_ci_base_addr_l ) ) );
  1764. arbel->eq_ci_doorbells = ioremap ( eq_set_ci_base_addr, 0x200 );
  1765. /* Enable locally-attached memory. Ignore failure; there may
  1766. * be no attached memory.
  1767. */
  1768. arbel_cmd_enable_lam ( arbel, &lam );
  1769. /* Allocate firmware pages and map firmware area */
  1770. fw_size = ( fw_pages * 4096 );
  1771. arbel->firmware_area = umalloc ( fw_size * 2 );
  1772. if ( ! arbel->firmware_area ) {
  1773. rc = -ENOMEM;
  1774. goto err_alloc_fa;
  1775. }
  1776. fw_base = ( user_to_phys ( arbel->firmware_area, fw_size ) &
  1777. ~( fw_size - 1 ) );
  1778. DBGC ( arbel, "Arbel %p firmware area at [%08lx,%08lx)\n",
  1779. arbel, fw_base, ( fw_base + fw_size ) );
  1780. memset ( &map_fa, 0, sizeof ( map_fa ) );
  1781. MLX_FILL_2 ( &map_fa, 3,
  1782. log2size, log2_fw_pages,
  1783. pa_l, ( fw_base >> 12 ) );
  1784. if ( ( rc = arbel_cmd_map_fa ( arbel, &map_fa ) ) != 0 ) {
  1785. DBGC ( arbel, "Arbel %p could not map firmware: %s\n",
  1786. arbel, strerror ( rc ) );
  1787. goto err_map_fa;
  1788. }
  1789. /* Start firmware */
  1790. if ( ( rc = arbel_cmd_run_fw ( arbel ) ) != 0 ) {
  1791. DBGC ( arbel, "Arbel %p could not run firmware: %s\n",
  1792. arbel, strerror ( rc ) );
  1793. goto err_run_fw;
  1794. }
  1795. DBGC ( arbel, "Arbel %p firmware started\n", arbel );
  1796. return 0;
  1797. err_run_fw:
  1798. arbel_cmd_unmap_fa ( arbel );
  1799. err_map_fa:
  1800. ufree ( arbel->firmware_area );
  1801. arbel->firmware_area = UNULL;
  1802. err_alloc_fa:
  1803. err_query_fw:
  1804. return rc;
  1805. }
  1806. /**
  1807. * Stop firmware running
  1808. *
  1809. * @v arbel Arbel device
  1810. */
  1811. static void arbel_stop_firmware ( struct arbel *arbel ) {
  1812. int rc;
  1813. if ( ( rc = arbel_cmd_unmap_fa ( arbel ) ) != 0 ) {
  1814. DBGC ( arbel, "Arbel %p FATAL could not stop firmware: %s\n",
  1815. arbel, strerror ( rc ) );
  1816. /* Leak memory and return; at least we avoid corruption */
  1817. return;
  1818. }
  1819. ufree ( arbel->firmware_area );
  1820. arbel->firmware_area = UNULL;
  1821. }
  1822. /***************************************************************************
  1823. *
  1824. * Infinihost Context Memory management
  1825. *
  1826. ***************************************************************************
  1827. */
  1828. /**
  1829. * Get device limits
  1830. *
  1831. * @v arbel Arbel device
  1832. * @ret rc Return status code
  1833. */
  1834. static int arbel_get_limits ( struct arbel *arbel ) {
  1835. struct arbelprm_query_dev_lim dev_lim;
  1836. int rc;
  1837. if ( ( rc = arbel_cmd_query_dev_lim ( arbel, &dev_lim ) ) != 0 ) {
  1838. DBGC ( arbel, "Arbel %p could not get device limits: %s\n",
  1839. arbel, strerror ( rc ) );
  1840. return rc;
  1841. }
  1842. arbel->limits.reserved_qps =
  1843. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_qps ) );
  1844. arbel->limits.qpc_entry_size = MLX_GET ( &dev_lim, qpc_entry_sz );
  1845. arbel->limits.eqpc_entry_size = MLX_GET ( &dev_lim, eqpc_entry_sz );
  1846. arbel->limits.reserved_srqs =
  1847. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_srqs ) );
  1848. arbel->limits.srqc_entry_size = MLX_GET ( &dev_lim, srq_entry_sz );
  1849. arbel->limits.reserved_ees =
  1850. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_ees ) );
  1851. arbel->limits.eec_entry_size = MLX_GET ( &dev_lim, eec_entry_sz );
  1852. arbel->limits.eeec_entry_size = MLX_GET ( &dev_lim, eeec_entry_sz );
  1853. arbel->limits.reserved_cqs =
  1854. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_cqs ) );
  1855. arbel->limits.cqc_entry_size = MLX_GET ( &dev_lim, cqc_entry_sz );
  1856. arbel->limits.reserved_eqs = MLX_GET ( &dev_lim, num_rsvd_eqs );
  1857. arbel->limits.reserved_mtts =
  1858. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_mtts ) );
  1859. arbel->limits.mtt_entry_size = MLX_GET ( &dev_lim, mtt_entry_sz );
  1860. arbel->limits.reserved_mrws =
  1861. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_mrws ) );
  1862. arbel->limits.mpt_entry_size = MLX_GET ( &dev_lim, mpt_entry_sz );
  1863. arbel->limits.reserved_rdbs =
  1864. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_rdbs ) );
  1865. arbel->limits.eqc_entry_size = MLX_GET ( &dev_lim, eqc_entry_sz );
  1866. arbel->limits.reserved_uars = MLX_GET ( &dev_lim, num_rsvd_uars );
  1867. return 0;
  1868. }
  1869. /**
  1870. * Get ICM usage
  1871. *
  1872. * @v log_num_entries Log2 of the number of entries
  1873. * @v entry_size Entry size
  1874. * @ret usage Usage size in ICM
  1875. */
  1876. static size_t icm_usage ( unsigned int log_num_entries, size_t entry_size ) {
  1877. size_t usage;
  1878. usage = ( ( 1 << log_num_entries ) * entry_size );
  1879. usage = ( ( usage + 4095 ) & ~4095 );
  1880. return usage;
  1881. }
  1882. /**
  1883. * Allocate ICM
  1884. *
  1885. * @v arbel Arbel device
  1886. * @v init_hca INIT_HCA structure to fill in
  1887. * @ret rc Return status code
  1888. */
  1889. static int arbel_alloc_icm ( struct arbel *arbel,
  1890. struct arbelprm_init_hca *init_hca ) {
  1891. struct arbelprm_scalar_parameter icm_size;
  1892. struct arbelprm_scalar_parameter icm_aux_size;
  1893. struct arbelprm_virtual_physical_mapping map_icm_aux;
  1894. struct arbelprm_virtual_physical_mapping map_icm;
  1895. union arbelprm_doorbell_record *db_rec;
  1896. size_t icm_offset = 0;
  1897. unsigned int log_num_qps, log_num_srqs, log_num_ees, log_num_cqs;
  1898. unsigned int log_num_mtts, log_num_mpts, log_num_rdbs, log_num_eqs;
  1899. int rc;
  1900. icm_offset = ( ( arbel->limits.reserved_uars + 1 ) << 12 );
  1901. /* Queue pair contexts */
  1902. log_num_qps = fls ( arbel->limits.reserved_qps +
  1903. ARBEL_RSVD_SPECIAL_QPS + ARBEL_MAX_QPS - 1 );
  1904. MLX_FILL_2 ( init_hca, 13,
  1905. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  1906. ( icm_offset >> 7 ),
  1907. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  1908. log_num_qps );
  1909. DBGC ( arbel, "Arbel %p ICM QPC base = %zx\n", arbel, icm_offset );
  1910. icm_offset += icm_usage ( log_num_qps, arbel->limits.qpc_entry_size );
  1911. /* Extended queue pair contexts */
  1912. MLX_FILL_1 ( init_hca, 25,
  1913. qpc_eec_cqc_eqc_rdb_parameters.eqpc_base_addr_l,
  1914. icm_offset );
  1915. DBGC ( arbel, "Arbel %p ICM EQPC base = %zx\n", arbel, icm_offset );
  1916. // icm_offset += icm_usage ( log_num_qps, arbel->limits.eqpc_entry_size );
  1917. icm_offset += icm_usage ( log_num_qps, arbel->limits.qpc_entry_size );
  1918. /* Shared receive queue contexts */
  1919. log_num_srqs = fls ( arbel->limits.reserved_srqs - 1 );
  1920. MLX_FILL_2 ( init_hca, 19,
  1921. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  1922. ( icm_offset >> 5 ),
  1923. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  1924. log_num_srqs );
  1925. DBGC ( arbel, "Arbel %p ICM SRQC base = %zx\n", arbel, icm_offset );
  1926. icm_offset += icm_usage ( log_num_srqs, arbel->limits.srqc_entry_size );
  1927. /* End-to-end contexts */
  1928. log_num_ees = fls ( arbel->limits.reserved_ees - 1 );
  1929. MLX_FILL_2 ( init_hca, 17,
  1930. qpc_eec_cqc_eqc_rdb_parameters.eec_base_addr_l,
  1931. ( icm_offset >> 7 ),
  1932. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_ee,
  1933. log_num_ees );
  1934. DBGC ( arbel, "Arbel %p ICM EEC base = %zx\n", arbel, icm_offset );
  1935. icm_offset += icm_usage ( log_num_ees, arbel->limits.eec_entry_size );
  1936. /* Extended end-to-end contexts */
  1937. MLX_FILL_1 ( init_hca, 29,
  1938. qpc_eec_cqc_eqc_rdb_parameters.eeec_base_addr_l,
  1939. icm_offset );
  1940. DBGC ( arbel, "Arbel %p ICM EEEC base = %zx\n", arbel, icm_offset );
  1941. icm_offset += icm_usage ( log_num_ees, arbel->limits.eeec_entry_size );
  1942. /* Completion queue contexts */
  1943. log_num_cqs = fls ( arbel->limits.reserved_cqs + ARBEL_MAX_CQS - 1 );
  1944. MLX_FILL_2 ( init_hca, 21,
  1945. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  1946. ( icm_offset >> 6 ),
  1947. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  1948. log_num_cqs );
  1949. DBGC ( arbel, "Arbel %p ICM CQC base = %zx\n", arbel, icm_offset );
  1950. icm_offset += icm_usage ( log_num_cqs, arbel->limits.cqc_entry_size );
  1951. /* Memory translation table */
  1952. log_num_mtts = fls ( arbel->limits.reserved_mtts - 1 );
  1953. MLX_FILL_1 ( init_hca, 65,
  1954. tpt_parameters.mtt_base_addr_l, icm_offset );
  1955. DBGC ( arbel, "Arbel %p ICM MTT base = %zx\n", arbel, icm_offset );
  1956. icm_offset += icm_usage ( log_num_mtts, arbel->limits.mtt_entry_size );
  1957. /* Memory protection table */
  1958. log_num_mpts = fls ( arbel->limits.reserved_mrws + 1 - 1 );
  1959. MLX_FILL_1 ( init_hca, 61,
  1960. tpt_parameters.mpt_base_adr_l, icm_offset );
  1961. MLX_FILL_1 ( init_hca, 62,
  1962. tpt_parameters.log_mpt_sz, log_num_mpts );
  1963. DBGC ( arbel, "Arbel %p ICM MTT base = %zx\n", arbel, icm_offset );
  1964. icm_offset += icm_usage ( log_num_mpts, arbel->limits.mpt_entry_size );
  1965. /* RDMA something or other */
  1966. log_num_rdbs = fls ( arbel->limits.reserved_rdbs - 1 );
  1967. MLX_FILL_1 ( init_hca, 37,
  1968. qpc_eec_cqc_eqc_rdb_parameters.rdb_base_addr_l,
  1969. icm_offset );
  1970. DBGC ( arbel, "Arbel %p ICM RDB base = %zx\n", arbel, icm_offset );
  1971. icm_offset += icm_usage ( log_num_rdbs, 32 );
  1972. /* Event queue contexts */
  1973. log_num_eqs = fls ( arbel->limits.reserved_eqs + ARBEL_MAX_EQS - 1 );
  1974. MLX_FILL_2 ( init_hca, 33,
  1975. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  1976. ( icm_offset >> 6 ),
  1977. qpc_eec_cqc_eqc_rdb_parameters.log_num_eq,
  1978. log_num_eqs );
  1979. DBGC ( arbel, "Arbel %p ICM EQ base = %zx\n", arbel, icm_offset );
  1980. icm_offset += ( ( 1 << log_num_eqs ) * arbel->limits.eqc_entry_size );
  1981. /* Multicast table */
  1982. MLX_FILL_1 ( init_hca, 49,
  1983. multicast_parameters.mc_base_addr_l, icm_offset );
  1984. MLX_FILL_1 ( init_hca, 52,
  1985. multicast_parameters.log_mc_table_entry_sz,
  1986. fls ( sizeof ( struct arbelprm_mgm_entry ) - 1 ) );
  1987. MLX_FILL_1 ( init_hca, 53,
  1988. multicast_parameters.mc_table_hash_sz, 8 );
  1989. MLX_FILL_1 ( init_hca, 54,
  1990. multicast_parameters.log_mc_table_sz, 3 );
  1991. DBGC ( arbel, "Arbel %p ICM MC base = %zx\n", arbel, icm_offset );
  1992. icm_offset += ( 8 * sizeof ( struct arbelprm_mgm_entry ) );
  1993. arbel->icm_len = icm_offset;
  1994. arbel->icm_len = ( ( arbel->icm_len + 4095 ) & ~4095 );
  1995. /* Get ICM auxiliary area size */
  1996. memset ( &icm_size, 0, sizeof ( icm_size ) );
  1997. MLX_FILL_1 ( &icm_size, 1, value, arbel->icm_len );
  1998. if ( ( rc = arbel_cmd_set_icm_size ( arbel, &icm_size,
  1999. &icm_aux_size ) ) != 0 ) {
  2000. DBGC ( arbel, "Arbel %p could not set ICM size: %s\n",
  2001. arbel, strerror ( rc ) );
  2002. goto err_set_icm_size;
  2003. }
  2004. arbel->icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * 4096 );
  2005. /* Allocate ICM data and auxiliary area */
  2006. DBGC ( arbel, "Arbel %p requires %zd kB ICM and %zd kB AUX ICM\n",
  2007. arbel, ( arbel->icm_len / 1024 ),
  2008. ( arbel->icm_aux_len / 1024 ) );
  2009. arbel->icm = umalloc ( arbel->icm_len + arbel->icm_aux_len );
  2010. if ( ! arbel->icm ) {
  2011. rc = -ENOMEM;
  2012. goto err_alloc;
  2013. }
  2014. /* Map ICM auxiliary area */
  2015. memset ( &map_icm_aux, 0, sizeof ( map_icm_aux ) );
  2016. MLX_FILL_2 ( &map_icm_aux, 3,
  2017. log2size, fls ( ( arbel->icm_aux_len / 4096 ) - 1 ),
  2018. pa_l,
  2019. ( user_to_phys ( arbel->icm, arbel->icm_len ) >> 12 ) );
  2020. if ( ( rc = arbel_cmd_map_icm_aux ( arbel, &map_icm_aux ) ) != 0 ) {
  2021. DBGC ( arbel, "Arbel %p could not map AUX ICM: %s\n",
  2022. arbel, strerror ( rc ) );
  2023. goto err_map_icm_aux;
  2024. }
  2025. /* MAP ICM area */
  2026. memset ( &map_icm, 0, sizeof ( map_icm ) );
  2027. MLX_FILL_2 ( &map_icm, 3,
  2028. log2size, fls ( ( arbel->icm_len / 4096 ) - 1 ),
  2029. pa_l, ( user_to_phys ( arbel->icm, 0 ) >> 12 ) );
  2030. if ( ( rc = arbel_cmd_map_icm ( arbel, &map_icm ) ) != 0 ) {
  2031. DBGC ( arbel, "Arbel %p could not map ICM: %s\n",
  2032. arbel, strerror ( rc ) );
  2033. goto err_map_icm;
  2034. }
  2035. /* Initialise UAR context */
  2036. arbel->db_rec = phys_to_virt ( user_to_phys ( arbel->icm, 0 ) +
  2037. ( arbel->limits.reserved_uars *
  2038. ARBEL_PAGE_SIZE ) );
  2039. memset ( arbel->db_rec, 0, ARBEL_PAGE_SIZE );
  2040. db_rec = &arbel->db_rec[ARBEL_GROUP_SEPARATOR_DOORBELL];
  2041. MLX_FILL_1 ( &db_rec->qp, 1, res, ARBEL_UAR_RES_GROUP_SEP );
  2042. return 0;
  2043. arbel_cmd_unmap_icm ( arbel, ( arbel->icm_len / 4096 ) );
  2044. err_map_icm:
  2045. arbel_cmd_unmap_icm_aux ( arbel );
  2046. err_map_icm_aux:
  2047. ufree ( arbel->icm );
  2048. arbel->icm = UNULL;
  2049. err_alloc:
  2050. err_set_icm_size:
  2051. return rc;
  2052. }
  2053. /**
  2054. * Free ICM
  2055. *
  2056. * @v arbel Arbel device
  2057. */
  2058. static void arbel_free_icm ( struct arbel *arbel ) {
  2059. arbel_cmd_unmap_icm ( arbel, ( arbel->icm_len / 4096 ) );
  2060. arbel_cmd_unmap_icm_aux ( arbel );
  2061. ufree ( arbel->icm );
  2062. arbel->icm = UNULL;
  2063. }
  2064. /***************************************************************************
  2065. *
  2066. * PCI interface
  2067. *
  2068. ***************************************************************************
  2069. */
  2070. /**
  2071. * Set up memory protection table
  2072. *
  2073. * @v arbel Arbel device
  2074. * @ret rc Return status code
  2075. */
  2076. static int arbel_setup_mpt ( struct arbel *arbel ) {
  2077. struct arbelprm_mpt mpt;
  2078. uint32_t key;
  2079. int rc;
  2080. /* Derive key */
  2081. key = ( arbel->limits.reserved_mrws | ARBEL_MKEY_PREFIX );
  2082. arbel->reserved_lkey = ( ( key << 8 ) | ( key >> 24 ) );
  2083. /* Initialise memory protection table */
  2084. memset ( &mpt, 0, sizeof ( mpt ) );
  2085. MLX_FILL_4 ( &mpt, 0,
  2086. r_w, 1,
  2087. pa, 1,
  2088. lr, 1,
  2089. lw, 1 );
  2090. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  2091. MLX_FILL_1 ( &mpt, 3, pd, ARBEL_GLOBAL_PD );
  2092. MLX_FILL_1 ( &mpt, 6, reg_wnd_len_h, 0xffffffffUL );
  2093. MLX_FILL_1 ( &mpt, 7, reg_wnd_len_l, 0xffffffffUL );
  2094. if ( ( rc = arbel_cmd_sw2hw_mpt ( arbel, arbel->limits.reserved_mrws,
  2095. &mpt ) ) != 0 ) {
  2096. DBGC ( arbel, "Arbel %p could not set up MPT: %s\n",
  2097. arbel, strerror ( rc ) );
  2098. return rc;
  2099. }
  2100. return 0;
  2101. }
  2102. /**
  2103. * Configure special queue pairs
  2104. *
  2105. * @v arbel Arbel device
  2106. * @ret rc Return status code
  2107. */
  2108. static int arbel_configure_special_qps ( struct arbel *arbel ) {
  2109. unsigned int smi_qpn_base;
  2110. unsigned int gsi_qpn_base;
  2111. int rc;
  2112. /* Special QP block must be aligned on an even number */
  2113. arbel->special_qpn_base = ( ( arbel->limits.reserved_qps + 1 ) & ~1 );
  2114. arbel->qpn_base = ( arbel->special_qpn_base +
  2115. ARBEL_NUM_SPECIAL_QPS );
  2116. DBGC ( arbel, "Arbel %p special QPs at [%lx,%lx]\n", arbel,
  2117. arbel->special_qpn_base, ( arbel->qpn_base - 1 ) );
  2118. smi_qpn_base = arbel->special_qpn_base;
  2119. gsi_qpn_base = ( smi_qpn_base + 2 );
  2120. /* Issue commands to configure special QPs */
  2121. if ( ( rc = arbel_cmd_conf_special_qp ( arbel, 0,
  2122. smi_qpn_base ) ) != 0 ) {
  2123. DBGC ( arbel, "Arbel %p could not configure SMI QPs: %s\n",
  2124. arbel, strerror ( rc ) );
  2125. return rc;
  2126. }
  2127. if ( ( rc = arbel_cmd_conf_special_qp ( arbel, 1,
  2128. gsi_qpn_base ) ) != 0 ) {
  2129. DBGC ( arbel, "Arbel %p could not configure GSI QPs: %s\n",
  2130. arbel, strerror ( rc ) );
  2131. return rc;
  2132. }
  2133. return 0;
  2134. }
  2135. /**
  2136. * Probe PCI device
  2137. *
  2138. * @v pci PCI device
  2139. * @v id PCI ID
  2140. * @ret rc Return status code
  2141. */
  2142. static int arbel_probe ( struct pci_device *pci,
  2143. const struct pci_device_id *id __unused ) {
  2144. struct arbel *arbel;
  2145. struct ib_device *ibdev;
  2146. struct arbelprm_init_hca init_hca;
  2147. int i;
  2148. int rc;
  2149. /* Allocate Arbel device */
  2150. arbel = zalloc ( sizeof ( *arbel ) );
  2151. if ( ! arbel ) {
  2152. rc = -ENOMEM;
  2153. goto err_alloc_arbel;
  2154. }
  2155. pci_set_drvdata ( pci, arbel );
  2156. /* Allocate Infiniband devices */
  2157. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ ) {
  2158. ibdev = alloc_ibdev ( 0 );
  2159. if ( ! ibdev ) {
  2160. rc = -ENOMEM;
  2161. goto err_alloc_ibdev;
  2162. }
  2163. arbel->ibdev[i] = ibdev;
  2164. ibdev->op = &arbel_ib_operations;
  2165. ibdev->dev = &pci->dev;
  2166. ibdev->port = ( ARBEL_PORT_BASE + i );
  2167. ib_set_drvdata ( ibdev, arbel );
  2168. }
  2169. /* Fix up PCI device */
  2170. adjust_pci_device ( pci );
  2171. /* Get PCI BARs */
  2172. arbel->config = ioremap ( pci_bar_start ( pci, ARBEL_PCI_CONFIG_BAR ),
  2173. ARBEL_PCI_CONFIG_BAR_SIZE );
  2174. arbel->uar = ioremap ( ( pci_bar_start ( pci, ARBEL_PCI_UAR_BAR ) +
  2175. ARBEL_PCI_UAR_IDX * ARBEL_PCI_UAR_SIZE ),
  2176. ARBEL_PCI_UAR_SIZE );
  2177. /* Allocate space for mailboxes */
  2178. arbel->mailbox_in = malloc_dma ( ARBEL_MBOX_SIZE, ARBEL_MBOX_ALIGN );
  2179. if ( ! arbel->mailbox_in ) {
  2180. rc = -ENOMEM;
  2181. goto err_mailbox_in;
  2182. }
  2183. arbel->mailbox_out = malloc_dma ( ARBEL_MBOX_SIZE, ARBEL_MBOX_ALIGN );
  2184. if ( ! arbel->mailbox_out ) {
  2185. rc = -ENOMEM;
  2186. goto err_mailbox_out;
  2187. }
  2188. /* Start firmware */
  2189. if ( ( rc = arbel_start_firmware ( arbel ) ) != 0 )
  2190. goto err_start_firmware;
  2191. /* Get device limits */
  2192. if ( ( rc = arbel_get_limits ( arbel ) ) != 0 )
  2193. goto err_get_limits;
  2194. /* Allocate ICM */
  2195. memset ( &init_hca, 0, sizeof ( init_hca ) );
  2196. if ( ( rc = arbel_alloc_icm ( arbel, &init_hca ) ) != 0 )
  2197. goto err_alloc_icm;
  2198. /* Initialise HCA */
  2199. MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 1 );
  2200. if ( ( rc = arbel_cmd_init_hca ( arbel, &init_hca ) ) != 0 ) {
  2201. DBGC ( arbel, "Arbel %p could not initialise HCA: %s\n",
  2202. arbel, strerror ( rc ) );
  2203. goto err_init_hca;
  2204. }
  2205. /* Set up memory protection */
  2206. if ( ( rc = arbel_setup_mpt ( arbel ) ) != 0 )
  2207. goto err_setup_mpt;
  2208. /* Set up event queue */
  2209. if ( ( rc = arbel_create_eq ( arbel ) ) != 0 )
  2210. goto err_create_eq;
  2211. /* Configure special QPs */
  2212. if ( ( rc = arbel_configure_special_qps ( arbel ) ) != 0 )
  2213. goto err_conf_special_qps;
  2214. /* Initialise parameters using SMC */
  2215. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ )
  2216. ib_smc_init ( arbel->ibdev[i], arbel_mad );
  2217. /* Register Infiniband devices */
  2218. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ ) {
  2219. if ( ( rc = register_ibdev ( arbel->ibdev[i] ) ) != 0 ) {
  2220. DBGC ( arbel, "Arbel %p port %d could not register IB "
  2221. "device: %s\n", arbel,
  2222. arbel->ibdev[i]->port, strerror ( rc ) );
  2223. goto err_register_ibdev;
  2224. }
  2225. }
  2226. return 0;
  2227. i = ARBEL_NUM_PORTS;
  2228. err_register_ibdev:
  2229. for ( i-- ; i >= 0 ; i-- )
  2230. unregister_ibdev ( arbel->ibdev[i] );
  2231. err_conf_special_qps:
  2232. arbel_destroy_eq ( arbel );
  2233. err_create_eq:
  2234. err_setup_mpt:
  2235. arbel_cmd_close_hca ( arbel );
  2236. err_init_hca:
  2237. arbel_free_icm ( arbel );
  2238. err_alloc_icm:
  2239. err_get_limits:
  2240. arbel_stop_firmware ( arbel );
  2241. err_start_firmware:
  2242. free_dma ( arbel->mailbox_out, ARBEL_MBOX_SIZE );
  2243. err_mailbox_out:
  2244. free_dma ( arbel->mailbox_in, ARBEL_MBOX_SIZE );
  2245. err_mailbox_in:
  2246. i = ARBEL_NUM_PORTS;
  2247. err_alloc_ibdev:
  2248. for ( i-- ; i >= 0 ; i-- )
  2249. ibdev_put ( arbel->ibdev[i] );
  2250. free ( arbel );
  2251. err_alloc_arbel:
  2252. return rc;
  2253. }
  2254. /**
  2255. * Remove PCI device
  2256. *
  2257. * @v pci PCI device
  2258. */
  2259. static void arbel_remove ( struct pci_device *pci ) {
  2260. struct arbel *arbel = pci_get_drvdata ( pci );
  2261. int i;
  2262. for ( i = ( ARBEL_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
  2263. unregister_ibdev ( arbel->ibdev[i] );
  2264. arbel_destroy_eq ( arbel );
  2265. arbel_cmd_close_hca ( arbel );
  2266. arbel_free_icm ( arbel );
  2267. arbel_stop_firmware ( arbel );
  2268. arbel_stop_firmware ( arbel );
  2269. free_dma ( arbel->mailbox_out, ARBEL_MBOX_SIZE );
  2270. free_dma ( arbel->mailbox_in, ARBEL_MBOX_SIZE );
  2271. for ( i = ( ARBEL_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
  2272. ibdev_put ( arbel->ibdev[i] );
  2273. free ( arbel );
  2274. }
  2275. static struct pci_device_id arbel_nics[] = {
  2276. PCI_ROM ( 0x15b3, 0x6282, "mt25218", "MT25218 HCA driver", 0 ),
  2277. PCI_ROM ( 0x15b3, 0x6274, "mt25204", "MT25204 HCA driver", 0 ),
  2278. };
  2279. struct pci_driver arbel_driver __pci_driver = {
  2280. .ids = arbel_nics,
  2281. .id_count = ( sizeof ( arbel_nics ) / sizeof ( arbel_nics[0] ) ),
  2282. .probe = arbel_probe,
  2283. .remove = arbel_remove,
  2284. };