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pci.c 9.2KB

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  1. /*
  2. * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
  5. * Munro, in turn based on the Linux kernel's PCI implementation.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of the
  10. * License, or any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. FILE_LICENCE ( GPL2_OR_LATER );
  22. #include <stdint.h>
  23. #include <stdlib.h>
  24. #include <stdio.h>
  25. #include <string.h>
  26. #include <errno.h>
  27. #include <gpxe/tables.h>
  28. #include <gpxe/device.h>
  29. #include <gpxe/pci.h>
  30. /** @file
  31. *
  32. * PCI bus
  33. *
  34. */
  35. static void pcibus_remove ( struct root_device *rootdev );
  36. /**
  37. * Read PCI BAR
  38. *
  39. * @v pci PCI device
  40. * @v reg PCI register number
  41. * @ret bar Base address register
  42. *
  43. * Reads the specified PCI base address register, including the flags
  44. * portion. 64-bit BARs will be handled automatically. If the value
  45. * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
  46. * high dword is non-zero on a 32-bit platform), then the value
  47. * returned will be zero plus the flags for a 64-bit BAR. Unreachable
  48. * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
  49. */
  50. static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
  51. uint32_t low;
  52. uint32_t high;
  53. pci_read_config_dword ( pci, reg, &low );
  54. if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) )
  55. == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){
  56. pci_read_config_dword ( pci, reg + 4, &high );
  57. if ( high ) {
  58. if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
  59. return ( ( ( uint64_t ) high << 32 ) | low );
  60. } else {
  61. DBG ( "Unhandled 64-bit BAR %08x%08x\n",
  62. high, low );
  63. return PCI_BASE_ADDRESS_MEM_TYPE_64;
  64. }
  65. }
  66. }
  67. return low;
  68. }
  69. /**
  70. * Find the start of a PCI BAR
  71. *
  72. * @v pci PCI device
  73. * @v reg PCI register number
  74. * @ret start BAR start address
  75. *
  76. * Reads the specified PCI base address register, and returns the
  77. * address portion of the BAR (i.e. without the flags).
  78. *
  79. * If the address exceeds the size of an unsigned long (i.e. if a
  80. * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
  81. * return value will be zero.
  82. */
  83. unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
  84. unsigned long bar;
  85. bar = pci_bar ( pci, reg );
  86. if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){
  87. return ( bar & PCI_BASE_ADDRESS_MEM_MASK );
  88. } else {
  89. return ( bar & PCI_BASE_ADDRESS_IO_MASK );
  90. }
  91. }
  92. /**
  93. * Read membase and ioaddr for a PCI device
  94. *
  95. * @v pci PCI device
  96. *
  97. * This scans through all PCI BARs on the specified device. The first
  98. * valid memory BAR is recorded as pci_device::membase, and the first
  99. * valid IO BAR is recorded as pci_device::ioaddr.
  100. *
  101. * 64-bit BARs are handled automatically. On a 32-bit platform, if a
  102. * 64-bit BAR has a non-zero high dword, it will be regarded as
  103. * invalid.
  104. */
  105. static void pci_read_bases ( struct pci_device *pci ) {
  106. unsigned long bar;
  107. int reg;
  108. for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
  109. bar = pci_bar ( pci, reg );
  110. if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
  111. if ( ! pci->ioaddr )
  112. pci->ioaddr =
  113. ( bar & PCI_BASE_ADDRESS_IO_MASK );
  114. } else {
  115. if ( ! pci->membase )
  116. pci->membase =
  117. ( bar & PCI_BASE_ADDRESS_MEM_MASK );
  118. /* Skip next BAR if 64-bit */
  119. if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
  120. reg += 4;
  121. }
  122. }
  123. }
  124. /**
  125. * Enable PCI device
  126. *
  127. * @v pci PCI device
  128. *
  129. * Set device to be a busmaster in case BIOS neglected to do so. Also
  130. * adjust PCI latency timer to a reasonable value, 32.
  131. */
  132. void adjust_pci_device ( struct pci_device *pci ) {
  133. unsigned short new_command, pci_command;
  134. unsigned char pci_latency;
  135. pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
  136. new_command = ( pci_command | PCI_COMMAND_MASTER |
  137. PCI_COMMAND_MEM | PCI_COMMAND_IO );
  138. if ( pci_command != new_command ) {
  139. DBG ( "PCI BIOS has not enabled device %02x:%02x.%x! "
  140. "Updating PCI command %04x->%04x\n", pci->bus,
  141. PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ),
  142. pci_command, new_command );
  143. pci_write_config_word ( pci, PCI_COMMAND, new_command );
  144. }
  145. pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
  146. if ( pci_latency < 32 ) {
  147. DBG ( "PCI device %02x:%02x.%x latency timer is unreasonably "
  148. "low at %d. Setting to 32.\n", pci->bus,
  149. PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ),
  150. pci_latency );
  151. pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
  152. }
  153. }
  154. /**
  155. * Probe a PCI device
  156. *
  157. * @v pci PCI device
  158. * @ret rc Return status code
  159. *
  160. * Searches for a driver for the PCI device. If a driver is found,
  161. * its probe() routine is called.
  162. */
  163. static int pci_probe ( struct pci_device *pci ) {
  164. struct pci_driver *driver;
  165. struct pci_device_id *id;
  166. unsigned int i;
  167. int rc;
  168. DBG ( "Adding PCI device %02x:%02x.%x (%04x:%04x mem %lx io %lx "
  169. "irq %d)\n", pci->bus, PCI_SLOT ( pci->devfn ),
  170. PCI_FUNC ( pci->devfn ), pci->vendor, pci->device,
  171. pci->membase, pci->ioaddr, pci->irq );
  172. for_each_table_entry ( driver, PCI_DRIVERS ) {
  173. for ( i = 0 ; i < driver->id_count ; i++ ) {
  174. id = &driver->ids[i];
  175. if ( ( id->vendor != PCI_ANY_ID ) &&
  176. ( id->vendor != pci->vendor ) )
  177. continue;
  178. if ( ( id->device != PCI_ANY_ID ) &&
  179. ( id->device != pci->device ) )
  180. continue;
  181. pci->driver = driver;
  182. pci->driver_name = id->name;
  183. DBG ( "...using driver %s\n", pci->driver_name );
  184. if ( ( rc = driver->probe ( pci, id ) ) != 0 ) {
  185. DBG ( "......probe failed\n" );
  186. continue;
  187. }
  188. return 0;
  189. }
  190. }
  191. DBG ( "...no driver found\n" );
  192. return -ENOTTY;
  193. }
  194. /**
  195. * Remove a PCI device
  196. *
  197. * @v pci PCI device
  198. */
  199. static void pci_remove ( struct pci_device *pci ) {
  200. pci->driver->remove ( pci );
  201. DBG ( "Removed PCI device %02x:%02x.%x\n", pci->bus,
  202. PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ) );
  203. }
  204. /**
  205. * Probe PCI root bus
  206. *
  207. * @v rootdev PCI bus root device
  208. *
  209. * Scans the PCI bus for devices and registers all devices it can
  210. * find.
  211. */
  212. static int pcibus_probe ( struct root_device *rootdev ) {
  213. struct pci_device *pci = NULL;
  214. unsigned int max_bus;
  215. unsigned int bus;
  216. unsigned int devfn;
  217. uint8_t hdrtype = 0;
  218. uint32_t tmp;
  219. int rc;
  220. max_bus = pci_max_bus();
  221. for ( bus = 0 ; bus <= max_bus ; bus++ ) {
  222. for ( devfn = 0 ; devfn <= 0xff ; devfn++ ) {
  223. /* Allocate struct pci_device */
  224. if ( ! pci )
  225. pci = malloc ( sizeof ( *pci ) );
  226. if ( ! pci ) {
  227. rc = -ENOMEM;
  228. goto err;
  229. }
  230. memset ( pci, 0, sizeof ( *pci ) );
  231. pci->bus = bus;
  232. pci->devfn = devfn;
  233. /* Skip all but the first function on
  234. * non-multifunction cards
  235. */
  236. if ( PCI_FUNC ( devfn ) == 0 ) {
  237. pci_read_config_byte ( pci, PCI_HEADER_TYPE,
  238. &hdrtype );
  239. } else if ( ! ( hdrtype & 0x80 ) ) {
  240. continue;
  241. }
  242. /* Check for physical device presence */
  243. pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
  244. if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
  245. continue;
  246. /* Populate struct pci_device */
  247. pci->vendor = ( tmp & 0xffff );
  248. pci->device = ( tmp >> 16 );
  249. pci_read_config_dword ( pci, PCI_REVISION, &tmp );
  250. pci->class = ( tmp >> 8 );
  251. pci_read_config_byte ( pci, PCI_INTERRUPT_LINE,
  252. &pci->irq );
  253. pci_read_bases ( pci );
  254. /* Add to device hierarchy */
  255. snprintf ( pci->dev.name, sizeof ( pci->dev.name ),
  256. "PCI%02x:%02x.%x", bus,
  257. PCI_SLOT ( devfn ), PCI_FUNC ( devfn ) );
  258. pci->dev.desc.bus_type = BUS_TYPE_PCI;
  259. pci->dev.desc.location = PCI_BUSDEVFN (bus, devfn);
  260. pci->dev.desc.vendor = pci->vendor;
  261. pci->dev.desc.device = pci->device;
  262. pci->dev.desc.class = pci->class;
  263. pci->dev.desc.ioaddr = pci->ioaddr;
  264. pci->dev.desc.irq = pci->irq;
  265. pci->dev.parent = &rootdev->dev;
  266. list_add ( &pci->dev.siblings, &rootdev->dev.children);
  267. INIT_LIST_HEAD ( &pci->dev.children );
  268. /* Look for a driver */
  269. if ( pci_probe ( pci ) == 0 ) {
  270. /* pcidev registered, we can drop our ref */
  271. pci = NULL;
  272. } else {
  273. /* Not registered; re-use struct pci_device */
  274. list_del ( &pci->dev.siblings );
  275. }
  276. }
  277. }
  278. free ( pci );
  279. return 0;
  280. err:
  281. free ( pci );
  282. pcibus_remove ( rootdev );
  283. return rc;
  284. }
  285. /**
  286. * Remove PCI root bus
  287. *
  288. * @v rootdev PCI bus root device
  289. */
  290. static void pcibus_remove ( struct root_device *rootdev ) {
  291. struct pci_device *pci;
  292. struct pci_device *tmp;
  293. list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
  294. dev.siblings ) {
  295. pci_remove ( pci );
  296. list_del ( &pci->dev.siblings );
  297. free ( pci );
  298. }
  299. }
  300. /** PCI bus root device driver */
  301. static struct root_driver pci_root_driver = {
  302. .probe = pcibus_probe,
  303. .remove = pcibus_remove,
  304. };
  305. /** PCI bus root device */
  306. struct root_device pci_root_device __root_device = {
  307. .dev = { .name = "PCI" },
  308. .driver = &pci_root_driver,
  309. };