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icplus.c 20KB

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  1. /*
  2. * Copyright (C) 2018 Sylvie Barlow <sylvie.c.barlow@gmail.com>.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of the
  7. * License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17. * 02110-1301, USA.
  18. *
  19. * You can also choose to distribute this program under the terms of
  20. * the Unmodified Binary Distribution Licence (as given in the file
  21. * COPYING.UBDL), provided that you have satisfied its requirements.
  22. */
  23. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  24. #include <stdint.h>
  25. #include <string.h>
  26. #include <unistd.h>
  27. #include <errno.h>
  28. #include <byteswap.h>
  29. #include <ipxe/netdevice.h>
  30. #include <ipxe/ethernet.h>
  31. #include <ipxe/if_ether.h>
  32. #include <ipxe/iobuf.h>
  33. #include <ipxe/malloc.h>
  34. #include <ipxe/pci.h>
  35. #include "icplus.h"
  36. /** @file
  37. *
  38. * IC+ network driver
  39. *
  40. */
  41. /******************************************************************************
  42. *
  43. * Device reset
  44. *
  45. ******************************************************************************
  46. */
  47. /**
  48. * Reset hardware
  49. *
  50. * @v icp IC+ device
  51. * @ret rc Return status code
  52. */
  53. static int icplus_reset ( struct icplus_nic *icp ) {
  54. uint32_t asicctrl;
  55. unsigned int i;
  56. /* Trigger reset */
  57. writel ( ( ICP_ASICCTRL_GLOBALRESET | ICP_ASICCTRL_DMA |
  58. ICP_ASICCTRL_FIFO | ICP_ASICCTRL_NETWORK | ICP_ASICCTRL_HOST |
  59. ICP_ASICCTRL_AUTOINIT ), ( icp->regs + ICP_ASICCTRL ) );
  60. /* Wait for reset to complete */
  61. for ( i = 0 ; i < ICP_RESET_MAX_WAIT_MS ; i++ ) {
  62. /* Check if device is ready */
  63. asicctrl = readl ( icp->regs + ICP_ASICCTRL );
  64. if ( ! ( asicctrl & ICP_ASICCTRL_RESETBUSY ) )
  65. return 0;
  66. /* Delay */
  67. mdelay ( 1 );
  68. }
  69. DBGC ( icp, "ICPLUS %p timed out waiting for reset (asicctrl %#08x)\n",
  70. icp, asicctrl );
  71. return -ETIMEDOUT;
  72. }
  73. /******************************************************************************
  74. *
  75. * EEPROM interface
  76. *
  77. ******************************************************************************
  78. */
  79. /**
  80. * Read data from EEPROM
  81. *
  82. * @v nvs NVS device
  83. * @v address Address from which to read
  84. * @v data Data buffer
  85. * @v len Length of data buffer
  86. * @ret rc Return status code
  87. */
  88. static int icplus_read_eeprom ( struct nvs_device *nvs, unsigned int address,
  89. void *data, size_t len ) {
  90. struct icplus_nic *icp =
  91. container_of ( nvs, struct icplus_nic, eeprom );
  92. unsigned int i;
  93. uint16_t eepromctrl;
  94. uint16_t *data_word = data;
  95. /* Sanity check. We advertise a blocksize of one word, so
  96. * should only ever receive single-word requests.
  97. */
  98. assert ( len == sizeof ( *data_word ) );
  99. /* Initiate read */
  100. writew ( ( ICP_EEPROMCTRL_OPCODE_READ |
  101. ICP_EEPROMCTRL_ADDRESS ( address ) ),
  102. ( icp->regs + ICP_EEPROMCTRL ) );
  103. /* Wait for read to complete */
  104. for ( i = 0 ; i < ICP_EEPROM_MAX_WAIT_MS ; i++ ) {
  105. /* If read is not complete, delay 1ms and retry */
  106. eepromctrl = readw ( icp->regs + ICP_EEPROMCTRL );
  107. if ( eepromctrl & ICP_EEPROMCTRL_BUSY ) {
  108. mdelay ( 1 );
  109. continue;
  110. }
  111. /* Extract data */
  112. *data_word = cpu_to_le16 ( readw ( icp->regs + ICP_EEPROMDATA ));
  113. return 0;
  114. }
  115. DBGC ( icp, "ICPLUS %p timed out waiting for EEPROM read\n", icp );
  116. return -ETIMEDOUT;
  117. }
  118. /**
  119. * Write data to EEPROM
  120. *
  121. * @v nvs NVS device
  122. * @v address Address to which to write
  123. * @v data Data buffer
  124. * @v len Length of data buffer
  125. * @ret rc Return status code
  126. */
  127. static int icplus_write_eeprom ( struct nvs_device *nvs,
  128. unsigned int address __unused,
  129. const void *data __unused,
  130. size_t len __unused ) {
  131. struct icplus_nic *icp =
  132. container_of ( nvs, struct icplus_nic, eeprom );
  133. DBGC ( icp, "ICPLUS %p EEPROM write not supported\n", icp );
  134. return -ENOTSUP;
  135. }
  136. /**
  137. * Initialise EEPROM
  138. *
  139. * @v icp IC+ device
  140. */
  141. static void icplus_init_eeprom ( struct icplus_nic *icp ) {
  142. /* The hardware supports only single-word reads */
  143. icp->eeprom.word_len_log2 = ICP_EEPROM_WORD_LEN_LOG2;
  144. icp->eeprom.size = ICP_EEPROM_MIN_SIZE_WORDS;
  145. icp->eeprom.block_size = 1;
  146. icp->eeprom.read = icplus_read_eeprom;
  147. icp->eeprom.write = icplus_write_eeprom;
  148. }
  149. /******************************************************************************
  150. *
  151. * MII interface
  152. *
  153. ******************************************************************************
  154. */
  155. /** Pin mapping for MII bit-bashing interface */
  156. static const uint8_t icplus_mii_bits[] = {
  157. [MII_BIT_MDC] = ICP_PHYCTRL_MGMTCLK,
  158. [MII_BIT_MDIO] = ICP_PHYCTRL_MGMTDATA,
  159. [MII_BIT_DRIVE] = ICP_PHYCTRL_MGMTDIR,
  160. };
  161. /**
  162. * Read input bit
  163. *
  164. * @v basher Bit-bashing interface
  165. * @v bit_id Bit number
  166. * @ret zero Input is a logic 0
  167. * @ret non-zero Input is a logic 1
  168. */
  169. static int icplus_mii_read_bit ( struct bit_basher *basher,
  170. unsigned int bit_id ) {
  171. struct icplus_nic *icp = container_of ( basher, struct icplus_nic,
  172. miibit.basher );
  173. uint8_t mask = icplus_mii_bits[bit_id];
  174. uint8_t reg;
  175. DBG_DISABLE ( DBGLVL_IO );
  176. reg = readb ( icp->regs + ICP_PHYCTRL );
  177. DBG_ENABLE ( DBGLVL_IO );
  178. return ( reg & mask );
  179. }
  180. /**
  181. * Set/clear output bit
  182. *
  183. * @v basher Bit-bashing interface
  184. * @v bit_id Bit number
  185. * @v data Value to write
  186. */
  187. static void icplus_mii_write_bit ( struct bit_basher *basher,
  188. unsigned int bit_id, unsigned long data ) {
  189. struct icplus_nic *icp = container_of ( basher, struct icplus_nic,
  190. miibit.basher );
  191. uint8_t mask = icplus_mii_bits[bit_id];
  192. uint8_t reg;
  193. DBG_DISABLE ( DBGLVL_IO );
  194. reg = readb ( icp->regs + ICP_PHYCTRL );
  195. reg &= ~mask;
  196. reg |= ( data & mask );
  197. writeb ( reg, icp->regs + ICP_PHYCTRL );
  198. readb ( icp->regs + ICP_PHYCTRL ); /* Ensure write reaches chip */
  199. DBG_ENABLE ( DBGLVL_IO );
  200. }
  201. /** MII bit-bashing interface */
  202. static struct bit_basher_operations icplus_basher_ops = {
  203. .read = icplus_mii_read_bit,
  204. .write = icplus_mii_write_bit,
  205. };
  206. /******************************************************************************
  207. *
  208. * Link state
  209. *
  210. ******************************************************************************
  211. */
  212. /**
  213. * Configure PHY
  214. *
  215. * @v icp IC+ device
  216. * @ret rc Return status code
  217. */
  218. static int icplus_init_phy ( struct icplus_nic *icp ) {
  219. uint32_t asicctrl;
  220. int rc;
  221. /* Find PHY address */
  222. if ( ( rc = mii_find ( &icp->mii ) ) != 0 ) {
  223. DBGC ( icp, "ICPLUS %p could not find PHY address: %s\n",
  224. icp, strerror ( rc ) );
  225. return rc;
  226. }
  227. /* Configure PHY to advertise 1000Mbps if applicable */
  228. asicctrl = readl ( icp->regs + ICP_ASICCTRL );
  229. if ( asicctrl & ICP_ASICCTRL_PHYSPEED1000 ) {
  230. if ( ( rc = mii_write ( &icp->mii, MII_CTRL1000,
  231. ADVERTISE_1000FULL ) ) != 0 ) {
  232. DBGC ( icp, "ICPLUS %p could not advertise 1000Mbps: "
  233. "%s\n", icp, strerror ( rc ) );
  234. return rc;
  235. }
  236. }
  237. /* Reset PHY */
  238. if ( ( rc = mii_reset ( &icp->mii ) ) != 0 ) {
  239. DBGC ( icp, "ICPLUS %p could not reset PHY: %s\n",
  240. icp, strerror ( rc ) );
  241. return rc;
  242. }
  243. return 0;
  244. }
  245. /**
  246. * Check link state
  247. *
  248. * @v netdev Network device
  249. */
  250. static void icplus_check_link ( struct net_device *netdev ) {
  251. struct icplus_nic *icp = netdev->priv;
  252. uint8_t phyctrl;
  253. /* Read link status */
  254. phyctrl = readb ( icp->regs + ICP_PHYCTRL );
  255. DBGC ( icp, "ICPLUS %p PHY control is %02x\n", icp, phyctrl );
  256. /* Update network device */
  257. if ( phyctrl & ICP_PHYCTRL_LINKSPEED ) {
  258. netdev_link_up ( netdev );
  259. } else {
  260. netdev_link_down ( netdev );
  261. }
  262. }
  263. /******************************************************************************
  264. *
  265. * Network device interface
  266. *
  267. ******************************************************************************
  268. */
  269. /**
  270. * Set descriptor ring base address
  271. *
  272. * @v icp IC+ device
  273. * @v offset Register offset
  274. * @v address Base address
  275. */
  276. static inline void icplus_set_base ( struct icplus_nic *icp, unsigned int offset,
  277. void *base ) {
  278. physaddr_t phys = virt_to_bus ( base );
  279. /* Program base address registers */
  280. writel ( ( phys & 0xffffffffUL ),
  281. ( icp->regs + offset + ICP_BASE_LO ) );
  282. if ( sizeof ( phys ) > sizeof ( uint32_t ) ) {
  283. writel ( ( ( ( uint64_t ) phys ) >> 32 ),
  284. ( icp->regs + offset + ICP_BASE_HI ) );
  285. } else {
  286. writel ( 0, ( icp->regs + offset + ICP_BASE_HI ) );
  287. }
  288. }
  289. /**
  290. * Create descriptor ring
  291. *
  292. * @v icp IC+ device
  293. * @v ring Descriptor ring
  294. * @ret rc Return status code
  295. */
  296. static int icplus_create_ring ( struct icplus_nic *icp, struct icplus_ring *ring ) {
  297. size_t len = ( sizeof ( ring->entry[0] ) * ICP_NUM_DESC );
  298. int rc;
  299. unsigned int i;
  300. struct icplus_descriptor *desc;
  301. struct icplus_descriptor *next;
  302. /* Allocate descriptor ring */
  303. ring->entry = malloc_dma ( len, ICP_ALIGN );
  304. if ( ! ring->entry ) {
  305. rc = -ENOMEM;
  306. goto err_alloc;
  307. }
  308. /* Initialise descriptor ring */
  309. memset ( ring->entry, 0, len );
  310. for ( i = 0 ; i < ICP_NUM_DESC ; i++ ) {
  311. desc = &ring->entry[i];
  312. next = &ring->entry[ ( i + 1 ) % ICP_NUM_DESC ];
  313. desc->next = cpu_to_le64 ( virt_to_bus ( next ) );
  314. desc->flags = ( ICP_TX_UNALIGN | ICP_TX_INDICATE );
  315. desc->control = ( ICP_TX_SOLE_FRAG | ICP_DONE );
  316. }
  317. /* Reset transmit producer & consumer counters */
  318. ring->prod = 0;
  319. ring->cons = 0;
  320. DBGC ( icp, "ICP %p %s ring at [%#08lx,%#08lx)\n",
  321. icp, ( ( ring->listptr == ICP_TFDLISTPTR ) ? "TX" : "RX" ),
  322. virt_to_bus ( ring->entry ),
  323. ( virt_to_bus ( ring->entry ) + len ) );
  324. return 0;
  325. free_dma ( ring->entry, len );
  326. ring->entry = NULL;
  327. err_alloc:
  328. return rc;
  329. }
  330. /**
  331. * Destroy descriptor ring
  332. *
  333. * @v icp IC+ device
  334. * @v ring Descriptor ring
  335. */
  336. static void icplus_destroy_ring ( struct icplus_nic *icp __unused,
  337. struct icplus_ring *ring ) {
  338. size_t len = ( sizeof ( ring->entry[0] ) * ICP_NUM_DESC );
  339. /* Free descriptor ring */
  340. free_dma ( ring->entry, len );
  341. ring->entry = NULL;
  342. }
  343. /**
  344. * Refill receive descriptor ring
  345. *
  346. * @v icp IC+ device
  347. */
  348. void icplus_refill_rx ( struct icplus_nic *icp ) {
  349. struct icplus_descriptor *desc;
  350. struct io_buffer *iobuf;
  351. unsigned int rx_idx;
  352. physaddr_t address;
  353. unsigned int refilled = 0;
  354. /* Refill ring */
  355. while ( ( icp->rx.prod - icp->rx.cons ) < ICP_NUM_DESC ) {
  356. /* Allocate I/O buffer */
  357. iobuf = alloc_iob ( ICP_RX_MAX_LEN );
  358. if ( ! iobuf ) {
  359. /* Wait for next refill */
  360. break;
  361. }
  362. /* Get next receive descriptor */
  363. rx_idx = ( icp->rx.prod++ % ICP_NUM_DESC );
  364. desc = &icp->rx.entry[rx_idx];
  365. /* Populate receive descriptor */
  366. address = virt_to_bus ( iobuf->data );
  367. desc->data.address = cpu_to_le64 ( address );
  368. desc->data.len = cpu_to_le16 ( ICP_RX_MAX_LEN );
  369. wmb();
  370. desc->control = 0;
  371. /* Record I/O buffer */
  372. assert ( icp->rx_iobuf[rx_idx] == NULL );
  373. icp->rx_iobuf[rx_idx] = iobuf;
  374. DBGC2 ( icp, "ICP %p RX %d is [%llx,%llx)\n", icp, rx_idx,
  375. ( ( unsigned long long ) address ),
  376. ( ( unsigned long long ) address + ICP_RX_MAX_LEN ) );
  377. refilled++;
  378. }
  379. /* Push descriptors to card, if applicable */
  380. if ( refilled ) {
  381. wmb();
  382. writew ( ICP_DMACTRL_RXPOLLNOW, icp->regs + ICP_DMACTRL );
  383. }
  384. }
  385. /**
  386. * Open network device
  387. *
  388. * @v netdev Network device
  389. * @ret rc Return status code
  390. */
  391. static int icplus_open ( struct net_device *netdev ) {
  392. struct icplus_nic *icp = netdev->priv;
  393. int rc;
  394. /* Create transmit descriptor ring */
  395. if ( ( rc = icplus_create_ring ( icp, &icp->tx ) ) != 0 )
  396. goto err_create_tx;
  397. /* Create receive descriptor ring */
  398. if ( ( rc = icplus_create_ring ( icp, &icp->rx ) ) != 0 )
  399. goto err_create_rx;
  400. /* Program descriptor base address */
  401. icplus_set_base ( icp, icp->tx.listptr, icp->tx.entry );
  402. icplus_set_base ( icp, icp->rx.listptr, icp->rx.entry );
  403. /* Enable receive mode */
  404. writew ( ( ICP_RXMODE_UNICAST | ICP_RXMODE_MULTICAST |
  405. ICP_RXMODE_BROADCAST | ICP_RXMODE_ALLFRAMES ),
  406. icp->regs + ICP_RXMODE );
  407. /* Enable transmitter and receiver */
  408. writel ( ( ICP_MACCTRL_TXENABLE | ICP_MACCTRL_RXENABLE |
  409. ICP_MACCTRL_DUPLEX ), icp->regs + ICP_MACCTRL );
  410. /* Fill receive ring */
  411. icplus_refill_rx ( icp );
  412. /* Check link state */
  413. icplus_check_link ( netdev );
  414. return 0;
  415. icplus_reset ( icp );
  416. icplus_destroy_ring ( icp, &icp->rx );
  417. err_create_rx:
  418. icplus_destroy_ring ( icp, &icp->tx );
  419. err_create_tx:
  420. return rc;
  421. }
  422. /**
  423. * Close network device
  424. *
  425. * @v netdev Network device
  426. */
  427. static void icplus_close ( struct net_device *netdev ) {
  428. struct icplus_nic *icp = netdev->priv;
  429. unsigned int i;
  430. /* Perform global reset */
  431. icplus_reset ( icp );
  432. /* Destroy receive descriptor ring */
  433. icplus_destroy_ring ( icp, &icp->rx );
  434. /* Destroy transmit descriptor ring */
  435. icplus_destroy_ring ( icp, &icp->tx );
  436. /* Discard any unused receive buffers */
  437. for ( i = 0 ; i < ICP_NUM_DESC ; i++ ) {
  438. if ( icp->rx_iobuf[i] )
  439. free_iob ( icp->rx_iobuf[i] );
  440. icp->rx_iobuf[i] = NULL;
  441. }
  442. }
  443. /**
  444. * Transmit packet
  445. *
  446. * @v netdev Network device
  447. * @v iobuf I/O buffer
  448. * @ret rc Return status code
  449. */
  450. static int icplus_transmit ( struct net_device *netdev,
  451. struct io_buffer *iobuf ) {
  452. struct icplus_nic *icp = netdev->priv;
  453. struct icplus_descriptor *desc;
  454. unsigned int tx_idx;
  455. physaddr_t address;
  456. /* Check if ring is full */
  457. if ( ( icp->tx.prod - icp->tx.cons ) >= ICP_NUM_DESC ) {
  458. DBGC ( icp, "ICP %p out of transmit descriptors\n", icp );
  459. return -ENOBUFS;
  460. }
  461. /* Find TX descriptor entry to use */
  462. tx_idx = ( icp->tx.prod++ % ICP_NUM_DESC );
  463. desc = &icp->tx.entry[tx_idx];
  464. /* Fill in TX descriptor */
  465. address = virt_to_bus ( iobuf->data );
  466. desc->data.address = cpu_to_le64 ( address );
  467. desc->data.len = cpu_to_le16 ( iob_len ( iobuf ) );
  468. wmb();
  469. desc->control = ICP_TX_SOLE_FRAG;
  470. wmb();
  471. /* Ring doorbell */
  472. writew ( ICP_DMACTRL_TXPOLLNOW, icp->regs + ICP_DMACTRL );
  473. DBGC2 ( icp, "ICP %p TX %d is [%llx,%llx)\n", icp, tx_idx,
  474. ( ( unsigned long long ) address ),
  475. ( ( unsigned long long ) address + iob_len ( iobuf ) ) );
  476. DBGC2_HDA ( icp, virt_to_phys ( desc ), desc, sizeof ( *desc ) );
  477. return 0;
  478. }
  479. /**
  480. * Poll for completed packets
  481. *
  482. * @v netdev Network device
  483. */
  484. static void icplus_poll_tx ( struct net_device *netdev ) {
  485. struct icplus_nic *icp = netdev->priv;
  486. struct icplus_descriptor *desc;
  487. unsigned int tx_idx;
  488. /* Check for completed packets */
  489. while ( icp->tx.cons != icp->tx.prod ) {
  490. /* Get next transmit descriptor */
  491. tx_idx = ( icp->tx.cons % ICP_NUM_DESC );
  492. desc = &icp->tx.entry[tx_idx];
  493. /* Stop if descriptor is still in use */
  494. if ( ! ( desc->control & ICP_DONE ) )
  495. return;
  496. /* Complete TX descriptor */
  497. DBGC2 ( icp, "ICP %p TX %d complete\n", icp, tx_idx );
  498. netdev_tx_complete_next ( netdev );
  499. icp->tx.cons++;
  500. }
  501. }
  502. /**
  503. * Poll for received packets
  504. *
  505. * @v netdev Network device
  506. */
  507. static void icplus_poll_rx ( struct net_device *netdev ) {
  508. struct icplus_nic *icp = netdev->priv;
  509. struct icplus_descriptor *desc;
  510. struct io_buffer *iobuf;
  511. unsigned int rx_idx;
  512. size_t len;
  513. /* Check for received packets */
  514. while ( icp->rx.cons != icp->rx.prod ) {
  515. /* Get next transmit descriptor */
  516. rx_idx = ( icp->rx.cons % ICP_NUM_DESC );
  517. desc = &icp->rx.entry[rx_idx];
  518. /* Stop if descriptor is still in use */
  519. if ( ! ( desc->control & ICP_DONE ) )
  520. return;
  521. /* Populate I/O buffer */
  522. iobuf = icp->rx_iobuf[rx_idx];
  523. icp->rx_iobuf[rx_idx] = NULL;
  524. len = le16_to_cpu ( desc->len );
  525. iob_put ( iobuf, len );
  526. /* Hand off to network stack */
  527. if ( desc->flags & ( ICP_RX_ERR_OVERRUN | ICP_RX_ERR_RUNT |
  528. ICP_RX_ERR_ALIGN | ICP_RX_ERR_FCS |
  529. ICP_RX_ERR_OVERSIZED | ICP_RX_ERR_LEN ) ) {
  530. DBGC ( icp, "ICP %p RX %d error (length %zd, "
  531. "flags %02x)\n", icp, rx_idx, len, desc->flags );
  532. netdev_rx_err ( netdev, iobuf, -EIO );
  533. } else {
  534. DBGC2 ( icp, "ICP %p RX %d complete (length "
  535. "%zd)\n", icp, rx_idx, len );
  536. netdev_rx ( netdev, iobuf );
  537. }
  538. icp->rx.cons++;
  539. }
  540. }
  541. /**
  542. * Poll for completed and received packets
  543. *
  544. * @v netdev Network device
  545. */
  546. static void icplus_poll ( struct net_device *netdev ) {
  547. struct icplus_nic *icp = netdev->priv;
  548. uint16_t intstatus;
  549. uint32_t txstatus;
  550. /* Check for interrupts */
  551. intstatus = readw ( icp->regs + ICP_INTSTATUS );
  552. /* Poll for TX completions, if applicable */
  553. if ( intstatus & ICP_INTSTATUS_TXCOMPLETE ) {
  554. txstatus = readl ( icp->regs + ICP_TXSTATUS );
  555. if ( txstatus & ICP_TXSTATUS_ERROR )
  556. DBGC ( icp, "ICP %p TX error: %08x\n", icp, txstatus );
  557. icplus_poll_tx ( netdev );
  558. }
  559. /* Poll for RX completions, if applicable */
  560. if ( intstatus & ICP_INTSTATUS_RXDMACOMPLETE ) {
  561. writew ( ICP_INTSTATUS_RXDMACOMPLETE, icp->regs + ICP_INTSTATUS );
  562. icplus_poll_rx ( netdev );
  563. }
  564. /* Check link state, if applicable */
  565. if ( intstatus & ICP_INTSTATUS_LINKEVENT ) {
  566. writew ( ICP_INTSTATUS_LINKEVENT, icp->regs + ICP_INTSTATUS );
  567. icplus_check_link ( netdev );
  568. }
  569. /* Refill receive ring */
  570. icplus_refill_rx ( icp );
  571. }
  572. /**
  573. * Enable or disable interrupts
  574. *
  575. * @v netdev Network device
  576. * @v enable Interrupts should be enabled
  577. */
  578. static void icplus_irq ( struct net_device *netdev, int enable ) {
  579. struct icplus_nic *icp = netdev->priv;
  580. DBGC ( icp, "ICPLUS %p does not yet support interrupts\n", icp );
  581. ( void ) enable;
  582. }
  583. /** IC+ network device operations */
  584. static struct net_device_operations icplus_operations = {
  585. .open = icplus_open,
  586. .close = icplus_close,
  587. .transmit = icplus_transmit,
  588. .poll = icplus_poll,
  589. .irq = icplus_irq,
  590. };
  591. /******************************************************************************
  592. *
  593. * PCI interface
  594. *
  595. ******************************************************************************
  596. */
  597. /**
  598. * Probe PCI device
  599. *
  600. * @v pci PCI device
  601. * @ret rc Return status code
  602. */
  603. static int icplus_probe ( struct pci_device *pci ) {
  604. struct net_device *netdev;
  605. struct icplus_nic *icp;
  606. int rc;
  607. /* Allocate and initialise net device */
  608. netdev = alloc_etherdev ( sizeof ( *icp ) );
  609. if ( ! netdev ) {
  610. rc = -ENOMEM;
  611. goto err_alloc;
  612. }
  613. netdev_init ( netdev, &icplus_operations );
  614. icp = netdev->priv;
  615. pci_set_drvdata ( pci, netdev );
  616. netdev->dev = &pci->dev;
  617. memset ( icp, 0, sizeof ( *icp ) );
  618. icp->miibit.basher.op = &icplus_basher_ops;
  619. init_mii_bit_basher ( &icp->miibit );
  620. mii_init ( &icp->mii, &icp->miibit.mdio, 0 );
  621. icp->tx.listptr = ICP_TFDLISTPTR;
  622. icp->rx.listptr = ICP_RFDLISTPTR;
  623. /* Fix up PCI device */
  624. adjust_pci_device ( pci );
  625. /* Map registers */
  626. icp->regs = ioremap ( pci->membase, ICP_BAR_SIZE );
  627. if ( ! icp->regs ) {
  628. rc = -ENODEV;
  629. goto err_ioremap;
  630. }
  631. /* Reset the NIC */
  632. if ( ( rc = icplus_reset ( icp ) ) != 0 )
  633. goto err_reset;
  634. /* Initialise EEPROM */
  635. icplus_init_eeprom ( icp );
  636. /* Read EEPROM MAC address */
  637. if ( ( rc = nvs_read ( &icp->eeprom, ICP_EEPROM_MAC,
  638. netdev->hw_addr, ETH_ALEN ) ) != 0 ) {
  639. DBGC ( icp, "ICPLUS %p could not read EEPROM MAC address: %s\n",
  640. icp, strerror ( rc ) );
  641. goto err_eeprom;
  642. }
  643. /* Configure PHY */
  644. if ( ( rc = icplus_init_phy ( icp ) ) != 0 )
  645. goto err_phy;
  646. /* Register network device */
  647. if ( ( rc = register_netdev ( netdev ) ) != 0 )
  648. goto err_register_netdev;
  649. /* Set initial link state */
  650. icplus_check_link ( netdev );
  651. return 0;
  652. unregister_netdev ( netdev );
  653. err_register_netdev:
  654. err_phy:
  655. err_eeprom:
  656. icplus_reset ( icp );
  657. err_reset:
  658. iounmap ( icp->regs );
  659. err_ioremap:
  660. netdev_nullify ( netdev );
  661. netdev_put ( netdev );
  662. err_alloc:
  663. return rc;
  664. }
  665. /**
  666. * Remove PCI device
  667. *
  668. * @v pci PCI device
  669. */
  670. static void icplus_remove ( struct pci_device *pci ) {
  671. struct net_device *netdev = pci_get_drvdata ( pci );
  672. struct icplus_nic *icp = netdev->priv;
  673. /* Unregister network device */
  674. unregister_netdev ( netdev );
  675. /* Reset card */
  676. icplus_reset ( icp );
  677. /* Free network device */
  678. iounmap ( icp->regs );
  679. netdev_nullify ( netdev );
  680. netdev_put ( netdev );
  681. }
  682. /** IC+ PCI device IDs */
  683. static struct pci_device_id icplus_nics[] = {
  684. PCI_ROM ( 0x13f0, 0x1023, "ip1000a", "IP1000A", 0 ),
  685. };
  686. /** IC+ PCI driver */
  687. struct pci_driver icplus_driver __pci_driver = {
  688. .ids = icplus_nics,
  689. .id_count = ( sizeof ( icplus_nics ) / sizeof ( icplus_nics[0] ) ),
  690. .probe = icplus_probe,
  691. .remove = icplus_remove,
  692. };