Vous ne pouvez pas sélectionner plus de 25 sujets Les noms de sujets doivent commencer par une lettre ou un nombre, peuvent contenir des tirets ('-') et peuvent comporter jusqu'à 35 caractères.

hermon.c 115KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996
  1. /*
  2. * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
  3. * Copyright (C) 2008 Mellanox Technologies Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of the
  8. * License, or any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  18. * 02110-1301, USA.
  19. */
  20. FILE_LICENCE ( GPL2_OR_LATER );
  21. #include <stdint.h>
  22. #include <stdlib.h>
  23. #include <stdio.h>
  24. #include <string.h>
  25. #include <strings.h>
  26. #include <unistd.h>
  27. #include <errno.h>
  28. #include <byteswap.h>
  29. #include <ipxe/io.h>
  30. #include <ipxe/pci.h>
  31. #include <ipxe/pcibackup.h>
  32. #include <ipxe/malloc.h>
  33. #include <ipxe/umalloc.h>
  34. #include <ipxe/iobuf.h>
  35. #include <ipxe/netdevice.h>
  36. #include <ipxe/infiniband.h>
  37. #include <ipxe/ib_smc.h>
  38. #include <ipxe/if_ether.h>
  39. #include <ipxe/ethernet.h>
  40. #include <ipxe/fcoe.h>
  41. #include <ipxe/vlan.h>
  42. #include <ipxe/bofm.h>
  43. #include <ipxe/nvsvpd.h>
  44. #include <ipxe/nvo.h>
  45. #include "hermon.h"
  46. /**
  47. * @file
  48. *
  49. * Mellanox Hermon Infiniband HCA
  50. *
  51. */
  52. /***************************************************************************
  53. *
  54. * Queue number allocation
  55. *
  56. ***************************************************************************
  57. */
  58. /**
  59. * Allocate offsets within usage bitmask
  60. *
  61. * @v bits Usage bitmask
  62. * @v bits_len Length of usage bitmask
  63. * @v num_bits Number of contiguous bits to allocate within bitmask
  64. * @ret bit First free bit within bitmask, or negative error
  65. */
  66. static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
  67. unsigned int bits_len,
  68. unsigned int num_bits ) {
  69. unsigned int bit = 0;
  70. hermon_bitmask_t mask = 1;
  71. unsigned int found = 0;
  72. /* Search bits for num_bits contiguous free bits */
  73. while ( bit < bits_len ) {
  74. if ( ( mask & *bits ) == 0 ) {
  75. if ( ++found == num_bits )
  76. goto found;
  77. } else {
  78. found = 0;
  79. }
  80. bit++;
  81. mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
  82. if ( mask == 1 )
  83. bits++;
  84. }
  85. return -ENFILE;
  86. found:
  87. /* Mark bits as in-use */
  88. do {
  89. *bits |= mask;
  90. if ( mask == 1 )
  91. bits--;
  92. mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
  93. } while ( --found );
  94. return ( bit - num_bits + 1 );
  95. }
  96. /**
  97. * Free offsets within usage bitmask
  98. *
  99. * @v bits Usage bitmask
  100. * @v bit Starting bit within bitmask
  101. * @v num_bits Number of contiguous bits to free within bitmask
  102. */
  103. static void hermon_bitmask_free ( hermon_bitmask_t *bits,
  104. int bit, unsigned int num_bits ) {
  105. hermon_bitmask_t mask;
  106. for ( ; num_bits ; bit++, num_bits-- ) {
  107. mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
  108. bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
  109. }
  110. }
  111. /***************************************************************************
  112. *
  113. * HCA commands
  114. *
  115. ***************************************************************************
  116. */
  117. /**
  118. * Wait for Hermon command completion
  119. *
  120. * @v hermon Hermon device
  121. * @v hcr HCA command registers
  122. * @ret rc Return status code
  123. */
  124. static int hermon_cmd_wait ( struct hermon *hermon,
  125. struct hermonprm_hca_command_register *hcr ) {
  126. unsigned int wait;
  127. for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  128. hcr->u.dwords[6] =
  129. readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
  130. if ( ( MLX_GET ( hcr, go ) == 0 ) &&
  131. ( MLX_GET ( hcr, t ) == hermon->toggle ) )
  132. return 0;
  133. mdelay ( 1 );
  134. }
  135. return -EBUSY;
  136. }
  137. /**
  138. * Issue HCA command
  139. *
  140. * @v hermon Hermon device
  141. * @v command Command opcode, flags and input/output lengths
  142. * @v op_mod Opcode modifier (0 if no modifier applicable)
  143. * @v in Input parameters
  144. * @v in_mod Input modifier (0 if no modifier applicable)
  145. * @v out Output parameters
  146. * @ret rc Return status code
  147. */
  148. static int hermon_cmd ( struct hermon *hermon, unsigned long command,
  149. unsigned int op_mod, const void *in,
  150. unsigned int in_mod, void *out ) {
  151. struct hermonprm_hca_command_register hcr;
  152. unsigned int opcode = HERMON_HCR_OPCODE ( command );
  153. size_t in_len = HERMON_HCR_IN_LEN ( command );
  154. size_t out_len = HERMON_HCR_OUT_LEN ( command );
  155. void *in_buffer;
  156. void *out_buffer;
  157. unsigned int status;
  158. unsigned int i;
  159. int rc;
  160. assert ( in_len <= HERMON_MBOX_SIZE );
  161. assert ( out_len <= HERMON_MBOX_SIZE );
  162. DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
  163. hermon, opcode, in_len,
  164. ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  165. ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  166. /* Check that HCR is free */
  167. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  168. DBGC ( hermon, "Hermon %p command interface locked\n",
  169. hermon );
  170. return rc;
  171. }
  172. /* Flip HCR toggle */
  173. hermon->toggle = ( 1 - hermon->toggle );
  174. /* Prepare HCR */
  175. memset ( &hcr, 0, sizeof ( hcr ) );
  176. in_buffer = &hcr.u.dwords[0];
  177. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  178. memset ( hermon->mailbox_in, 0, HERMON_MBOX_SIZE );
  179. in_buffer = hermon->mailbox_in;
  180. MLX_FILL_H ( &hcr, 0, in_param_h, virt_to_bus ( in_buffer ) );
  181. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  182. }
  183. memcpy ( in_buffer, in, in_len );
  184. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  185. out_buffer = &hcr.u.dwords[3];
  186. if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
  187. out_buffer = hermon->mailbox_out;
  188. MLX_FILL_H ( &hcr, 3, out_param_h,
  189. virt_to_bus ( out_buffer ) );
  190. MLX_FILL_1 ( &hcr, 4, out_param_l,
  191. virt_to_bus ( out_buffer ) );
  192. }
  193. MLX_FILL_4 ( &hcr, 6,
  194. opcode, opcode,
  195. opcode_modifier, op_mod,
  196. go, 1,
  197. t, hermon->toggle );
  198. DBGC ( hermon, "Hermon %p issuing command %04x\n",
  199. hermon, opcode );
  200. DBGC2_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  201. &hcr, sizeof ( hcr ) );
  202. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  203. DBGC2 ( hermon, "Input mailbox:\n" );
  204. DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
  205. ( ( in_len < 512 ) ? in_len : 512 ) );
  206. }
  207. /* Issue command */
  208. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  209. i++ ) {
  210. writel ( hcr.u.dwords[i],
  211. hermon->config + HERMON_HCR_REG ( i ) );
  212. barrier();
  213. }
  214. /* Wait for command completion */
  215. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  216. DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
  217. hermon );
  218. DBGC_HDA ( hermon,
  219. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  220. &hcr, sizeof ( hcr ) );
  221. return rc;
  222. }
  223. /* Check command status */
  224. status = MLX_GET ( &hcr, status );
  225. if ( status != 0 ) {
  226. DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
  227. hermon, status );
  228. DBGC_HDA ( hermon,
  229. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  230. &hcr, sizeof ( hcr ) );
  231. return -EIO;
  232. }
  233. /* Read output parameters, if any */
  234. hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
  235. hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
  236. memcpy ( out, out_buffer, out_len );
  237. if ( out_len ) {
  238. DBGC2 ( hermon, "Output%s:\n",
  239. ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
  240. DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
  241. ( ( out_len < 512 ) ? out_len : 512 ) );
  242. }
  243. return 0;
  244. }
  245. static inline int
  246. hermon_cmd_query_dev_cap ( struct hermon *hermon,
  247. struct hermonprm_query_dev_cap *dev_cap ) {
  248. return hermon_cmd ( hermon,
  249. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
  250. 1, sizeof ( *dev_cap ) ),
  251. 0, NULL, 0, dev_cap );
  252. }
  253. static inline int
  254. hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
  255. return hermon_cmd ( hermon,
  256. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
  257. 1, sizeof ( *fw ) ),
  258. 0, NULL, 0, fw );
  259. }
  260. static inline int
  261. hermon_cmd_init_hca ( struct hermon *hermon,
  262. const struct hermonprm_init_hca *init_hca ) {
  263. return hermon_cmd ( hermon,
  264. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
  265. 1, sizeof ( *init_hca ) ),
  266. 0, init_hca, 0, NULL );
  267. }
  268. static inline int
  269. hermon_cmd_close_hca ( struct hermon *hermon ) {
  270. return hermon_cmd ( hermon,
  271. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
  272. 0, NULL, 0, NULL );
  273. }
  274. static inline int
  275. hermon_cmd_init_port ( struct hermon *hermon, unsigned int port ) {
  276. return hermon_cmd ( hermon,
  277. HERMON_HCR_VOID_CMD ( HERMON_HCR_INIT_PORT ),
  278. 0, NULL, port, NULL );
  279. }
  280. static inline int
  281. hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
  282. return hermon_cmd ( hermon,
  283. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
  284. 0, NULL, port, NULL );
  285. }
  286. static inline int
  287. hermon_cmd_set_port ( struct hermon *hermon, int is_ethernet,
  288. unsigned int port_selector,
  289. const union hermonprm_set_port *set_port ) {
  290. return hermon_cmd ( hermon,
  291. HERMON_HCR_IN_CMD ( HERMON_HCR_SET_PORT,
  292. 1, sizeof ( *set_port ) ),
  293. is_ethernet, set_port, port_selector, NULL );
  294. }
  295. static inline int
  296. hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
  297. const struct hermonprm_mpt *mpt ) {
  298. return hermon_cmd ( hermon,
  299. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
  300. 1, sizeof ( *mpt ) ),
  301. 0, mpt, index, NULL );
  302. }
  303. static inline int
  304. hermon_cmd_write_mtt ( struct hermon *hermon,
  305. const struct hermonprm_write_mtt *write_mtt ) {
  306. return hermon_cmd ( hermon,
  307. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
  308. 1, sizeof ( *write_mtt ) ),
  309. 0, write_mtt, 1, NULL );
  310. }
  311. static inline int
  312. hermon_cmd_map_eq ( struct hermon *hermon, unsigned long index_map,
  313. const struct hermonprm_event_mask *mask ) {
  314. return hermon_cmd ( hermon,
  315. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_EQ,
  316. 0, sizeof ( *mask ) ),
  317. 0, mask, index_map, NULL );
  318. }
  319. static inline int
  320. hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
  321. const struct hermonprm_eqc *eqctx ) {
  322. return hermon_cmd ( hermon,
  323. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
  324. 1, sizeof ( *eqctx ) ),
  325. 0, eqctx, index, NULL );
  326. }
  327. static inline int
  328. hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index,
  329. struct hermonprm_eqc *eqctx ) {
  330. return hermon_cmd ( hermon,
  331. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_EQ,
  332. 1, sizeof ( *eqctx ) ),
  333. 1, NULL, index, eqctx );
  334. }
  335. static inline int
  336. hermon_cmd_query_eq ( struct hermon *hermon, unsigned int index,
  337. struct hermonprm_eqc *eqctx ) {
  338. return hermon_cmd ( hermon,
  339. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_EQ,
  340. 1, sizeof ( *eqctx ) ),
  341. 0, NULL, index, eqctx );
  342. }
  343. static inline int
  344. hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
  345. const struct hermonprm_completion_queue_context *cqctx ){
  346. return hermon_cmd ( hermon,
  347. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
  348. 1, sizeof ( *cqctx ) ),
  349. 0, cqctx, cqn, NULL );
  350. }
  351. static inline int
  352. hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
  353. struct hermonprm_completion_queue_context *cqctx ) {
  354. return hermon_cmd ( hermon,
  355. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
  356. 1, sizeof ( *cqctx ) ),
  357. 0, NULL, cqn, cqctx );
  358. }
  359. static inline int
  360. hermon_cmd_query_cq ( struct hermon *hermon, unsigned long cqn,
  361. struct hermonprm_completion_queue_context *cqctx ) {
  362. return hermon_cmd ( hermon,
  363. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_CQ,
  364. 1, sizeof ( *cqctx ) ),
  365. 0, NULL, cqn, cqctx );
  366. }
  367. static inline int
  368. hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
  369. const struct hermonprm_qp_ee_state_transitions *ctx ){
  370. return hermon_cmd ( hermon,
  371. HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
  372. 1, sizeof ( *ctx ) ),
  373. 0, ctx, qpn, NULL );
  374. }
  375. static inline int
  376. hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
  377. const struct hermonprm_qp_ee_state_transitions *ctx ){
  378. return hermon_cmd ( hermon,
  379. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
  380. 1, sizeof ( *ctx ) ),
  381. 0, ctx, qpn, NULL );
  382. }
  383. static inline int
  384. hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
  385. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  386. return hermon_cmd ( hermon,
  387. HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
  388. 1, sizeof ( *ctx ) ),
  389. 0, ctx, qpn, NULL );
  390. }
  391. static inline int
  392. hermon_cmd_rts2rts_qp ( struct hermon *hermon, unsigned long qpn,
  393. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  394. return hermon_cmd ( hermon,
  395. HERMON_HCR_IN_CMD ( HERMON_HCR_RTS2RTS_QP,
  396. 1, sizeof ( *ctx ) ),
  397. 0, ctx, qpn, NULL );
  398. }
  399. static inline int
  400. hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
  401. return hermon_cmd ( hermon,
  402. HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
  403. 0x03, NULL, qpn, NULL );
  404. }
  405. static inline int
  406. hermon_cmd_query_qp ( struct hermon *hermon, unsigned long qpn,
  407. struct hermonprm_qp_ee_state_transitions *ctx ) {
  408. return hermon_cmd ( hermon,
  409. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_QP,
  410. 1, sizeof ( *ctx ) ),
  411. 0, NULL, qpn, ctx );
  412. }
  413. static inline int
  414. hermon_cmd_conf_special_qp ( struct hermon *hermon, unsigned int internal_qps,
  415. unsigned long base_qpn ) {
  416. return hermon_cmd ( hermon,
  417. HERMON_HCR_VOID_CMD ( HERMON_HCR_CONF_SPECIAL_QP ),
  418. internal_qps, NULL, base_qpn, NULL );
  419. }
  420. static inline int
  421. hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
  422. union hermonprm_mad *mad ) {
  423. return hermon_cmd ( hermon,
  424. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
  425. 1, sizeof ( *mad ),
  426. 1, sizeof ( *mad ) ),
  427. 0x03, mad, port, mad );
  428. }
  429. static inline int
  430. hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
  431. struct hermonprm_mcg_entry *mcg ) {
  432. return hermon_cmd ( hermon,
  433. HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
  434. 1, sizeof ( *mcg ) ),
  435. 0, NULL, index, mcg );
  436. }
  437. static inline int
  438. hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
  439. const struct hermonprm_mcg_entry *mcg ) {
  440. return hermon_cmd ( hermon,
  441. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
  442. 1, sizeof ( *mcg ) ),
  443. 0, mcg, index, NULL );
  444. }
  445. static inline int
  446. hermon_cmd_mgid_hash ( struct hermon *hermon, const union ib_gid *gid,
  447. struct hermonprm_mgm_hash *hash ) {
  448. return hermon_cmd ( hermon,
  449. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
  450. 1, sizeof ( *gid ),
  451. 0, sizeof ( *hash ) ),
  452. 0, gid, 0, hash );
  453. }
  454. static inline int
  455. hermon_cmd_mod_stat_cfg ( struct hermon *hermon, unsigned int mode,
  456. unsigned int input_mod,
  457. struct hermonprm_scalar_parameter *portion ) {
  458. return hermon_cmd ( hermon,
  459. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MOD_STAT_CFG,
  460. 0, sizeof ( *portion ),
  461. 0, sizeof ( *portion ) ),
  462. mode, portion, input_mod, portion );
  463. }
  464. static inline int
  465. hermon_cmd_query_port ( struct hermon *hermon, unsigned int port,
  466. struct hermonprm_query_port_cap *query_port ) {
  467. return hermon_cmd ( hermon,
  468. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_PORT,
  469. 1, sizeof ( *query_port ) ),
  470. 0, NULL, port, query_port );
  471. }
  472. static inline int
  473. hermon_cmd_sense_port ( struct hermon *hermon, unsigned int port,
  474. struct hermonprm_sense_port *port_type ) {
  475. return hermon_cmd ( hermon,
  476. HERMON_HCR_OUT_CMD ( HERMON_HCR_SENSE_PORT,
  477. 0, sizeof ( *port_type ) ),
  478. 0, NULL, port, port_type );
  479. }
  480. static inline int
  481. hermon_cmd_run_fw ( struct hermon *hermon ) {
  482. return hermon_cmd ( hermon,
  483. HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
  484. 0, NULL, 0, NULL );
  485. }
  486. static inline int
  487. hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
  488. const struct hermonprm_scalar_parameter *offset ) {
  489. return hermon_cmd ( hermon,
  490. HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
  491. 0, sizeof ( *offset ) ),
  492. 0, offset, page_count, NULL );
  493. }
  494. static inline int
  495. hermon_cmd_map_icm ( struct hermon *hermon,
  496. const struct hermonprm_virtual_physical_mapping *map ) {
  497. return hermon_cmd ( hermon,
  498. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
  499. 1, sizeof ( *map ) ),
  500. 0, map, 1, NULL );
  501. }
  502. static inline int
  503. hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
  504. return hermon_cmd ( hermon,
  505. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
  506. 0, NULL, 0, NULL );
  507. }
  508. static inline int
  509. hermon_cmd_map_icm_aux ( struct hermon *hermon,
  510. const struct hermonprm_virtual_physical_mapping *map ) {
  511. return hermon_cmd ( hermon,
  512. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
  513. 1, sizeof ( *map ) ),
  514. 0, map, 1, NULL );
  515. }
  516. static inline int
  517. hermon_cmd_set_icm_size ( struct hermon *hermon,
  518. const struct hermonprm_scalar_parameter *icm_size,
  519. struct hermonprm_scalar_parameter *icm_aux_size ) {
  520. return hermon_cmd ( hermon,
  521. HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
  522. 0, sizeof ( *icm_size ),
  523. 0, sizeof (*icm_aux_size) ),
  524. 0, icm_size, 0, icm_aux_size );
  525. }
  526. static inline int
  527. hermon_cmd_unmap_fa ( struct hermon *hermon ) {
  528. return hermon_cmd ( hermon,
  529. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
  530. 0, NULL, 0, NULL );
  531. }
  532. static inline int
  533. hermon_cmd_map_fa ( struct hermon *hermon,
  534. const struct hermonprm_virtual_physical_mapping *map ) {
  535. return hermon_cmd ( hermon,
  536. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
  537. 1, sizeof ( *map ) ),
  538. 0, map, 1, NULL );
  539. }
  540. /***************************************************************************
  541. *
  542. * Memory translation table operations
  543. *
  544. ***************************************************************************
  545. */
  546. /**
  547. * Allocate MTT entries
  548. *
  549. * @v hermon Hermon device
  550. * @v memory Memory to map into MTT
  551. * @v len Length of memory to map
  552. * @v mtt MTT descriptor to fill in
  553. * @ret rc Return status code
  554. */
  555. static int hermon_alloc_mtt ( struct hermon *hermon,
  556. const void *memory, size_t len,
  557. struct hermon_mtt *mtt ) {
  558. struct hermonprm_write_mtt write_mtt;
  559. physaddr_t start;
  560. physaddr_t addr;
  561. unsigned int page_offset;
  562. unsigned int num_pages;
  563. int mtt_offset;
  564. unsigned int mtt_base_addr;
  565. unsigned int i;
  566. int rc;
  567. /* Find available MTT entries */
  568. start = virt_to_phys ( memory );
  569. page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
  570. start -= page_offset;
  571. len += page_offset;
  572. num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
  573. mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
  574. num_pages );
  575. if ( mtt_offset < 0 ) {
  576. DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
  577. hermon, num_pages );
  578. rc = mtt_offset;
  579. goto err_mtt_offset;
  580. }
  581. mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
  582. hermon->cap.mtt_entry_size );
  583. addr = start;
  584. /* Fill in MTT structure */
  585. mtt->mtt_offset = mtt_offset;
  586. mtt->num_pages = num_pages;
  587. mtt->mtt_base_addr = mtt_base_addr;
  588. mtt->page_offset = page_offset;
  589. /* Construct and issue WRITE_MTT commands */
  590. for ( i = 0 ; i < num_pages ; i++ ) {
  591. memset ( &write_mtt, 0, sizeof ( write_mtt ) );
  592. MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
  593. value, mtt_base_addr );
  594. MLX_FILL_H ( &write_mtt.mtt, 0, ptag_h, addr );
  595. MLX_FILL_2 ( &write_mtt.mtt, 1,
  596. p, 1,
  597. ptag_l, ( addr >> 3 ) );
  598. if ( ( rc = hermon_cmd_write_mtt ( hermon,
  599. &write_mtt ) ) != 0 ) {
  600. DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
  601. hermon, mtt_base_addr );
  602. goto err_write_mtt;
  603. }
  604. addr += HERMON_PAGE_SIZE;
  605. mtt_base_addr += hermon->cap.mtt_entry_size;
  606. }
  607. DBGC ( hermon, "Hermon %p MTT entries [%#x,%#x] for "
  608. "[%08lx,%08lx,%08lx,%08lx)\n", hermon, mtt->mtt_offset,
  609. ( mtt->mtt_offset + mtt->num_pages - 1 ), start,
  610. ( start + page_offset ), ( start + len ), addr );
  611. return 0;
  612. err_write_mtt:
  613. hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
  614. err_mtt_offset:
  615. return rc;
  616. }
  617. /**
  618. * Free MTT entries
  619. *
  620. * @v hermon Hermon device
  621. * @v mtt MTT descriptor
  622. */
  623. static void hermon_free_mtt ( struct hermon *hermon,
  624. struct hermon_mtt *mtt ) {
  625. DBGC ( hermon, "Hermon %p MTT entries [%#x,%#x] freed\n",
  626. hermon, mtt->mtt_offset,
  627. ( mtt->mtt_offset + mtt->num_pages - 1 ) );
  628. hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
  629. mtt->num_pages );
  630. }
  631. /***************************************************************************
  632. *
  633. * Static configuration operations
  634. *
  635. ***************************************************************************
  636. */
  637. /**
  638. * Calculate offset within static configuration
  639. *
  640. * @v field Field
  641. * @ret offset Offset
  642. */
  643. #define HERMON_MOD_STAT_CFG_OFFSET( field ) \
  644. ( ( MLX_BIT_OFFSET ( struct hermonprm_mod_stat_cfg_st, field ) / 8 ) \
  645. & ~( sizeof ( struct hermonprm_scalar_parameter ) - 1 ) )
  646. /**
  647. * Query or modify static configuration
  648. *
  649. * @v hermon Hermon device
  650. * @v port Port
  651. * @v mode Command mode
  652. * @v offset Offset within static configuration
  653. * @v stat_cfg Static configuration
  654. * @ret rc Return status code
  655. */
  656. static int hermon_mod_stat_cfg ( struct hermon *hermon, unsigned int port,
  657. unsigned int mode, unsigned int offset,
  658. struct hermonprm_mod_stat_cfg *stat_cfg ) {
  659. struct hermonprm_scalar_parameter *portion =
  660. ( ( void * ) &stat_cfg->u.bytes[offset] );
  661. struct hermonprm_mod_stat_cfg_input_mod mod;
  662. int rc;
  663. /* Sanity check */
  664. assert ( ( offset % sizeof ( *portion ) ) == 0 );
  665. /* Construct input modifier */
  666. memset ( &mod, 0, sizeof ( mod ) );
  667. MLX_FILL_2 ( &mod, 0,
  668. portnum, port,
  669. offset, offset );
  670. /* Issue command */
  671. if ( ( rc = hermon_cmd_mod_stat_cfg ( hermon, mode,
  672. be32_to_cpu ( mod.u.dwords[0] ),
  673. portion ) ) != 0 )
  674. return rc;
  675. return 0;
  676. }
  677. /***************************************************************************
  678. *
  679. * MAD operations
  680. *
  681. ***************************************************************************
  682. */
  683. /**
  684. * Issue management datagram
  685. *
  686. * @v ibdev Infiniband device
  687. * @v mad Management datagram
  688. * @ret rc Return status code
  689. */
  690. static int hermon_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
  691. struct hermon *hermon = ib_get_drvdata ( ibdev );
  692. union hermonprm_mad mad_ifc;
  693. int rc;
  694. linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
  695. mad_size_mismatch );
  696. /* Copy in request packet */
  697. memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
  698. /* Issue MAD */
  699. if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
  700. &mad_ifc ) ) != 0 ) {
  701. DBGC ( hermon, "Hermon %p port %d could not issue MAD IFC: "
  702. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  703. return rc;
  704. }
  705. /* Copy out reply packet */
  706. memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
  707. if ( mad->hdr.status != 0 ) {
  708. DBGC ( hermon, "Hermon %p port %d MAD IFC status %04x\n",
  709. hermon, ibdev->port, ntohs ( mad->hdr.status ) );
  710. return -EIO;
  711. }
  712. return 0;
  713. }
  714. /***************************************************************************
  715. *
  716. * Completion queue operations
  717. *
  718. ***************************************************************************
  719. */
  720. /**
  721. * Dump completion queue context (for debugging only)
  722. *
  723. * @v hermon Hermon device
  724. * @v cq Completion queue
  725. * @ret rc Return status code
  726. */
  727. static __attribute__ (( unused )) int
  728. hermon_dump_cqctx ( struct hermon *hermon, struct ib_completion_queue *cq ) {
  729. struct hermonprm_completion_queue_context cqctx;
  730. int rc;
  731. memset ( &cqctx, 0, sizeof ( cqctx ) );
  732. if ( ( rc = hermon_cmd_query_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  733. DBGC ( hermon, "Hermon %p CQN %#lx QUERY_CQ failed: %s\n",
  734. hermon, cq->cqn, strerror ( rc ) );
  735. return rc;
  736. }
  737. DBGC ( hermon, "Hermon %p CQN %#lx context:\n", hermon, cq->cqn );
  738. DBGC_HDA ( hermon, 0, &cqctx, sizeof ( cqctx ) );
  739. return 0;
  740. }
  741. /**
  742. * Create completion queue
  743. *
  744. * @v ibdev Infiniband device
  745. * @v cq Completion queue
  746. * @ret rc Return status code
  747. */
  748. static int hermon_create_cq ( struct ib_device *ibdev,
  749. struct ib_completion_queue *cq ) {
  750. struct hermon *hermon = ib_get_drvdata ( ibdev );
  751. struct hermon_completion_queue *hermon_cq;
  752. struct hermonprm_completion_queue_context cqctx;
  753. int cqn_offset;
  754. unsigned int i;
  755. int rc;
  756. /* Find a free completion queue number */
  757. cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
  758. HERMON_MAX_CQS, 1 );
  759. if ( cqn_offset < 0 ) {
  760. DBGC ( hermon, "Hermon %p out of completion queues\n",
  761. hermon );
  762. rc = cqn_offset;
  763. goto err_cqn_offset;
  764. }
  765. cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
  766. /* Allocate control structures */
  767. hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
  768. if ( ! hermon_cq ) {
  769. rc = -ENOMEM;
  770. goto err_hermon_cq;
  771. }
  772. /* Allocate doorbell */
  773. hermon_cq->doorbell = malloc_dma ( sizeof ( hermon_cq->doorbell[0] ),
  774. sizeof ( hermon_cq->doorbell[0] ) );
  775. if ( ! hermon_cq->doorbell ) {
  776. rc = -ENOMEM;
  777. goto err_doorbell;
  778. }
  779. memset ( hermon_cq->doorbell, 0, sizeof ( hermon_cq->doorbell[0] ) );
  780. /* Allocate completion queue itself */
  781. hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
  782. hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
  783. sizeof ( hermon_cq->cqe[0] ) );
  784. if ( ! hermon_cq->cqe ) {
  785. rc = -ENOMEM;
  786. goto err_cqe;
  787. }
  788. memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
  789. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  790. MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
  791. }
  792. barrier();
  793. /* Allocate MTT entries */
  794. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
  795. hermon_cq->cqe_size,
  796. &hermon_cq->mtt ) ) != 0 )
  797. goto err_alloc_mtt;
  798. /* Hand queue over to hardware */
  799. memset ( &cqctx, 0, sizeof ( cqctx ) );
  800. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  801. MLX_FILL_1 ( &cqctx, 2,
  802. page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
  803. MLX_FILL_2 ( &cqctx, 3,
  804. usr_page, HERMON_UAR_NON_EQ_PAGE,
  805. log_cq_size, fls ( cq->num_cqes - 1 ) );
  806. MLX_FILL_1 ( &cqctx, 5, c_eqn, hermon->eq.eqn );
  807. MLX_FILL_H ( &cqctx, 6, mtt_base_addr_h,
  808. hermon_cq->mtt.mtt_base_addr );
  809. MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
  810. ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
  811. MLX_FILL_H ( &cqctx, 14, db_record_addr_h,
  812. virt_to_phys ( hermon_cq->doorbell ) );
  813. MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
  814. ( virt_to_phys ( hermon_cq->doorbell ) >> 3 ) );
  815. if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  816. DBGC ( hermon, "Hermon %p CQN %#lx SW2HW_CQ failed: %s\n",
  817. hermon, cq->cqn, strerror ( rc ) );
  818. goto err_sw2hw_cq;
  819. }
  820. DBGC ( hermon, "Hermon %p CQN %#lx ring [%08lx,%08lx), doorbell "
  821. "%08lx\n", hermon, cq->cqn, virt_to_phys ( hermon_cq->cqe ),
  822. ( virt_to_phys ( hermon_cq->cqe ) + hermon_cq->cqe_size ),
  823. virt_to_phys ( hermon_cq->doorbell ) );
  824. ib_cq_set_drvdata ( cq, hermon_cq );
  825. return 0;
  826. err_sw2hw_cq:
  827. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  828. err_alloc_mtt:
  829. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  830. err_cqe:
  831. free_dma ( hermon_cq->doorbell, sizeof ( hermon_cq->doorbell[0] ) );
  832. err_doorbell:
  833. free ( hermon_cq );
  834. err_hermon_cq:
  835. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  836. err_cqn_offset:
  837. return rc;
  838. }
  839. /**
  840. * Destroy completion queue
  841. *
  842. * @v ibdev Infiniband device
  843. * @v cq Completion queue
  844. */
  845. static void hermon_destroy_cq ( struct ib_device *ibdev,
  846. struct ib_completion_queue *cq ) {
  847. struct hermon *hermon = ib_get_drvdata ( ibdev );
  848. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  849. struct hermonprm_completion_queue_context cqctx;
  850. int cqn_offset;
  851. int rc;
  852. /* Take ownership back from hardware */
  853. if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  854. DBGC ( hermon, "Hermon %p CQN %#lx FATAL HW2SW_CQ failed: "
  855. "%s\n", hermon, cq->cqn, strerror ( rc ) );
  856. /* Leak memory and return; at least we avoid corruption */
  857. return;
  858. }
  859. /* Free MTT entries */
  860. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  861. /* Free memory */
  862. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  863. free_dma ( hermon_cq->doorbell, sizeof ( hermon_cq->doorbell[0] ) );
  864. free ( hermon_cq );
  865. /* Mark queue number as free */
  866. cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
  867. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  868. ib_cq_set_drvdata ( cq, NULL );
  869. }
  870. /***************************************************************************
  871. *
  872. * Queue pair operations
  873. *
  874. ***************************************************************************
  875. */
  876. /**
  877. * Assign queue pair number
  878. *
  879. * @v ibdev Infiniband device
  880. * @v qp Queue pair
  881. * @ret rc Return status code
  882. */
  883. static int hermon_alloc_qpn ( struct ib_device *ibdev,
  884. struct ib_queue_pair *qp ) {
  885. struct hermon *hermon = ib_get_drvdata ( ibdev );
  886. unsigned int port_offset;
  887. int qpn_offset;
  888. /* Calculate queue pair number */
  889. port_offset = ( ibdev->port - HERMON_PORT_BASE );
  890. switch ( qp->type ) {
  891. case IB_QPT_SMI:
  892. qp->qpn = ( hermon->special_qpn_base + port_offset );
  893. return 0;
  894. case IB_QPT_GSI:
  895. qp->qpn = ( hermon->special_qpn_base + 2 + port_offset );
  896. return 0;
  897. case IB_QPT_UD:
  898. case IB_QPT_RC:
  899. case IB_QPT_ETH:
  900. /* Find a free queue pair number */
  901. qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
  902. HERMON_MAX_QPS, 1 );
  903. if ( qpn_offset < 0 ) {
  904. DBGC ( hermon, "Hermon %p out of queue pairs\n",
  905. hermon );
  906. return qpn_offset;
  907. }
  908. qp->qpn = ( ( random() & HERMON_QPN_RANDOM_MASK ) |
  909. ( hermon->qpn_base + qpn_offset ) );
  910. return 0;
  911. default:
  912. DBGC ( hermon, "Hermon %p unsupported QP type %d\n",
  913. hermon, qp->type );
  914. return -ENOTSUP;
  915. }
  916. }
  917. /**
  918. * Free queue pair number
  919. *
  920. * @v ibdev Infiniband device
  921. * @v qp Queue pair
  922. */
  923. static void hermon_free_qpn ( struct ib_device *ibdev,
  924. struct ib_queue_pair *qp ) {
  925. struct hermon *hermon = ib_get_drvdata ( ibdev );
  926. int qpn_offset;
  927. qpn_offset = ( ( qp->qpn & ~HERMON_QPN_RANDOM_MASK )
  928. - hermon->qpn_base );
  929. if ( qpn_offset >= 0 )
  930. hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
  931. }
  932. /**
  933. * Calculate transmission rate
  934. *
  935. * @v av Address vector
  936. * @ret hermon_rate Hermon rate
  937. */
  938. static unsigned int hermon_rate ( struct ib_address_vector *av ) {
  939. return ( ( ( av->rate >= IB_RATE_2_5 ) && ( av->rate <= IB_RATE_120 ) )
  940. ? ( av->rate + 5 ) : 0 );
  941. }
  942. /**
  943. * Calculate schedule queue
  944. *
  945. * @v ibdev Infiniband device
  946. * @v qp Queue pair
  947. * @ret sched_queue Schedule queue
  948. */
  949. static unsigned int hermon_sched_queue ( struct ib_device *ibdev,
  950. struct ib_queue_pair *qp ) {
  951. return ( ( ( qp->type == IB_QPT_SMI ) ?
  952. HERMON_SCHED_QP0 : HERMON_SCHED_DEFAULT ) |
  953. ( ( ibdev->port - 1 ) << 6 ) );
  954. }
  955. /** Queue pair transport service type map */
  956. static uint8_t hermon_qp_st[] = {
  957. [IB_QPT_SMI] = HERMON_ST_MLX,
  958. [IB_QPT_GSI] = HERMON_ST_MLX,
  959. [IB_QPT_UD] = HERMON_ST_UD,
  960. [IB_QPT_RC] = HERMON_ST_RC,
  961. [IB_QPT_ETH] = HERMON_ST_MLX,
  962. };
  963. /**
  964. * Dump queue pair context (for debugging only)
  965. *
  966. * @v hermon Hermon device
  967. * @v qp Queue pair
  968. * @ret rc Return status code
  969. */
  970. static __attribute__ (( unused )) int
  971. hermon_dump_qpctx ( struct hermon *hermon, struct ib_queue_pair *qp ) {
  972. struct hermonprm_qp_ee_state_transitions qpctx;
  973. int rc;
  974. memset ( &qpctx, 0, sizeof ( qpctx ) );
  975. if ( ( rc = hermon_cmd_query_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ) {
  976. DBGC ( hermon, "Hermon %p QPN %#lx QUERY_QP failed: %s\n",
  977. hermon, qp->qpn, strerror ( rc ) );
  978. return rc;
  979. }
  980. DBGC ( hermon, "Hermon %p QPN %#lx context:\n", hermon, qp->qpn );
  981. DBGC_HDA ( hermon, 0, &qpctx.u.dwords[2], ( sizeof ( qpctx ) - 8 ) );
  982. return 0;
  983. }
  984. /**
  985. * Create queue pair
  986. *
  987. * @v ibdev Infiniband device
  988. * @v qp Queue pair
  989. * @ret rc Return status code
  990. */
  991. static int hermon_create_qp ( struct ib_device *ibdev,
  992. struct ib_queue_pair *qp ) {
  993. struct hermon *hermon = ib_get_drvdata ( ibdev );
  994. struct hermon_queue_pair *hermon_qp;
  995. struct hermonprm_qp_ee_state_transitions qpctx;
  996. int rc;
  997. /* Calculate queue pair number */
  998. if ( ( rc = hermon_alloc_qpn ( ibdev, qp ) ) != 0 )
  999. goto err_alloc_qpn;
  1000. /* Allocate control structures */
  1001. hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
  1002. if ( ! hermon_qp ) {
  1003. rc = -ENOMEM;
  1004. goto err_hermon_qp;
  1005. }
  1006. /* Allocate doorbells */
  1007. hermon_qp->recv.doorbell =
  1008. malloc_dma ( sizeof ( hermon_qp->recv.doorbell[0] ),
  1009. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1010. if ( ! hermon_qp->recv.doorbell ) {
  1011. rc = -ENOMEM;
  1012. goto err_recv_doorbell;
  1013. }
  1014. memset ( hermon_qp->recv.doorbell, 0,
  1015. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1016. hermon_qp->send.doorbell =
  1017. ( hermon->uar + HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE +
  1018. HERMON_DB_POST_SND_OFFSET );
  1019. /* Allocate work queue buffer */
  1020. hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
  1021. ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
  1022. hermon_qp->send.num_wqes =
  1023. ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
  1024. hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
  1025. sizeof ( hermon_qp->send.wqe[0] ) );
  1026. hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
  1027. sizeof ( hermon_qp->recv.wqe[0] ) );
  1028. hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
  1029. hermon_qp->recv.wqe_size );
  1030. hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
  1031. sizeof ( hermon_qp->send.wqe[0] ) );
  1032. if ( ! hermon_qp->wqe ) {
  1033. rc = -ENOMEM;
  1034. goto err_alloc_wqe;
  1035. }
  1036. hermon_qp->send.wqe = hermon_qp->wqe;
  1037. memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
  1038. hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
  1039. memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
  1040. /* Allocate MTT entries */
  1041. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
  1042. hermon_qp->wqe_size,
  1043. &hermon_qp->mtt ) ) != 0 ) {
  1044. goto err_alloc_mtt;
  1045. }
  1046. /* Transition queue to INIT state */
  1047. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1048. MLX_FILL_2 ( &qpctx, 2,
  1049. qpc_eec_data.pm_state, HERMON_PM_STATE_MIGRATED,
  1050. qpc_eec_data.st, hermon_qp_st[qp->type] );
  1051. MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
  1052. MLX_FILL_4 ( &qpctx, 4,
  1053. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  1054. qpc_eec_data.log_rq_stride,
  1055. ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
  1056. qpc_eec_data.log_sq_size,
  1057. fls ( hermon_qp->send.num_wqes - 1 ),
  1058. qpc_eec_data.log_sq_stride,
  1059. ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
  1060. MLX_FILL_1 ( &qpctx, 5,
  1061. qpc_eec_data.usr_page, HERMON_UAR_NON_EQ_PAGE );
  1062. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  1063. MLX_FILL_4 ( &qpctx, 38,
  1064. qpc_eec_data.rre, 1,
  1065. qpc_eec_data.rwe, 1,
  1066. qpc_eec_data.rae, 1,
  1067. qpc_eec_data.page_offset,
  1068. ( hermon_qp->mtt.page_offset >> 6 ) );
  1069. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  1070. MLX_FILL_H ( &qpctx, 42, qpc_eec_data.db_record_addr_h,
  1071. virt_to_phys ( hermon_qp->recv.doorbell ) );
  1072. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
  1073. ( virt_to_phys ( hermon_qp->recv.doorbell ) >> 2 ) );
  1074. MLX_FILL_H ( &qpctx, 52, qpc_eec_data.mtt_base_addr_h,
  1075. hermon_qp->mtt.mtt_base_addr );
  1076. MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
  1077. ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
  1078. if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
  1079. &qpctx ) ) != 0 ) {
  1080. DBGC ( hermon, "Hermon %p QPN %#lx RST2INIT_QP failed: %s\n",
  1081. hermon, qp->qpn, strerror ( rc ) );
  1082. goto err_rst2init_qp;
  1083. }
  1084. hermon_qp->state = HERMON_QP_ST_INIT;
  1085. DBGC ( hermon, "Hermon %p QPN %#lx send ring [%08lx,%08lx), doorbell "
  1086. "%08lx\n", hermon, qp->qpn,
  1087. virt_to_phys ( hermon_qp->send.wqe ),
  1088. ( virt_to_phys ( hermon_qp->send.wqe ) +
  1089. hermon_qp->send.wqe_size ),
  1090. virt_to_phys ( hermon_qp->send.doorbell ) );
  1091. DBGC ( hermon, "Hermon %p QPN %#lx receive ring [%08lx,%08lx), "
  1092. "doorbell %08lx\n", hermon, qp->qpn,
  1093. virt_to_phys ( hermon_qp->recv.wqe ),
  1094. ( virt_to_phys ( hermon_qp->recv.wqe ) +
  1095. hermon_qp->recv.wqe_size ),
  1096. virt_to_phys ( hermon_qp->recv.doorbell ) );
  1097. DBGC ( hermon, "Hermon %p QPN %#lx send CQN %#lx receive CQN %#lx\n",
  1098. hermon, qp->qpn, qp->send.cq->cqn, qp->recv.cq->cqn );
  1099. ib_qp_set_drvdata ( qp, hermon_qp );
  1100. return 0;
  1101. hermon_cmd_2rst_qp ( hermon, qp->qpn );
  1102. err_rst2init_qp:
  1103. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1104. err_alloc_mtt:
  1105. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1106. err_alloc_wqe:
  1107. free_dma ( hermon_qp->recv.doorbell,
  1108. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1109. err_recv_doorbell:
  1110. free ( hermon_qp );
  1111. err_hermon_qp:
  1112. hermon_free_qpn ( ibdev, qp );
  1113. err_alloc_qpn:
  1114. return rc;
  1115. }
  1116. /**
  1117. * Modify queue pair
  1118. *
  1119. * @v ibdev Infiniband device
  1120. * @v qp Queue pair
  1121. * @ret rc Return status code
  1122. */
  1123. static int hermon_modify_qp ( struct ib_device *ibdev,
  1124. struct ib_queue_pair *qp ) {
  1125. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1126. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1127. struct hermonprm_qp_ee_state_transitions qpctx;
  1128. int rc;
  1129. /* Transition queue to RTR state, if applicable */
  1130. if ( hermon_qp->state < HERMON_QP_ST_RTR ) {
  1131. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1132. MLX_FILL_2 ( &qpctx, 4,
  1133. qpc_eec_data.mtu,
  1134. ( ( qp->type == IB_QPT_ETH ) ?
  1135. HERMON_MTU_ETH : HERMON_MTU_2048 ),
  1136. qpc_eec_data.msg_max, 31 );
  1137. MLX_FILL_1 ( &qpctx, 7,
  1138. qpc_eec_data.remote_qpn_een, qp->av.qpn );
  1139. MLX_FILL_1 ( &qpctx, 9,
  1140. qpc_eec_data.primary_address_path.rlid,
  1141. qp->av.lid );
  1142. MLX_FILL_1 ( &qpctx, 10,
  1143. qpc_eec_data.primary_address_path.max_stat_rate,
  1144. hermon_rate ( &qp->av ) );
  1145. memcpy ( &qpctx.u.dwords[12], &qp->av.gid,
  1146. sizeof ( qp->av.gid ) );
  1147. MLX_FILL_1 ( &qpctx, 16,
  1148. qpc_eec_data.primary_address_path.sched_queue,
  1149. hermon_sched_queue ( ibdev, qp ) );
  1150. MLX_FILL_1 ( &qpctx, 39,
  1151. qpc_eec_data.next_rcv_psn, qp->recv.psn );
  1152. if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
  1153. &qpctx ) ) != 0 ) {
  1154. DBGC ( hermon, "Hermon %p QPN %#lx INIT2RTR_QP failed:"
  1155. " %s\n", hermon, qp->qpn, strerror ( rc ) );
  1156. return rc;
  1157. }
  1158. hermon_qp->state = HERMON_QP_ST_RTR;
  1159. }
  1160. /* Transition queue to RTS state */
  1161. if ( hermon_qp->state < HERMON_QP_ST_RTS ) {
  1162. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1163. MLX_FILL_1 ( &qpctx, 10,
  1164. qpc_eec_data.primary_address_path.ack_timeout,
  1165. 14 /* 4.096us * 2^(14) = 67ms */ );
  1166. MLX_FILL_2 ( &qpctx, 30,
  1167. qpc_eec_data.retry_count, HERMON_RETRY_MAX,
  1168. qpc_eec_data.rnr_retry, HERMON_RETRY_MAX );
  1169. MLX_FILL_1 ( &qpctx, 32,
  1170. qpc_eec_data.next_send_psn, qp->send.psn );
  1171. if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn,
  1172. &qpctx ) ) != 0 ) {
  1173. DBGC ( hermon, "Hermon %p QPN %#lx RTR2RTS_QP failed: "
  1174. "%s\n", hermon, qp->qpn, strerror ( rc ) );
  1175. return rc;
  1176. }
  1177. hermon_qp->state = HERMON_QP_ST_RTS;
  1178. }
  1179. /* Update parameters in RTS state */
  1180. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1181. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, HERMON_QP_OPT_PARAM_QKEY );
  1182. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  1183. if ( ( rc = hermon_cmd_rts2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
  1184. DBGC ( hermon, "Hermon %p QPN %#lx RTS2RTS_QP failed: %s\n",
  1185. hermon, qp->qpn, strerror ( rc ) );
  1186. return rc;
  1187. }
  1188. return 0;
  1189. }
  1190. /**
  1191. * Destroy queue pair
  1192. *
  1193. * @v ibdev Infiniband device
  1194. * @v qp Queue pair
  1195. */
  1196. static void hermon_destroy_qp ( struct ib_device *ibdev,
  1197. struct ib_queue_pair *qp ) {
  1198. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1199. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1200. int rc;
  1201. /* Take ownership back from hardware */
  1202. if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
  1203. DBGC ( hermon, "Hermon %p QPN %#lx FATAL 2RST_QP failed: %s\n",
  1204. hermon, qp->qpn, strerror ( rc ) );
  1205. /* Leak memory and return; at least we avoid corruption */
  1206. return;
  1207. }
  1208. /* Free MTT entries */
  1209. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1210. /* Free memory */
  1211. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1212. free_dma ( hermon_qp->recv.doorbell,
  1213. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1214. free ( hermon_qp );
  1215. /* Mark queue number as free */
  1216. hermon_free_qpn ( ibdev, qp );
  1217. ib_qp_set_drvdata ( qp, NULL );
  1218. }
  1219. /***************************************************************************
  1220. *
  1221. * Work request operations
  1222. *
  1223. ***************************************************************************
  1224. */
  1225. /**
  1226. * Construct UD send work queue entry
  1227. *
  1228. * @v ibdev Infiniband device
  1229. * @v qp Queue pair
  1230. * @v dest Destination address vector
  1231. * @v iobuf I/O buffer
  1232. * @v wqe Send work queue entry
  1233. * @ret opcode Control opcode
  1234. */
  1235. static __attribute__ (( unused )) unsigned int
  1236. hermon_fill_nop_send_wqe ( struct ib_device *ibdev __unused,
  1237. struct ib_queue_pair *qp __unused,
  1238. struct ib_address_vector *dest __unused,
  1239. struct io_buffer *iobuf __unused,
  1240. union hermon_send_wqe *wqe ) {
  1241. MLX_FILL_1 ( &wqe->ctrl, 1, ds, ( sizeof ( wqe->ctrl ) / 16 ) );
  1242. MLX_FILL_1 ( &wqe->ctrl, 2, c, 0x03 /* generate completion */ );
  1243. return HERMON_OPCODE_NOP;
  1244. }
  1245. /**
  1246. * Construct UD send work queue entry
  1247. *
  1248. * @v ibdev Infiniband device
  1249. * @v qp Queue pair
  1250. * @v dest Destination address vector
  1251. * @v iobuf I/O buffer
  1252. * @v wqe Send work queue entry
  1253. * @ret opcode Control opcode
  1254. */
  1255. static unsigned int
  1256. hermon_fill_ud_send_wqe ( struct ib_device *ibdev,
  1257. struct ib_queue_pair *qp __unused,
  1258. struct ib_address_vector *dest,
  1259. struct io_buffer *iobuf,
  1260. union hermon_send_wqe *wqe ) {
  1261. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1262. MLX_FILL_1 ( &wqe->ud.ctrl, 1, ds,
  1263. ( ( offsetof ( typeof ( wqe->ud ), data[1] ) / 16 ) ) );
  1264. MLX_FILL_1 ( &wqe->ud.ctrl, 2, c, 0x03 /* generate completion */ );
  1265. MLX_FILL_2 ( &wqe->ud.ud, 0,
  1266. ud_address_vector.pd, HERMON_GLOBAL_PD,
  1267. ud_address_vector.port_number, ibdev->port );
  1268. MLX_FILL_2 ( &wqe->ud.ud, 1,
  1269. ud_address_vector.rlid, dest->lid,
  1270. ud_address_vector.g, dest->gid_present );
  1271. MLX_FILL_1 ( &wqe->ud.ud, 2,
  1272. ud_address_vector.max_stat_rate, hermon_rate ( dest ) );
  1273. MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, dest->sl );
  1274. memcpy ( &wqe->ud.ud.u.dwords[4], &dest->gid, sizeof ( dest->gid ) );
  1275. MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, dest->qpn );
  1276. MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, dest->qkey );
  1277. MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
  1278. MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, hermon->lkey );
  1279. MLX_FILL_H ( &wqe->ud.data[0], 2,
  1280. local_address_h, virt_to_bus ( iobuf->data ) );
  1281. MLX_FILL_1 ( &wqe->ud.data[0], 3,
  1282. local_address_l, virt_to_bus ( iobuf->data ) );
  1283. return HERMON_OPCODE_SEND;
  1284. }
  1285. /**
  1286. * Construct MLX send work queue entry
  1287. *
  1288. * @v ibdev Infiniband device
  1289. * @v qp Queue pair
  1290. * @v dest Destination address vector
  1291. * @v iobuf I/O buffer
  1292. * @v wqe Send work queue entry
  1293. * @ret opcode Control opcode
  1294. */
  1295. static unsigned int
  1296. hermon_fill_mlx_send_wqe ( struct ib_device *ibdev,
  1297. struct ib_queue_pair *qp,
  1298. struct ib_address_vector *dest,
  1299. struct io_buffer *iobuf,
  1300. union hermon_send_wqe *wqe ) {
  1301. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1302. struct io_buffer headers;
  1303. /* Construct IB headers */
  1304. iob_populate ( &headers, &wqe->mlx.headers, 0,
  1305. sizeof ( wqe->mlx.headers ) );
  1306. iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
  1307. ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), dest );
  1308. /* Fill work queue entry */
  1309. MLX_FILL_1 ( &wqe->mlx.ctrl, 1, ds,
  1310. ( ( offsetof ( typeof ( wqe->mlx ), data[2] ) / 16 ) ) );
  1311. MLX_FILL_5 ( &wqe->mlx.ctrl, 2,
  1312. c, 0x03 /* generate completion */,
  1313. icrc, 0 /* generate ICRC */,
  1314. max_statrate, hermon_rate ( dest ),
  1315. slr, 0,
  1316. v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
  1317. MLX_FILL_1 ( &wqe->mlx.ctrl, 3, rlid, dest->lid );
  1318. MLX_FILL_1 ( &wqe->mlx.data[0], 0,
  1319. byte_count, iob_len ( &headers ) );
  1320. MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, hermon->lkey );
  1321. MLX_FILL_H ( &wqe->mlx.data[0], 2,
  1322. local_address_h, virt_to_bus ( headers.data ) );
  1323. MLX_FILL_1 ( &wqe->mlx.data[0], 3,
  1324. local_address_l, virt_to_bus ( headers.data ) );
  1325. MLX_FILL_1 ( &wqe->mlx.data[1], 0,
  1326. byte_count, ( iob_len ( iobuf ) + 4 /* ICRC */ ) );
  1327. MLX_FILL_1 ( &wqe->mlx.data[1], 1, l_key, hermon->lkey );
  1328. MLX_FILL_H ( &wqe->mlx.data[1], 2,
  1329. local_address_h, virt_to_bus ( iobuf->data ) );
  1330. MLX_FILL_1 ( &wqe->mlx.data[1], 3,
  1331. local_address_l, virt_to_bus ( iobuf->data ) );
  1332. return HERMON_OPCODE_SEND;
  1333. }
  1334. /**
  1335. * Construct RC send work queue entry
  1336. *
  1337. * @v ibdev Infiniband device
  1338. * @v qp Queue pair
  1339. * @v dest Destination address vector
  1340. * @v iobuf I/O buffer
  1341. * @v wqe Send work queue entry
  1342. * @ret opcode Control opcode
  1343. */
  1344. static unsigned int
  1345. hermon_fill_rc_send_wqe ( struct ib_device *ibdev,
  1346. struct ib_queue_pair *qp __unused,
  1347. struct ib_address_vector *dest __unused,
  1348. struct io_buffer *iobuf,
  1349. union hermon_send_wqe *wqe ) {
  1350. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1351. MLX_FILL_1 ( &wqe->rc.ctrl, 1, ds,
  1352. ( ( offsetof ( typeof ( wqe->rc ), data[1] ) / 16 ) ) );
  1353. MLX_FILL_1 ( &wqe->rc.ctrl, 2, c, 0x03 /* generate completion */ );
  1354. MLX_FILL_1 ( &wqe->rc.data[0], 0, byte_count, iob_len ( iobuf ) );
  1355. MLX_FILL_1 ( &wqe->rc.data[0], 1, l_key, hermon->lkey );
  1356. MLX_FILL_H ( &wqe->rc.data[0], 2,
  1357. local_address_h, virt_to_bus ( iobuf->data ) );
  1358. MLX_FILL_1 ( &wqe->rc.data[0], 3,
  1359. local_address_l, virt_to_bus ( iobuf->data ) );
  1360. return HERMON_OPCODE_SEND;
  1361. }
  1362. /**
  1363. * Construct Ethernet send work queue entry
  1364. *
  1365. * @v ibdev Infiniband device
  1366. * @v qp Queue pair
  1367. * @v dest Destination address vector
  1368. * @v iobuf I/O buffer
  1369. * @v wqe Send work queue entry
  1370. * @ret opcode Control opcode
  1371. */
  1372. static unsigned int
  1373. hermon_fill_eth_send_wqe ( struct ib_device *ibdev,
  1374. struct ib_queue_pair *qp __unused,
  1375. struct ib_address_vector *dest __unused,
  1376. struct io_buffer *iobuf,
  1377. union hermon_send_wqe *wqe ) {
  1378. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1379. /* Fill work queue entry */
  1380. MLX_FILL_1 ( &wqe->eth.ctrl, 1, ds,
  1381. ( ( offsetof ( typeof ( wqe->mlx ), data[1] ) / 16 ) ) );
  1382. MLX_FILL_2 ( &wqe->eth.ctrl, 2,
  1383. c, 0x03 /* generate completion */,
  1384. s, 1 /* inhibit ICRC */ );
  1385. MLX_FILL_1 ( &wqe->eth.data[0], 0,
  1386. byte_count, iob_len ( iobuf ) );
  1387. MLX_FILL_1 ( &wqe->eth.data[0], 1, l_key, hermon->lkey );
  1388. MLX_FILL_H ( &wqe->eth.data[0], 2,
  1389. local_address_h, virt_to_bus ( iobuf->data ) );
  1390. MLX_FILL_1 ( &wqe->eth.data[0], 3,
  1391. local_address_l, virt_to_bus ( iobuf->data ) );
  1392. return HERMON_OPCODE_SEND;
  1393. }
  1394. /** Work queue entry constructors */
  1395. static unsigned int
  1396. ( * hermon_fill_send_wqe[] ) ( struct ib_device *ibdev,
  1397. struct ib_queue_pair *qp,
  1398. struct ib_address_vector *dest,
  1399. struct io_buffer *iobuf,
  1400. union hermon_send_wqe *wqe ) = {
  1401. [IB_QPT_SMI] = hermon_fill_mlx_send_wqe,
  1402. [IB_QPT_GSI] = hermon_fill_mlx_send_wqe,
  1403. [IB_QPT_UD] = hermon_fill_ud_send_wqe,
  1404. [IB_QPT_RC] = hermon_fill_rc_send_wqe,
  1405. [IB_QPT_ETH] = hermon_fill_eth_send_wqe,
  1406. };
  1407. /**
  1408. * Post send work queue entry
  1409. *
  1410. * @v ibdev Infiniband device
  1411. * @v qp Queue pair
  1412. * @v dest Destination address vector
  1413. * @v iobuf I/O buffer
  1414. * @ret rc Return status code
  1415. */
  1416. static int hermon_post_send ( struct ib_device *ibdev,
  1417. struct ib_queue_pair *qp,
  1418. struct ib_address_vector *dest,
  1419. struct io_buffer *iobuf ) {
  1420. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1421. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1422. struct ib_work_queue *wq = &qp->send;
  1423. struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
  1424. union hermon_send_wqe *wqe;
  1425. union hermonprm_doorbell_register db_reg;
  1426. unsigned long wqe_idx_mask;
  1427. unsigned long wqe_idx;
  1428. unsigned int owner;
  1429. unsigned int opcode;
  1430. /* Allocate work queue entry */
  1431. wqe_idx = ( wq->next_idx & ( hermon_send_wq->num_wqes - 1 ) );
  1432. owner = ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 );
  1433. wqe_idx_mask = ( wq->num_wqes - 1 );
  1434. if ( wq->iobufs[ wqe_idx & wqe_idx_mask ] ) {
  1435. DBGC ( hermon, "Hermon %p QPN %#lx send queue full",
  1436. hermon, qp->qpn );
  1437. return -ENOBUFS;
  1438. }
  1439. wq->iobufs[ wqe_idx & wqe_idx_mask ] = iobuf;
  1440. wqe = &hermon_send_wq->wqe[wqe_idx];
  1441. /* Construct work queue entry */
  1442. memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
  1443. ( sizeof ( *wqe ) - 4 ) );
  1444. assert ( qp->type < ( sizeof ( hermon_fill_send_wqe ) /
  1445. sizeof ( hermon_fill_send_wqe[0] ) ) );
  1446. assert ( hermon_fill_send_wqe[qp->type] != NULL );
  1447. opcode = hermon_fill_send_wqe[qp->type] ( ibdev, qp, dest, iobuf, wqe );
  1448. barrier();
  1449. MLX_FILL_2 ( &wqe->ctrl, 0,
  1450. opcode, opcode,
  1451. owner, owner );
  1452. DBGCP ( hermon, "Hermon %p QPN %#lx posting send WQE %#lx:\n",
  1453. hermon, qp->qpn, wqe_idx );
  1454. DBGCP_HDA ( hermon, virt_to_phys ( wqe ), wqe, sizeof ( *wqe ) );
  1455. /* Ring doorbell register */
  1456. MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
  1457. barrier();
  1458. writel ( db_reg.dword[0], hermon_send_wq->doorbell );
  1459. /* Update work queue's index */
  1460. wq->next_idx++;
  1461. return 0;
  1462. }
  1463. /**
  1464. * Post receive work queue entry
  1465. *
  1466. * @v ibdev Infiniband device
  1467. * @v qp Queue pair
  1468. * @v iobuf I/O buffer
  1469. * @ret rc Return status code
  1470. */
  1471. static int hermon_post_recv ( struct ib_device *ibdev,
  1472. struct ib_queue_pair *qp,
  1473. struct io_buffer *iobuf ) {
  1474. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1475. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1476. struct ib_work_queue *wq = &qp->recv;
  1477. struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
  1478. struct hermonprm_recv_wqe *wqe;
  1479. unsigned int wqe_idx_mask;
  1480. /* Allocate work queue entry */
  1481. wqe_idx_mask = ( wq->num_wqes - 1 );
  1482. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1483. DBGC ( hermon, "Hermon %p QPN %#lx receive queue full",
  1484. hermon, qp->qpn );
  1485. return -ENOBUFS;
  1486. }
  1487. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1488. wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  1489. /* Construct work queue entry */
  1490. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
  1491. MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->lkey );
  1492. MLX_FILL_H ( &wqe->data[0], 2,
  1493. local_address_h, virt_to_bus ( iobuf->data ) );
  1494. MLX_FILL_1 ( &wqe->data[0], 3,
  1495. local_address_l, virt_to_bus ( iobuf->data ) );
  1496. /* Update work queue's index */
  1497. wq->next_idx++;
  1498. /* Update doorbell record */
  1499. barrier();
  1500. MLX_FILL_1 ( hermon_recv_wq->doorbell, 0, receive_wqe_counter,
  1501. ( wq->next_idx & 0xffff ) );
  1502. return 0;
  1503. }
  1504. /**
  1505. * Handle completion
  1506. *
  1507. * @v ibdev Infiniband device
  1508. * @v cq Completion queue
  1509. * @v cqe Hardware completion queue entry
  1510. * @ret rc Return status code
  1511. */
  1512. static int hermon_complete ( struct ib_device *ibdev,
  1513. struct ib_completion_queue *cq,
  1514. union hermonprm_completion_entry *cqe ) {
  1515. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1516. struct ib_work_queue *wq;
  1517. struct ib_queue_pair *qp;
  1518. struct io_buffer *iobuf;
  1519. struct ib_address_vector recv_dest;
  1520. struct ib_address_vector recv_source;
  1521. struct ib_global_route_header *grh;
  1522. struct ib_address_vector *source;
  1523. unsigned int opcode;
  1524. unsigned long qpn;
  1525. int is_send;
  1526. unsigned long wqe_idx;
  1527. unsigned long wqe_idx_mask;
  1528. size_t len;
  1529. int rc = 0;
  1530. /* Parse completion */
  1531. qpn = MLX_GET ( &cqe->normal, qpn );
  1532. is_send = MLX_GET ( &cqe->normal, s_r );
  1533. opcode = MLX_GET ( &cqe->normal, opcode );
  1534. if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
  1535. /* "s" field is not valid for error opcodes */
  1536. is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
  1537. DBGC ( hermon, "Hermon %p CQN %#lx syndrome %x vendor %x\n",
  1538. hermon, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
  1539. MLX_GET ( &cqe->error, vendor_error_syndrome ) );
  1540. rc = -EIO;
  1541. /* Don't return immediately; propagate error to completer */
  1542. }
  1543. /* Identify work queue */
  1544. wq = ib_find_wq ( cq, qpn, is_send );
  1545. if ( ! wq ) {
  1546. DBGC ( hermon, "Hermon %p CQN %#lx unknown %s QPN %#lx\n",
  1547. hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1548. return -EIO;
  1549. }
  1550. qp = wq->qp;
  1551. /* Identify work queue entry */
  1552. wqe_idx = MLX_GET ( &cqe->normal, wqe_counter );
  1553. wqe_idx_mask = ( wq->num_wqes - 1 );
  1554. DBGCP ( hermon, "Hermon %p CQN %#lx QPN %#lx %s WQE %#lx completed:\n",
  1555. hermon, cq->cqn, qp->qpn, ( is_send ? "send" : "recv" ),
  1556. wqe_idx );
  1557. DBGCP_HDA ( hermon, virt_to_phys ( cqe ), cqe, sizeof ( *cqe ) );
  1558. /* Identify I/O buffer */
  1559. iobuf = wq->iobufs[ wqe_idx & wqe_idx_mask ];
  1560. if ( ! iobuf ) {
  1561. DBGC ( hermon, "Hermon %p CQN %#lx QPN %#lx empty %s WQE "
  1562. "%#lx\n", hermon, cq->cqn, qp->qpn,
  1563. ( is_send ? "send" : "recv" ), wqe_idx );
  1564. return -EIO;
  1565. }
  1566. wq->iobufs[ wqe_idx & wqe_idx_mask ] = NULL;
  1567. if ( is_send ) {
  1568. /* Hand off to completion handler */
  1569. ib_complete_send ( ibdev, qp, iobuf, rc );
  1570. } else {
  1571. /* Set received length */
  1572. len = MLX_GET ( &cqe->normal, byte_cnt );
  1573. assert ( len <= iob_tailroom ( iobuf ) );
  1574. iob_put ( iobuf, len );
  1575. memset ( &recv_dest, 0, sizeof ( recv_dest ) );
  1576. recv_dest.qpn = qpn;
  1577. memset ( &recv_source, 0, sizeof ( recv_source ) );
  1578. switch ( qp->type ) {
  1579. case IB_QPT_SMI:
  1580. case IB_QPT_GSI:
  1581. case IB_QPT_UD:
  1582. assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
  1583. grh = iobuf->data;
  1584. iob_pull ( iobuf, sizeof ( *grh ) );
  1585. /* Construct address vector */
  1586. source = &recv_source;
  1587. source->qpn = MLX_GET ( &cqe->normal, srq_rqpn );
  1588. source->lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
  1589. source->sl = MLX_GET ( &cqe->normal, sl );
  1590. recv_dest.gid_present = source->gid_present =
  1591. MLX_GET ( &cqe->normal, g );
  1592. memcpy ( &recv_dest.gid, &grh->dgid,
  1593. sizeof ( recv_dest.gid ) );
  1594. memcpy ( &source->gid, &grh->sgid,
  1595. sizeof ( source->gid ) );
  1596. break;
  1597. case IB_QPT_RC:
  1598. source = &qp->av;
  1599. break;
  1600. case IB_QPT_ETH:
  1601. /* Construct address vector */
  1602. source = &recv_source;
  1603. source->vlan_present = MLX_GET ( &cqe->normal, vlan );
  1604. source->vlan = MLX_GET ( &cqe->normal, vid );
  1605. break;
  1606. default:
  1607. assert ( 0 );
  1608. return -EINVAL;
  1609. }
  1610. /* Hand off to completion handler */
  1611. ib_complete_recv ( ibdev, qp, &recv_dest, source, iobuf, rc );
  1612. }
  1613. return rc;
  1614. }
  1615. /**
  1616. * Poll completion queue
  1617. *
  1618. * @v ibdev Infiniband device
  1619. * @v cq Completion queue
  1620. */
  1621. static void hermon_poll_cq ( struct ib_device *ibdev,
  1622. struct ib_completion_queue *cq ) {
  1623. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1624. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  1625. union hermonprm_completion_entry *cqe;
  1626. unsigned int cqe_idx_mask;
  1627. int rc;
  1628. while ( 1 ) {
  1629. /* Look for completion entry */
  1630. cqe_idx_mask = ( cq->num_cqes - 1 );
  1631. cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
  1632. if ( MLX_GET ( &cqe->normal, owner ) ^
  1633. ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
  1634. /* Entry still owned by hardware; end of poll */
  1635. break;
  1636. }
  1637. /* Handle completion */
  1638. if ( ( rc = hermon_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1639. DBGC ( hermon, "Hermon %p CQN %#lx failed to complete:"
  1640. " %s\n", hermon, cq->cqn, strerror ( rc ) );
  1641. DBGC_HDA ( hermon, virt_to_phys ( cqe ),
  1642. cqe, sizeof ( *cqe ) );
  1643. }
  1644. /* Update completion queue's index */
  1645. cq->next_idx++;
  1646. /* Update doorbell record */
  1647. MLX_FILL_1 ( hermon_cq->doorbell, 0, update_ci,
  1648. ( cq->next_idx & 0x00ffffffUL ) );
  1649. }
  1650. }
  1651. /***************************************************************************
  1652. *
  1653. * Event queues
  1654. *
  1655. ***************************************************************************
  1656. */
  1657. /**
  1658. * Create event queue
  1659. *
  1660. * @v hermon Hermon device
  1661. * @ret rc Return status code
  1662. */
  1663. static int hermon_create_eq ( struct hermon *hermon ) {
  1664. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1665. struct hermonprm_eqc eqctx;
  1666. struct hermonprm_event_mask mask;
  1667. unsigned int i;
  1668. int rc;
  1669. /* Select event queue number */
  1670. hermon_eq->eqn = ( 4 * hermon->cap.reserved_uars );
  1671. if ( hermon_eq->eqn < hermon->cap.reserved_eqs )
  1672. hermon_eq->eqn = hermon->cap.reserved_eqs;
  1673. /* Calculate doorbell address */
  1674. hermon_eq->doorbell =
  1675. ( hermon->uar + HERMON_DB_EQ_OFFSET ( hermon_eq->eqn ) );
  1676. /* Allocate event queue itself */
  1677. hermon_eq->eqe_size =
  1678. ( HERMON_NUM_EQES * sizeof ( hermon_eq->eqe[0] ) );
  1679. hermon_eq->eqe = malloc_dma ( hermon_eq->eqe_size,
  1680. sizeof ( hermon_eq->eqe[0] ) );
  1681. if ( ! hermon_eq->eqe ) {
  1682. rc = -ENOMEM;
  1683. goto err_eqe;
  1684. }
  1685. memset ( hermon_eq->eqe, 0, hermon_eq->eqe_size );
  1686. for ( i = 0 ; i < HERMON_NUM_EQES ; i++ ) {
  1687. MLX_FILL_1 ( &hermon_eq->eqe[i].generic, 7, owner, 1 );
  1688. }
  1689. barrier();
  1690. /* Allocate MTT entries */
  1691. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_eq->eqe,
  1692. hermon_eq->eqe_size,
  1693. &hermon_eq->mtt ) ) != 0 )
  1694. goto err_alloc_mtt;
  1695. /* Hand queue over to hardware */
  1696. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1697. MLX_FILL_2 ( &eqctx, 0,
  1698. st, 0xa /* "Fired" */,
  1699. oi, 1 );
  1700. MLX_FILL_1 ( &eqctx, 2,
  1701. page_offset, ( hermon_eq->mtt.page_offset >> 5 ) );
  1702. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( HERMON_NUM_EQES - 1 ) );
  1703. MLX_FILL_H ( &eqctx, 6, mtt_base_addr_h,
  1704. hermon_eq->mtt.mtt_base_addr );
  1705. MLX_FILL_1 ( &eqctx, 7, mtt_base_addr_l,
  1706. ( hermon_eq->mtt.mtt_base_addr >> 3 ) );
  1707. if ( ( rc = hermon_cmd_sw2hw_eq ( hermon, hermon_eq->eqn,
  1708. &eqctx ) ) != 0 ) {
  1709. DBGC ( hermon, "Hermon %p EQN %#lx SW2HW_EQ failed: %s\n",
  1710. hermon, hermon_eq->eqn, strerror ( rc ) );
  1711. goto err_sw2hw_eq;
  1712. }
  1713. /* Map all events to this event queue */
  1714. memset ( &mask, 0xff, sizeof ( mask ) );
  1715. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1716. ( HERMON_MAP_EQ | hermon_eq->eqn ),
  1717. &mask ) ) != 0 ) {
  1718. DBGC ( hermon, "Hermon %p EQN %#lx MAP_EQ failed: %s\n",
  1719. hermon, hermon_eq->eqn, strerror ( rc ) );
  1720. goto err_map_eq;
  1721. }
  1722. DBGC ( hermon, "Hermon %p EQN %#lx ring [%08lx,%08lx), doorbell "
  1723. "%08lx\n", hermon, hermon_eq->eqn,
  1724. virt_to_phys ( hermon_eq->eqe ),
  1725. ( virt_to_phys ( hermon_eq->eqe ) + hermon_eq->eqe_size ),
  1726. virt_to_phys ( hermon_eq->doorbell ) );
  1727. return 0;
  1728. err_map_eq:
  1729. hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn, &eqctx );
  1730. err_sw2hw_eq:
  1731. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1732. err_alloc_mtt:
  1733. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1734. err_eqe:
  1735. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1736. return rc;
  1737. }
  1738. /**
  1739. * Destroy event queue
  1740. *
  1741. * @v hermon Hermon device
  1742. */
  1743. static void hermon_destroy_eq ( struct hermon *hermon ) {
  1744. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1745. struct hermonprm_eqc eqctx;
  1746. struct hermonprm_event_mask mask;
  1747. int rc;
  1748. /* Unmap events from event queue */
  1749. memset ( &mask, 0xff, sizeof ( mask ) );
  1750. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1751. ( HERMON_UNMAP_EQ | hermon_eq->eqn ),
  1752. &mask ) ) != 0 ) {
  1753. DBGC ( hermon, "Hermon %p EQN %#lx FATAL MAP_EQ failed to "
  1754. "unmap: %s\n", hermon, hermon_eq->eqn, strerror ( rc ) );
  1755. /* Continue; HCA may die but system should survive */
  1756. }
  1757. /* Take ownership back from hardware */
  1758. if ( ( rc = hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn,
  1759. &eqctx ) ) != 0 ) {
  1760. DBGC ( hermon, "Hermon %p EQN %#lx FATAL HW2SW_EQ failed: %s\n",
  1761. hermon, hermon_eq->eqn, strerror ( rc ) );
  1762. /* Leak memory and return; at least we avoid corruption */
  1763. return;
  1764. }
  1765. /* Free MTT entries */
  1766. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1767. /* Free memory */
  1768. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1769. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1770. }
  1771. /**
  1772. * Handle port state event
  1773. *
  1774. * @v hermon Hermon device
  1775. * @v eqe Port state change event queue entry
  1776. */
  1777. static void hermon_event_port_state_change ( struct hermon *hermon,
  1778. union hermonprm_event_entry *eqe){
  1779. unsigned int port;
  1780. int link_up;
  1781. /* Get port and link status */
  1782. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1783. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1784. DBGC ( hermon, "Hermon %p port %d link %s\n", hermon, ( port + 1 ),
  1785. ( link_up ? "up" : "down" ) );
  1786. /* Sanity check */
  1787. if ( port >= hermon->cap.num_ports ) {
  1788. DBGC ( hermon, "Hermon %p port %d does not exist!\n",
  1789. hermon, ( port + 1 ) );
  1790. return;
  1791. }
  1792. /* Notify device of port state change */
  1793. hermon->port[port].type->state_change ( hermon, &hermon->port[port],
  1794. link_up );
  1795. }
  1796. /**
  1797. * Poll event queue
  1798. *
  1799. * @v ibdev Infiniband device
  1800. */
  1801. static void hermon_poll_eq ( struct ib_device *ibdev ) {
  1802. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1803. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1804. union hermonprm_event_entry *eqe;
  1805. union hermonprm_doorbell_register db_reg;
  1806. unsigned int eqe_idx_mask;
  1807. unsigned int event_type;
  1808. /* No event is generated upon reaching INIT, so we must poll
  1809. * separately for link state changes while we remain DOWN.
  1810. */
  1811. if ( ib_is_open ( ibdev ) &&
  1812. ( ibdev->port_state == IB_PORT_STATE_DOWN ) ) {
  1813. ib_smc_update ( ibdev, hermon_mad );
  1814. }
  1815. /* Poll event queue */
  1816. while ( 1 ) {
  1817. /* Look for event entry */
  1818. eqe_idx_mask = ( HERMON_NUM_EQES - 1 );
  1819. eqe = &hermon_eq->eqe[hermon_eq->next_idx & eqe_idx_mask];
  1820. if ( MLX_GET ( &eqe->generic, owner ) ^
  1821. ( ( hermon_eq->next_idx & HERMON_NUM_EQES ) ? 1 : 0 ) ) {
  1822. /* Entry still owned by hardware; end of poll */
  1823. break;
  1824. }
  1825. DBGCP ( hermon, "Hermon %p EQN %#lx event:\n",
  1826. hermon, hermon_eq->eqn );
  1827. DBGCP_HDA ( hermon, virt_to_phys ( eqe ),
  1828. eqe, sizeof ( *eqe ) );
  1829. /* Handle event */
  1830. event_type = MLX_GET ( &eqe->generic, event_type );
  1831. switch ( event_type ) {
  1832. case HERMON_EV_PORT_STATE_CHANGE:
  1833. hermon_event_port_state_change ( hermon, eqe );
  1834. break;
  1835. default:
  1836. DBGC ( hermon, "Hermon %p EQN %#lx unrecognised event "
  1837. "type %#x:\n",
  1838. hermon, hermon_eq->eqn, event_type );
  1839. DBGC_HDA ( hermon, virt_to_phys ( eqe ),
  1840. eqe, sizeof ( *eqe ) );
  1841. break;
  1842. }
  1843. /* Update event queue's index */
  1844. hermon_eq->next_idx++;
  1845. /* Ring doorbell */
  1846. MLX_FILL_1 ( &db_reg.event, 0,
  1847. ci, ( hermon_eq->next_idx & 0x00ffffffUL ) );
  1848. writel ( db_reg.dword[0], hermon_eq->doorbell );
  1849. }
  1850. }
  1851. /***************************************************************************
  1852. *
  1853. * Firmware control
  1854. *
  1855. ***************************************************************************
  1856. */
  1857. /**
  1858. * Map virtual to physical address for firmware usage
  1859. *
  1860. * @v hermon Hermon device
  1861. * @v map Mapping function
  1862. * @v va Virtual address
  1863. * @v pa Physical address
  1864. * @v len Length of region
  1865. * @ret rc Return status code
  1866. */
  1867. static int hermon_map_vpm ( struct hermon *hermon,
  1868. int ( *map ) ( struct hermon *hermon,
  1869. const struct hermonprm_virtual_physical_mapping* ),
  1870. uint64_t va, physaddr_t pa, size_t len ) {
  1871. struct hermonprm_virtual_physical_mapping mapping;
  1872. physaddr_t start;
  1873. physaddr_t low;
  1874. physaddr_t high;
  1875. physaddr_t end;
  1876. size_t size;
  1877. int rc;
  1878. /* Sanity checks */
  1879. assert ( ( va & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1880. assert ( ( pa & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1881. assert ( ( len & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1882. /* Calculate starting points */
  1883. start = pa;
  1884. end = ( start + len );
  1885. size = ( 1UL << ( fls ( start ^ end ) - 1 ) );
  1886. low = high = ( end & ~( size - 1 ) );
  1887. assert ( start < low );
  1888. assert ( high <= end );
  1889. /* These mappings tend to generate huge volumes of
  1890. * uninteresting debug data, which basically makes it
  1891. * impossible to use debugging otherwise.
  1892. */
  1893. DBG_DISABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1894. /* Map blocks in descending order of size */
  1895. while ( size >= HERMON_PAGE_SIZE ) {
  1896. /* Find the next candidate block */
  1897. if ( ( low - size ) >= start ) {
  1898. low -= size;
  1899. pa = low;
  1900. } else if ( ( high + size ) <= end ) {
  1901. pa = high;
  1902. high += size;
  1903. } else {
  1904. size >>= 1;
  1905. continue;
  1906. }
  1907. assert ( ( va & ( size - 1 ) ) == 0 );
  1908. assert ( ( pa & ( size - 1 ) ) == 0 );
  1909. /* Map this block */
  1910. memset ( &mapping, 0, sizeof ( mapping ) );
  1911. MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
  1912. MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
  1913. MLX_FILL_H ( &mapping, 2, pa_h, pa );
  1914. MLX_FILL_2 ( &mapping, 3,
  1915. log2size, ( ( fls ( size ) - 1 ) - 12 ),
  1916. pa_l, ( pa >> 12 ) );
  1917. if ( ( rc = map ( hermon, &mapping ) ) != 0 ) {
  1918. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1919. DBGC ( hermon, "Hermon %p could not map %08llx+%zx to "
  1920. "%08lx: %s\n",
  1921. hermon, va, size, pa, strerror ( rc ) );
  1922. return rc;
  1923. }
  1924. va += size;
  1925. }
  1926. assert ( low == start );
  1927. assert ( high == end );
  1928. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1929. return 0;
  1930. }
  1931. /**
  1932. * Start firmware running
  1933. *
  1934. * @v hermon Hermon device
  1935. * @ret rc Return status code
  1936. */
  1937. static int hermon_start_firmware ( struct hermon *hermon ) {
  1938. struct hermonprm_query_fw fw;
  1939. unsigned int fw_pages;
  1940. size_t fw_len;
  1941. physaddr_t fw_base;
  1942. int rc;
  1943. /* Get firmware parameters */
  1944. if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
  1945. DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
  1946. hermon, strerror ( rc ) );
  1947. goto err_query_fw;
  1948. }
  1949. DBGC ( hermon, "Hermon %p firmware version %d.%d.%d\n", hermon,
  1950. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  1951. MLX_GET ( &fw, fw_rev_subminor ) );
  1952. fw_pages = MLX_GET ( &fw, fw_pages );
  1953. DBGC ( hermon, "Hermon %p requires %d pages (%d kB) for firmware\n",
  1954. hermon, fw_pages, ( fw_pages * 4 ) );
  1955. /* Allocate firmware pages and map firmware area */
  1956. fw_len = ( fw_pages * HERMON_PAGE_SIZE );
  1957. if ( ! hermon->firmware_area ) {
  1958. hermon->firmware_len = fw_len;
  1959. hermon->firmware_area = umalloc ( hermon->firmware_len );
  1960. if ( ! hermon->firmware_area ) {
  1961. rc = -ENOMEM;
  1962. goto err_alloc_fa;
  1963. }
  1964. } else {
  1965. assert ( hermon->firmware_len == fw_len );
  1966. }
  1967. fw_base = user_to_phys ( hermon->firmware_area, 0 );
  1968. DBGC ( hermon, "Hermon %p firmware area at physical [%08lx,%08lx)\n",
  1969. hermon, fw_base, ( fw_base + fw_len ) );
  1970. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_fa,
  1971. 0, fw_base, fw_len ) ) != 0 ) {
  1972. DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
  1973. hermon, strerror ( rc ) );
  1974. goto err_map_fa;
  1975. }
  1976. /* Start firmware */
  1977. if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
  1978. DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
  1979. hermon, strerror ( rc ) );
  1980. goto err_run_fw;
  1981. }
  1982. DBGC ( hermon, "Hermon %p firmware started\n", hermon );
  1983. return 0;
  1984. err_run_fw:
  1985. err_map_fa:
  1986. hermon_cmd_unmap_fa ( hermon );
  1987. err_alloc_fa:
  1988. err_query_fw:
  1989. return rc;
  1990. }
  1991. /**
  1992. * Stop firmware running
  1993. *
  1994. * @v hermon Hermon device
  1995. */
  1996. static void hermon_stop_firmware ( struct hermon *hermon ) {
  1997. int rc;
  1998. if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
  1999. DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
  2000. hermon, strerror ( rc ) );
  2001. /* Leak memory and return; at least we avoid corruption */
  2002. hermon->firmware_area = UNULL;
  2003. return;
  2004. }
  2005. }
  2006. /***************************************************************************
  2007. *
  2008. * Infinihost Context Memory management
  2009. *
  2010. ***************************************************************************
  2011. */
  2012. /**
  2013. * Get device limits
  2014. *
  2015. * @v hermon Hermon device
  2016. * @ret rc Return status code
  2017. */
  2018. static int hermon_get_cap ( struct hermon *hermon ) {
  2019. struct hermonprm_query_dev_cap dev_cap;
  2020. int rc;
  2021. if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
  2022. DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
  2023. hermon, strerror ( rc ) );
  2024. return rc;
  2025. }
  2026. hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
  2027. hermon->cap.reserved_qps =
  2028. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
  2029. hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
  2030. hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
  2031. hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
  2032. hermon->cap.reserved_srqs =
  2033. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
  2034. hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
  2035. hermon->cap.reserved_cqs =
  2036. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
  2037. hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
  2038. hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
  2039. if ( hermon->cap.reserved_eqs == 0 ) {
  2040. /* Backward compatibility */
  2041. hermon->cap.reserved_eqs =
  2042. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_eqs ) );
  2043. }
  2044. hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
  2045. hermon->cap.reserved_mtts =
  2046. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
  2047. hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
  2048. hermon->cap.reserved_mrws =
  2049. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
  2050. hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
  2051. hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
  2052. hermon->cap.num_ports = MLX_GET ( &dev_cap, num_ports );
  2053. hermon->cap.dpdp = MLX_GET ( &dev_cap, dpdp );
  2054. /* Sanity check */
  2055. if ( hermon->cap.num_ports > HERMON_MAX_PORTS ) {
  2056. DBGC ( hermon, "Hermon %p has %d ports (only %d supported)\n",
  2057. hermon, hermon->cap.num_ports, HERMON_MAX_PORTS );
  2058. hermon->cap.num_ports = HERMON_MAX_PORTS;
  2059. }
  2060. return 0;
  2061. }
  2062. /**
  2063. * Align ICM table
  2064. *
  2065. * @v icm_offset Current ICM offset
  2066. * @v len ICM table length
  2067. * @ret icm_offset ICM offset
  2068. */
  2069. static uint64_t icm_align ( uint64_t icm_offset, size_t len ) {
  2070. /* Round up to a multiple of the table size */
  2071. assert ( len == ( 1UL << ( fls ( len ) - 1 ) ) );
  2072. return ( ( icm_offset + len - 1 ) & ~( ( ( uint64_t ) len ) - 1 ) );
  2073. }
  2074. /**
  2075. * Map ICM (allocating if necessary)
  2076. *
  2077. * @v hermon Hermon device
  2078. * @v init_hca INIT_HCA structure to fill in
  2079. * @ret rc Return status code
  2080. */
  2081. static int hermon_map_icm ( struct hermon *hermon,
  2082. struct hermonprm_init_hca *init_hca ) {
  2083. struct hermonprm_scalar_parameter icm_size;
  2084. struct hermonprm_scalar_parameter icm_aux_size;
  2085. uint64_t icm_offset = 0;
  2086. unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
  2087. unsigned int log_num_mtts, log_num_mpts, log_num_mcs;
  2088. size_t cmpt_max_len;
  2089. size_t icm_len, icm_aux_len;
  2090. size_t len;
  2091. physaddr_t icm_phys;
  2092. int i;
  2093. int rc;
  2094. /*
  2095. * Start by carving up the ICM virtual address space
  2096. *
  2097. */
  2098. /* Calculate number of each object type within ICM */
  2099. log_num_qps = fls ( hermon->cap.reserved_qps +
  2100. HERMON_RSVD_SPECIAL_QPS + HERMON_MAX_QPS - 1 );
  2101. log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
  2102. log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
  2103. log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
  2104. log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
  2105. log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
  2106. log_num_mcs = HERMON_LOG_MULTICAST_HASH_SIZE;
  2107. /* ICM starts with the cMPT tables, which are sparse */
  2108. cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
  2109. ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
  2110. len = ( ( ( ( 1 << log_num_qps ) * hermon->cap.cmpt_entry_size ) +
  2111. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2112. hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
  2113. hermon->icm_map[HERMON_ICM_QP_CMPT].len = len;
  2114. icm_offset += cmpt_max_len;
  2115. len = ( ( ( ( 1 << log_num_srqs ) * hermon->cap.cmpt_entry_size ) +
  2116. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2117. hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
  2118. hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = len;
  2119. icm_offset += cmpt_max_len;
  2120. len = ( ( ( ( 1 << log_num_cqs ) * hermon->cap.cmpt_entry_size ) +
  2121. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2122. hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
  2123. hermon->icm_map[HERMON_ICM_CQ_CMPT].len = len;
  2124. icm_offset += cmpt_max_len;
  2125. len = ( ( ( ( 1 << log_num_eqs ) * hermon->cap.cmpt_entry_size ) +
  2126. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2127. hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
  2128. hermon->icm_map[HERMON_ICM_EQ_CMPT].len = len;
  2129. icm_offset += cmpt_max_len;
  2130. hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
  2131. /* Queue pair contexts */
  2132. len = ( ( 1 << log_num_qps ) * hermon->cap.qpc_entry_size );
  2133. icm_offset = icm_align ( icm_offset, len );
  2134. MLX_FILL_1 ( init_hca, 12,
  2135. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
  2136. ( icm_offset >> 32 ) );
  2137. MLX_FILL_2 ( init_hca, 13,
  2138. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  2139. ( icm_offset >> 5 ),
  2140. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  2141. log_num_qps );
  2142. DBGC ( hermon, "Hermon %p ICM QPC is %d x %#zx at [%08llx,%08llx)\n",
  2143. hermon, ( 1 << log_num_qps ), hermon->cap.qpc_entry_size,
  2144. icm_offset, ( icm_offset + len ) );
  2145. icm_offset += len;
  2146. /* Extended alternate path contexts */
  2147. len = ( ( 1 << log_num_qps ) * hermon->cap.altc_entry_size );
  2148. icm_offset = icm_align ( icm_offset, len );
  2149. MLX_FILL_1 ( init_hca, 24,
  2150. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
  2151. ( icm_offset >> 32 ) );
  2152. MLX_FILL_1 ( init_hca, 25,
  2153. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
  2154. icm_offset );
  2155. DBGC ( hermon, "Hermon %p ICM ALTC is %d x %#zx at [%08llx,%08llx)\n",
  2156. hermon, ( 1 << log_num_qps ), hermon->cap.altc_entry_size,
  2157. icm_offset, ( icm_offset + len ) );
  2158. icm_offset += len;
  2159. /* Extended auxiliary contexts */
  2160. len = ( ( 1 << log_num_qps ) * hermon->cap.auxc_entry_size );
  2161. icm_offset = icm_align ( icm_offset, len );
  2162. MLX_FILL_1 ( init_hca, 28,
  2163. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
  2164. ( icm_offset >> 32 ) );
  2165. MLX_FILL_1 ( init_hca, 29,
  2166. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
  2167. icm_offset );
  2168. DBGC ( hermon, "Hermon %p ICM AUXC is %d x %#zx at [%08llx,%08llx)\n",
  2169. hermon, ( 1 << log_num_qps ), hermon->cap.auxc_entry_size,
  2170. icm_offset, ( icm_offset + len ) );
  2171. icm_offset += len;
  2172. /* Shared receive queue contexts */
  2173. len = ( ( 1 << log_num_srqs ) * hermon->cap.srqc_entry_size );
  2174. icm_offset = icm_align ( icm_offset, len );
  2175. MLX_FILL_1 ( init_hca, 18,
  2176. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
  2177. ( icm_offset >> 32 ) );
  2178. MLX_FILL_2 ( init_hca, 19,
  2179. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  2180. ( icm_offset >> 5 ),
  2181. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  2182. log_num_srqs );
  2183. DBGC ( hermon, "Hermon %p ICM SRQC is %d x %#zx at [%08llx,%08llx)\n",
  2184. hermon, ( 1 << log_num_srqs ), hermon->cap.srqc_entry_size,
  2185. icm_offset, ( icm_offset + len ) );
  2186. icm_offset += len;
  2187. /* Completion queue contexts */
  2188. len = ( ( 1 << log_num_cqs ) * hermon->cap.cqc_entry_size );
  2189. icm_offset = icm_align ( icm_offset, len );
  2190. MLX_FILL_1 ( init_hca, 20,
  2191. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
  2192. ( icm_offset >> 32 ) );
  2193. MLX_FILL_2 ( init_hca, 21,
  2194. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  2195. ( icm_offset >> 5 ),
  2196. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  2197. log_num_cqs );
  2198. DBGC ( hermon, "Hermon %p ICM CQC is %d x %#zx at [%08llx,%08llx)\n",
  2199. hermon, ( 1 << log_num_cqs ), hermon->cap.cqc_entry_size,
  2200. icm_offset, ( icm_offset + len ) );
  2201. icm_offset += len;
  2202. /* Event queue contexts */
  2203. len = ( ( 1 << log_num_eqs ) * hermon->cap.eqc_entry_size );
  2204. icm_offset = icm_align ( icm_offset, len );
  2205. MLX_FILL_1 ( init_hca, 32,
  2206. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
  2207. ( icm_offset >> 32 ) );
  2208. MLX_FILL_2 ( init_hca, 33,
  2209. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  2210. ( icm_offset >> 5 ),
  2211. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
  2212. log_num_eqs );
  2213. DBGC ( hermon, "Hermon %p ICM EQC is %d x %#zx at [%08llx,%08llx)\n",
  2214. hermon, ( 1 << log_num_eqs ), hermon->cap.eqc_entry_size,
  2215. icm_offset, ( icm_offset + len ) );
  2216. icm_offset += len;
  2217. /* Memory translation table */
  2218. len = ( ( 1 << log_num_mtts ) * hermon->cap.mtt_entry_size );
  2219. icm_offset = icm_align ( icm_offset, len );
  2220. MLX_FILL_1 ( init_hca, 64,
  2221. tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
  2222. MLX_FILL_1 ( init_hca, 65,
  2223. tpt_parameters.mtt_base_addr_l, icm_offset );
  2224. DBGC ( hermon, "Hermon %p ICM MTT is %d x %#zx at [%08llx,%08llx)\n",
  2225. hermon, ( 1 << log_num_mtts ), hermon->cap.mtt_entry_size,
  2226. icm_offset, ( icm_offset + len ) );
  2227. icm_offset += len;
  2228. /* Memory protection table */
  2229. len = ( ( 1 << log_num_mpts ) * hermon->cap.dmpt_entry_size );
  2230. icm_offset = icm_align ( icm_offset, len );
  2231. MLX_FILL_1 ( init_hca, 60,
  2232. tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
  2233. MLX_FILL_1 ( init_hca, 61,
  2234. tpt_parameters.dmpt_base_adr_l, icm_offset );
  2235. MLX_FILL_1 ( init_hca, 62,
  2236. tpt_parameters.log_dmpt_sz, log_num_mpts );
  2237. DBGC ( hermon, "Hermon %p ICM DMPT is %d x %#zx at [%08llx,%08llx)\n",
  2238. hermon, ( 1 << log_num_mpts ), hermon->cap.dmpt_entry_size,
  2239. icm_offset, ( icm_offset + len ) );
  2240. icm_offset += len;
  2241. /* Multicast table */
  2242. len = ( ( 1 << log_num_mcs ) * sizeof ( struct hermonprm_mcg_entry ) );
  2243. icm_offset = icm_align ( icm_offset, len );
  2244. MLX_FILL_1 ( init_hca, 48,
  2245. multicast_parameters.mc_base_addr_h,
  2246. ( icm_offset >> 32 ) );
  2247. MLX_FILL_1 ( init_hca, 49,
  2248. multicast_parameters.mc_base_addr_l, icm_offset );
  2249. MLX_FILL_1 ( init_hca, 52,
  2250. multicast_parameters.log_mc_table_entry_sz,
  2251. fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
  2252. MLX_FILL_1 ( init_hca, 53,
  2253. multicast_parameters.log_mc_table_hash_sz, log_num_mcs );
  2254. MLX_FILL_1 ( init_hca, 54,
  2255. multicast_parameters.log_mc_table_sz, log_num_mcs );
  2256. DBGC ( hermon, "Hermon %p ICM MC is %d x %#zx at [%08llx,%08llx)\n",
  2257. hermon, ( 1 << log_num_mcs ),
  2258. sizeof ( struct hermonprm_mcg_entry ),
  2259. icm_offset, ( icm_offset + len ) );
  2260. icm_offset += len;
  2261. hermon->icm_map[HERMON_ICM_OTHER].len =
  2262. ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
  2263. /*
  2264. * Allocate and map physical memory for (portions of) ICM
  2265. *
  2266. * Map is:
  2267. * ICM AUX area (aligned to its own size)
  2268. * cMPT areas
  2269. * Other areas
  2270. */
  2271. /* Calculate physical memory required for ICM */
  2272. icm_len = 0;
  2273. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2274. icm_len += hermon->icm_map[i].len;
  2275. }
  2276. /* Get ICM auxiliary area size */
  2277. memset ( &icm_size, 0, sizeof ( icm_size ) );
  2278. MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
  2279. MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
  2280. if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
  2281. &icm_aux_size ) ) != 0 ) {
  2282. DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
  2283. hermon, strerror ( rc ) );
  2284. goto err_set_icm_size;
  2285. }
  2286. icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
  2287. /* Allocate ICM data and auxiliary area */
  2288. DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
  2289. hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
  2290. if ( ! hermon->icm ) {
  2291. hermon->icm_len = icm_len;
  2292. hermon->icm_aux_len = icm_aux_len;
  2293. hermon->icm = umalloc ( hermon->icm_aux_len + hermon->icm_len );
  2294. if ( ! hermon->icm ) {
  2295. rc = -ENOMEM;
  2296. goto err_alloc;
  2297. }
  2298. } else {
  2299. assert ( hermon->icm_len == icm_len );
  2300. assert ( hermon->icm_aux_len == icm_aux_len );
  2301. }
  2302. icm_phys = user_to_phys ( hermon->icm, 0 );
  2303. /* Map ICM auxiliary area */
  2304. DBGC ( hermon, "Hermon %p mapping ICM AUX => %08lx\n",
  2305. hermon, icm_phys );
  2306. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm_aux,
  2307. 0, icm_phys, icm_aux_len ) ) != 0 ) {
  2308. DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
  2309. hermon, strerror ( rc ) );
  2310. goto err_map_icm_aux;
  2311. }
  2312. icm_phys += icm_aux_len;
  2313. /* MAP ICM area */
  2314. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2315. DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx => %08lx\n",
  2316. hermon, hermon->icm_map[i].offset,
  2317. hermon->icm_map[i].len, icm_phys );
  2318. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm,
  2319. hermon->icm_map[i].offset,
  2320. icm_phys,
  2321. hermon->icm_map[i].len ) ) != 0 ){
  2322. DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
  2323. hermon, strerror ( rc ) );
  2324. goto err_map_icm;
  2325. }
  2326. icm_phys += hermon->icm_map[i].len;
  2327. }
  2328. return 0;
  2329. err_map_icm:
  2330. assert ( i == 0 ); /* We don't handle partial failure at present */
  2331. err_map_icm_aux:
  2332. hermon_cmd_unmap_icm_aux ( hermon );
  2333. err_alloc:
  2334. err_set_icm_size:
  2335. return rc;
  2336. }
  2337. /**
  2338. * Unmap ICM
  2339. *
  2340. * @v hermon Hermon device
  2341. */
  2342. static void hermon_unmap_icm ( struct hermon *hermon ) {
  2343. struct hermonprm_scalar_parameter unmap_icm;
  2344. int i;
  2345. for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
  2346. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2347. MLX_FILL_1 ( &unmap_icm, 0, value_hi,
  2348. ( hermon->icm_map[i].offset >> 32 ) );
  2349. MLX_FILL_1 ( &unmap_icm, 1, value,
  2350. hermon->icm_map[i].offset );
  2351. hermon_cmd_unmap_icm ( hermon,
  2352. ( 1 << fls ( ( hermon->icm_map[i].len /
  2353. HERMON_PAGE_SIZE ) - 1)),
  2354. &unmap_icm );
  2355. }
  2356. hermon_cmd_unmap_icm_aux ( hermon );
  2357. }
  2358. /***************************************************************************
  2359. *
  2360. * Initialisation and teardown
  2361. *
  2362. ***************************************************************************
  2363. */
  2364. /**
  2365. * Reset device
  2366. *
  2367. * @v hermon Hermon device
  2368. */
  2369. static void hermon_reset ( struct hermon *hermon ) {
  2370. struct pci_device *pci = hermon->pci;
  2371. struct pci_config_backup backup;
  2372. static const uint8_t backup_exclude[] =
  2373. PCI_CONFIG_BACKUP_EXCLUDE ( 0x58, 0x5c );
  2374. /* Perform device reset and preserve PCI configuration */
  2375. pci_backup ( pci, &backup, backup_exclude );
  2376. writel ( HERMON_RESET_MAGIC,
  2377. ( hermon->config + HERMON_RESET_OFFSET ) );
  2378. mdelay ( HERMON_RESET_WAIT_TIME_MS );
  2379. pci_restore ( pci, &backup, backup_exclude );
  2380. /* Reset command interface toggle */
  2381. hermon->toggle = 0;
  2382. }
  2383. /**
  2384. * Set up memory protection table
  2385. *
  2386. * @v hermon Hermon device
  2387. * @ret rc Return status code
  2388. */
  2389. static int hermon_setup_mpt ( struct hermon *hermon ) {
  2390. struct hermonprm_mpt mpt;
  2391. uint32_t key;
  2392. int rc;
  2393. /* Derive key */
  2394. key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
  2395. hermon->lkey = ( ( key << 8 ) | ( key >> 24 ) );
  2396. /* Initialise memory protection table */
  2397. memset ( &mpt, 0, sizeof ( mpt ) );
  2398. MLX_FILL_7 ( &mpt, 0,
  2399. atomic, 1,
  2400. rw, 1,
  2401. rr, 1,
  2402. lw, 1,
  2403. lr, 1,
  2404. pa, 1,
  2405. r_w, 1 );
  2406. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  2407. MLX_FILL_1 ( &mpt, 3,
  2408. pd, HERMON_GLOBAL_PD );
  2409. MLX_FILL_1 ( &mpt, 10, len64, 1 );
  2410. if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
  2411. hermon->cap.reserved_mrws,
  2412. &mpt ) ) != 0 ) {
  2413. DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
  2414. hermon, strerror ( rc ) );
  2415. return rc;
  2416. }
  2417. return 0;
  2418. }
  2419. /**
  2420. * Configure special queue pairs
  2421. *
  2422. * @v hermon Hermon device
  2423. * @ret rc Return status code
  2424. */
  2425. static int hermon_configure_special_qps ( struct hermon *hermon ) {
  2426. int rc;
  2427. /* Special QP block must be aligned on its own size */
  2428. hermon->special_qpn_base = ( ( hermon->cap.reserved_qps +
  2429. HERMON_NUM_SPECIAL_QPS - 1 )
  2430. & ~( HERMON_NUM_SPECIAL_QPS - 1 ) );
  2431. hermon->qpn_base = ( hermon->special_qpn_base +
  2432. HERMON_NUM_SPECIAL_QPS );
  2433. DBGC ( hermon, "Hermon %p special QPs at [%lx,%lx]\n", hermon,
  2434. hermon->special_qpn_base, ( hermon->qpn_base - 1 ) );
  2435. /* Issue command to configure special QPs */
  2436. if ( ( rc = hermon_cmd_conf_special_qp ( hermon, 0x00,
  2437. hermon->special_qpn_base ) ) != 0 ) {
  2438. DBGC ( hermon, "Hermon %p could not configure special QPs: "
  2439. "%s\n", hermon, strerror ( rc ) );
  2440. return rc;
  2441. }
  2442. return 0;
  2443. }
  2444. /**
  2445. * Start Hermon device
  2446. *
  2447. * @v hermon Hermon device
  2448. * @v running Firmware is already running
  2449. * @ret rc Return status code
  2450. */
  2451. static int hermon_start ( struct hermon *hermon, int running ) {
  2452. struct hermonprm_init_hca init_hca;
  2453. unsigned int i;
  2454. int rc;
  2455. /* Start firmware if not already running */
  2456. if ( ! running ) {
  2457. if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
  2458. goto err_start_firmware;
  2459. }
  2460. /* Allocate and map ICM */
  2461. memset ( &init_hca, 0, sizeof ( init_hca ) );
  2462. if ( ( rc = hermon_map_icm ( hermon, &init_hca ) ) != 0 )
  2463. goto err_map_icm;
  2464. /* Initialise HCA */
  2465. MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
  2466. MLX_FILL_1 ( &init_hca, 5, udp, 1 );
  2467. MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
  2468. if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
  2469. DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
  2470. hermon, strerror ( rc ) );
  2471. goto err_init_hca;
  2472. }
  2473. /* Set up memory protection */
  2474. if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
  2475. goto err_setup_mpt;
  2476. for ( i = 0 ; i < hermon->cap.num_ports ; i++ )
  2477. hermon->port[i].ibdev->rdma_key = hermon->lkey;
  2478. /* Set up event queue */
  2479. if ( ( rc = hermon_create_eq ( hermon ) ) != 0 )
  2480. goto err_create_eq;
  2481. /* Configure special QPs */
  2482. if ( ( rc = hermon_configure_special_qps ( hermon ) ) != 0 )
  2483. goto err_conf_special_qps;
  2484. return 0;
  2485. err_conf_special_qps:
  2486. hermon_destroy_eq ( hermon );
  2487. err_create_eq:
  2488. err_setup_mpt:
  2489. hermon_cmd_close_hca ( hermon );
  2490. err_init_hca:
  2491. hermon_unmap_icm ( hermon );
  2492. err_map_icm:
  2493. hermon_stop_firmware ( hermon );
  2494. err_start_firmware:
  2495. return rc;
  2496. }
  2497. /**
  2498. * Stop Hermon device
  2499. *
  2500. * @v hermon Hermon device
  2501. */
  2502. static void hermon_stop ( struct hermon *hermon ) {
  2503. hermon_destroy_eq ( hermon );
  2504. hermon_cmd_close_hca ( hermon );
  2505. hermon_unmap_icm ( hermon );
  2506. hermon_stop_firmware ( hermon );
  2507. hermon_reset ( hermon );
  2508. }
  2509. /**
  2510. * Open Hermon device
  2511. *
  2512. * @v hermon Hermon device
  2513. * @ret rc Return status code
  2514. */
  2515. static int hermon_open ( struct hermon *hermon ) {
  2516. int rc;
  2517. /* Start device if applicable */
  2518. if ( hermon->open_count == 0 ) {
  2519. if ( ( rc = hermon_start ( hermon, 0 ) ) != 0 )
  2520. return rc;
  2521. }
  2522. /* Increment open counter */
  2523. hermon->open_count++;
  2524. return 0;
  2525. }
  2526. /**
  2527. * Close Hermon device
  2528. *
  2529. * @v hermon Hermon device
  2530. */
  2531. static void hermon_close ( struct hermon *hermon ) {
  2532. /* Decrement open counter */
  2533. assert ( hermon->open_count != 0 );
  2534. hermon->open_count--;
  2535. /* Stop device if applicable */
  2536. if ( hermon->open_count == 0 )
  2537. hermon_stop ( hermon );
  2538. }
  2539. /***************************************************************************
  2540. *
  2541. * Infiniband link-layer operations
  2542. *
  2543. ***************************************************************************
  2544. */
  2545. /**
  2546. * Initialise Infiniband link
  2547. *
  2548. * @v ibdev Infiniband device
  2549. * @ret rc Return status code
  2550. */
  2551. static int hermon_ib_open ( struct ib_device *ibdev ) {
  2552. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2553. union hermonprm_set_port set_port;
  2554. int rc;
  2555. /* Open hardware */
  2556. if ( ( rc = hermon_open ( hermon ) ) != 0 )
  2557. goto err_open;
  2558. /* Set port parameters */
  2559. memset ( &set_port, 0, sizeof ( set_port ) );
  2560. MLX_FILL_8 ( &set_port.ib, 0,
  2561. mmc, 1,
  2562. mvc, 1,
  2563. mp, 1,
  2564. mg, 1,
  2565. mtu_cap, IB_MTU_2048,
  2566. vl_cap, IB_VL_0,
  2567. rcm, 1,
  2568. lss, 1 );
  2569. MLX_FILL_2 ( &set_port.ib, 10,
  2570. max_pkey, 1,
  2571. max_gid, 1 );
  2572. MLX_FILL_1 ( &set_port.ib, 28,
  2573. link_speed_supported, 1 );
  2574. if ( ( rc = hermon_cmd_set_port ( hermon, 0, ibdev->port,
  2575. &set_port ) ) != 0 ) {
  2576. DBGC ( hermon, "Hermon %p port %d could not set port: %s\n",
  2577. hermon, ibdev->port, strerror ( rc ) );
  2578. goto err_set_port;
  2579. }
  2580. /* Initialise port */
  2581. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port ) ) != 0 ) {
  2582. DBGC ( hermon, "Hermon %p port %d could not initialise port: "
  2583. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  2584. goto err_init_port;
  2585. }
  2586. /* Update MAD parameters */
  2587. ib_smc_update ( ibdev, hermon_mad );
  2588. return 0;
  2589. err_init_port:
  2590. err_set_port:
  2591. hermon_close ( hermon );
  2592. err_open:
  2593. return rc;
  2594. }
  2595. /**
  2596. * Close Infiniband link
  2597. *
  2598. * @v ibdev Infiniband device
  2599. */
  2600. static void hermon_ib_close ( struct ib_device *ibdev ) {
  2601. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2602. int rc;
  2603. /* Close port */
  2604. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  2605. DBGC ( hermon, "Hermon %p port %d could not close port: %s\n",
  2606. hermon, ibdev->port, strerror ( rc ) );
  2607. /* Nothing we can do about this */
  2608. }
  2609. /* Close hardware */
  2610. hermon_close ( hermon );
  2611. }
  2612. /**
  2613. * Inform embedded subnet management agent of a received MAD
  2614. *
  2615. * @v ibdev Infiniband device
  2616. * @v mad MAD
  2617. * @ret rc Return status code
  2618. */
  2619. static int hermon_inform_sma ( struct ib_device *ibdev,
  2620. union ib_mad *mad ) {
  2621. int rc;
  2622. /* Send the MAD to the embedded SMA */
  2623. if ( ( rc = hermon_mad ( ibdev, mad ) ) != 0 )
  2624. return rc;
  2625. /* Update parameters held in software */
  2626. ib_smc_update ( ibdev, hermon_mad );
  2627. return 0;
  2628. }
  2629. /***************************************************************************
  2630. *
  2631. * Multicast group operations
  2632. *
  2633. ***************************************************************************
  2634. */
  2635. /**
  2636. * Attach to multicast group
  2637. *
  2638. * @v ibdev Infiniband device
  2639. * @v qp Queue pair
  2640. * @v gid Multicast GID
  2641. * @ret rc Return status code
  2642. */
  2643. static int hermon_mcast_attach ( struct ib_device *ibdev,
  2644. struct ib_queue_pair *qp,
  2645. union ib_gid *gid ) {
  2646. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2647. struct hermonprm_mgm_hash hash;
  2648. struct hermonprm_mcg_entry mcg;
  2649. unsigned int index;
  2650. int rc;
  2651. /* Generate hash table index */
  2652. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  2653. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  2654. hermon, strerror ( rc ) );
  2655. return rc;
  2656. }
  2657. index = MLX_GET ( &hash, hash );
  2658. /* Check for existing hash table entry */
  2659. if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
  2660. DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
  2661. hermon, index, strerror ( rc ) );
  2662. return rc;
  2663. }
  2664. if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
  2665. /* FIXME: this implementation allows only a single QP
  2666. * per multicast group, and doesn't handle hash
  2667. * collisions. Sufficient for IPoIB but may need to
  2668. * be extended in future.
  2669. */
  2670. DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
  2671. hermon, index );
  2672. return -EBUSY;
  2673. }
  2674. /* Update hash table entry */
  2675. MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
  2676. MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
  2677. memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
  2678. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  2679. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  2680. hermon, index, strerror ( rc ) );
  2681. return rc;
  2682. }
  2683. return 0;
  2684. }
  2685. /**
  2686. * Detach from multicast group
  2687. *
  2688. * @v ibdev Infiniband device
  2689. * @v qp Queue pair
  2690. * @v gid Multicast GID
  2691. */
  2692. static void hermon_mcast_detach ( struct ib_device *ibdev,
  2693. struct ib_queue_pair *qp __unused,
  2694. union ib_gid *gid ) {
  2695. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2696. struct hermonprm_mgm_hash hash;
  2697. struct hermonprm_mcg_entry mcg;
  2698. unsigned int index;
  2699. int rc;
  2700. /* Generate hash table index */
  2701. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  2702. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  2703. hermon, strerror ( rc ) );
  2704. return;
  2705. }
  2706. index = MLX_GET ( &hash, hash );
  2707. /* Clear hash table entry */
  2708. memset ( &mcg, 0, sizeof ( mcg ) );
  2709. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  2710. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  2711. hermon, index, strerror ( rc ) );
  2712. return;
  2713. }
  2714. }
  2715. /** Hermon Infiniband operations */
  2716. static struct ib_device_operations hermon_ib_operations = {
  2717. .create_cq = hermon_create_cq,
  2718. .destroy_cq = hermon_destroy_cq,
  2719. .create_qp = hermon_create_qp,
  2720. .modify_qp = hermon_modify_qp,
  2721. .destroy_qp = hermon_destroy_qp,
  2722. .post_send = hermon_post_send,
  2723. .post_recv = hermon_post_recv,
  2724. .poll_cq = hermon_poll_cq,
  2725. .poll_eq = hermon_poll_eq,
  2726. .open = hermon_ib_open,
  2727. .close = hermon_ib_close,
  2728. .mcast_attach = hermon_mcast_attach,
  2729. .mcast_detach = hermon_mcast_detach,
  2730. .set_port_info = hermon_inform_sma,
  2731. .set_pkey_table = hermon_inform_sma,
  2732. };
  2733. /**
  2734. * Register Hermon Infiniband device
  2735. *
  2736. * @v hermon Hermon device
  2737. * @v port Hermon port
  2738. * @ret rc Return status code
  2739. */
  2740. static int hermon_register_ibdev ( struct hermon *hermon,
  2741. struct hermon_port *port ) {
  2742. struct ib_device *ibdev = port->ibdev;
  2743. int rc;
  2744. /* Initialise parameters using SMC */
  2745. ib_smc_init ( ibdev, hermon_mad );
  2746. /* Register Infiniband device */
  2747. if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
  2748. DBGC ( hermon, "Hermon %p port %d could not register IB "
  2749. "device: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2750. return rc;
  2751. }
  2752. return 0;
  2753. }
  2754. /**
  2755. * Handle Hermon Infiniband device port state change
  2756. *
  2757. * @v hermon Hermon device
  2758. * @v port Hermon port
  2759. * @v link_up Link is up
  2760. */
  2761. static void hermon_state_change_ibdev ( struct hermon *hermon __unused,
  2762. struct hermon_port *port,
  2763. int link_up __unused ) {
  2764. struct ib_device *ibdev = port->ibdev;
  2765. /* Update MAD parameters */
  2766. ib_smc_update ( ibdev, hermon_mad );
  2767. }
  2768. /**
  2769. * Unregister Hermon Infiniband device
  2770. *
  2771. * @v hermon Hermon device
  2772. * @v port Hermon port
  2773. */
  2774. static void hermon_unregister_ibdev ( struct hermon *hermon __unused,
  2775. struct hermon_port *port ) {
  2776. struct ib_device *ibdev = port->ibdev;
  2777. unregister_ibdev ( ibdev );
  2778. }
  2779. /** Hermon Infiniband port type */
  2780. static struct hermon_port_type hermon_port_type_ib = {
  2781. .register_dev = hermon_register_ibdev,
  2782. .state_change = hermon_state_change_ibdev,
  2783. .unregister_dev = hermon_unregister_ibdev,
  2784. };
  2785. /***************************************************************************
  2786. *
  2787. * Ethernet operation
  2788. *
  2789. ***************************************************************************
  2790. */
  2791. /** Number of Hermon Ethernet send work queue entries */
  2792. #define HERMON_ETH_NUM_SEND_WQES 2
  2793. /** Number of Hermon Ethernet receive work queue entries */
  2794. #define HERMON_ETH_NUM_RECV_WQES 4
  2795. /** Number of Hermon Ethernet completion entries */
  2796. #define HERMON_ETH_NUM_CQES 8
  2797. /**
  2798. * Transmit packet via Hermon Ethernet device
  2799. *
  2800. * @v netdev Network device
  2801. * @v iobuf I/O buffer
  2802. * @ret rc Return status code
  2803. */
  2804. static int hermon_eth_transmit ( struct net_device *netdev,
  2805. struct io_buffer *iobuf ) {
  2806. struct hermon_port *port = netdev->priv;
  2807. struct ib_device *ibdev = port->ibdev;
  2808. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2809. int rc;
  2810. /* Transmit packet */
  2811. if ( ( rc = ib_post_send ( ibdev, port->eth_qp, NULL,
  2812. iobuf ) ) != 0 ) {
  2813. DBGC ( hermon, "Hermon %p port %d could not transmit: %s\n",
  2814. hermon, ibdev->port, strerror ( rc ) );
  2815. return rc;
  2816. }
  2817. return 0;
  2818. }
  2819. /** Hermon Ethernet queue pair operations */
  2820. static struct ib_queue_pair_operations hermon_eth_qp_op = {
  2821. .alloc_iob = alloc_iob,
  2822. };
  2823. /**
  2824. * Handle Hermon Ethernet device send completion
  2825. *
  2826. * @v ibdev Infiniband device
  2827. * @v qp Queue pair
  2828. * @v iobuf I/O buffer
  2829. * @v rc Completion status code
  2830. */
  2831. static void hermon_eth_complete_send ( struct ib_device *ibdev __unused,
  2832. struct ib_queue_pair *qp,
  2833. struct io_buffer *iobuf, int rc ) {
  2834. struct net_device *netdev = ib_qp_get_ownerdata ( qp );
  2835. netdev_tx_complete_err ( netdev, iobuf, rc );
  2836. }
  2837. /**
  2838. * Handle Hermon Ethernet device receive completion
  2839. *
  2840. * @v ibdev Infiniband device
  2841. * @v qp Queue pair
  2842. * @v dest Destination address vector, or NULL
  2843. * @v source Source address vector, or NULL
  2844. * @v iobuf I/O buffer
  2845. * @v rc Completion status code
  2846. */
  2847. static void hermon_eth_complete_recv ( struct ib_device *ibdev __unused,
  2848. struct ib_queue_pair *qp,
  2849. struct ib_address_vector *dest __unused,
  2850. struct ib_address_vector *source,
  2851. struct io_buffer *iobuf, int rc ) {
  2852. struct net_device *netdev = ib_qp_get_ownerdata ( qp );
  2853. struct net_device *vlan;
  2854. /* Find VLAN device, if applicable */
  2855. if ( source->vlan_present ) {
  2856. if ( ( vlan = vlan_find ( netdev, source->vlan ) ) != NULL ) {
  2857. netdev = vlan;
  2858. } else if ( rc == 0 ) {
  2859. rc = -ENODEV;
  2860. }
  2861. }
  2862. /* Hand off to network layer */
  2863. if ( rc == 0 ) {
  2864. netdev_rx ( netdev, iobuf );
  2865. } else {
  2866. netdev_rx_err ( netdev, iobuf, rc );
  2867. }
  2868. }
  2869. /** Hermon Ethernet device completion operations */
  2870. static struct ib_completion_queue_operations hermon_eth_cq_op = {
  2871. .complete_send = hermon_eth_complete_send,
  2872. .complete_recv = hermon_eth_complete_recv,
  2873. };
  2874. /**
  2875. * Poll Hermon Ethernet device
  2876. *
  2877. * @v netdev Network device
  2878. */
  2879. static void hermon_eth_poll ( struct net_device *netdev ) {
  2880. struct hermon_port *port = netdev->priv;
  2881. struct ib_device *ibdev = port->ibdev;
  2882. ib_poll_eq ( ibdev );
  2883. }
  2884. /**
  2885. * Open Hermon Ethernet device
  2886. *
  2887. * @v netdev Network device
  2888. * @ret rc Return status code
  2889. */
  2890. static int hermon_eth_open ( struct net_device *netdev ) {
  2891. struct hermon_port *port = netdev->priv;
  2892. struct ib_device *ibdev = port->ibdev;
  2893. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2894. union hermonprm_set_port set_port;
  2895. int rc;
  2896. /* Open hardware */
  2897. if ( ( rc = hermon_open ( hermon ) ) != 0 )
  2898. goto err_open;
  2899. /* Allocate completion queue */
  2900. port->eth_cq = ib_create_cq ( ibdev, HERMON_ETH_NUM_CQES,
  2901. &hermon_eth_cq_op );
  2902. if ( ! port->eth_cq ) {
  2903. DBGC ( hermon, "Hermon %p port %d could not create completion "
  2904. "queue\n", hermon, ibdev->port );
  2905. rc = -ENOMEM;
  2906. goto err_create_cq;
  2907. }
  2908. /* Allocate queue pair */
  2909. port->eth_qp = ib_create_qp ( ibdev, IB_QPT_ETH,
  2910. HERMON_ETH_NUM_SEND_WQES, port->eth_cq,
  2911. HERMON_ETH_NUM_RECV_WQES, port->eth_cq,
  2912. &hermon_eth_qp_op );
  2913. if ( ! port->eth_qp ) {
  2914. DBGC ( hermon, "Hermon %p port %d could not create queue "
  2915. "pair\n", hermon, ibdev->port );
  2916. rc = -ENOMEM;
  2917. goto err_create_qp;
  2918. }
  2919. ib_qp_set_ownerdata ( port->eth_qp, netdev );
  2920. /* Activate queue pair */
  2921. if ( ( rc = ib_modify_qp ( ibdev, port->eth_qp ) ) != 0 ) {
  2922. DBGC ( hermon, "Hermon %p port %d could not modify queue "
  2923. "pair: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2924. goto err_modify_qp;
  2925. }
  2926. /* Fill receive rings */
  2927. ib_refill_recv ( ibdev, port->eth_qp );
  2928. /* Set port general parameters */
  2929. memset ( &set_port, 0, sizeof ( set_port ) );
  2930. MLX_FILL_3 ( &set_port.general, 0,
  2931. v_mtu, 1,
  2932. v_pprx, 1,
  2933. v_pptx, 1 );
  2934. MLX_FILL_1 ( &set_port.general, 1,
  2935. mtu, ( ETH_FRAME_LEN + 40 /* Used by card */ ) );
  2936. MLX_FILL_1 ( &set_port.general, 2,
  2937. pfctx, ( 1 << FCOE_VLAN_PRIORITY ) );
  2938. MLX_FILL_1 ( &set_port.general, 3,
  2939. pfcrx, ( 1 << FCOE_VLAN_PRIORITY ) );
  2940. if ( ( rc = hermon_cmd_set_port ( hermon, 1,
  2941. ( HERMON_SET_PORT_GENERAL_PARAM |
  2942. ibdev->port ),
  2943. &set_port ) ) != 0 ) {
  2944. DBGC ( hermon, "Hermon %p port %d could not set port general "
  2945. "parameters: %s\n",
  2946. hermon, ibdev->port, strerror ( rc ) );
  2947. goto err_set_port_general_params;
  2948. }
  2949. /* Set port receive QP */
  2950. memset ( &set_port, 0, sizeof ( set_port ) );
  2951. MLX_FILL_1 ( &set_port.rqp_calc, 0, base_qpn, port->eth_qp->qpn );
  2952. MLX_FILL_1 ( &set_port.rqp_calc, 2,
  2953. mac_miss_index, 128 /* MAC misses go to promisc QP */ );
  2954. MLX_FILL_2 ( &set_port.rqp_calc, 3,
  2955. vlan_miss_index, 127 /* VLAN misses go to promisc QP */,
  2956. no_vlan_index, 126 /* VLAN-free go to promisc QP */ );
  2957. MLX_FILL_2 ( &set_port.rqp_calc, 5,
  2958. promisc_qpn, port->eth_qp->qpn,
  2959. en_uc_promisc, 1 );
  2960. MLX_FILL_2 ( &set_port.rqp_calc, 6,
  2961. def_mcast_qpn, port->eth_qp->qpn,
  2962. mc_promisc_mode, 2 /* Receive all multicasts */ );
  2963. if ( ( rc = hermon_cmd_set_port ( hermon, 1,
  2964. ( HERMON_SET_PORT_RECEIVE_QP |
  2965. ibdev->port ),
  2966. &set_port ) ) != 0 ) {
  2967. DBGC ( hermon, "Hermon %p port %d could not set port receive "
  2968. "QP: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2969. goto err_set_port_receive_qp;
  2970. }
  2971. /* Initialise port */
  2972. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port ) ) != 0 ) {
  2973. DBGC ( hermon, "Hermon %p port %d could not initialise port: "
  2974. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  2975. goto err_init_port;
  2976. }
  2977. return 0;
  2978. err_init_port:
  2979. err_set_port_receive_qp:
  2980. err_set_port_general_params:
  2981. err_modify_qp:
  2982. ib_destroy_qp ( ibdev, port->eth_qp );
  2983. err_create_qp:
  2984. ib_destroy_cq ( ibdev, port->eth_cq );
  2985. err_create_cq:
  2986. hermon_close ( hermon );
  2987. err_open:
  2988. return rc;
  2989. }
  2990. /**
  2991. * Close Hermon Ethernet device
  2992. *
  2993. * @v netdev Network device
  2994. */
  2995. static void hermon_eth_close ( struct net_device *netdev ) {
  2996. struct hermon_port *port = netdev->priv;
  2997. struct ib_device *ibdev = port->ibdev;
  2998. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2999. int rc;
  3000. /* Close port */
  3001. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  3002. DBGC ( hermon, "Hermon %p port %d could not close port: %s\n",
  3003. hermon, ibdev->port, strerror ( rc ) );
  3004. /* Nothing we can do about this */
  3005. }
  3006. /* Tear down the queues */
  3007. ib_destroy_qp ( ibdev, port->eth_qp );
  3008. ib_destroy_cq ( ibdev, port->eth_cq );
  3009. /* Close hardware */
  3010. hermon_close ( hermon );
  3011. }
  3012. /** Hermon Ethernet network device operations */
  3013. static struct net_device_operations hermon_eth_operations = {
  3014. .open = hermon_eth_open,
  3015. .close = hermon_eth_close,
  3016. .transmit = hermon_eth_transmit,
  3017. .poll = hermon_eth_poll,
  3018. };
  3019. /**
  3020. * Register Hermon Ethernet device
  3021. *
  3022. * @v hermon Hermon device
  3023. * @v port Hermon port
  3024. * @ret rc Return status code
  3025. */
  3026. static int hermon_register_netdev ( struct hermon *hermon,
  3027. struct hermon_port *port ) {
  3028. struct net_device *netdev = port->netdev;
  3029. struct ib_device *ibdev = port->ibdev;
  3030. struct hermonprm_query_port_cap query_port;
  3031. union {
  3032. uint8_t bytes[8];
  3033. uint32_t dwords[2];
  3034. } mac;
  3035. int rc;
  3036. /* Retrieve MAC address */
  3037. if ( ( rc = hermon_cmd_query_port ( hermon, ibdev->port,
  3038. &query_port ) ) != 0 ) {
  3039. DBGC ( hermon, "Hermon %p port %d could not query port: %s\n",
  3040. hermon, ibdev->port, strerror ( rc ) );
  3041. goto err_query_port;
  3042. }
  3043. mac.dwords[0] = htonl ( MLX_GET ( &query_port, mac_47_32 ) );
  3044. mac.dwords[1] = htonl ( MLX_GET ( &query_port, mac_31_0 ) );
  3045. memcpy ( netdev->hw_addr,
  3046. &mac.bytes[ sizeof ( mac.bytes ) - ETH_ALEN ], ETH_ALEN );
  3047. /* Register network device */
  3048. if ( ( rc = register_netdev ( netdev ) ) != 0 ) {
  3049. DBGC ( hermon, "Hermon %p port %d could not register network "
  3050. "device: %s\n", hermon, ibdev->port, strerror ( rc ) );
  3051. goto err_register_netdev;
  3052. }
  3053. /* Register non-volatile options */
  3054. if ( ( rc = register_nvo ( &port->nvo,
  3055. netdev_settings ( netdev ) ) ) != 0 ) {
  3056. DBGC ( hermon, "Hermon %p port %d could not register non-"
  3057. "volatile options: %s\n",
  3058. hermon, ibdev->port, strerror ( rc ) );
  3059. goto err_register_nvo;
  3060. }
  3061. return 0;
  3062. unregister_nvo ( &port->nvo );
  3063. err_register_nvo:
  3064. unregister_netdev ( netdev );
  3065. err_register_netdev:
  3066. err_query_port:
  3067. return rc;
  3068. }
  3069. /**
  3070. * Handle Hermon Ethernet device port state change
  3071. *
  3072. * @v hermon Hermon device
  3073. * @v port Hermon port
  3074. * @v link_up Link is up
  3075. */
  3076. static void hermon_state_change_netdev ( struct hermon *hermon __unused,
  3077. struct hermon_port *port,
  3078. int link_up ) {
  3079. struct net_device *netdev = port->netdev;
  3080. if ( link_up ) {
  3081. netdev_link_up ( netdev );
  3082. } else {
  3083. netdev_link_down ( netdev );
  3084. }
  3085. }
  3086. /**
  3087. * Unregister Hermon Ethernet device
  3088. *
  3089. * @v hermon Hermon device
  3090. * @v port Hermon port
  3091. */
  3092. static void hermon_unregister_netdev ( struct hermon *hermon __unused,
  3093. struct hermon_port *port ) {
  3094. struct net_device *netdev = port->netdev;
  3095. unregister_nvo ( &port->nvo );
  3096. unregister_netdev ( netdev );
  3097. }
  3098. /** Hermon Ethernet port type */
  3099. static struct hermon_port_type hermon_port_type_eth = {
  3100. .register_dev = hermon_register_netdev,
  3101. .state_change = hermon_state_change_netdev,
  3102. .unregister_dev = hermon_unregister_netdev,
  3103. };
  3104. /***************************************************************************
  3105. *
  3106. * Port type detection
  3107. *
  3108. ***************************************************************************
  3109. */
  3110. /** Timeout for port sensing */
  3111. #define HERMON_SENSE_PORT_TIMEOUT ( TICKS_PER_SEC / 2 )
  3112. /**
  3113. * Name port type
  3114. *
  3115. * @v port_type Port type
  3116. * @v port_type_name Port type name
  3117. */
  3118. static inline const char * hermon_name_port_type ( unsigned int port_type ) {
  3119. switch ( port_type ) {
  3120. case HERMON_PORT_TYPE_UNKNOWN: return "unknown";
  3121. case HERMON_PORT_TYPE_IB: return "Infiniband";
  3122. case HERMON_PORT_TYPE_ETH: return "Ethernet";
  3123. default: return "INVALID";
  3124. }
  3125. }
  3126. /**
  3127. * Sense port type
  3128. *
  3129. * @v hermon Hermon device
  3130. * @v port Hermon port
  3131. * @ret port_type Port type, or negative error
  3132. */
  3133. static int hermon_sense_port_type ( struct hermon *hermon,
  3134. struct hermon_port *port ) {
  3135. struct ib_device *ibdev = port->ibdev;
  3136. struct hermonprm_sense_port sense_port;
  3137. int port_type;
  3138. int rc;
  3139. /* If DPDP is not supported, always assume Infiniband */
  3140. if ( ! hermon->cap.dpdp ) {
  3141. port_type = HERMON_PORT_TYPE_IB;
  3142. DBGC ( hermon, "Hermon %p port %d does not support DPDP; "
  3143. "assuming an %s network\n", hermon, ibdev->port,
  3144. hermon_name_port_type ( port_type ) );
  3145. return port_type;
  3146. }
  3147. /* Sense the port type */
  3148. if ( ( rc = hermon_cmd_sense_port ( hermon, ibdev->port,
  3149. &sense_port ) ) != 0 ) {
  3150. DBGC ( hermon, "Hermon %p port %d sense failed: %s\n",
  3151. hermon, ibdev->port, strerror ( rc ) );
  3152. return rc;
  3153. }
  3154. port_type = MLX_GET ( &sense_port, port_type );
  3155. DBGC ( hermon, "Hermon %p port %d sensed an %s network\n",
  3156. hermon, ibdev->port, hermon_name_port_type ( port_type ) );
  3157. return port_type;
  3158. }
  3159. /**
  3160. * Set port type
  3161. *
  3162. * @v hermon Hermon device
  3163. * @v port Hermon port
  3164. * @ret rc Return status code
  3165. */
  3166. static int hermon_set_port_type ( struct hermon *hermon,
  3167. struct hermon_port *port ) {
  3168. struct ib_device *ibdev = port->ibdev;
  3169. struct hermonprm_query_port_cap query_port;
  3170. int ib_supported;
  3171. int eth_supported;
  3172. int port_type;
  3173. unsigned long start;
  3174. unsigned long elapsed;
  3175. int rc;
  3176. /* Check to see which types are supported */
  3177. if ( ( rc = hermon_cmd_query_port ( hermon, ibdev->port,
  3178. &query_port ) ) != 0 ) {
  3179. DBGC ( hermon, "Hermon %p port %d could not query port: %s\n",
  3180. hermon, ibdev->port, strerror ( rc ) );
  3181. return rc;
  3182. }
  3183. ib_supported = MLX_GET ( &query_port, ib );
  3184. eth_supported = MLX_GET ( &query_port, eth );
  3185. DBGC ( hermon, "Hermon %p port %d supports%s%s%s\n",
  3186. hermon, ibdev->port, ( ib_supported ? " Infiniband" : "" ),
  3187. ( ( ib_supported && eth_supported ) ? " and" : "" ),
  3188. ( eth_supported ? " Ethernet" : "" ) );
  3189. /* Sense network, if applicable */
  3190. if ( ib_supported && eth_supported ) {
  3191. /* Both types are supported; try sensing network */
  3192. start = currticks();
  3193. do {
  3194. /* Try sensing port */
  3195. port_type = hermon_sense_port_type ( hermon, port );
  3196. if ( port_type < 0 ) {
  3197. rc = port_type;
  3198. return rc;
  3199. }
  3200. } while ( ( port_type == HERMON_PORT_TYPE_UNKNOWN ) &&
  3201. ( ( elapsed = ( currticks() - start ) ) <
  3202. HERMON_SENSE_PORT_TIMEOUT ) );
  3203. /* Set port type based on sensed network, defaulting
  3204. * to Infiniband if nothing was sensed.
  3205. */
  3206. switch ( port_type ) {
  3207. case HERMON_PORT_TYPE_ETH:
  3208. port->type = &hermon_port_type_eth;
  3209. break;
  3210. case HERMON_PORT_TYPE_IB:
  3211. case HERMON_PORT_TYPE_UNKNOWN:
  3212. port->type = &hermon_port_type_ib;
  3213. break;
  3214. default:
  3215. return -EINVAL;
  3216. }
  3217. } else if ( eth_supported ) {
  3218. port->type = &hermon_port_type_eth;
  3219. } else {
  3220. port->type = &hermon_port_type_ib;
  3221. }
  3222. assert ( port->type != NULL );
  3223. return 0;
  3224. }
  3225. /***************************************************************************
  3226. *
  3227. * BOFM interface
  3228. *
  3229. ***************************************************************************
  3230. */
  3231. /**
  3232. * Harvest Ethernet MAC for BOFM
  3233. *
  3234. * @v bofm BOFM device
  3235. * @v mport Multi-port index
  3236. * @v mac MAC to fill in
  3237. * @ret rc Return status code
  3238. */
  3239. static int hermon_bofm_harvest ( struct bofm_device *bofm, unsigned int mport,
  3240. uint8_t *mac ) {
  3241. struct hermon *hermon = container_of ( bofm, struct hermon, bofm );
  3242. struct hermonprm_mod_stat_cfg stat_cfg;
  3243. union {
  3244. uint8_t bytes[8];
  3245. uint32_t dwords[2];
  3246. } buf;
  3247. int rc;
  3248. /* Query static configuration */
  3249. if ( ( rc = hermon_mod_stat_cfg ( hermon, mport,
  3250. HERMON_MOD_STAT_CFG_QUERY,
  3251. HERMON_MOD_STAT_CFG_OFFSET ( mac_m ),
  3252. &stat_cfg ) ) != 0 ) {
  3253. DBGC ( hermon, "Hermon %p port %d could not query "
  3254. "configuration: %s\n", hermon, mport, strerror ( rc ) );
  3255. return rc;
  3256. }
  3257. /* Retrieve MAC address */
  3258. buf.dwords[0] = htonl ( MLX_GET ( &stat_cfg, mac_high ) );
  3259. buf.dwords[1] = htonl ( MLX_GET ( &stat_cfg, mac_low ) );
  3260. memcpy ( mac, &buf.bytes[ sizeof ( buf.bytes ) - ETH_ALEN ],
  3261. ETH_ALEN );
  3262. DBGC ( hermon, "Hermon %p port %d harvested MAC address %s\n",
  3263. hermon, mport, eth_ntoa ( mac ) );
  3264. return 0;
  3265. }
  3266. /**
  3267. * Update Ethernet MAC for BOFM
  3268. *
  3269. * @v bofm BOFM device
  3270. * @v mport Multi-port index
  3271. * @v mac MAC to fill in
  3272. * @ret rc Return status code
  3273. */
  3274. static int hermon_bofm_update ( struct bofm_device *bofm, unsigned int mport,
  3275. const uint8_t *mac ) {
  3276. struct hermon *hermon = container_of ( bofm, struct hermon, bofm );
  3277. struct hermonprm_mod_stat_cfg stat_cfg;
  3278. union {
  3279. uint8_t bytes[8];
  3280. uint32_t dwords[2];
  3281. } buf;
  3282. int rc;
  3283. /* Prepare MAC address */
  3284. memset ( &buf, 0, sizeof ( buf ) );
  3285. memcpy ( &buf.bytes[ sizeof ( buf.bytes ) - ETH_ALEN ], mac,
  3286. ETH_ALEN );
  3287. /* Modify static configuration */
  3288. memset ( &stat_cfg, 0, sizeof ( stat_cfg ) );
  3289. MLX_FILL_2 ( &stat_cfg, 36,
  3290. mac_m, 1,
  3291. mac_high, ntohl ( buf.dwords[0] ) );
  3292. MLX_FILL_1 ( &stat_cfg, 37, mac_low, ntohl ( buf.dwords[1] ) );
  3293. if ( ( rc = hermon_mod_stat_cfg ( hermon, mport,
  3294. HERMON_MOD_STAT_CFG_SET,
  3295. HERMON_MOD_STAT_CFG_OFFSET ( mac_m ),
  3296. &stat_cfg ) ) != 0 ) {
  3297. DBGC ( hermon, "Hermon %p port %d could not modify "
  3298. "configuration: %s\n", hermon, mport, strerror ( rc ) );
  3299. return rc;
  3300. }
  3301. DBGC ( hermon, "Hermon %p port %d updated MAC address to %s\n",
  3302. hermon, mport, eth_ntoa ( mac ) );
  3303. return 0;
  3304. }
  3305. /** Hermon BOFM operations */
  3306. static struct bofm_operations hermon_bofm_operations = {
  3307. .harvest = hermon_bofm_harvest,
  3308. .update = hermon_bofm_update,
  3309. };
  3310. /***************************************************************************
  3311. *
  3312. * PCI interface
  3313. *
  3314. ***************************************************************************
  3315. */
  3316. /**
  3317. * Allocate Hermon device
  3318. *
  3319. * @v pci PCI device
  3320. * @v id PCI ID
  3321. * @ret rc Return status code
  3322. */
  3323. static struct hermon * hermon_alloc ( void ) {
  3324. struct hermon *hermon;
  3325. /* Allocate Hermon device */
  3326. hermon = zalloc ( sizeof ( *hermon ) );
  3327. if ( ! hermon )
  3328. goto err_hermon;
  3329. /* Allocate space for mailboxes */
  3330. hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
  3331. HERMON_MBOX_ALIGN );
  3332. if ( ! hermon->mailbox_in )
  3333. goto err_mailbox_in;
  3334. hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
  3335. HERMON_MBOX_ALIGN );
  3336. if ( ! hermon->mailbox_out )
  3337. goto err_mailbox_out;
  3338. return hermon;
  3339. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  3340. err_mailbox_out:
  3341. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  3342. err_mailbox_in:
  3343. free ( hermon );
  3344. err_hermon:
  3345. return NULL;
  3346. }
  3347. /**
  3348. * Free Hermon device
  3349. *
  3350. * @v hermon Hermon device
  3351. */
  3352. static void hermon_free ( struct hermon *hermon ) {
  3353. ufree ( hermon->icm );
  3354. ufree ( hermon->firmware_area );
  3355. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  3356. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  3357. free ( hermon );
  3358. }
  3359. /**
  3360. * Initialise Hermon PCI parameters
  3361. *
  3362. * @v hermon Hermon device
  3363. */
  3364. static void hermon_pci_init ( struct hermon *hermon ) {
  3365. struct pci_device *pci = hermon->pci;
  3366. /* Fix up PCI device */
  3367. adjust_pci_device ( pci );
  3368. /* Get PCI BARs */
  3369. hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR),
  3370. HERMON_PCI_CONFIG_BAR_SIZE );
  3371. hermon->uar = ioremap ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ),
  3372. HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE );
  3373. }
  3374. /**
  3375. * Probe PCI device
  3376. *
  3377. * @v pci PCI device
  3378. * @v id PCI ID
  3379. * @ret rc Return status code
  3380. */
  3381. static int hermon_probe ( struct pci_device *pci ) {
  3382. struct hermon *hermon;
  3383. struct ib_device *ibdev;
  3384. struct net_device *netdev;
  3385. struct hermon_port *port;
  3386. unsigned int i;
  3387. int rc;
  3388. /* Allocate Hermon device */
  3389. hermon = hermon_alloc();
  3390. if ( ! hermon ) {
  3391. rc = -ENOMEM;
  3392. goto err_alloc;
  3393. }
  3394. pci_set_drvdata ( pci, hermon );
  3395. hermon->pci = pci;
  3396. /* Initialise PCI parameters */
  3397. hermon_pci_init ( hermon );
  3398. /* Reset device */
  3399. hermon_reset ( hermon );
  3400. /* Start firmware */
  3401. if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
  3402. goto err_start_firmware;
  3403. /* Get device limits */
  3404. if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
  3405. goto err_get_cap;
  3406. /* Allocate Infiniband devices */
  3407. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3408. ibdev = alloc_ibdev ( 0 );
  3409. if ( ! ibdev ) {
  3410. rc = -ENOMEM;
  3411. goto err_alloc_ibdev;
  3412. }
  3413. hermon->port[i].ibdev = ibdev;
  3414. ibdev->op = &hermon_ib_operations;
  3415. ibdev->dev = &pci->dev;
  3416. ibdev->port = ( HERMON_PORT_BASE + i );
  3417. ib_set_drvdata ( ibdev, hermon );
  3418. }
  3419. /* Allocate network devices */
  3420. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3421. netdev = alloc_etherdev ( 0 );
  3422. if ( ! netdev ) {
  3423. rc = -ENOMEM;
  3424. goto err_alloc_netdev;
  3425. }
  3426. hermon->port[i].netdev = netdev;
  3427. netdev_init ( netdev, &hermon_eth_operations );
  3428. netdev->dev = &pci->dev;
  3429. netdev->priv = &hermon->port[i];
  3430. }
  3431. /* Start device */
  3432. if ( ( rc = hermon_start ( hermon, 1 ) ) != 0 )
  3433. goto err_start;
  3434. /* Determine port types */
  3435. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3436. port = &hermon->port[i];
  3437. if ( ( rc = hermon_set_port_type ( hermon, port ) ) != 0 )
  3438. goto err_set_port_type;
  3439. }
  3440. /* Initialise non-volatile storage */
  3441. nvs_vpd_init ( &hermon->nvsvpd, pci );
  3442. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3443. port = &hermon->port[i];
  3444. nvs_vpd_nvo_init ( &hermon->nvsvpd,
  3445. HERMON_VPD_FIELD ( port->ibdev->port ),
  3446. &port->nvo, NULL );
  3447. }
  3448. /* Register devices */
  3449. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3450. port = &hermon->port[i];
  3451. if ( ( rc = port->type->register_dev ( hermon, port ) ) != 0 )
  3452. goto err_register;
  3453. }
  3454. /* Leave device quiescent until opened */
  3455. if ( hermon->open_count == 0 )
  3456. hermon_stop ( hermon );
  3457. return 0;
  3458. i = hermon->cap.num_ports;
  3459. err_register:
  3460. for ( i-- ; ( signed int ) i >= 0 ; i-- ) {
  3461. port = &hermon->port[i];
  3462. port->type->unregister_dev ( hermon, port );
  3463. }
  3464. err_set_port_type:
  3465. hermon_stop ( hermon );
  3466. err_start:
  3467. i = hermon->cap.num_ports;
  3468. err_alloc_netdev:
  3469. for ( i-- ; ( signed int ) i >= 0 ; i-- ) {
  3470. netdev_nullify ( hermon->port[i].netdev );
  3471. netdev_put ( hermon->port[i].netdev );
  3472. }
  3473. i = hermon->cap.num_ports;
  3474. err_alloc_ibdev:
  3475. for ( i-- ; ( signed int ) i >= 0 ; i-- )
  3476. ibdev_put ( hermon->port[i].ibdev );
  3477. err_get_cap:
  3478. hermon_stop_firmware ( hermon );
  3479. err_start_firmware:
  3480. hermon_free ( hermon );
  3481. err_alloc:
  3482. return rc;
  3483. }
  3484. /**
  3485. * Remove PCI device
  3486. *
  3487. * @v pci PCI device
  3488. */
  3489. static void hermon_remove ( struct pci_device *pci ) {
  3490. struct hermon *hermon = pci_get_drvdata ( pci );
  3491. struct hermon_port *port;
  3492. int i;
  3493. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- ) {
  3494. port = &hermon->port[i];
  3495. port->type->unregister_dev ( hermon, port );
  3496. }
  3497. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- ) {
  3498. netdev_nullify ( hermon->port[i].netdev );
  3499. netdev_put ( hermon->port[i].netdev );
  3500. }
  3501. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
  3502. ibdev_put ( hermon->port[i].ibdev );
  3503. hermon_free ( hermon );
  3504. }
  3505. /**
  3506. * Probe PCI device for BOFM
  3507. *
  3508. * @v pci PCI device
  3509. * @v id PCI ID
  3510. * @ret rc Return status code
  3511. */
  3512. static int hermon_bofm_probe ( struct pci_device *pci ) {
  3513. struct hermon *hermon;
  3514. int rc;
  3515. /* Allocate Hermon device */
  3516. hermon = hermon_alloc();
  3517. if ( ! hermon ) {
  3518. rc = -ENOMEM;
  3519. goto err_alloc;
  3520. }
  3521. pci_set_drvdata ( pci, hermon );
  3522. hermon->pci = pci;
  3523. /* Initialise PCI parameters */
  3524. hermon_pci_init ( hermon );
  3525. /* Initialise BOFM device */
  3526. bofm_init ( &hermon->bofm, pci, &hermon_bofm_operations );
  3527. /* Register BOFM device */
  3528. if ( ( rc = bofm_register ( &hermon->bofm ) ) != 0 ) {
  3529. DBGC ( hermon, "Hermon %p could not register BOFM device: "
  3530. "%s\n", hermon, strerror ( rc ) );
  3531. goto err_bofm_register;
  3532. }
  3533. return 0;
  3534. err_bofm_register:
  3535. hermon_free ( hermon );
  3536. err_alloc:
  3537. return rc;
  3538. }
  3539. /**
  3540. * Remove PCI device for BOFM
  3541. *
  3542. * @v pci PCI device
  3543. */
  3544. static void hermon_bofm_remove ( struct pci_device *pci ) {
  3545. struct hermon *hermon = pci_get_drvdata ( pci );
  3546. bofm_unregister ( &hermon->bofm );
  3547. hermon_free ( hermon );
  3548. }
  3549. static struct pci_device_id hermon_nics[] = {
  3550. PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver", 0 ),
  3551. PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver", 0 ),
  3552. PCI_ROM ( 0x15b3, 0x6732, "mt26418", "MT26418 HCA driver", 0 ),
  3553. PCI_ROM ( 0x15b3, 0x673c, "mt26428", "MT26428 HCA driver", 0 ),
  3554. PCI_ROM ( 0x15b3, 0x6746, "mt26438", "MT26438 HCA driver", 0 ),
  3555. PCI_ROM ( 0x15b3, 0x6778, "mt26488", "MT26488 HCA driver", 0 ),
  3556. PCI_ROM ( 0x15b3, 0x6368, "mt25448", "MT25448 HCA driver", 0 ),
  3557. PCI_ROM ( 0x15b3, 0x6750, "mt26448", "MT26448 HCA driver", 0 ),
  3558. PCI_ROM ( 0x15b3, 0x6372, "mt25458", "MT25458 HCA driver", 0 ),
  3559. PCI_ROM ( 0x15b3, 0x675a, "mt26458", "MT26458 HCA driver", 0 ),
  3560. PCI_ROM ( 0x15b3, 0x6764, "mt26468", "MT26468 HCA driver", 0 ),
  3561. PCI_ROM ( 0x15b3, 0x676e, "mt26478", "MT26478 HCA driver", 0 ),
  3562. };
  3563. struct pci_driver hermon_driver __pci_driver = {
  3564. .ids = hermon_nics,
  3565. .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
  3566. .probe = hermon_probe,
  3567. .remove = hermon_remove,
  3568. };
  3569. struct pci_driver hermon_bofm_driver __bofm_driver = {
  3570. .ids = hermon_nics,
  3571. .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
  3572. .probe = hermon_bofm_probe,
  3573. .remove = hermon_bofm_remove,
  3574. };