You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

arbel.c 66KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243
  1. /*
  2. * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * Based in part upon the original driver by Mellanox Technologies
  5. * Ltd. Portions may be Copyright (c) Mellanox Technologies Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of the
  10. * License, or any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <stdint.h>
  22. #include <stdlib.h>
  23. #include <stdio.h>
  24. #include <string.h>
  25. #include <strings.h>
  26. #include <unistd.h>
  27. #include <errno.h>
  28. #include <byteswap.h>
  29. #include <gpxe/pci.h>
  30. #include <gpxe/malloc.h>
  31. #include <gpxe/umalloc.h>
  32. #include <gpxe/iobuf.h>
  33. #include <gpxe/netdevice.h>
  34. #include <gpxe/infiniband.h>
  35. #include "arbel.h"
  36. /**
  37. * @file
  38. *
  39. * Mellanox Arbel Infiniband HCA
  40. *
  41. */
  42. /***************************************************************************
  43. *
  44. * Queue number allocation
  45. *
  46. ***************************************************************************
  47. */
  48. /**
  49. * Allocate queue number
  50. *
  51. * @v q_inuse Queue usage bitmask
  52. * @v max_inuse Maximum number of in-use queues
  53. * @ret qn_offset Free queue number offset, or negative error
  54. */
  55. static int arbel_alloc_qn_offset ( arbel_bitmask_t *q_inuse,
  56. unsigned int max_inuse ) {
  57. unsigned int qn_offset = 0;
  58. arbel_bitmask_t mask = 1;
  59. while ( qn_offset < max_inuse ) {
  60. if ( ( mask & *q_inuse ) == 0 ) {
  61. *q_inuse |= mask;
  62. return qn_offset;
  63. }
  64. qn_offset++;
  65. mask <<= 1;
  66. if ( ! mask ) {
  67. mask = 1;
  68. q_inuse++;
  69. }
  70. }
  71. return -ENFILE;
  72. }
  73. /**
  74. * Free queue number
  75. *
  76. * @v q_inuse Queue usage bitmask
  77. * @v qn_offset Queue number offset
  78. */
  79. static void arbel_free_qn_offset ( arbel_bitmask_t *q_inuse, int qn_offset ) {
  80. arbel_bitmask_t mask;
  81. mask = ( 1 << ( qn_offset % ( 8 * sizeof ( mask ) ) ) );
  82. q_inuse += ( qn_offset / ( 8 * sizeof ( mask ) ) );
  83. *q_inuse &= ~mask;
  84. }
  85. /***************************************************************************
  86. *
  87. * HCA commands
  88. *
  89. ***************************************************************************
  90. */
  91. /**
  92. * Wait for Arbel command completion
  93. *
  94. * @v arbel Arbel device
  95. * @ret rc Return status code
  96. */
  97. static int arbel_cmd_wait ( struct arbel *arbel,
  98. struct arbelprm_hca_command_register *hcr ) {
  99. unsigned int wait;
  100. for ( wait = ARBEL_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  101. hcr->u.dwords[6] =
  102. readl ( arbel->config + ARBEL_HCR_REG ( 6 ) );
  103. if ( MLX_GET ( hcr, go ) == 0 )
  104. return 0;
  105. mdelay ( 1 );
  106. }
  107. return -EBUSY;
  108. }
  109. /**
  110. * Issue HCA command
  111. *
  112. * @v arbel Arbel device
  113. * @v command Command opcode, flags and input/output lengths
  114. * @v op_mod Opcode modifier (0 if no modifier applicable)
  115. * @v in Input parameters
  116. * @v in_mod Input modifier (0 if no modifier applicable)
  117. * @v out Output parameters
  118. * @ret rc Return status code
  119. */
  120. static int arbel_cmd ( struct arbel *arbel, unsigned long command,
  121. unsigned int op_mod, const void *in,
  122. unsigned int in_mod, void *out ) {
  123. struct arbelprm_hca_command_register hcr;
  124. unsigned int opcode = ARBEL_HCR_OPCODE ( command );
  125. size_t in_len = ARBEL_HCR_IN_LEN ( command );
  126. size_t out_len = ARBEL_HCR_OUT_LEN ( command );
  127. void *in_buffer;
  128. void *out_buffer;
  129. unsigned int status;
  130. unsigned int i;
  131. int rc;
  132. assert ( in_len <= ARBEL_MBOX_SIZE );
  133. assert ( out_len <= ARBEL_MBOX_SIZE );
  134. DBGC2 ( arbel, "Arbel %p command %02x in %zx%s out %zx%s\n",
  135. arbel, opcode, in_len,
  136. ( ( command & ARBEL_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  137. ( ( command & ARBEL_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  138. /* Check that HCR is free */
  139. if ( ( rc = arbel_cmd_wait ( arbel, &hcr ) ) != 0 ) {
  140. DBGC ( arbel, "Arbel %p command interface locked\n", arbel );
  141. return rc;
  142. }
  143. /* Prepare HCR */
  144. memset ( &hcr, 0, sizeof ( hcr ) );
  145. in_buffer = &hcr.u.dwords[0];
  146. if ( in_len && ( command & ARBEL_HCR_IN_MBOX ) ) {
  147. in_buffer = arbel->mailbox_in;
  148. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  149. }
  150. memcpy ( in_buffer, in, in_len );
  151. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  152. out_buffer = &hcr.u.dwords[3];
  153. if ( out_len && ( command & ARBEL_HCR_OUT_MBOX ) ) {
  154. out_buffer = arbel->mailbox_out;
  155. MLX_FILL_1 ( &hcr, 4, out_param_l,
  156. virt_to_bus ( out_buffer ) );
  157. }
  158. MLX_FILL_3 ( &hcr, 6,
  159. opcode, opcode,
  160. opcode_modifier, op_mod,
  161. go, 1 );
  162. DBGC2_HD ( arbel, &hcr, sizeof ( hcr ) );
  163. if ( in_len ) {
  164. DBGC2 ( arbel, "Input:\n" );
  165. DBGC2_HD ( arbel, in, ( ( in_len < 512 ) ? in_len : 512 ) );
  166. }
  167. /* Issue command */
  168. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  169. i++ ) {
  170. writel ( hcr.u.dwords[i],
  171. arbel->config + ARBEL_HCR_REG ( i ) );
  172. barrier();
  173. }
  174. /* Wait for command completion */
  175. if ( ( rc = arbel_cmd_wait ( arbel, &hcr ) ) != 0 ) {
  176. DBGC ( arbel, "Arbel %p timed out waiting for command:\n",
  177. arbel );
  178. DBGC_HD ( arbel, &hcr, sizeof ( hcr ) );
  179. return rc;
  180. }
  181. /* Check command status */
  182. status = MLX_GET ( &hcr, status );
  183. if ( status != 0 ) {
  184. DBGC ( arbel, "Arbel %p command failed with status %02x:\n",
  185. arbel, status );
  186. DBGC_HD ( arbel, &hcr, sizeof ( hcr ) );
  187. return -EIO;
  188. }
  189. /* Read output parameters, if any */
  190. hcr.u.dwords[3] = readl ( arbel->config + ARBEL_HCR_REG ( 3 ) );
  191. hcr.u.dwords[4] = readl ( arbel->config + ARBEL_HCR_REG ( 4 ) );
  192. memcpy ( out, out_buffer, out_len );
  193. if ( out_len ) {
  194. DBGC2 ( arbel, "Output:\n" );
  195. DBGC2_HD ( arbel, out, ( ( out_len < 512 ) ? out_len : 512 ) );
  196. }
  197. return 0;
  198. }
  199. static inline int
  200. arbel_cmd_query_dev_lim ( struct arbel *arbel,
  201. struct arbelprm_query_dev_lim *dev_lim ) {
  202. return arbel_cmd ( arbel,
  203. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_DEV_LIM,
  204. 1, sizeof ( *dev_lim ) ),
  205. 0, NULL, 0, dev_lim );
  206. }
  207. static inline int
  208. arbel_cmd_query_fw ( struct arbel *arbel, struct arbelprm_query_fw *fw ) {
  209. return arbel_cmd ( arbel,
  210. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_FW,
  211. 1, sizeof ( *fw ) ),
  212. 0, NULL, 0, fw );
  213. }
  214. static inline int
  215. arbel_cmd_init_hca ( struct arbel *arbel,
  216. const struct arbelprm_init_hca *init_hca ) {
  217. return arbel_cmd ( arbel,
  218. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT_HCA,
  219. 1, sizeof ( *init_hca ) ),
  220. 0, init_hca, 0, NULL );
  221. }
  222. static inline int
  223. arbel_cmd_close_hca ( struct arbel *arbel ) {
  224. return arbel_cmd ( arbel,
  225. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CLOSE_HCA ),
  226. 0, NULL, 0, NULL );
  227. }
  228. static inline int
  229. arbel_cmd_init_ib ( struct arbel *arbel, unsigned int port,
  230. const struct arbelprm_init_ib *init_ib ) {
  231. return arbel_cmd ( arbel,
  232. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT_IB,
  233. 1, sizeof ( *init_ib ) ),
  234. 0, init_ib, port, NULL );
  235. }
  236. static inline int
  237. arbel_cmd_close_ib ( struct arbel *arbel, unsigned int port ) {
  238. return arbel_cmd ( arbel,
  239. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CLOSE_IB ),
  240. 0, NULL, port, NULL );
  241. }
  242. static inline int
  243. arbel_cmd_sw2hw_mpt ( struct arbel *arbel, unsigned int index,
  244. const struct arbelprm_mpt *mpt ) {
  245. return arbel_cmd ( arbel,
  246. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_MPT,
  247. 1, sizeof ( *mpt ) ),
  248. 0, mpt, index, NULL );
  249. }
  250. static inline int
  251. arbel_cmd_map_eq ( struct arbel *arbel, unsigned long index_map,
  252. const struct arbelprm_event_mask *mask ) {
  253. return arbel_cmd ( arbel,
  254. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_EQ,
  255. 0, sizeof ( *mask ) ),
  256. 0, mask, index_map, NULL );
  257. }
  258. static inline int
  259. arbel_cmd_sw2hw_eq ( struct arbel *arbel, unsigned int index,
  260. const struct arbelprm_eqc *eqctx ) {
  261. return arbel_cmd ( arbel,
  262. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_EQ,
  263. 1, sizeof ( *eqctx ) ),
  264. 0, eqctx, index, NULL );
  265. }
  266. static inline int
  267. arbel_cmd_hw2sw_eq ( struct arbel *arbel, unsigned int index,
  268. struct arbelprm_eqc *eqctx ) {
  269. return arbel_cmd ( arbel,
  270. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_HW2SW_EQ,
  271. 1, sizeof ( *eqctx ) ),
  272. 1, NULL, index, eqctx );
  273. }
  274. static inline int
  275. arbel_cmd_sw2hw_cq ( struct arbel *arbel, unsigned long cqn,
  276. const struct arbelprm_completion_queue_context *cqctx ) {
  277. return arbel_cmd ( arbel,
  278. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_CQ,
  279. 1, sizeof ( *cqctx ) ),
  280. 0, cqctx, cqn, NULL );
  281. }
  282. static inline int
  283. arbel_cmd_hw2sw_cq ( struct arbel *arbel, unsigned long cqn,
  284. struct arbelprm_completion_queue_context *cqctx) {
  285. return arbel_cmd ( arbel,
  286. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_HW2SW_CQ,
  287. 1, sizeof ( *cqctx ) ),
  288. 0, NULL, cqn, cqctx );
  289. }
  290. static inline int
  291. arbel_cmd_rst2init_qpee ( struct arbel *arbel, unsigned long qpn,
  292. const struct arbelprm_qp_ee_state_transitions *ctx ){
  293. return arbel_cmd ( arbel,
  294. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RST2INIT_QPEE,
  295. 1, sizeof ( *ctx ) ),
  296. 0, ctx, qpn, NULL );
  297. }
  298. static inline int
  299. arbel_cmd_init2rtr_qpee ( struct arbel *arbel, unsigned long qpn,
  300. const struct arbelprm_qp_ee_state_transitions *ctx ){
  301. return arbel_cmd ( arbel,
  302. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT2RTR_QPEE,
  303. 1, sizeof ( *ctx ) ),
  304. 0, ctx, qpn, NULL );
  305. }
  306. static inline int
  307. arbel_cmd_rtr2rts_qpee ( struct arbel *arbel, unsigned long qpn,
  308. const struct arbelprm_qp_ee_state_transitions *ctx ) {
  309. return arbel_cmd ( arbel,
  310. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RTR2RTS_QPEE,
  311. 1, sizeof ( *ctx ) ),
  312. 0, ctx, qpn, NULL );
  313. }
  314. static inline int
  315. arbel_cmd_rts2rts_qp ( struct arbel *arbel, unsigned long qpn,
  316. const struct arbelprm_qp_ee_state_transitions *ctx ) {
  317. return arbel_cmd ( arbel,
  318. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RTS2RTS_QPEE,
  319. 1, sizeof ( *ctx ) ),
  320. 0, ctx, qpn, NULL );
  321. }
  322. static inline int
  323. arbel_cmd_2rst_qpee ( struct arbel *arbel, unsigned long qpn ) {
  324. return arbel_cmd ( arbel,
  325. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_2RST_QPEE ),
  326. 0x03, NULL, qpn, NULL );
  327. }
  328. static inline int
  329. arbel_cmd_mad_ifc ( struct arbel *arbel, unsigned int port,
  330. union arbelprm_mad *mad ) {
  331. return arbel_cmd ( arbel,
  332. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_MAD_IFC,
  333. 1, sizeof ( *mad ),
  334. 1, sizeof ( *mad ) ),
  335. 0x03, mad, port, mad );
  336. }
  337. static inline int
  338. arbel_cmd_read_mgm ( struct arbel *arbel, unsigned int index,
  339. struct arbelprm_mgm_entry *mgm ) {
  340. return arbel_cmd ( arbel,
  341. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_READ_MGM,
  342. 1, sizeof ( *mgm ) ),
  343. 0, NULL, index, mgm );
  344. }
  345. static inline int
  346. arbel_cmd_write_mgm ( struct arbel *arbel, unsigned int index,
  347. const struct arbelprm_mgm_entry *mgm ) {
  348. return arbel_cmd ( arbel,
  349. ARBEL_HCR_IN_CMD ( ARBEL_HCR_WRITE_MGM,
  350. 1, sizeof ( *mgm ) ),
  351. 0, mgm, index, NULL );
  352. }
  353. static inline int
  354. arbel_cmd_mgid_hash ( struct arbel *arbel, const struct ib_gid *gid,
  355. struct arbelprm_mgm_hash *hash ) {
  356. return arbel_cmd ( arbel,
  357. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_MGID_HASH,
  358. 1, sizeof ( *gid ),
  359. 0, sizeof ( *hash ) ),
  360. 0, gid, 0, hash );
  361. }
  362. static inline int
  363. arbel_cmd_run_fw ( struct arbel *arbel ) {
  364. return arbel_cmd ( arbel,
  365. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_RUN_FW ),
  366. 0, NULL, 0, NULL );
  367. }
  368. static inline int
  369. arbel_cmd_disable_lam ( struct arbel *arbel ) {
  370. return arbel_cmd ( arbel,
  371. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_DISABLE_LAM ),
  372. 0, NULL, 0, NULL );
  373. }
  374. static inline int
  375. arbel_cmd_enable_lam ( struct arbel *arbel, struct arbelprm_access_lam *lam ) {
  376. return arbel_cmd ( arbel,
  377. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_ENABLE_LAM,
  378. 1, sizeof ( *lam ) ),
  379. 1, NULL, 0, lam );
  380. }
  381. static inline int
  382. arbel_cmd_unmap_icm ( struct arbel *arbel, unsigned int page_count ) {
  383. return arbel_cmd ( arbel,
  384. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_ICM ),
  385. 0, NULL, page_count, NULL );
  386. }
  387. static inline int
  388. arbel_cmd_map_icm ( struct arbel *arbel,
  389. const struct arbelprm_virtual_physical_mapping *map ) {
  390. return arbel_cmd ( arbel,
  391. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_ICM,
  392. 1, sizeof ( *map ) ),
  393. 0, map, 1, NULL );
  394. }
  395. static inline int
  396. arbel_cmd_unmap_icm_aux ( struct arbel *arbel ) {
  397. return arbel_cmd ( arbel,
  398. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_ICM_AUX ),
  399. 0, NULL, 0, NULL );
  400. }
  401. static inline int
  402. arbel_cmd_map_icm_aux ( struct arbel *arbel,
  403. const struct arbelprm_virtual_physical_mapping *map ) {
  404. return arbel_cmd ( arbel,
  405. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_ICM_AUX,
  406. 1, sizeof ( *map ) ),
  407. 0, map, 1, NULL );
  408. }
  409. static inline int
  410. arbel_cmd_set_icm_size ( struct arbel *arbel,
  411. const struct arbelprm_scalar_parameter *icm_size,
  412. struct arbelprm_scalar_parameter *icm_aux_size ) {
  413. return arbel_cmd ( arbel,
  414. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_SET_ICM_SIZE,
  415. 0, sizeof ( *icm_size ),
  416. 0, sizeof ( *icm_aux_size ) ),
  417. 0, icm_size, 0, icm_aux_size );
  418. }
  419. static inline int
  420. arbel_cmd_unmap_fa ( struct arbel *arbel ) {
  421. return arbel_cmd ( arbel,
  422. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_FA ),
  423. 0, NULL, 0, NULL );
  424. }
  425. static inline int
  426. arbel_cmd_map_fa ( struct arbel *arbel,
  427. const struct arbelprm_virtual_physical_mapping *map ) {
  428. return arbel_cmd ( arbel,
  429. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_FA,
  430. 1, sizeof ( *map ) ),
  431. 0, map, 1, NULL );
  432. }
  433. /***************************************************************************
  434. *
  435. * Completion queue operations
  436. *
  437. ***************************************************************************
  438. */
  439. /**
  440. * Create completion queue
  441. *
  442. * @v ibdev Infiniband device
  443. * @v cq Completion queue
  444. * @ret rc Return status code
  445. */
  446. static int arbel_create_cq ( struct ib_device *ibdev,
  447. struct ib_completion_queue *cq ) {
  448. struct arbel *arbel = ib_get_drvdata ( ibdev );
  449. struct arbel_completion_queue *arbel_cq;
  450. struct arbelprm_completion_queue_context cqctx;
  451. struct arbelprm_cq_ci_db_record *ci_db_rec;
  452. struct arbelprm_cq_arm_db_record *arm_db_rec;
  453. int cqn_offset;
  454. unsigned int i;
  455. int rc;
  456. /* Find a free completion queue number */
  457. cqn_offset = arbel_alloc_qn_offset ( arbel->cq_inuse, ARBEL_MAX_CQS );
  458. if ( cqn_offset < 0 ) {
  459. DBGC ( arbel, "Arbel %p out of completion queues\n", arbel );
  460. rc = cqn_offset;
  461. goto err_cqn_offset;
  462. }
  463. cq->cqn = ( arbel->limits.reserved_cqs + cqn_offset );
  464. /* Allocate control structures */
  465. arbel_cq = zalloc ( sizeof ( *arbel_cq ) );
  466. if ( ! arbel_cq ) {
  467. rc = -ENOMEM;
  468. goto err_arbel_cq;
  469. }
  470. arbel_cq->ci_doorbell_idx = arbel_cq_ci_doorbell_idx ( cqn_offset );
  471. arbel_cq->arm_doorbell_idx = arbel_cq_arm_doorbell_idx ( cqn_offset );
  472. /* Allocate completion queue itself */
  473. arbel_cq->cqe_size = ( cq->num_cqes * sizeof ( arbel_cq->cqe[0] ) );
  474. arbel_cq->cqe = malloc_dma ( arbel_cq->cqe_size,
  475. sizeof ( arbel_cq->cqe[0] ) );
  476. if ( ! arbel_cq->cqe ) {
  477. rc = -ENOMEM;
  478. goto err_cqe;
  479. }
  480. memset ( arbel_cq->cqe, 0, arbel_cq->cqe_size );
  481. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  482. MLX_FILL_1 ( &arbel_cq->cqe[i].normal, 7, owner, 1 );
  483. }
  484. barrier();
  485. /* Initialise doorbell records */
  486. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  487. MLX_FILL_1 ( ci_db_rec, 0, counter, 0 );
  488. MLX_FILL_2 ( ci_db_rec, 1,
  489. res, ARBEL_UAR_RES_CQ_CI,
  490. cq_number, cq->cqn );
  491. arm_db_rec = &arbel->db_rec[arbel_cq->arm_doorbell_idx].cq_arm;
  492. MLX_FILL_1 ( arm_db_rec, 0, counter, 0 );
  493. MLX_FILL_2 ( arm_db_rec, 1,
  494. res, ARBEL_UAR_RES_CQ_ARM,
  495. cq_number, cq->cqn );
  496. /* Hand queue over to hardware */
  497. memset ( &cqctx, 0, sizeof ( cqctx ) );
  498. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  499. MLX_FILL_1 ( &cqctx, 2, start_address_l,
  500. virt_to_bus ( arbel_cq->cqe ) );
  501. MLX_FILL_2 ( &cqctx, 3,
  502. usr_page, arbel->limits.reserved_uars,
  503. log_cq_size, fls ( cq->num_cqes - 1 ) );
  504. MLX_FILL_1 ( &cqctx, 5, c_eqn, ARBEL_NO_EQ );
  505. MLX_FILL_1 ( &cqctx, 6, pd, ARBEL_GLOBAL_PD );
  506. MLX_FILL_1 ( &cqctx, 7, l_key, arbel->reserved_lkey );
  507. MLX_FILL_1 ( &cqctx, 12, cqn, cq->cqn );
  508. MLX_FILL_1 ( &cqctx, 13,
  509. cq_ci_db_record, arbel_cq->ci_doorbell_idx );
  510. MLX_FILL_1 ( &cqctx, 14,
  511. cq_state_db_record, arbel_cq->arm_doorbell_idx );
  512. if ( ( rc = arbel_cmd_sw2hw_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  513. DBGC ( arbel, "Arbel %p SW2HW_CQ failed: %s\n",
  514. arbel, strerror ( rc ) );
  515. goto err_sw2hw_cq;
  516. }
  517. DBGC ( arbel, "Arbel %p CQN %#lx ring at [%p,%p)\n",
  518. arbel, cq->cqn, arbel_cq->cqe,
  519. ( ( ( void * ) arbel_cq->cqe ) + arbel_cq->cqe_size ) );
  520. ib_cq_set_drvdata ( cq, arbel_cq );
  521. return 0;
  522. err_sw2hw_cq:
  523. MLX_FILL_1 ( ci_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  524. MLX_FILL_1 ( arm_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  525. free_dma ( arbel_cq->cqe, arbel_cq->cqe_size );
  526. err_cqe:
  527. free ( arbel_cq );
  528. err_arbel_cq:
  529. arbel_free_qn_offset ( arbel->cq_inuse, cqn_offset );
  530. err_cqn_offset:
  531. return rc;
  532. }
  533. /**
  534. * Destroy completion queue
  535. *
  536. * @v ibdev Infiniband device
  537. * @v cq Completion queue
  538. */
  539. static void arbel_destroy_cq ( struct ib_device *ibdev,
  540. struct ib_completion_queue *cq ) {
  541. struct arbel *arbel = ib_get_drvdata ( ibdev );
  542. struct arbel_completion_queue *arbel_cq = ib_cq_get_drvdata ( cq );
  543. struct arbelprm_completion_queue_context cqctx;
  544. struct arbelprm_cq_ci_db_record *ci_db_rec;
  545. struct arbelprm_cq_arm_db_record *arm_db_rec;
  546. int cqn_offset;
  547. int rc;
  548. /* Take ownership back from hardware */
  549. if ( ( rc = arbel_cmd_hw2sw_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  550. DBGC ( arbel, "Arbel %p FATAL HW2SW_CQ failed on CQN %#lx: "
  551. "%s\n", arbel, cq->cqn, strerror ( rc ) );
  552. /* Leak memory and return; at least we avoid corruption */
  553. return;
  554. }
  555. /* Clear doorbell records */
  556. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  557. arm_db_rec = &arbel->db_rec[arbel_cq->arm_doorbell_idx].cq_arm;
  558. MLX_FILL_1 ( ci_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  559. MLX_FILL_1 ( arm_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  560. /* Free memory */
  561. free_dma ( arbel_cq->cqe, arbel_cq->cqe_size );
  562. free ( arbel_cq );
  563. /* Mark queue number as free */
  564. cqn_offset = ( cq->cqn - arbel->limits.reserved_cqs );
  565. arbel_free_qn_offset ( arbel->cq_inuse, cqn_offset );
  566. ib_cq_set_drvdata ( cq, NULL );
  567. }
  568. /***************************************************************************
  569. *
  570. * Queue pair operations
  571. *
  572. ***************************************************************************
  573. */
  574. /**
  575. * Create send work queue
  576. *
  577. * @v arbel_send_wq Send work queue
  578. * @v num_wqes Number of work queue entries
  579. * @ret rc Return status code
  580. */
  581. static int arbel_create_send_wq ( struct arbel_send_work_queue *arbel_send_wq,
  582. unsigned int num_wqes ) {
  583. struct arbelprm_ud_send_wqe *wqe;
  584. struct arbelprm_ud_send_wqe *next_wqe;
  585. unsigned int wqe_idx_mask;
  586. unsigned int i;
  587. /* Allocate work queue */
  588. arbel_send_wq->wqe_size = ( num_wqes *
  589. sizeof ( arbel_send_wq->wqe[0] ) );
  590. arbel_send_wq->wqe = malloc_dma ( arbel_send_wq->wqe_size,
  591. sizeof ( arbel_send_wq->wqe[0] ) );
  592. if ( ! arbel_send_wq->wqe )
  593. return -ENOMEM;
  594. memset ( arbel_send_wq->wqe, 0, arbel_send_wq->wqe_size );
  595. /* Link work queue entries */
  596. wqe_idx_mask = ( num_wqes - 1 );
  597. for ( i = 0 ; i < num_wqes ; i++ ) {
  598. wqe = &arbel_send_wq->wqe[i].ud;
  599. next_wqe = &arbel_send_wq->wqe[ ( i + 1 ) & wqe_idx_mask ].ud;
  600. MLX_FILL_1 ( &wqe->next, 0, nda_31_6,
  601. ( virt_to_bus ( next_wqe ) >> 6 ) );
  602. }
  603. return 0;
  604. }
  605. /**
  606. * Create receive work queue
  607. *
  608. * @v arbel_recv_wq Receive work queue
  609. * @v num_wqes Number of work queue entries
  610. * @ret rc Return status code
  611. */
  612. static int arbel_create_recv_wq ( struct arbel_recv_work_queue *arbel_recv_wq,
  613. unsigned int num_wqes ) {
  614. struct arbelprm_recv_wqe *wqe;
  615. struct arbelprm_recv_wqe *next_wqe;
  616. unsigned int wqe_idx_mask;
  617. size_t nds;
  618. unsigned int i;
  619. unsigned int j;
  620. /* Allocate work queue */
  621. arbel_recv_wq->wqe_size = ( num_wqes *
  622. sizeof ( arbel_recv_wq->wqe[0] ) );
  623. arbel_recv_wq->wqe = malloc_dma ( arbel_recv_wq->wqe_size,
  624. sizeof ( arbel_recv_wq->wqe[0] ) );
  625. if ( ! arbel_recv_wq->wqe )
  626. return -ENOMEM;
  627. memset ( arbel_recv_wq->wqe, 0, arbel_recv_wq->wqe_size );
  628. /* Link work queue entries */
  629. wqe_idx_mask = ( num_wqes - 1 );
  630. nds = ( ( offsetof ( typeof ( *wqe ), data ) +
  631. sizeof ( wqe->data[0] ) ) >> 4 );
  632. for ( i = 0 ; i < num_wqes ; i++ ) {
  633. wqe = &arbel_recv_wq->wqe[i].recv;
  634. next_wqe = &arbel_recv_wq->wqe[( i + 1 ) & wqe_idx_mask].recv;
  635. MLX_FILL_1 ( &wqe->next, 0, nda_31_6,
  636. ( virt_to_bus ( next_wqe ) >> 6 ) );
  637. MLX_FILL_1 ( &wqe->next, 1, nds, ( sizeof ( *wqe ) / 16 ) );
  638. for ( j = 0 ; ( ( ( void * ) &wqe->data[j] ) <
  639. ( ( void * ) ( wqe + 1 ) ) ) ; j++ ) {
  640. MLX_FILL_1 ( &wqe->data[j], 1,
  641. l_key, ARBEL_INVALID_LKEY );
  642. }
  643. }
  644. return 0;
  645. }
  646. /**
  647. * Create queue pair
  648. *
  649. * @v ibdev Infiniband device
  650. * @v qp Queue pair
  651. * @ret rc Return status code
  652. */
  653. static int arbel_create_qp ( struct ib_device *ibdev,
  654. struct ib_queue_pair *qp ) {
  655. struct arbel *arbel = ib_get_drvdata ( ibdev );
  656. struct arbel_queue_pair *arbel_qp;
  657. struct arbelprm_qp_ee_state_transitions qpctx;
  658. struct arbelprm_qp_db_record *send_db_rec;
  659. struct arbelprm_qp_db_record *recv_db_rec;
  660. int qpn_offset;
  661. int rc;
  662. /* Find a free queue pair number */
  663. qpn_offset = arbel_alloc_qn_offset ( arbel->qp_inuse, ARBEL_MAX_QPS );
  664. if ( qpn_offset < 0 ) {
  665. DBGC ( arbel, "Arbel %p out of queue pairs\n", arbel );
  666. rc = qpn_offset;
  667. goto err_qpn_offset;
  668. }
  669. qp->qpn = ( ARBEL_QPN_BASE + arbel->limits.reserved_qps + qpn_offset );
  670. /* Allocate control structures */
  671. arbel_qp = zalloc ( sizeof ( *arbel_qp ) );
  672. if ( ! arbel_qp ) {
  673. rc = -ENOMEM;
  674. goto err_arbel_qp;
  675. }
  676. arbel_qp->send.doorbell_idx = arbel_send_doorbell_idx ( qpn_offset );
  677. arbel_qp->recv.doorbell_idx = arbel_recv_doorbell_idx ( qpn_offset );
  678. /* Create send and receive work queues */
  679. if ( ( rc = arbel_create_send_wq ( &arbel_qp->send,
  680. qp->send.num_wqes ) ) != 0 )
  681. goto err_create_send_wq;
  682. if ( ( rc = arbel_create_recv_wq ( &arbel_qp->recv,
  683. qp->recv.num_wqes ) ) != 0 )
  684. goto err_create_recv_wq;
  685. /* Initialise doorbell records */
  686. send_db_rec = &arbel->db_rec[arbel_qp->send.doorbell_idx].qp;
  687. MLX_FILL_1 ( send_db_rec, 0, counter, 0 );
  688. MLX_FILL_2 ( send_db_rec, 1,
  689. res, ARBEL_UAR_RES_SQ,
  690. qp_number, qp->qpn );
  691. recv_db_rec = &arbel->db_rec[arbel_qp->recv.doorbell_idx].qp;
  692. MLX_FILL_1 ( recv_db_rec, 0, counter, 0 );
  693. MLX_FILL_2 ( recv_db_rec, 1,
  694. res, ARBEL_UAR_RES_RQ,
  695. qp_number, qp->qpn );
  696. /* Hand queue over to hardware */
  697. memset ( &qpctx, 0, sizeof ( qpctx ) );
  698. MLX_FILL_3 ( &qpctx, 2,
  699. qpc_eec_data.de, 1,
  700. qpc_eec_data.pm_state, 0x03 /* Always 0x03 for UD */,
  701. qpc_eec_data.st, ARBEL_ST_UD );
  702. MLX_FILL_6 ( &qpctx, 4,
  703. qpc_eec_data.mtu, ARBEL_MTU_2048,
  704. qpc_eec_data.msg_max, 11 /* 2^11 = 2048 */,
  705. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  706. qpc_eec_data.log_rq_stride,
  707. ( fls ( sizeof ( arbel_qp->recv.wqe[0] ) - 1 ) - 4 ),
  708. qpc_eec_data.log_sq_size, fls ( qp->send.num_wqes - 1 ),
  709. qpc_eec_data.log_sq_stride,
  710. ( fls ( sizeof ( arbel_qp->send.wqe[0] ) - 1 ) - 4 ) );
  711. MLX_FILL_1 ( &qpctx, 5,
  712. qpc_eec_data.usr_page, arbel->limits.reserved_uars );
  713. MLX_FILL_1 ( &qpctx, 10, qpc_eec_data.primary_address_path.port_number,
  714. ibdev->port );
  715. MLX_FILL_1 ( &qpctx, 27, qpc_eec_data.pd, ARBEL_GLOBAL_PD );
  716. MLX_FILL_1 ( &qpctx, 29, qpc_eec_data.wqe_lkey, arbel->reserved_lkey );
  717. MLX_FILL_1 ( &qpctx, 30, qpc_eec_data.ssc, 1 );
  718. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  719. MLX_FILL_1 ( &qpctx, 34, qpc_eec_data.snd_wqe_base_adr_l,
  720. ( virt_to_bus ( arbel_qp->send.wqe ) >> 6 ) );
  721. MLX_FILL_1 ( &qpctx, 35, qpc_eec_data.snd_db_record_index,
  722. arbel_qp->send.doorbell_idx );
  723. MLX_FILL_1 ( &qpctx, 38, qpc_eec_data.rsc, 1 );
  724. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  725. MLX_FILL_1 ( &qpctx, 42, qpc_eec_data.rcv_wqe_base_adr_l,
  726. ( virt_to_bus ( arbel_qp->recv.wqe ) >> 6 ) );
  727. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.rcv_db_record_index,
  728. arbel_qp->recv.doorbell_idx );
  729. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  730. if ( ( rc = arbel_cmd_rst2init_qpee ( arbel, qp->qpn, &qpctx )) != 0 ){
  731. DBGC ( arbel, "Arbel %p RST2INIT_QPEE failed: %s\n",
  732. arbel, strerror ( rc ) );
  733. goto err_rst2init_qpee;
  734. }
  735. memset ( &qpctx, 0, sizeof ( qpctx ) );
  736. MLX_FILL_2 ( &qpctx, 4,
  737. qpc_eec_data.mtu, ARBEL_MTU_2048,
  738. qpc_eec_data.msg_max, 11 /* 2^11 = 2048 */ );
  739. if ( ( rc = arbel_cmd_init2rtr_qpee ( arbel, qp->qpn, &qpctx )) != 0 ){
  740. DBGC ( arbel, "Arbel %p INIT2RTR_QPEE failed: %s\n",
  741. arbel, strerror ( rc ) );
  742. goto err_init2rtr_qpee;
  743. }
  744. memset ( &qpctx, 0, sizeof ( qpctx ) );
  745. if ( ( rc = arbel_cmd_rtr2rts_qpee ( arbel, qp->qpn, &qpctx ) ) != 0 ){
  746. DBGC ( arbel, "Arbel %p RTR2RTS_QPEE failed: %s\n",
  747. arbel, strerror ( rc ) );
  748. goto err_rtr2rts_qpee;
  749. }
  750. DBGC ( arbel, "Arbel %p QPN %#lx send ring at [%p,%p)\n",
  751. arbel, qp->qpn, arbel_qp->send.wqe,
  752. ( ( (void *) arbel_qp->send.wqe ) + arbel_qp->send.wqe_size ) );
  753. DBGC ( arbel, "Arbel %p QPN %#lx receive ring at [%p,%p)\n",
  754. arbel, qp->qpn, arbel_qp->recv.wqe,
  755. ( ( (void *) arbel_qp->recv.wqe ) + arbel_qp->recv.wqe_size ) );
  756. ib_qp_set_drvdata ( qp, arbel_qp );
  757. return 0;
  758. err_rtr2rts_qpee:
  759. err_init2rtr_qpee:
  760. arbel_cmd_2rst_qpee ( arbel, qp->qpn );
  761. err_rst2init_qpee:
  762. MLX_FILL_1 ( send_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  763. MLX_FILL_1 ( recv_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  764. free_dma ( arbel_qp->recv.wqe, arbel_qp->recv.wqe_size );
  765. err_create_recv_wq:
  766. free_dma ( arbel_qp->send.wqe, arbel_qp->send.wqe_size );
  767. err_create_send_wq:
  768. free ( arbel_qp );
  769. err_arbel_qp:
  770. arbel_free_qn_offset ( arbel->qp_inuse, qpn_offset );
  771. err_qpn_offset:
  772. return rc;
  773. }
  774. /**
  775. * Modify queue pair
  776. *
  777. * @v ibdev Infiniband device
  778. * @v qp Queue pair
  779. * @v mod_list Modification list
  780. * @ret rc Return status code
  781. */
  782. static int arbel_modify_qp ( struct ib_device *ibdev,
  783. struct ib_queue_pair *qp,
  784. unsigned long mod_list ) {
  785. struct arbel *arbel = ib_get_drvdata ( ibdev );
  786. struct arbelprm_qp_ee_state_transitions qpctx;
  787. unsigned long optparammask = 0;
  788. int rc;
  789. /* Construct optparammask */
  790. if ( mod_list & IB_MODIFY_QKEY )
  791. optparammask |= ARBEL_QPEE_OPT_PARAM_QKEY;
  792. /* Issue RTS2RTS_QP */
  793. memset ( &qpctx, 0, sizeof ( qpctx ) );
  794. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, optparammask );
  795. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  796. if ( ( rc = arbel_cmd_rts2rts_qp ( arbel, qp->qpn, &qpctx ) ) != 0 ){
  797. DBGC ( arbel, "Arbel %p RTS2RTS_QP failed: %s\n",
  798. arbel, strerror ( rc ) );
  799. return rc;
  800. }
  801. return 0;
  802. }
  803. /**
  804. * Destroy queue pair
  805. *
  806. * @v ibdev Infiniband device
  807. * @v qp Queue pair
  808. */
  809. static void arbel_destroy_qp ( struct ib_device *ibdev,
  810. struct ib_queue_pair *qp ) {
  811. struct arbel *arbel = ib_get_drvdata ( ibdev );
  812. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  813. struct arbelprm_qp_db_record *send_db_rec;
  814. struct arbelprm_qp_db_record *recv_db_rec;
  815. int qpn_offset;
  816. int rc;
  817. /* Take ownership back from hardware */
  818. if ( ( rc = arbel_cmd_2rst_qpee ( arbel, qp->qpn ) ) != 0 ) {
  819. DBGC ( arbel, "Arbel %p FATAL 2RST_QPEE failed on QPN %#lx: "
  820. "%s\n", arbel, qp->qpn, strerror ( rc ) );
  821. /* Leak memory and return; at least we avoid corruption */
  822. return;
  823. }
  824. /* Clear doorbell records */
  825. send_db_rec = &arbel->db_rec[arbel_qp->send.doorbell_idx].qp;
  826. recv_db_rec = &arbel->db_rec[arbel_qp->recv.doorbell_idx].qp;
  827. MLX_FILL_1 ( send_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  828. MLX_FILL_1 ( recv_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  829. /* Free memory */
  830. free_dma ( arbel_qp->send.wqe, arbel_qp->send.wqe_size );
  831. free_dma ( arbel_qp->recv.wqe, arbel_qp->recv.wqe_size );
  832. free ( arbel_qp );
  833. /* Mark queue number as free */
  834. qpn_offset = ( qp->qpn - ARBEL_QPN_BASE - arbel->limits.reserved_qps );
  835. arbel_free_qn_offset ( arbel->qp_inuse, qpn_offset );
  836. ib_qp_set_drvdata ( qp, NULL );
  837. }
  838. /***************************************************************************
  839. *
  840. * Work request operations
  841. *
  842. ***************************************************************************
  843. */
  844. /**
  845. * Ring doorbell register in UAR
  846. *
  847. * @v arbel Arbel device
  848. * @v db_reg Doorbell register structure
  849. * @v offset Address of doorbell
  850. */
  851. static void arbel_ring_doorbell ( struct arbel *arbel,
  852. union arbelprm_doorbell_register *db_reg,
  853. unsigned int offset ) {
  854. DBGC2 ( arbel, "Arbel %p ringing doorbell %08lx:%08lx at %lx\n",
  855. arbel, db_reg->dword[0], db_reg->dword[1],
  856. virt_to_phys ( arbel->uar + offset ) );
  857. barrier();
  858. writel ( db_reg->dword[0], ( arbel->uar + offset + 0 ) );
  859. barrier();
  860. writel ( db_reg->dword[1], ( arbel->uar + offset + 4 ) );
  861. }
  862. /** GID used for GID-less send work queue entries */
  863. static const struct ib_gid arbel_no_gid = {
  864. { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0 } }
  865. };
  866. /**
  867. * Post send work queue entry
  868. *
  869. * @v ibdev Infiniband device
  870. * @v qp Queue pair
  871. * @v av Address vector
  872. * @v iobuf I/O buffer
  873. * @ret rc Return status code
  874. */
  875. static int arbel_post_send ( struct ib_device *ibdev,
  876. struct ib_queue_pair *qp,
  877. struct ib_address_vector *av,
  878. struct io_buffer *iobuf ) {
  879. struct arbel *arbel = ib_get_drvdata ( ibdev );
  880. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  881. struct ib_work_queue *wq = &qp->send;
  882. struct arbel_send_work_queue *arbel_send_wq = &arbel_qp->send;
  883. struct arbelprm_ud_send_wqe *prev_wqe;
  884. struct arbelprm_ud_send_wqe *wqe;
  885. struct arbelprm_qp_db_record *qp_db_rec;
  886. union arbelprm_doorbell_register db_reg;
  887. const struct ib_gid *gid;
  888. unsigned int wqe_idx_mask;
  889. size_t nds;
  890. /* Allocate work queue entry */
  891. wqe_idx_mask = ( wq->num_wqes - 1 );
  892. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  893. DBGC ( arbel, "Arbel %p send queue full", arbel );
  894. return -ENOBUFS;
  895. }
  896. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  897. prev_wqe = &arbel_send_wq->wqe[(wq->next_idx - 1) & wqe_idx_mask].ud;
  898. wqe = &arbel_send_wq->wqe[wq->next_idx & wqe_idx_mask].ud;
  899. /* Construct work queue entry */
  900. MLX_FILL_1 ( &wqe->next, 1, always1, 1 );
  901. memset ( &wqe->ctrl, 0, sizeof ( wqe->ctrl ) );
  902. MLX_FILL_1 ( &wqe->ctrl, 0, always1, 1 );
  903. memset ( &wqe->ud, 0, sizeof ( wqe->ud ) );
  904. MLX_FILL_2 ( &wqe->ud, 0,
  905. ud_address_vector.pd, ARBEL_GLOBAL_PD,
  906. ud_address_vector.port_number, ibdev->port );
  907. MLX_FILL_2 ( &wqe->ud, 1,
  908. ud_address_vector.rlid, av->lid,
  909. ud_address_vector.g, av->gid_present );
  910. MLX_FILL_2 ( &wqe->ud, 2,
  911. ud_address_vector.max_stat_rate,
  912. ( ( av->rate >= 3 ) ? 0 : 1 ),
  913. ud_address_vector.msg, 3 );
  914. MLX_FILL_1 ( &wqe->ud, 3, ud_address_vector.sl, av->sl );
  915. gid = ( av->gid_present ? &av->gid : &arbel_no_gid );
  916. memcpy ( &wqe->ud.u.dwords[4], gid, sizeof ( *gid ) );
  917. MLX_FILL_1 ( &wqe->ud, 8, destination_qp, av->qpn );
  918. MLX_FILL_1 ( &wqe->ud, 9, q_key, av->qkey );
  919. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_len ( iobuf ) );
  920. MLX_FILL_1 ( &wqe->data[0], 1, l_key, arbel->reserved_lkey );
  921. MLX_FILL_1 ( &wqe->data[0], 3,
  922. local_address_l, virt_to_bus ( iobuf->data ) );
  923. /* Update previous work queue entry's "next" field */
  924. nds = ( ( offsetof ( typeof ( *wqe ), data ) +
  925. sizeof ( wqe->data[0] ) ) >> 4 );
  926. MLX_SET ( &prev_wqe->next, nopcode, ARBEL_OPCODE_SEND );
  927. MLX_FILL_3 ( &prev_wqe->next, 1,
  928. nds, nds,
  929. f, 1,
  930. always1, 1 );
  931. /* Update doorbell record */
  932. barrier();
  933. qp_db_rec = &arbel->db_rec[arbel_send_wq->doorbell_idx].qp;
  934. MLX_FILL_1 ( qp_db_rec, 0,
  935. counter, ( ( wq->next_idx + 1 ) & 0xffff ) );
  936. /* Ring doorbell register */
  937. MLX_FILL_4 ( &db_reg.send, 0,
  938. nopcode, ARBEL_OPCODE_SEND,
  939. f, 1,
  940. wqe_counter, ( wq->next_idx & 0xffff ),
  941. wqe_cnt, 1 );
  942. MLX_FILL_2 ( &db_reg.send, 1,
  943. nds, nds,
  944. qpn, qp->qpn );
  945. arbel_ring_doorbell ( arbel, &db_reg, ARBEL_DB_POST_SND_OFFSET );
  946. /* Update work queue's index */
  947. wq->next_idx++;
  948. return 0;
  949. }
  950. /**
  951. * Post receive work queue entry
  952. *
  953. * @v ibdev Infiniband device
  954. * @v qp Queue pair
  955. * @v iobuf I/O buffer
  956. * @ret rc Return status code
  957. */
  958. static int arbel_post_recv ( struct ib_device *ibdev,
  959. struct ib_queue_pair *qp,
  960. struct io_buffer *iobuf ) {
  961. struct arbel *arbel = ib_get_drvdata ( ibdev );
  962. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  963. struct ib_work_queue *wq = &qp->recv;
  964. struct arbel_recv_work_queue *arbel_recv_wq = &arbel_qp->recv;
  965. struct arbelprm_recv_wqe *wqe;
  966. union arbelprm_doorbell_record *db_rec;
  967. unsigned int wqe_idx_mask;
  968. /* Allocate work queue entry */
  969. wqe_idx_mask = ( wq->num_wqes - 1 );
  970. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  971. DBGC ( arbel, "Arbel %p receive queue full", arbel );
  972. return -ENOBUFS;
  973. }
  974. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  975. wqe = &arbel_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  976. /* Construct work queue entry */
  977. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
  978. MLX_FILL_1 ( &wqe->data[0], 1, l_key, arbel->reserved_lkey );
  979. MLX_FILL_1 ( &wqe->data[0], 3,
  980. local_address_l, virt_to_bus ( iobuf->data ) );
  981. /* Update doorbell record */
  982. barrier();
  983. db_rec = &arbel->db_rec[arbel_recv_wq->doorbell_idx];
  984. MLX_FILL_1 ( &db_rec->qp, 0,
  985. counter, ( ( wq->next_idx + 1 ) & 0xffff ) );
  986. /* Update work queue's index */
  987. wq->next_idx++;
  988. return 0;
  989. }
  990. /**
  991. * Handle completion
  992. *
  993. * @v ibdev Infiniband device
  994. * @v cq Completion queue
  995. * @v cqe Hardware completion queue entry
  996. * @ret rc Return status code
  997. */
  998. static int arbel_complete ( struct ib_device *ibdev,
  999. struct ib_completion_queue *cq,
  1000. union arbelprm_completion_entry *cqe ) {
  1001. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1002. struct ib_work_queue *wq;
  1003. struct ib_queue_pair *qp;
  1004. struct arbel_queue_pair *arbel_qp;
  1005. struct arbel_send_work_queue *arbel_send_wq;
  1006. struct arbel_recv_work_queue *arbel_recv_wq;
  1007. struct arbelprm_recv_wqe *recv_wqe;
  1008. struct io_buffer *iobuf;
  1009. struct ib_address_vector av;
  1010. struct ib_global_route_header *grh;
  1011. unsigned int opcode;
  1012. unsigned long qpn;
  1013. int is_send;
  1014. unsigned long wqe_adr;
  1015. unsigned int wqe_idx;
  1016. size_t len;
  1017. int rc = 0;
  1018. /* Parse completion */
  1019. qpn = MLX_GET ( &cqe->normal, my_qpn );
  1020. is_send = MLX_GET ( &cqe->normal, s );
  1021. wqe_adr = ( MLX_GET ( &cqe->normal, wqe_adr ) << 6 );
  1022. opcode = MLX_GET ( &cqe->normal, opcode );
  1023. if ( opcode >= ARBEL_OPCODE_RECV_ERROR ) {
  1024. /* "s" field is not valid for error opcodes */
  1025. is_send = ( opcode == ARBEL_OPCODE_SEND_ERROR );
  1026. DBGC ( arbel, "Arbel %p CPN %lx syndrome %lx vendor %lx\n",
  1027. arbel, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
  1028. MLX_GET ( &cqe->error, vendor_code ) );
  1029. rc = -EIO;
  1030. /* Don't return immediately; propagate error to completer */
  1031. }
  1032. /* Identify work queue */
  1033. wq = ib_find_wq ( cq, qpn, is_send );
  1034. if ( ! wq ) {
  1035. DBGC ( arbel, "Arbel %p CQN %lx unknown %s QPN %lx\n",
  1036. arbel, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1037. return -EIO;
  1038. }
  1039. qp = wq->qp;
  1040. arbel_qp = ib_qp_get_drvdata ( qp );
  1041. arbel_send_wq = &arbel_qp->send;
  1042. arbel_recv_wq = &arbel_qp->recv;
  1043. /* Identify work queue entry index */
  1044. if ( is_send ) {
  1045. wqe_idx = ( ( wqe_adr - virt_to_bus ( arbel_send_wq->wqe ) ) /
  1046. sizeof ( arbel_send_wq->wqe[0] ) );
  1047. assert ( wqe_idx < qp->send.num_wqes );
  1048. } else {
  1049. wqe_idx = ( ( wqe_adr - virt_to_bus ( arbel_recv_wq->wqe ) ) /
  1050. sizeof ( arbel_recv_wq->wqe[0] ) );
  1051. assert ( wqe_idx < qp->recv.num_wqes );
  1052. }
  1053. /* Identify I/O buffer */
  1054. iobuf = wq->iobufs[wqe_idx];
  1055. if ( ! iobuf ) {
  1056. DBGC ( arbel, "Arbel %p CQN %lx QPN %lx empty WQE %x\n",
  1057. arbel, cq->cqn, qpn, wqe_idx );
  1058. return -EIO;
  1059. }
  1060. wq->iobufs[wqe_idx] = NULL;
  1061. if ( is_send ) {
  1062. /* Hand off to completion handler */
  1063. ib_complete_send ( ibdev, qp, iobuf, rc );
  1064. } else {
  1065. /* Set received length */
  1066. len = MLX_GET ( &cqe->normal, byte_cnt );
  1067. recv_wqe = &arbel_recv_wq->wqe[wqe_idx].recv;
  1068. assert ( MLX_GET ( &recv_wqe->data[0], local_address_l ) ==
  1069. virt_to_bus ( iobuf->data ) );
  1070. assert ( MLX_GET ( &recv_wqe->data[0], byte_count ) ==
  1071. iob_tailroom ( iobuf ) );
  1072. MLX_FILL_1 ( &recv_wqe->data[0], 0, byte_count, 0 );
  1073. MLX_FILL_1 ( &recv_wqe->data[0], 1,
  1074. l_key, ARBEL_INVALID_LKEY );
  1075. assert ( len <= iob_tailroom ( iobuf ) );
  1076. iob_put ( iobuf, len );
  1077. assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
  1078. grh = iobuf->data;
  1079. iob_pull ( iobuf, sizeof ( *grh ) );
  1080. /* Construct address vector */
  1081. memset ( &av, 0, sizeof ( av ) );
  1082. av.qpn = MLX_GET ( &cqe->normal, rqpn );
  1083. av.lid = MLX_GET ( &cqe->normal, rlid );
  1084. av.sl = MLX_GET ( &cqe->normal, sl );
  1085. av.gid_present = MLX_GET ( &cqe->normal, g );
  1086. memcpy ( &av.gid, &grh->sgid, sizeof ( av.gid ) );
  1087. /* Hand off to completion handler */
  1088. ib_complete_recv ( ibdev, qp, &av, iobuf, rc );
  1089. }
  1090. return rc;
  1091. }
  1092. /**
  1093. * Poll completion queue
  1094. *
  1095. * @v ibdev Infiniband device
  1096. * @v cq Completion queue
  1097. */
  1098. static void arbel_poll_cq ( struct ib_device *ibdev,
  1099. struct ib_completion_queue *cq ) {
  1100. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1101. struct arbel_completion_queue *arbel_cq = ib_cq_get_drvdata ( cq );
  1102. struct arbelprm_cq_ci_db_record *ci_db_rec;
  1103. union arbelprm_completion_entry *cqe;
  1104. unsigned int cqe_idx_mask;
  1105. int rc;
  1106. while ( 1 ) {
  1107. /* Look for completion entry */
  1108. cqe_idx_mask = ( cq->num_cqes - 1 );
  1109. cqe = &arbel_cq->cqe[cq->next_idx & cqe_idx_mask];
  1110. if ( MLX_GET ( &cqe->normal, owner ) != 0 ) {
  1111. /* Entry still owned by hardware; end of poll */
  1112. break;
  1113. }
  1114. /* Handle completion */
  1115. if ( ( rc = arbel_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1116. DBGC ( arbel, "Arbel %p failed to complete: %s\n",
  1117. arbel, strerror ( rc ) );
  1118. DBGC_HD ( arbel, cqe, sizeof ( *cqe ) );
  1119. }
  1120. /* Return ownership to hardware */
  1121. MLX_FILL_1 ( &cqe->normal, 7, owner, 1 );
  1122. barrier();
  1123. /* Update completion queue's index */
  1124. cq->next_idx++;
  1125. /* Update doorbell record */
  1126. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  1127. MLX_FILL_1 ( ci_db_rec, 0,
  1128. counter, ( cq->next_idx & 0xffffffffUL ) );
  1129. }
  1130. }
  1131. /***************************************************************************
  1132. *
  1133. * Event queues
  1134. *
  1135. ***************************************************************************
  1136. */
  1137. /**
  1138. * Create event queue
  1139. *
  1140. * @v arbel Arbel device
  1141. * @ret rc Return status code
  1142. */
  1143. static int arbel_create_eq ( struct arbel *arbel ) {
  1144. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1145. struct arbelprm_eqc eqctx;
  1146. struct arbelprm_event_mask mask;
  1147. unsigned int i;
  1148. int rc;
  1149. /* Select event queue number */
  1150. arbel_eq->eqn = arbel->limits.reserved_eqs;
  1151. /* Calculate doorbell address */
  1152. arbel_eq->doorbell = ( arbel->eq_ci_doorbells +
  1153. ARBEL_DB_EQ_OFFSET ( arbel_eq->eqn ) );
  1154. /* Allocate event queue itself */
  1155. arbel_eq->eqe_size =
  1156. ( ARBEL_NUM_EQES * sizeof ( arbel_eq->eqe[0] ) );
  1157. arbel_eq->eqe = malloc_dma ( arbel_eq->eqe_size,
  1158. sizeof ( arbel_eq->eqe[0] ) );
  1159. if ( ! arbel_eq->eqe ) {
  1160. rc = -ENOMEM;
  1161. goto err_eqe;
  1162. }
  1163. memset ( arbel_eq->eqe, 0, arbel_eq->eqe_size );
  1164. for ( i = 0 ; i < ARBEL_NUM_EQES ; i++ ) {
  1165. MLX_FILL_1 ( &arbel_eq->eqe[i].generic, 7, owner, 1 );
  1166. }
  1167. barrier();
  1168. /* Hand queue over to hardware */
  1169. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1170. MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
  1171. MLX_FILL_1 ( &eqctx, 2,
  1172. start_address_l, virt_to_phys ( arbel_eq->eqe ) );
  1173. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( ARBEL_NUM_EQES - 1 ) );
  1174. MLX_FILL_1 ( &eqctx, 6, pd, ARBEL_GLOBAL_PD );
  1175. MLX_FILL_1 ( &eqctx, 7, lkey, arbel->reserved_lkey );
  1176. if ( ( rc = arbel_cmd_sw2hw_eq ( arbel, arbel_eq->eqn,
  1177. &eqctx ) ) != 0 ) {
  1178. DBGC ( arbel, "Arbel %p SW2HW_EQ failed: %s\n",
  1179. arbel, strerror ( rc ) );
  1180. goto err_sw2hw_eq;
  1181. }
  1182. /* Map events to this event queue */
  1183. memset ( &mask, 0, sizeof ( mask ) );
  1184. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1185. if ( ( rc = arbel_cmd_map_eq ( arbel,
  1186. ( ARBEL_MAP_EQ | arbel_eq->eqn ),
  1187. &mask ) ) != 0 ) {
  1188. DBGC ( arbel, "Arbel %p MAP_EQ failed: %s\n",
  1189. arbel, strerror ( rc ) );
  1190. goto err_map_eq;
  1191. }
  1192. DBGC ( arbel, "Arbel %p EQN %#lx ring at [%p,%p])\n",
  1193. arbel, arbel_eq->eqn, arbel_eq->eqe,
  1194. ( ( ( void * ) arbel_eq->eqe ) + arbel_eq->eqe_size ) );
  1195. return 0;
  1196. err_map_eq:
  1197. arbel_cmd_hw2sw_eq ( arbel, arbel_eq->eqn, &eqctx );
  1198. err_sw2hw_eq:
  1199. free_dma ( arbel_eq->eqe, arbel_eq->eqe_size );
  1200. err_eqe:
  1201. memset ( arbel_eq, 0, sizeof ( *arbel_eq ) );
  1202. return rc;
  1203. }
  1204. /**
  1205. * Destroy event queue
  1206. *
  1207. * @v arbel Arbel device
  1208. */
  1209. static void arbel_destroy_eq ( struct arbel *arbel ) {
  1210. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1211. struct arbelprm_eqc eqctx;
  1212. struct arbelprm_event_mask mask;
  1213. int rc;
  1214. /* Unmap events from event queue */
  1215. memset ( &mask, 0, sizeof ( mask ) );
  1216. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1217. if ( ( rc = arbel_cmd_map_eq ( arbel,
  1218. ( ARBEL_UNMAP_EQ | arbel_eq->eqn ),
  1219. &mask ) ) != 0 ) {
  1220. DBGC ( arbel, "Arbel %p FATAL MAP_EQ failed to unmap: %s\n",
  1221. arbel, strerror ( rc ) );
  1222. /* Continue; HCA may die but system should survive */
  1223. }
  1224. /* Take ownership back from hardware */
  1225. if ( ( rc = arbel_cmd_hw2sw_eq ( arbel, arbel_eq->eqn,
  1226. &eqctx ) ) != 0 ) {
  1227. DBGC ( arbel, "Arbel %p FATAL HW2SW_EQ failed: %s\n",
  1228. arbel, strerror ( rc ) );
  1229. /* Leak memory and return; at least we avoid corruption */
  1230. return;
  1231. }
  1232. /* Free memory */
  1233. free_dma ( arbel_eq->eqe, arbel_eq->eqe_size );
  1234. memset ( arbel_eq, 0, sizeof ( *arbel_eq ) );
  1235. }
  1236. /**
  1237. * Handle port state event
  1238. *
  1239. * @v arbel Arbel device
  1240. * @v eqe Port state change event queue entry
  1241. */
  1242. static void arbel_event_port_state_change ( struct arbel *arbel,
  1243. union arbelprm_event_entry *eqe){
  1244. unsigned int port;
  1245. int link_up;
  1246. /* Get port and link status */
  1247. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1248. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1249. DBGC ( arbel, "Arbel %p port %d link %s\n", arbel, ( port + 1 ),
  1250. ( link_up ? "up" : "down" ) );
  1251. /* Sanity check */
  1252. if ( port >= ARBEL_NUM_PORTS ) {
  1253. DBGC ( arbel, "Arbel %p port %d does not exist!\n",
  1254. arbel, ( port + 1 ) );
  1255. return;
  1256. }
  1257. /* Notify Infiniband core of link state change */
  1258. ib_link_state_changed ( arbel->ibdev[port] );
  1259. }
  1260. /**
  1261. * Poll event queue
  1262. *
  1263. * @v ibdev Infiniband device
  1264. */
  1265. static void arbel_poll_eq ( struct ib_device *ibdev ) {
  1266. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1267. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1268. union arbelprm_event_entry *eqe;
  1269. union arbelprm_eq_doorbell_register db_reg;
  1270. unsigned int eqe_idx_mask;
  1271. unsigned int event_type;
  1272. while ( 1 ) {
  1273. /* Look for event entry */
  1274. eqe_idx_mask = ( ARBEL_NUM_EQES - 1 );
  1275. eqe = &arbel_eq->eqe[arbel_eq->next_idx & eqe_idx_mask];
  1276. if ( MLX_GET ( &eqe->generic, owner ) != 0 ) {
  1277. /* Entry still owned by hardware; end of poll */
  1278. break;
  1279. }
  1280. DBGCP ( arbel, "Arbel %p event:\n", arbel );
  1281. DBGCP_HD ( arbel, eqe, sizeof ( *eqe ) );
  1282. /* Handle event */
  1283. event_type = MLX_GET ( &eqe->generic, event_type );
  1284. switch ( event_type ) {
  1285. case ARBEL_EV_PORT_STATE_CHANGE:
  1286. arbel_event_port_state_change ( arbel, eqe );
  1287. break;
  1288. default:
  1289. DBGC ( arbel, "Arbel %p unrecognised event type "
  1290. "%#x:\n", arbel, event_type );
  1291. DBGC_HD ( arbel, eqe, sizeof ( *eqe ) );
  1292. break;
  1293. }
  1294. /* Return ownership to hardware */
  1295. MLX_FILL_1 ( &eqe->generic, 7, owner, 1 );
  1296. barrier();
  1297. /* Update event queue's index */
  1298. arbel_eq->next_idx++;
  1299. /* Ring doorbell */
  1300. MLX_FILL_1 ( &db_reg.ci, 0, ci, arbel_eq->next_idx );
  1301. DBGCP ( arbel, "Ringing doorbell %08lx with %08lx\n",
  1302. virt_to_phys ( arbel_eq->doorbell ),
  1303. db_reg.dword[0] );
  1304. writel ( db_reg.dword[0], arbel_eq->doorbell );
  1305. }
  1306. }
  1307. /***************************************************************************
  1308. *
  1309. * Infiniband link-layer operations
  1310. *
  1311. ***************************************************************************
  1312. */
  1313. /**
  1314. * Initialise Infiniband link
  1315. *
  1316. * @v ibdev Infiniband device
  1317. * @ret rc Return status code
  1318. */
  1319. static int arbel_open ( struct ib_device *ibdev ) {
  1320. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1321. struct arbelprm_init_ib init_ib;
  1322. int rc;
  1323. memset ( &init_ib, 0, sizeof ( init_ib ) );
  1324. MLX_FILL_3 ( &init_ib, 0,
  1325. mtu_cap, ARBEL_MTU_2048,
  1326. port_width_cap, 3,
  1327. vl_cap, 1 );
  1328. MLX_FILL_1 ( &init_ib, 1, max_gid, 1 );
  1329. MLX_FILL_1 ( &init_ib, 2, max_pkey, 64 );
  1330. if ( ( rc = arbel_cmd_init_ib ( arbel, ibdev->port,
  1331. &init_ib ) ) != 0 ) {
  1332. DBGC ( arbel, "Arbel %p could not intialise IB: %s\n",
  1333. arbel, strerror ( rc ) );
  1334. return rc;
  1335. }
  1336. return 0;
  1337. }
  1338. /**
  1339. * Close Infiniband link
  1340. *
  1341. * @v ibdev Infiniband device
  1342. */
  1343. static void arbel_close ( struct ib_device *ibdev ) {
  1344. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1345. int rc;
  1346. if ( ( rc = arbel_cmd_close_ib ( arbel, ibdev->port ) ) != 0 ) {
  1347. DBGC ( arbel, "Arbel %p could not close IB: %s\n",
  1348. arbel, strerror ( rc ) );
  1349. /* Nothing we can do about this */
  1350. }
  1351. }
  1352. /***************************************************************************
  1353. *
  1354. * Multicast group operations
  1355. *
  1356. ***************************************************************************
  1357. */
  1358. /**
  1359. * Attach to multicast group
  1360. *
  1361. * @v ibdev Infiniband device
  1362. * @v qp Queue pair
  1363. * @v gid Multicast GID
  1364. * @ret rc Return status code
  1365. */
  1366. static int arbel_mcast_attach ( struct ib_device *ibdev,
  1367. struct ib_queue_pair *qp,
  1368. struct ib_gid *gid ) {
  1369. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1370. struct arbelprm_mgm_hash hash;
  1371. struct arbelprm_mgm_entry mgm;
  1372. unsigned int index;
  1373. int rc;
  1374. /* Generate hash table index */
  1375. if ( ( rc = arbel_cmd_mgid_hash ( arbel, gid, &hash ) ) != 0 ) {
  1376. DBGC ( arbel, "Arbel %p could not hash GID: %s\n",
  1377. arbel, strerror ( rc ) );
  1378. return rc;
  1379. }
  1380. index = MLX_GET ( &hash, hash );
  1381. /* Check for existing hash table entry */
  1382. if ( ( rc = arbel_cmd_read_mgm ( arbel, index, &mgm ) ) != 0 ) {
  1383. DBGC ( arbel, "Arbel %p could not read MGM %#x: %s\n",
  1384. arbel, index, strerror ( rc ) );
  1385. return rc;
  1386. }
  1387. if ( MLX_GET ( &mgm, mgmqp_0.qi ) != 0 ) {
  1388. /* FIXME: this implementation allows only a single QP
  1389. * per multicast group, and doesn't handle hash
  1390. * collisions. Sufficient for IPoIB but may need to
  1391. * be extended in future.
  1392. */
  1393. DBGC ( arbel, "Arbel %p MGID index %#x already in use\n",
  1394. arbel, index );
  1395. return -EBUSY;
  1396. }
  1397. /* Update hash table entry */
  1398. MLX_FILL_2 ( &mgm, 8,
  1399. mgmqp_0.qpn_i, qp->qpn,
  1400. mgmqp_0.qi, 1 );
  1401. memcpy ( &mgm.u.dwords[4], gid, sizeof ( *gid ) );
  1402. if ( ( rc = arbel_cmd_write_mgm ( arbel, index, &mgm ) ) != 0 ) {
  1403. DBGC ( arbel, "Arbel %p could not write MGM %#x: %s\n",
  1404. arbel, index, strerror ( rc ) );
  1405. return rc;
  1406. }
  1407. return 0;
  1408. }
  1409. /**
  1410. * Detach from multicast group
  1411. *
  1412. * @v ibdev Infiniband device
  1413. * @v qp Queue pair
  1414. * @v gid Multicast GID
  1415. */
  1416. static void arbel_mcast_detach ( struct ib_device *ibdev,
  1417. struct ib_queue_pair *qp __unused,
  1418. struct ib_gid *gid ) {
  1419. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1420. struct arbelprm_mgm_hash hash;
  1421. struct arbelprm_mgm_entry mgm;
  1422. unsigned int index;
  1423. int rc;
  1424. /* Generate hash table index */
  1425. if ( ( rc = arbel_cmd_mgid_hash ( arbel, gid, &hash ) ) != 0 ) {
  1426. DBGC ( arbel, "Arbel %p could not hash GID: %s\n",
  1427. arbel, strerror ( rc ) );
  1428. return;
  1429. }
  1430. index = MLX_GET ( &hash, hash );
  1431. /* Clear hash table entry */
  1432. memset ( &mgm, 0, sizeof ( mgm ) );
  1433. if ( ( rc = arbel_cmd_write_mgm ( arbel, index, &mgm ) ) != 0 ) {
  1434. DBGC ( arbel, "Arbel %p could not write MGM %#x: %s\n",
  1435. arbel, index, strerror ( rc ) );
  1436. return;
  1437. }
  1438. }
  1439. /***************************************************************************
  1440. *
  1441. * MAD operations
  1442. *
  1443. ***************************************************************************
  1444. */
  1445. /**
  1446. * Issue management datagram
  1447. *
  1448. * @v ibdev Infiniband device
  1449. * @v mad Management datagram
  1450. * @v len Length of management datagram
  1451. * @ret rc Return status code
  1452. */
  1453. static int arbel_mad ( struct ib_device *ibdev, struct ib_mad_hdr *mad,
  1454. size_t len ) {
  1455. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1456. union arbelprm_mad mad_ifc;
  1457. int rc;
  1458. /* Copy in request packet */
  1459. memset ( &mad_ifc, 0, sizeof ( mad_ifc ) );
  1460. assert ( len <= sizeof ( mad_ifc.mad ) );
  1461. memcpy ( &mad_ifc.mad, mad, len );
  1462. /* Issue MAD */
  1463. if ( ( rc = arbel_cmd_mad_ifc ( arbel, ibdev->port,
  1464. &mad_ifc ) ) != 0 ) {
  1465. DBGC ( arbel, "Arbel %p could not issue MAD IFC: %s\n",
  1466. arbel, strerror ( rc ) );
  1467. return rc;
  1468. }
  1469. /* Copy out reply packet */
  1470. memcpy ( mad, &mad_ifc.mad, len );
  1471. if ( mad->status != 0 ) {
  1472. DBGC ( arbel, "Arbel %p MAD IFC status %04x\n",
  1473. arbel, ntohs ( mad->status ) );
  1474. return -EIO;
  1475. }
  1476. return 0;
  1477. }
  1478. /** Arbel Infiniband operations */
  1479. static struct ib_device_operations arbel_ib_operations = {
  1480. .create_cq = arbel_create_cq,
  1481. .destroy_cq = arbel_destroy_cq,
  1482. .create_qp = arbel_create_qp,
  1483. .modify_qp = arbel_modify_qp,
  1484. .destroy_qp = arbel_destroy_qp,
  1485. .post_send = arbel_post_send,
  1486. .post_recv = arbel_post_recv,
  1487. .poll_cq = arbel_poll_cq,
  1488. .poll_eq = arbel_poll_eq,
  1489. .open = arbel_open,
  1490. .close = arbel_close,
  1491. .mcast_attach = arbel_mcast_attach,
  1492. .mcast_detach = arbel_mcast_detach,
  1493. .mad = arbel_mad,
  1494. };
  1495. /***************************************************************************
  1496. *
  1497. * Firmware control
  1498. *
  1499. ***************************************************************************
  1500. */
  1501. /**
  1502. * Start firmware running
  1503. *
  1504. * @v arbel Arbel device
  1505. * @ret rc Return status code
  1506. */
  1507. static int arbel_start_firmware ( struct arbel *arbel ) {
  1508. struct arbelprm_query_fw fw;
  1509. struct arbelprm_access_lam lam;
  1510. struct arbelprm_virtual_physical_mapping map_fa;
  1511. unsigned int fw_pages;
  1512. unsigned int log2_fw_pages;
  1513. size_t fw_size;
  1514. physaddr_t fw_base;
  1515. uint64_t eq_set_ci_base_addr;
  1516. int rc;
  1517. /* Get firmware parameters */
  1518. if ( ( rc = arbel_cmd_query_fw ( arbel, &fw ) ) != 0 ) {
  1519. DBGC ( arbel, "Arbel %p could not query firmware: %s\n",
  1520. arbel, strerror ( rc ) );
  1521. goto err_query_fw;
  1522. }
  1523. DBGC ( arbel, "Arbel %p firmware version %ld.%ld.%ld\n", arbel,
  1524. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  1525. MLX_GET ( &fw, fw_rev_subminor ) );
  1526. fw_pages = MLX_GET ( &fw, fw_pages );
  1527. log2_fw_pages = fls ( fw_pages - 1 );
  1528. fw_pages = ( 1 << log2_fw_pages );
  1529. DBGC ( arbel, "Arbel %p requires %d kB for firmware\n",
  1530. arbel, ( fw_pages * 4 ) );
  1531. eq_set_ci_base_addr =
  1532. ( ( (uint64_t) MLX_GET ( &fw, eq_set_ci_base_addr_h ) << 32 ) |
  1533. ( (uint64_t) MLX_GET ( &fw, eq_set_ci_base_addr_l ) ) );
  1534. arbel->eq_ci_doorbells = ioremap ( eq_set_ci_base_addr, 0x200 );
  1535. /* Enable locally-attached memory. Ignore failure; there may
  1536. * be no attached memory.
  1537. */
  1538. arbel_cmd_enable_lam ( arbel, &lam );
  1539. /* Allocate firmware pages and map firmware area */
  1540. fw_size = ( fw_pages * 4096 );
  1541. arbel->firmware_area = umalloc ( fw_size * 2 );
  1542. if ( ! arbel->firmware_area ) {
  1543. rc = -ENOMEM;
  1544. goto err_alloc_fa;
  1545. }
  1546. fw_base = ( user_to_phys ( arbel->firmware_area, fw_size ) &
  1547. ~( fw_size - 1 ) );
  1548. DBGC ( arbel, "Arbel %p firmware area at physical [%lx,%lx)\n",
  1549. arbel, fw_base, ( fw_base + fw_size ) );
  1550. memset ( &map_fa, 0, sizeof ( map_fa ) );
  1551. MLX_FILL_2 ( &map_fa, 3,
  1552. log2size, log2_fw_pages,
  1553. pa_l, ( fw_base >> 12 ) );
  1554. if ( ( rc = arbel_cmd_map_fa ( arbel, &map_fa ) ) != 0 ) {
  1555. DBGC ( arbel, "Arbel %p could not map firmware: %s\n",
  1556. arbel, strerror ( rc ) );
  1557. goto err_map_fa;
  1558. }
  1559. /* Start firmware */
  1560. if ( ( rc = arbel_cmd_run_fw ( arbel ) ) != 0 ) {
  1561. DBGC ( arbel, "Arbel %p could not run firmware: %s\n",
  1562. arbel, strerror ( rc ) );
  1563. goto err_run_fw;
  1564. }
  1565. DBGC ( arbel, "Arbel %p firmware started\n", arbel );
  1566. return 0;
  1567. err_run_fw:
  1568. arbel_cmd_unmap_fa ( arbel );
  1569. err_map_fa:
  1570. ufree ( arbel->firmware_area );
  1571. arbel->firmware_area = UNULL;
  1572. err_alloc_fa:
  1573. err_query_fw:
  1574. return rc;
  1575. }
  1576. /**
  1577. * Stop firmware running
  1578. *
  1579. * @v arbel Arbel device
  1580. */
  1581. static void arbel_stop_firmware ( struct arbel *arbel ) {
  1582. int rc;
  1583. if ( ( rc = arbel_cmd_unmap_fa ( arbel ) ) != 0 ) {
  1584. DBGC ( arbel, "Arbel %p FATAL could not stop firmware: %s\n",
  1585. arbel, strerror ( rc ) );
  1586. /* Leak memory and return; at least we avoid corruption */
  1587. return;
  1588. }
  1589. ufree ( arbel->firmware_area );
  1590. arbel->firmware_area = UNULL;
  1591. }
  1592. /***************************************************************************
  1593. *
  1594. * Infinihost Context Memory management
  1595. *
  1596. ***************************************************************************
  1597. */
  1598. /**
  1599. * Get device limits
  1600. *
  1601. * @v arbel Arbel device
  1602. * @ret rc Return status code
  1603. */
  1604. static int arbel_get_limits ( struct arbel *arbel ) {
  1605. struct arbelprm_query_dev_lim dev_lim;
  1606. int rc;
  1607. if ( ( rc = arbel_cmd_query_dev_lim ( arbel, &dev_lim ) ) != 0 ) {
  1608. DBGC ( arbel, "Arbel %p could not get device limits: %s\n",
  1609. arbel, strerror ( rc ) );
  1610. return rc;
  1611. }
  1612. arbel->limits.reserved_qps =
  1613. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_qps ) );
  1614. arbel->limits.qpc_entry_size = MLX_GET ( &dev_lim, qpc_entry_sz );
  1615. arbel->limits.eqpc_entry_size = MLX_GET ( &dev_lim, eqpc_entry_sz );
  1616. arbel->limits.reserved_srqs =
  1617. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_srqs ) );
  1618. arbel->limits.srqc_entry_size = MLX_GET ( &dev_lim, srq_entry_sz );
  1619. arbel->limits.reserved_ees =
  1620. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_ees ) );
  1621. arbel->limits.eec_entry_size = MLX_GET ( &dev_lim, eec_entry_sz );
  1622. arbel->limits.eeec_entry_size = MLX_GET ( &dev_lim, eeec_entry_sz );
  1623. arbel->limits.reserved_cqs =
  1624. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_cqs ) );
  1625. arbel->limits.cqc_entry_size = MLX_GET ( &dev_lim, cqc_entry_sz );
  1626. arbel->limits.reserved_eqs = MLX_GET ( &dev_lim, num_rsvd_eqs );
  1627. arbel->limits.reserved_mtts =
  1628. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_mtts ) );
  1629. arbel->limits.mtt_entry_size = MLX_GET ( &dev_lim, mtt_entry_sz );
  1630. arbel->limits.reserved_mrws =
  1631. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_mrws ) );
  1632. arbel->limits.mpt_entry_size = MLX_GET ( &dev_lim, mpt_entry_sz );
  1633. arbel->limits.reserved_rdbs =
  1634. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_rdbs ) );
  1635. arbel->limits.eqc_entry_size = MLX_GET ( &dev_lim, eqc_entry_sz );
  1636. arbel->limits.reserved_uars = MLX_GET ( &dev_lim, num_rsvd_uars );
  1637. return 0;
  1638. }
  1639. /**
  1640. * Get ICM usage
  1641. *
  1642. * @v log_num_entries Log2 of the number of entries
  1643. * @v entry_size Entry size
  1644. * @ret usage Usage size in ICM
  1645. */
  1646. static size_t icm_usage ( unsigned int log_num_entries, size_t entry_size ) {
  1647. size_t usage;
  1648. usage = ( ( 1 << log_num_entries ) * entry_size );
  1649. usage = ( ( usage + 4095 ) & ~4095 );
  1650. return usage;
  1651. }
  1652. /**
  1653. * Allocate ICM
  1654. *
  1655. * @v arbel Arbel device
  1656. * @v init_hca INIT_HCA structure to fill in
  1657. * @ret rc Return status code
  1658. */
  1659. static int arbel_alloc_icm ( struct arbel *arbel,
  1660. struct arbelprm_init_hca *init_hca ) {
  1661. struct arbelprm_scalar_parameter icm_size;
  1662. struct arbelprm_scalar_parameter icm_aux_size;
  1663. struct arbelprm_virtual_physical_mapping map_icm_aux;
  1664. struct arbelprm_virtual_physical_mapping map_icm;
  1665. union arbelprm_doorbell_record *db_rec;
  1666. size_t icm_offset = 0;
  1667. unsigned int log_num_qps, log_num_srqs, log_num_ees, log_num_cqs;
  1668. unsigned int log_num_mtts, log_num_mpts, log_num_rdbs, log_num_eqs;
  1669. int rc;
  1670. icm_offset = ( ( arbel->limits.reserved_uars + 1 ) << 12 );
  1671. /* Queue pair contexts */
  1672. log_num_qps = fls ( arbel->limits.reserved_qps + ARBEL_MAX_QPS - 1 );
  1673. MLX_FILL_2 ( init_hca, 13,
  1674. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  1675. ( icm_offset >> 7 ),
  1676. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  1677. log_num_qps );
  1678. DBGC ( arbel, "Arbel %p ICM QPC base = %zx\n", arbel, icm_offset );
  1679. icm_offset += icm_usage ( log_num_qps, arbel->limits.qpc_entry_size );
  1680. /* Extended queue pair contexts */
  1681. MLX_FILL_1 ( init_hca, 25,
  1682. qpc_eec_cqc_eqc_rdb_parameters.eqpc_base_addr_l,
  1683. icm_offset );
  1684. DBGC ( arbel, "Arbel %p ICM EQPC base = %zx\n", arbel, icm_offset );
  1685. // icm_offset += icm_usage ( log_num_qps, arbel->limits.eqpc_entry_size );
  1686. icm_offset += icm_usage ( log_num_qps, arbel->limits.qpc_entry_size );
  1687. /* Shared receive queue contexts */
  1688. log_num_srqs = fls ( arbel->limits.reserved_srqs - 1 );
  1689. MLX_FILL_2 ( init_hca, 19,
  1690. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  1691. ( icm_offset >> 5 ),
  1692. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  1693. log_num_srqs );
  1694. DBGC ( arbel, "Arbel %p ICM SRQC base = %zx\n", arbel, icm_offset );
  1695. icm_offset += icm_usage ( log_num_srqs, arbel->limits.srqc_entry_size );
  1696. /* End-to-end contexts */
  1697. log_num_ees = fls ( arbel->limits.reserved_ees - 1 );
  1698. MLX_FILL_2 ( init_hca, 17,
  1699. qpc_eec_cqc_eqc_rdb_parameters.eec_base_addr_l,
  1700. ( icm_offset >> 7 ),
  1701. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_ee,
  1702. log_num_ees );
  1703. DBGC ( arbel, "Arbel %p ICM EEC base = %zx\n", arbel, icm_offset );
  1704. icm_offset += icm_usage ( log_num_ees, arbel->limits.eec_entry_size );
  1705. /* Extended end-to-end contexts */
  1706. MLX_FILL_1 ( init_hca, 29,
  1707. qpc_eec_cqc_eqc_rdb_parameters.eeec_base_addr_l,
  1708. icm_offset );
  1709. DBGC ( arbel, "Arbel %p ICM EEEC base = %zx\n", arbel, icm_offset );
  1710. icm_offset += icm_usage ( log_num_ees, arbel->limits.eeec_entry_size );
  1711. /* Completion queue contexts */
  1712. log_num_cqs = fls ( arbel->limits.reserved_cqs + ARBEL_MAX_CQS - 1 );
  1713. MLX_FILL_2 ( init_hca, 21,
  1714. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  1715. ( icm_offset >> 6 ),
  1716. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  1717. log_num_cqs );
  1718. DBGC ( arbel, "Arbel %p ICM CQC base = %zx\n", arbel, icm_offset );
  1719. icm_offset += icm_usage ( log_num_cqs, arbel->limits.cqc_entry_size );
  1720. /* Memory translation table */
  1721. log_num_mtts = fls ( arbel->limits.reserved_mtts - 1 );
  1722. MLX_FILL_1 ( init_hca, 65,
  1723. tpt_parameters.mtt_base_addr_l, icm_offset );
  1724. DBGC ( arbel, "Arbel %p ICM MTT base = %zx\n", arbel, icm_offset );
  1725. icm_offset += icm_usage ( log_num_mtts, arbel->limits.mtt_entry_size );
  1726. /* Memory protection table */
  1727. log_num_mpts = fls ( arbel->limits.reserved_mrws + 1 - 1 );
  1728. MLX_FILL_1 ( init_hca, 61,
  1729. tpt_parameters.mpt_base_adr_l, icm_offset );
  1730. MLX_FILL_1 ( init_hca, 62,
  1731. tpt_parameters.log_mpt_sz, log_num_mpts );
  1732. DBGC ( arbel, "Arbel %p ICM MTT base = %zx\n", arbel, icm_offset );
  1733. icm_offset += icm_usage ( log_num_mpts, arbel->limits.mpt_entry_size );
  1734. /* RDMA something or other */
  1735. log_num_rdbs = fls ( arbel->limits.reserved_rdbs - 1 );
  1736. MLX_FILL_1 ( init_hca, 37,
  1737. qpc_eec_cqc_eqc_rdb_parameters.rdb_base_addr_l,
  1738. icm_offset );
  1739. DBGC ( arbel, "Arbel %p ICM RDB base = %zx\n", arbel, icm_offset );
  1740. icm_offset += icm_usage ( log_num_rdbs, 32 );
  1741. /* Event queue contexts */
  1742. log_num_eqs = fls ( arbel->limits.reserved_eqs + ARBEL_MAX_EQS - 1 );
  1743. MLX_FILL_2 ( init_hca, 33,
  1744. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  1745. ( icm_offset >> 6 ),
  1746. qpc_eec_cqc_eqc_rdb_parameters.log_num_eq,
  1747. log_num_eqs );
  1748. DBGC ( arbel, "Arbel %p ICM EQ base = %zx\n", arbel, icm_offset );
  1749. icm_offset += ( ( 1 << log_num_eqs ) * arbel->limits.eqc_entry_size );
  1750. /* Multicast table */
  1751. MLX_FILL_1 ( init_hca, 49,
  1752. multicast_parameters.mc_base_addr_l, icm_offset );
  1753. MLX_FILL_1 ( init_hca, 52,
  1754. multicast_parameters.log_mc_table_entry_sz,
  1755. fls ( sizeof ( struct arbelprm_mgm_entry ) - 1 ) );
  1756. MLX_FILL_1 ( init_hca, 53,
  1757. multicast_parameters.mc_table_hash_sz, 8 );
  1758. MLX_FILL_1 ( init_hca, 54,
  1759. multicast_parameters.log_mc_table_sz, 3 );
  1760. DBGC ( arbel, "Arbel %p ICM MC base = %zx\n", arbel, icm_offset );
  1761. icm_offset += ( 8 * sizeof ( struct arbelprm_mgm_entry ) );
  1762. arbel->icm_len = icm_offset;
  1763. arbel->icm_len = ( ( arbel->icm_len + 4095 ) & ~4095 );
  1764. /* Get ICM auxiliary area size */
  1765. memset ( &icm_size, 0, sizeof ( icm_size ) );
  1766. MLX_FILL_1 ( &icm_size, 1, value, arbel->icm_len );
  1767. if ( ( rc = arbel_cmd_set_icm_size ( arbel, &icm_size,
  1768. &icm_aux_size ) ) != 0 ) {
  1769. DBGC ( arbel, "Arbel %p could not set ICM size: %s\n",
  1770. arbel, strerror ( rc ) );
  1771. goto err_set_icm_size;
  1772. }
  1773. arbel->icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * 4096 );
  1774. /* Allocate ICM data and auxiliary area */
  1775. DBGC ( arbel, "Arbel %p requires %zd kB ICM and %zd kB AUX ICM\n",
  1776. arbel, ( arbel->icm_len / 1024 ),
  1777. ( arbel->icm_aux_len / 1024 ) );
  1778. arbel->icm = umalloc ( arbel->icm_len + arbel->icm_aux_len );
  1779. if ( ! arbel->icm ) {
  1780. rc = -ENOMEM;
  1781. goto err_alloc;
  1782. }
  1783. /* Map ICM auxiliary area */
  1784. memset ( &map_icm_aux, 0, sizeof ( map_icm_aux ) );
  1785. MLX_FILL_2 ( &map_icm_aux, 3,
  1786. log2size, fls ( ( arbel->icm_aux_len / 4096 ) - 1 ),
  1787. pa_l,
  1788. ( user_to_phys ( arbel->icm, arbel->icm_len ) >> 12 ) );
  1789. if ( ( rc = arbel_cmd_map_icm_aux ( arbel, &map_icm_aux ) ) != 0 ) {
  1790. DBGC ( arbel, "Arbel %p could not map AUX ICM: %s\n",
  1791. arbel, strerror ( rc ) );
  1792. goto err_map_icm_aux;
  1793. }
  1794. /* MAP ICM area */
  1795. memset ( &map_icm, 0, sizeof ( map_icm ) );
  1796. MLX_FILL_2 ( &map_icm, 3,
  1797. log2size, fls ( ( arbel->icm_len / 4096 ) - 1 ),
  1798. pa_l, ( user_to_phys ( arbel->icm, 0 ) >> 12 ) );
  1799. if ( ( rc = arbel_cmd_map_icm ( arbel, &map_icm ) ) != 0 ) {
  1800. DBGC ( arbel, "Arbel %p could not map ICM: %s\n",
  1801. arbel, strerror ( rc ) );
  1802. goto err_map_icm;
  1803. }
  1804. /* Initialise UAR context */
  1805. arbel->db_rec = phys_to_virt ( user_to_phys ( arbel->icm, 0 ) +
  1806. ( arbel->limits.reserved_uars *
  1807. ARBEL_PAGE_SIZE ) );
  1808. memset ( arbel->db_rec, 0, ARBEL_PAGE_SIZE );
  1809. db_rec = &arbel->db_rec[ARBEL_GROUP_SEPARATOR_DOORBELL];
  1810. MLX_FILL_1 ( &db_rec->qp, 1, res, ARBEL_UAR_RES_GROUP_SEP );
  1811. return 0;
  1812. arbel_cmd_unmap_icm ( arbel, ( arbel->icm_len / 4096 ) );
  1813. err_map_icm:
  1814. arbel_cmd_unmap_icm_aux ( arbel );
  1815. err_map_icm_aux:
  1816. ufree ( arbel->icm );
  1817. arbel->icm = UNULL;
  1818. err_alloc:
  1819. err_set_icm_size:
  1820. return rc;
  1821. }
  1822. /**
  1823. * Free ICM
  1824. *
  1825. * @v arbel Arbel device
  1826. */
  1827. static void arbel_free_icm ( struct arbel *arbel ) {
  1828. arbel_cmd_unmap_icm ( arbel, ( arbel->icm_len / 4096 ) );
  1829. arbel_cmd_unmap_icm_aux ( arbel );
  1830. ufree ( arbel->icm );
  1831. arbel->icm = UNULL;
  1832. }
  1833. /***************************************************************************
  1834. *
  1835. * PCI interface
  1836. *
  1837. ***************************************************************************
  1838. */
  1839. /**
  1840. * Set up memory protection table
  1841. *
  1842. * @v arbel Arbel device
  1843. * @ret rc Return status code
  1844. */
  1845. static int arbel_setup_mpt ( struct arbel *arbel ) {
  1846. struct arbelprm_mpt mpt;
  1847. uint32_t key;
  1848. int rc;
  1849. /* Derive key */
  1850. key = ( arbel->limits.reserved_mrws | ARBEL_MKEY_PREFIX );
  1851. arbel->reserved_lkey = ( ( key << 8 ) | ( key >> 24 ) );
  1852. /* Initialise memory protection table */
  1853. memset ( &mpt, 0, sizeof ( mpt ) );
  1854. MLX_FILL_4 ( &mpt, 0,
  1855. r_w, 1,
  1856. pa, 1,
  1857. lr, 1,
  1858. lw, 1 );
  1859. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  1860. MLX_FILL_1 ( &mpt, 3, pd, ARBEL_GLOBAL_PD );
  1861. MLX_FILL_1 ( &mpt, 6, reg_wnd_len_h, 0xffffffffUL );
  1862. MLX_FILL_1 ( &mpt, 7, reg_wnd_len_l, 0xffffffffUL );
  1863. if ( ( rc = arbel_cmd_sw2hw_mpt ( arbel, arbel->limits.reserved_mrws,
  1864. &mpt ) ) != 0 ) {
  1865. DBGC ( arbel, "Arbel %p could not set up MPT: %s\n",
  1866. arbel, strerror ( rc ) );
  1867. return rc;
  1868. }
  1869. return 0;
  1870. }
  1871. /**
  1872. * Probe PCI device
  1873. *
  1874. * @v pci PCI device
  1875. * @v id PCI ID
  1876. * @ret rc Return status code
  1877. */
  1878. static int arbel_probe ( struct pci_device *pci,
  1879. const struct pci_device_id *id __unused ) {
  1880. struct arbel *arbel;
  1881. struct ib_device *ibdev;
  1882. struct arbelprm_init_hca init_hca;
  1883. int i;
  1884. int rc;
  1885. /* Allocate Arbel device */
  1886. arbel = zalloc ( sizeof ( *arbel ) );
  1887. if ( ! arbel ) {
  1888. rc = -ENOMEM;
  1889. goto err_alloc_arbel;
  1890. }
  1891. pci_set_drvdata ( pci, arbel );
  1892. /* Allocate Infiniband devices */
  1893. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ ) {
  1894. ibdev = alloc_ibdev ( 0 );
  1895. if ( ! ibdev ) {
  1896. rc = -ENOMEM;
  1897. goto err_alloc_ibdev;
  1898. }
  1899. arbel->ibdev[i] = ibdev;
  1900. ibdev->op = &arbel_ib_operations;
  1901. ibdev->dev = &pci->dev;
  1902. ibdev->port = ( ARBEL_PORT_BASE + i );
  1903. ib_set_drvdata ( ibdev, arbel );
  1904. }
  1905. /* Fix up PCI device */
  1906. adjust_pci_device ( pci );
  1907. /* Get PCI BARs */
  1908. arbel->config = ioremap ( pci_bar_start ( pci, ARBEL_PCI_CONFIG_BAR ),
  1909. ARBEL_PCI_CONFIG_BAR_SIZE );
  1910. arbel->uar = ioremap ( ( pci_bar_start ( pci, ARBEL_PCI_UAR_BAR ) +
  1911. ARBEL_PCI_UAR_IDX * ARBEL_PCI_UAR_SIZE ),
  1912. ARBEL_PCI_UAR_SIZE );
  1913. /* Allocate space for mailboxes */
  1914. arbel->mailbox_in = malloc_dma ( ARBEL_MBOX_SIZE, ARBEL_MBOX_ALIGN );
  1915. if ( ! arbel->mailbox_in ) {
  1916. rc = -ENOMEM;
  1917. goto err_mailbox_in;
  1918. }
  1919. arbel->mailbox_out = malloc_dma ( ARBEL_MBOX_SIZE, ARBEL_MBOX_ALIGN );
  1920. if ( ! arbel->mailbox_out ) {
  1921. rc = -ENOMEM;
  1922. goto err_mailbox_out;
  1923. }
  1924. /* Start firmware */
  1925. if ( ( rc = arbel_start_firmware ( arbel ) ) != 0 )
  1926. goto err_start_firmware;
  1927. /* Get device limits */
  1928. if ( ( rc = arbel_get_limits ( arbel ) ) != 0 )
  1929. goto err_get_limits;
  1930. /* Allocate ICM */
  1931. memset ( &init_hca, 0, sizeof ( init_hca ) );
  1932. if ( ( rc = arbel_alloc_icm ( arbel, &init_hca ) ) != 0 )
  1933. goto err_alloc_icm;
  1934. /* Initialise HCA */
  1935. MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 1 );
  1936. if ( ( rc = arbel_cmd_init_hca ( arbel, &init_hca ) ) != 0 ) {
  1937. DBGC ( arbel, "Arbel %p could not initialise HCA: %s\n",
  1938. arbel, strerror ( rc ) );
  1939. goto err_init_hca;
  1940. }
  1941. /* Set up memory protection */
  1942. if ( ( rc = arbel_setup_mpt ( arbel ) ) != 0 )
  1943. goto err_setup_mpt;
  1944. /* Set up event queue */
  1945. if ( ( rc = arbel_create_eq ( arbel ) ) != 0 )
  1946. goto err_create_eq;
  1947. /* Register Infiniband devices */
  1948. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ ) {
  1949. if ( ( rc = register_ibdev ( arbel->ibdev[i] ) ) != 0 ) {
  1950. DBGC ( arbel, "Arbel %p could not register IB "
  1951. "device: %s\n", arbel, strerror ( rc ) );
  1952. goto err_register_ibdev;
  1953. }
  1954. }
  1955. return 0;
  1956. i = ARBEL_NUM_PORTS;
  1957. err_register_ibdev:
  1958. for ( i-- ; i >= 0 ; i-- )
  1959. unregister_ibdev ( arbel->ibdev[i] );
  1960. arbel_destroy_eq ( arbel );
  1961. err_create_eq:
  1962. err_setup_mpt:
  1963. arbel_cmd_close_hca ( arbel );
  1964. err_init_hca:
  1965. arbel_free_icm ( arbel );
  1966. err_alloc_icm:
  1967. err_get_limits:
  1968. arbel_stop_firmware ( arbel );
  1969. err_start_firmware:
  1970. free_dma ( arbel->mailbox_out, ARBEL_MBOX_SIZE );
  1971. err_mailbox_out:
  1972. free_dma ( arbel->mailbox_in, ARBEL_MBOX_SIZE );
  1973. err_mailbox_in:
  1974. i = ARBEL_NUM_PORTS;
  1975. err_alloc_ibdev:
  1976. for ( i-- ; i >= 0 ; i-- )
  1977. ibdev_put ( arbel->ibdev[i] );
  1978. free ( arbel );
  1979. err_alloc_arbel:
  1980. return rc;
  1981. }
  1982. /**
  1983. * Remove PCI device
  1984. *
  1985. * @v pci PCI device
  1986. */
  1987. static void arbel_remove ( struct pci_device *pci ) {
  1988. struct arbel *arbel = pci_get_drvdata ( pci );
  1989. int i;
  1990. for ( i = ( ARBEL_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
  1991. unregister_ibdev ( arbel->ibdev[i] );
  1992. arbel_destroy_eq ( arbel );
  1993. arbel_cmd_close_hca ( arbel );
  1994. arbel_free_icm ( arbel );
  1995. arbel_stop_firmware ( arbel );
  1996. arbel_stop_firmware ( arbel );
  1997. free_dma ( arbel->mailbox_out, ARBEL_MBOX_SIZE );
  1998. free_dma ( arbel->mailbox_in, ARBEL_MBOX_SIZE );
  1999. for ( i = ( ARBEL_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
  2000. ibdev_put ( arbel->ibdev[i] );
  2001. free ( arbel );
  2002. }
  2003. static struct pci_device_id arbel_nics[] = {
  2004. PCI_ROM ( 0x15b3, 0x6282, "mt25218", "MT25218 HCA driver" ),
  2005. PCI_ROM ( 0x15b3, 0x6274, "mt25204", "MT25204 HCA driver" ),
  2006. };
  2007. struct pci_driver arbel_driver __pci_driver = {
  2008. .ids = arbel_nics,
  2009. .id_count = ( sizeof ( arbel_nics ) / sizeof ( arbel_nics[0] ) ),
  2010. .probe = arbel_probe,
  2011. .remove = arbel_remove,
  2012. };