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3c515.c 24KB

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  1. /*
  2. * 3c515.c -- 3COM 3C515 Fast Etherlink ISA 10/100BASE-TX driver for etherboot
  3. * Copyright (C) 2002 Timothy Legge <tlegge@rogers.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. *
  19. * Portions of this code:
  20. * Copyright (C) 1997-2002 Donald Becker 3c515.c: A 3Com ISA EtherLink XL "Corkscrew" ethernet driver for linux.
  21. * Copyright (C) 2001 P.J.H.Fox (fox@roestock.demon.co.uk) ISAPNP Tools
  22. * Copyright (c) 2002 Jaroslav Kysela <perex@suse.cz> ISA Plug & Play support Linux Kernel
  23. * Copyright (C) 2000 Shusuke Nisiyama <shu@athena.qe.eng.hokudai.ac.jp> etherboot-5.0.5 3c595.c
  24. * Coptright (C) 1995 Martin Renters etherboot-5.0.5 3c509.c
  25. * Copyright (C) 1999 LightSys Technology Services, Inc. etherboot-5.0.5 3c90x.c
  26. * Portions Copyright (C) 1999 Steve Smith etherboot-5.0.5 3c90x.c
  27. *
  28. * The probe and reset functions and defines are direct copies from the
  29. * Becker code modified where necessary to make it work for etherboot
  30. *
  31. * The poll and transmit functions either contain code from or were written by referencing
  32. * the above referenced etherboot drivers. This driver would not have been
  33. * possible without this prior work
  34. *
  35. * REVISION HISTORY:
  36. * ================
  37. * v0.10 4-17-2002 TJL Initial implementation.
  38. * v0.11 4-17-2002 TJL Cleanup of the code
  39. * v0.12 4-26-2002 TJL Added ISA Plug and Play for Non-PNP Bioses
  40. * v0.13 6-10-2002 TJL Fixed ISA_PNP MAC Address problem
  41. * v0.14 9-23-2003 TJL Replaced delay with currticks
  42. *
  43. * Indent Options: indent -kr -i8
  44. * *********************************************************/
  45. /* to get some global routines like printf */
  46. #include "etherboot.h"
  47. /* to get the interface to the body of the program */
  48. #include "nic.h"
  49. #include <gpxe/isapnp.h>
  50. #include <gpxe/isa.h> /* for ISA_ROM */
  51. #include <gpxe/ethernet.h>
  52. static void t3c515_wait(unsigned int nticks)
  53. {
  54. unsigned int to = currticks() + nticks;
  55. while (currticks() < to)
  56. /* wait */ ;
  57. }
  58. /* TJL definations */
  59. #define HZ 100
  60. static int if_port;
  61. static struct corkscrew_private *vp;
  62. /* Brought directly from 3c515.c by Becker */
  63. #define CORKSCREW 1
  64. /* Maximum events (Rx packets, etc.) to handle at each interrupt.
  65. static int max_interrupt_work = 20;
  66. */
  67. /* Enable the automatic media selection code -- usually set. */
  68. #define AUTOMEDIA 1
  69. /* Allow the use of fragment bus master transfers instead of only
  70. programmed-I/O for Vortex cards. Full-bus-master transfers are always
  71. enabled by default on Boomerang cards. If VORTEX_BUS_MASTER is defined,
  72. the feature may be turned on using 'options'. */
  73. #define VORTEX_BUS_MASTER
  74. /* A few values that may be tweaked. */
  75. /* Keep the ring sizes a power of two for efficiency. */
  76. #define TX_RING_SIZE 16
  77. #define RX_RING_SIZE 16
  78. #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
  79. /* "Knobs" for adjusting internal parameters. */
  80. /* Put out somewhat more debugging messages. (0 - no msg, 1 minimal msgs). */
  81. #define DRIVER_DEBUG 1
  82. /* Some values here only for performance evaluation and path-coverage
  83. debugging.
  84. static int rx_nocopy, rx_copy, queued_packet;
  85. */
  86. #define CORKSCREW_ID 10
  87. #define EL3WINDOW(win_num) \
  88. outw(SelectWindow + (win_num), nic->ioaddr + EL3_CMD)
  89. #define EL3_CMD 0x0e
  90. #define EL3_STATUS 0x0e
  91. #define RX_BYTES_MASK (unsigned short) (0x07ff)
  92. enum corkscrew_cmd {
  93. TotalReset = 0 << 11, SelectWindow = 1 << 11, StartCoax = 2 << 11,
  94. RxDisable = 3 << 11, RxEnable = 4 << 11, RxReset = 5 << 11,
  95. UpStall = 6 << 11, UpUnstall = (6 << 11) + 1,
  96. DownStall = (6 << 11) + 2, DownUnstall = (6 << 11) + 3,
  97. RxDiscard = 8 << 11, TxEnable = 9 << 11, TxDisable =
  98. 10 << 11, TxReset = 11 << 11,
  99. FakeIntr = 12 << 11, AckIntr = 13 << 11, SetIntrEnb = 14 << 11,
  100. SetStatusEnb = 15 << 11, SetRxFilter = 16 << 11, SetRxThreshold =
  101. 17 << 11,
  102. SetTxThreshold = 18 << 11, SetTxStart = 19 << 11,
  103. StartDMAUp = 20 << 11, StartDMADown = (20 << 11) + 1, StatsEnable =
  104. 21 << 11,
  105. StatsDisable = 22 << 11, StopCoax = 23 << 11,
  106. };
  107. /* The SetRxFilter command accepts the following classes: */
  108. enum RxFilter {
  109. RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8
  110. };
  111. /* Bits in the general status register. */
  112. enum corkscrew_status {
  113. IntLatch = 0x0001, AdapterFailure = 0x0002, TxComplete = 0x0004,
  114. TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
  115. IntReq = 0x0040, StatsFull = 0x0080,
  116. DMADone = 1 << 8, DownComplete = 1 << 9, UpComplete = 1 << 10,
  117. DMAInProgress = 1 << 11, /* DMA controller is still busy. */
  118. CmdInProgress = 1 << 12, /* EL3_CMD is still busy. */
  119. };
  120. /* Register window 1 offsets, the window used in normal operation.
  121. On the Corkscrew this window is always mapped at offsets 0x10-0x1f. */
  122. enum Window1 {
  123. TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
  124. RxStatus = 0x18, Timer = 0x1A, TxStatus = 0x1B,
  125. TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
  126. };
  127. enum Window0 {
  128. Wn0IRQ = 0x08,
  129. #if defined(CORKSCREW)
  130. Wn0EepromCmd = 0x200A, /* Corkscrew EEPROM command register. */
  131. Wn0EepromData = 0x200C, /* Corkscrew EEPROM results register. */
  132. #else
  133. Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
  134. Wn0EepromData = 12, /* Window 0: EEPROM results register. */
  135. #endif
  136. };
  137. enum Win0_EEPROM_bits {
  138. EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
  139. EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
  140. EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
  141. };
  142. enum Window3 { /* Window 3: MAC/config bits. */
  143. Wn3_Config = 0, Wn3_MAC_Ctrl = 6, Wn3_Options = 8,
  144. };
  145. union wn3_config {
  146. int i;
  147. struct w3_config_fields {
  148. unsigned int ram_size:3, ram_width:1, ram_speed:2,
  149. rom_size:2;
  150. int pad8:8;
  151. unsigned int ram_split:2, pad18:2, xcvr:3, pad21:1,
  152. autoselect:1;
  153. int pad24:7;
  154. } u;
  155. };
  156. enum Window4 {
  157. Wn4_NetDiag = 6, Wn4_Media = 10, /* Window 4: Xcvr/media bits. */
  158. };
  159. enum Win4_Media_bits {
  160. Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
  161. Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
  162. Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
  163. Media_LnkBeat = 0x0800,
  164. };
  165. enum Window7 { /* Window 7: Bus Master control. */
  166. Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,
  167. };
  168. /* Boomerang-style bus master control registers. Note ISA aliases! */
  169. enum MasterCtrl {
  170. PktStatus = 0x400, DownListPtr = 0x404, FragAddr = 0x408, FragLen =
  171. 0x40c,
  172. TxFreeThreshold = 0x40f, UpPktStatus = 0x410, UpListPtr = 0x418,
  173. };
  174. /* The Rx and Tx descriptor lists.
  175. Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
  176. alignment contraint on tx_ring[] and rx_ring[]. */
  177. struct boom_rx_desc {
  178. u32 next;
  179. s32 status;
  180. u32 addr;
  181. s32 length;
  182. };
  183. /* Values for the Rx status entry. */
  184. enum rx_desc_status {
  185. RxDComplete = 0x00008000, RxDError = 0x4000,
  186. /* See boomerang_rx() for actual error bits */
  187. };
  188. struct boom_tx_desc {
  189. u32 next;
  190. s32 status;
  191. u32 addr;
  192. s32 length;
  193. };
  194. struct corkscrew_private {
  195. const char *product_name;
  196. struct net_device *next_module;
  197. /* The Rx and Tx rings are here to keep them quad-word-aligned. */
  198. struct boom_rx_desc rx_ring[RX_RING_SIZE];
  199. struct boom_tx_desc tx_ring[TX_RING_SIZE];
  200. /* The addresses of transmit- and receive-in-place skbuffs. */
  201. struct sk_buff *rx_skbuff[RX_RING_SIZE];
  202. struct sk_buff *tx_skbuff[TX_RING_SIZE];
  203. unsigned int cur_rx, cur_tx; /* The next free ring entry */
  204. unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
  205. struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
  206. int capabilities; /* Adapter capabilities word. */
  207. int options; /* User-settable misc. driver options. */
  208. int last_rx_packets; /* For media autoselection. */
  209. unsigned int available_media:8, /* From Wn3_Options */
  210. media_override:3, /* Passed-in media type. */
  211. default_media:3, /* Read from the EEPROM. */
  212. full_duplex:1, autoselect:1, bus_master:1, /* Vortex can only do a fragment bus-m. */
  213. full_bus_master_tx:1, full_bus_master_rx:1, /* Boomerang */
  214. tx_full:1;
  215. };
  216. /* The action to take with a media selection timer tick.
  217. Note that we deviate from the 3Com order by checking 10base2 before AUI.
  218. */
  219. enum xcvr_types {
  220. XCVR_10baseT =
  221. 0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
  222. XCVR_100baseFx, XCVR_MII = 6, XCVR_Default = 8,
  223. };
  224. static struct media_table {
  225. char *name;
  226. unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
  227. mask:8, /* The transceiver-present bit in Wn3_Config. */
  228. next:8; /* The media type to try next. */
  229. short wait; /* Time before we check media status. */
  230. } media_tbl[] = {
  231. {
  232. "10baseT", Media_10TP, 0x08, XCVR_10base2, (14 * HZ) / 10}
  233. , {
  234. "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1 * HZ) / 10}
  235. , {
  236. "undefined", 0, 0x80, XCVR_10baseT, 10000}
  237. , {
  238. "10base2", 0, 0x10, XCVR_AUI, (1 * HZ) / 10}
  239. , {
  240. "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx,
  241. (14 * HZ) / 10}
  242. , {
  243. "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14 * HZ) / 10}
  244. , {
  245. "MII", 0, 0x40, XCVR_10baseT, 3 * HZ}
  246. , {
  247. "undefined", 0, 0x01, XCVR_10baseT, 10000}
  248. , {
  249. "Default", 0, 0xFF, XCVR_10baseT, 10000}
  250. ,};
  251. /* TILEG Modified to remove reference to dev */
  252. static int corkscrew_found_device(int ioaddr, int irq, int product_index,
  253. int options, struct nic *nic);
  254. static int corkscrew_probe1(int ioaddr, int irq, int product_index,
  255. struct nic *nic);
  256. /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
  257. /* Note: this is the only limit on the number of cards supported!! */
  258. static int options = -1;
  259. /* End Brought directly from 3c515.c by Becker */
  260. /**************************************************************************
  261. RESET - Reset adapter
  262. ***************************************************************************/
  263. static void t515_reset(struct nic *nic)
  264. {
  265. union wn3_config config;
  266. int i;
  267. /* Before initializing select the active media port. */
  268. EL3WINDOW(3);
  269. if (vp->full_duplex)
  270. outb(0x20, nic->ioaddr + Wn3_MAC_Ctrl); /* Set the full-duplex bit. */
  271. config.i = inl(nic->ioaddr + Wn3_Config);
  272. if (vp->media_override != 7) {
  273. DBG ( "Media override to transceiver %d (%s).\n",
  274. vp->media_override,
  275. media_tbl[vp->media_override].name);
  276. if_port = vp->media_override;
  277. } else if (vp->autoselect) {
  278. /* Find first available media type, starting with 100baseTx. */
  279. if_port = 4;
  280. while (!(vp->available_media & media_tbl[if_port].mask))
  281. if_port = media_tbl[if_port].next;
  282. DBG ( "Initial media type %s.\n",
  283. media_tbl[if_port].name);
  284. } else
  285. if_port = vp->default_media;
  286. config.u.xcvr = if_port;
  287. outl(config.i, nic->ioaddr + Wn3_Config);
  288. DBG ( "corkscrew_open() InternalConfig 0x%hX.\n",
  289. config.i);
  290. outw(TxReset, nic->ioaddr + EL3_CMD);
  291. for (i = 20; i >= 0; i--)
  292. if (!(inw(nic->ioaddr + EL3_STATUS) & CmdInProgress))
  293. break;
  294. outw(RxReset, nic->ioaddr + EL3_CMD);
  295. /* Wait a few ticks for the RxReset command to complete. */
  296. for (i = 20; i >= 0; i--)
  297. if (!(inw(nic->ioaddr + EL3_STATUS) & CmdInProgress))
  298. break;
  299. outw(SetStatusEnb | 0x00, nic->ioaddr + EL3_CMD);
  300. #ifdef debug_3c515
  301. EL3WINDOW(4);
  302. DBG ( "FIXME: fix print for irq, not 9" );
  303. DBG ( "corkscrew_open() irq %d media status 0x%hX.\n",
  304. 9, inw(nic->ioaddr + Wn4_Media) );
  305. #endif
  306. /* Set the station address and mask in window 2 each time opened. */
  307. EL3WINDOW(2);
  308. for (i = 0; i < 6; i++)
  309. outb(nic->node_addr[i], nic->ioaddr + i);
  310. for (; i < 12; i += 2)
  311. outw(0, nic->ioaddr + i);
  312. if (if_port == 3)
  313. /* Start the thinnet transceiver. We should really wait 50ms... */
  314. outw(StartCoax, nic->ioaddr + EL3_CMD);
  315. EL3WINDOW(4);
  316. outw((inw(nic->ioaddr + Wn4_Media) & ~(Media_10TP | Media_SQE)) |
  317. media_tbl[if_port].media_bits, nic->ioaddr + Wn4_Media);
  318. /* Switch to the stats window, and clear all stats by reading. */
  319. /* outw(StatsDisable, nic->ioaddr + EL3_CMD);*/
  320. EL3WINDOW(6);
  321. for (i = 0; i < 10; i++)
  322. inb(nic->ioaddr + i);
  323. inw(nic->ioaddr + 10);
  324. inw(nic->ioaddr + 12);
  325. /* New: On the Vortex we must also clear the BadSSD counter. */
  326. EL3WINDOW(4);
  327. inb(nic->ioaddr + 12);
  328. /* ..and on the Boomerang we enable the extra statistics bits. */
  329. outw(0x0040, nic->ioaddr + Wn4_NetDiag);
  330. /* Switch to register set 7 for normal use. */
  331. EL3WINDOW(7);
  332. /* Temporarily left in place. If these FIXMEs are printed
  333. it meand that special logic for that card may need to be added
  334. see Becker's 3c515.c driver */
  335. if (vp->full_bus_master_rx) { /* Boomerang bus master. */
  336. printf("FIXME: Is this if necessary");
  337. vp->cur_rx = vp->dirty_rx = 0;
  338. DBG ( " Filling in the Rx ring.\n" );
  339. for (i = 0; i < RX_RING_SIZE; i++) {
  340. printf("FIXME: Is this if necessary");
  341. }
  342. }
  343. if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
  344. vp->cur_tx = vp->dirty_tx = 0;
  345. outb(PKT_BUF_SZ >> 8, nic->ioaddr + TxFreeThreshold); /* Room for a packet. */
  346. /* Clear the Tx ring. */
  347. for (i = 0; i < TX_RING_SIZE; i++)
  348. vp->tx_skbuff[i] = 0;
  349. outl(0, nic->ioaddr + DownListPtr);
  350. }
  351. /* Set receiver mode: presumably accept b-case and phys addr only. */
  352. outw(SetRxFilter | RxStation | RxMulticast | RxBroadcast | RxProm,
  353. nic->ioaddr + EL3_CMD);
  354. outw(RxEnable, nic->ioaddr + EL3_CMD); /* Enable the receiver. */
  355. outw(TxEnable, nic->ioaddr + EL3_CMD); /* Enable transmitter. */
  356. /* Allow status bits to be seen. */
  357. outw(SetStatusEnb | AdapterFailure | IntReq | StatsFull |
  358. (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
  359. (vp->full_bus_master_rx ? UpComplete : RxComplete) |
  360. (vp->bus_master ? DMADone : 0), nic->ioaddr + EL3_CMD);
  361. /* Ack all pending events, and set active indicator mask. */
  362. outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
  363. nic->ioaddr + EL3_CMD);
  364. outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete | StatsFull
  365. | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete,
  366. nic->ioaddr + EL3_CMD);
  367. }
  368. /**************************************************************************
  369. POLL - Wait for a frame
  370. ***************************************************************************/
  371. static int t515_poll(struct nic *nic, int retrieve)
  372. {
  373. short status, cst;
  374. register short rx_fifo;
  375. cst = inw(nic->ioaddr + EL3_STATUS);
  376. if ((cst & RxComplete) == 0) {
  377. /* Ack all pending events, and set active indicator mask. */
  378. outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
  379. nic->ioaddr + EL3_CMD);
  380. outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete |
  381. StatsFull | (vp->
  382. bus_master ? DMADone : 0) | UpComplete |
  383. DownComplete, nic->ioaddr + EL3_CMD);
  384. return 0;
  385. }
  386. status = inw(nic->ioaddr + RxStatus);
  387. if (status & RxDError) {
  388. printf("RxDError\n");
  389. outw(RxDiscard, nic->ioaddr + EL3_CMD);
  390. return 0;
  391. }
  392. rx_fifo = status & RX_BYTES_MASK;
  393. if (rx_fifo == 0)
  394. return 0;
  395. if ( ! retrieve ) return 1;
  396. DBG ( "[l=%d", rx_fifo );
  397. insw(nic->ioaddr + RX_FIFO, nic->packet, rx_fifo / 2);
  398. if (rx_fifo & 1)
  399. nic->packet[rx_fifo - 1] = inb(nic->ioaddr + RX_FIFO);
  400. nic->packetlen = rx_fifo;
  401. while (1) {
  402. status = inw(nic->ioaddr + RxStatus);
  403. DBG ( "0x%hX*", status );
  404. rx_fifo = status & RX_BYTES_MASK;
  405. if (rx_fifo > 0) {
  406. insw(nic->ioaddr + RX_FIFO, nic->packet + nic->packetlen,
  407. rx_fifo / 2);
  408. if (rx_fifo & 1)
  409. nic->packet[nic->packetlen + rx_fifo - 1] =
  410. inb(nic->ioaddr + RX_FIFO);
  411. nic->packetlen += rx_fifo;
  412. DBG ( "+%d", rx_fifo );
  413. }
  414. if ((status & RxComplete) == 0) {
  415. DBG ( "=%d", nic->packetlen );
  416. break;
  417. }
  418. udelay(1000);
  419. }
  420. /* acknowledge reception of packet */
  421. outw(RxDiscard, nic->ioaddr + EL3_CMD);
  422. while (inw(nic->ioaddr + EL3_STATUS) & CmdInProgress);
  423. #ifdef debug_3c515
  424. {
  425. unsigned short type = 0;
  426. type = (nic->packet[12] << 8) | nic->packet[13];
  427. if (nic->packet[0] + nic->packet[1] + nic->packet[2] +
  428. nic->packet[3] + nic->packet[4] + nic->packet[5] ==
  429. 0xFF * ETH_ALEN)
  430. DBG ( ",t=0x%hX,b]", type );
  431. else
  432. DBG ( ",t=0x%hX]", type );
  433. }
  434. #endif
  435. return 1;
  436. }
  437. /*************************************************************************
  438. 3Com 515 - specific routines
  439. **************************************************************************/
  440. static char padmap[] = {
  441. 0, 3, 2, 1
  442. };
  443. /**************************************************************************
  444. TRANSMIT - Transmit a frame
  445. ***************************************************************************/
  446. static void t515_transmit(struct nic *nic, const char *d, /* Destination */
  447. unsigned int t, /* Type */
  448. unsigned int s, /* size */
  449. const char *p)
  450. { /* Packet */
  451. register int len;
  452. int pad;
  453. int status;
  454. DBG ( "{l=%d,t=0x%hX}", s + ETH_HLEN, t );
  455. /* swap bytes of type */
  456. t = htons(t);
  457. len = s + ETH_HLEN; /* actual length of packet */
  458. pad = padmap[len & 3];
  459. /*
  460. * The 3c515 automatically pads short packets to minimum ethernet length,
  461. * but we drop packets that are too large. Perhaps we should truncate
  462. * them instead?
  463. Copied from 3c595. Is this true for the 3c515?
  464. */
  465. if (len + pad > ETH_FRAME_LEN) {
  466. return;
  467. }
  468. /* drop acknowledgements */
  469. while ((status = inb(nic->ioaddr + TxStatus)) & TxComplete) {
  470. /*if(status & (TXS_UNDERRUN|0x88|TXS_STATUS_OVERFLOW)) { */
  471. outw(TxReset, nic->ioaddr + EL3_CMD);
  472. outw(TxEnable, nic->ioaddr + EL3_CMD);
  473. /* } */
  474. outb(0x0, nic->ioaddr + TxStatus);
  475. }
  476. while (inw(nic->ioaddr + TxFree) < len + pad + 4) {
  477. /* no room in FIFO */
  478. }
  479. outw(len, nic->ioaddr + TX_FIFO);
  480. outw(0x0, nic->ioaddr + TX_FIFO); /* Second dword meaningless */
  481. /* write packet */
  482. outsw(nic->ioaddr + TX_FIFO, d, ETH_ALEN / 2);
  483. outsw(nic->ioaddr + TX_FIFO, nic->node_addr, ETH_ALEN / 2);
  484. outw(t, nic->ioaddr + TX_FIFO);
  485. outsw(nic->ioaddr + TX_FIFO, p, s / 2);
  486. if (s & 1)
  487. outb(*(p + s - 1), nic->ioaddr + TX_FIFO);
  488. while (pad--)
  489. outb(0, nic->ioaddr + TX_FIFO); /* Padding */
  490. /* wait for Tx complete */
  491. while ((inw(nic->ioaddr + EL3_STATUS) & CmdInProgress) != 0);
  492. }
  493. /**************************************************************************
  494. DISABLE - Turn off ethernet interface
  495. ***************************************************************************/
  496. static void t515_disable ( struct nic *nic,
  497. struct isapnp_device *isapnp ) {
  498. t515_reset(nic);
  499. /* This is a hack. Since ltsp worked on my
  500. system without any disable functionality I
  501. have no way to determine if this works */
  502. /* Disable the receiver and transmitter. */
  503. outw(RxDisable, nic->ioaddr + EL3_CMD);
  504. outw(TxDisable, nic->ioaddr + EL3_CMD);
  505. if (if_port == XCVR_10base2)
  506. /* Turn off thinnet power. Green! */
  507. outw(StopCoax, nic->ioaddr + EL3_CMD);
  508. outw(SetIntrEnb | 0x0000, nic->ioaddr + EL3_CMD);
  509. deactivate_isapnp_device ( isapnp );
  510. return;
  511. }
  512. static void t515_irq(struct nic *nic __unused, irq_action_t action __unused)
  513. {
  514. switch ( action ) {
  515. case DISABLE :
  516. break;
  517. case ENABLE :
  518. break;
  519. case FORCE :
  520. break;
  521. }
  522. }
  523. static struct nic_operations t515_operations = {
  524. .connect = dummy_connect,
  525. .poll = t515_poll,
  526. .transmit = t515_transmit,
  527. .irq = t515_irq,
  528. };
  529. /**************************************************************************
  530. PROBE - Look for an adapter, this routine's visible to the outside
  531. You should omit the last argument struct pci_device * for a non-PCI NIC
  532. ***************************************************************************/
  533. static int t515_probe ( struct nic *nic, struct isapnp_device *isapnp ) {
  534. /* Direct copy from Beckers 3c515.c removing any ISAPNP sections */
  535. nic->ioaddr = isapnp->ioaddr;
  536. nic->irqno = isapnp->irqno;
  537. activate_isapnp_device ( isapnp );
  538. /* Check the resource configuration for a matching ioaddr. */
  539. if ((unsigned)(inw(nic->ioaddr + 0x2002) & 0x1f0)
  540. != (nic->ioaddr & 0x1f0)) {
  541. DBG ( "3c515 ioaddr mismatch\n" );
  542. return 0;
  543. }
  544. /* Verify by reading the device ID from the EEPROM. */
  545. {
  546. int timer;
  547. outw(EEPROM_Read + 7, nic->ioaddr + Wn0EepromCmd);
  548. /* Pause for at least 162 us. for the read to take place. */
  549. for (timer = 4; timer >= 0; timer--) {
  550. t3c515_wait(1);
  551. if ((inw(nic->ioaddr + Wn0EepromCmd) & 0x0200) == 0)
  552. break;
  553. }
  554. if (inw(nic->ioaddr + Wn0EepromData) != 0x6d50) {
  555. DBG ( "3c515 read incorrect vendor ID from EEPROM" );
  556. return 0;
  557. }
  558. }
  559. DBG ( "3c515 Resource configuration register 0x%lX, DCR 0x%hX.\n",
  560. inl(nic->ioaddr + 0x2002), inw(nic->ioaddr + 0x2000) );
  561. corkscrew_found_device(nic->ioaddr, nic->irqno, CORKSCREW_ID,
  562. options, nic);
  563. t515_reset(nic);
  564. nic->nic_op = &t515_operations;
  565. return 1;
  566. }
  567. static int
  568. corkscrew_found_device(int ioaddr, int irq,
  569. int product_index, int options, struct nic *nic)
  570. {
  571. /* Direct copy from Becker 3c515.c with unecessary parts removed */
  572. vp->product_name = "3c515";
  573. vp->options = options;
  574. if (options >= 0) {
  575. vp->media_override =
  576. ((options & 7) == 2) ? 0 : options & 7;
  577. vp->full_duplex = (options & 8) ? 1 : 0;
  578. vp->bus_master = (options & 16) ? 1 : 0;
  579. } else {
  580. vp->media_override = 7;
  581. vp->full_duplex = 0;
  582. vp->bus_master = 0;
  583. }
  584. corkscrew_probe1(ioaddr, irq, product_index, nic);
  585. return 0;
  586. }
  587. static int
  588. corkscrew_probe1(int ioaddr, int irq, int product_index __unused,
  589. struct nic *nic)
  590. {
  591. unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
  592. int i;
  593. printf("3Com %s at 0x%hX, ", vp->product_name, ioaddr);
  594. /* Read the station address from the EEPROM. */
  595. EL3WINDOW(0);
  596. for (i = 0; i < 0x18; i++) {
  597. short *phys_addr = (short *) nic->node_addr;
  598. int timer;
  599. outw(EEPROM_Read + i, ioaddr + Wn0EepromCmd);
  600. /* Pause for at least 162 us. for the read to take place. */
  601. for (timer = 4; timer >= 0; timer--) {
  602. t3c515_wait(1);
  603. if ((inw(ioaddr + Wn0EepromCmd) & 0x0200) == 0)
  604. break;
  605. }
  606. eeprom[i] = inw(ioaddr + Wn0EepromData);
  607. DBG ( "Value %d: %hX ", i, eeprom[i] );
  608. checksum ^= eeprom[i];
  609. if (i < 3)
  610. phys_addr[i] = htons(eeprom[i]);
  611. }
  612. checksum = (checksum ^ (checksum >> 8)) & 0xff;
  613. if (checksum != 0x00)
  614. printf(" ***INVALID CHECKSUM 0x%hX*** ", checksum);
  615. DBG ( "%s", eth_ntoa ( nic->node_addr ) );
  616. if (eeprom[16] == 0x11c7) { /* Corkscrew */
  617. }
  618. printf(", IRQ %d\n", irq);
  619. /* Tell them about an invalid IRQ. */
  620. if ( (irq <= 0 || irq > 15) ) {
  621. DBG (" *** Warning: this IRQ is unlikely to work! ***\n" );
  622. }
  623. {
  624. char *ram_split[] = { "5:3", "3:1", "1:1", "3:5" };
  625. union wn3_config config;
  626. EL3WINDOW(3);
  627. vp->available_media = inw(ioaddr + Wn3_Options);
  628. config.i = inl(ioaddr + Wn3_Config);
  629. DBG ( " Internal config register is %4.4x, "
  630. "transceivers 0x%hX.\n",
  631. config.i, inw(ioaddr + Wn3_Options) );
  632. printf
  633. (" %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
  634. 8 << config.u.ram_size,
  635. config.u.ram_width ? "word" : "byte",
  636. ram_split[config.u.ram_split],
  637. config.u.autoselect ? "autoselect/" : "",
  638. media_tbl[config.u.xcvr].name);
  639. if_port = config.u.xcvr;
  640. vp->default_media = config.u.xcvr;
  641. vp->autoselect = config.u.autoselect;
  642. }
  643. if (vp->media_override != 7) {
  644. printf(" Media override to transceiver type %d (%s).\n",
  645. vp->media_override,
  646. media_tbl[vp->media_override].name);
  647. if_port = vp->media_override;
  648. }
  649. vp->capabilities = eeprom[16];
  650. vp->full_bus_master_tx = (vp->capabilities & 0x20) ? 1 : 0;
  651. /* Rx is broken at 10mbps, so we always disable it. */
  652. /* vp->full_bus_master_rx = 0; */
  653. vp->full_bus_master_rx = (vp->capabilities & 0x20) ? 1 : 0;
  654. return 0;
  655. }
  656. static struct isapnp_device_id t515_adapters[] = {
  657. { "3c515 (ISAPnP)", ISAPNP_VENDOR('T','C','M'), 0x5051 },
  658. };
  659. ISAPNP_DRIVER ( t515_driver, t515_adapters );
  660. DRIVER ( "3c515", nic_driver, isapnp_driver, t515_driver,
  661. t515_probe, t515_disable );
  662. ISA_ROM ( "3c515", "3c515 Fast EtherLink ISAPnP" );