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hermon.c 103KB

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  1. /*
  2. * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
  3. * Copyright (C) 2008 Mellanox Technologies Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of the
  8. * License, or any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. FILE_LICENCE ( GPL2_OR_LATER );
  20. #include <stdint.h>
  21. #include <stdlib.h>
  22. #include <stdio.h>
  23. #include <string.h>
  24. #include <strings.h>
  25. #include <unistd.h>
  26. #include <errno.h>
  27. #include <byteswap.h>
  28. #include <ipxe/io.h>
  29. #include <ipxe/pci.h>
  30. #include <ipxe/pcibackup.h>
  31. #include <ipxe/malloc.h>
  32. #include <ipxe/umalloc.h>
  33. #include <ipxe/iobuf.h>
  34. #include <ipxe/netdevice.h>
  35. #include <ipxe/infiniband.h>
  36. #include <ipxe/ib_smc.h>
  37. #include <ipxe/if_ether.h>
  38. #include <ipxe/ethernet.h>
  39. #include <ipxe/fcoe.h>
  40. #include <ipxe/vlan.h>
  41. #include "hermon.h"
  42. /**
  43. * @file
  44. *
  45. * Mellanox Hermon Infiniband HCA
  46. *
  47. */
  48. /***************************************************************************
  49. *
  50. * Queue number allocation
  51. *
  52. ***************************************************************************
  53. */
  54. /**
  55. * Allocate offsets within usage bitmask
  56. *
  57. * @v bits Usage bitmask
  58. * @v bits_len Length of usage bitmask
  59. * @v num_bits Number of contiguous bits to allocate within bitmask
  60. * @ret bit First free bit within bitmask, or negative error
  61. */
  62. static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
  63. unsigned int bits_len,
  64. unsigned int num_bits ) {
  65. unsigned int bit = 0;
  66. hermon_bitmask_t mask = 1;
  67. unsigned int found = 0;
  68. /* Search bits for num_bits contiguous free bits */
  69. while ( bit < bits_len ) {
  70. if ( ( mask & *bits ) == 0 ) {
  71. if ( ++found == num_bits )
  72. goto found;
  73. } else {
  74. found = 0;
  75. }
  76. bit++;
  77. mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
  78. if ( mask == 1 )
  79. bits++;
  80. }
  81. return -ENFILE;
  82. found:
  83. /* Mark bits as in-use */
  84. do {
  85. *bits |= mask;
  86. if ( mask == 1 )
  87. bits--;
  88. mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
  89. } while ( --found );
  90. return ( bit - num_bits + 1 );
  91. }
  92. /**
  93. * Free offsets within usage bitmask
  94. *
  95. * @v bits Usage bitmask
  96. * @v bit Starting bit within bitmask
  97. * @v num_bits Number of contiguous bits to free within bitmask
  98. */
  99. static void hermon_bitmask_free ( hermon_bitmask_t *bits,
  100. int bit, unsigned int num_bits ) {
  101. hermon_bitmask_t mask;
  102. for ( ; num_bits ; bit++, num_bits-- ) {
  103. mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
  104. bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
  105. }
  106. }
  107. /***************************************************************************
  108. *
  109. * HCA commands
  110. *
  111. ***************************************************************************
  112. */
  113. /**
  114. * Wait for Hermon command completion
  115. *
  116. * @v hermon Hermon device
  117. * @v hcr HCA command registers
  118. * @ret rc Return status code
  119. */
  120. static int hermon_cmd_wait ( struct hermon *hermon,
  121. struct hermonprm_hca_command_register *hcr ) {
  122. unsigned int wait;
  123. for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  124. hcr->u.dwords[6] =
  125. readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
  126. if ( ( MLX_GET ( hcr, go ) == 0 ) &&
  127. ( MLX_GET ( hcr, t ) == hermon->toggle ) )
  128. return 0;
  129. mdelay ( 1 );
  130. }
  131. return -EBUSY;
  132. }
  133. /**
  134. * Issue HCA command
  135. *
  136. * @v hermon Hermon device
  137. * @v command Command opcode, flags and input/output lengths
  138. * @v op_mod Opcode modifier (0 if no modifier applicable)
  139. * @v in Input parameters
  140. * @v in_mod Input modifier (0 if no modifier applicable)
  141. * @v out Output parameters
  142. * @ret rc Return status code
  143. */
  144. static int hermon_cmd ( struct hermon *hermon, unsigned long command,
  145. unsigned int op_mod, const void *in,
  146. unsigned int in_mod, void *out ) {
  147. struct hermonprm_hca_command_register hcr;
  148. unsigned int opcode = HERMON_HCR_OPCODE ( command );
  149. size_t in_len = HERMON_HCR_IN_LEN ( command );
  150. size_t out_len = HERMON_HCR_OUT_LEN ( command );
  151. void *in_buffer;
  152. void *out_buffer;
  153. unsigned int status;
  154. unsigned int i;
  155. int rc;
  156. assert ( in_len <= HERMON_MBOX_SIZE );
  157. assert ( out_len <= HERMON_MBOX_SIZE );
  158. DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
  159. hermon, opcode, in_len,
  160. ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  161. ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  162. /* Check that HCR is free */
  163. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  164. DBGC ( hermon, "Hermon %p command interface locked\n",
  165. hermon );
  166. return rc;
  167. }
  168. /* Flip HCR toggle */
  169. hermon->toggle = ( 1 - hermon->toggle );
  170. /* Prepare HCR */
  171. memset ( &hcr, 0, sizeof ( hcr ) );
  172. in_buffer = &hcr.u.dwords[0];
  173. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  174. memset ( hermon->mailbox_in, 0, HERMON_MBOX_SIZE );
  175. in_buffer = hermon->mailbox_in;
  176. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  177. }
  178. memcpy ( in_buffer, in, in_len );
  179. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  180. out_buffer = &hcr.u.dwords[3];
  181. if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
  182. out_buffer = hermon->mailbox_out;
  183. MLX_FILL_1 ( &hcr, 4, out_param_l,
  184. virt_to_bus ( out_buffer ) );
  185. }
  186. MLX_FILL_4 ( &hcr, 6,
  187. opcode, opcode,
  188. opcode_modifier, op_mod,
  189. go, 1,
  190. t, hermon->toggle );
  191. DBGC ( hermon, "Hermon %p issuing command %04x\n",
  192. hermon, opcode );
  193. DBGC2_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  194. &hcr, sizeof ( hcr ) );
  195. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  196. DBGC2 ( hermon, "Input mailbox:\n" );
  197. DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
  198. ( ( in_len < 512 ) ? in_len : 512 ) );
  199. }
  200. /* Issue command */
  201. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  202. i++ ) {
  203. writel ( hcr.u.dwords[i],
  204. hermon->config + HERMON_HCR_REG ( i ) );
  205. barrier();
  206. }
  207. /* Wait for command completion */
  208. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  209. DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
  210. hermon );
  211. DBGC_HDA ( hermon,
  212. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  213. &hcr, sizeof ( hcr ) );
  214. return rc;
  215. }
  216. /* Check command status */
  217. status = MLX_GET ( &hcr, status );
  218. if ( status != 0 ) {
  219. DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
  220. hermon, status );
  221. DBGC_HDA ( hermon,
  222. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  223. &hcr, sizeof ( hcr ) );
  224. return -EIO;
  225. }
  226. /* Read output parameters, if any */
  227. hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
  228. hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
  229. memcpy ( out, out_buffer, out_len );
  230. if ( out_len ) {
  231. DBGC2 ( hermon, "Output%s:\n",
  232. ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
  233. DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
  234. ( ( out_len < 512 ) ? out_len : 512 ) );
  235. }
  236. return 0;
  237. }
  238. static inline int
  239. hermon_cmd_query_dev_cap ( struct hermon *hermon,
  240. struct hermonprm_query_dev_cap *dev_cap ) {
  241. return hermon_cmd ( hermon,
  242. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
  243. 1, sizeof ( *dev_cap ) ),
  244. 0, NULL, 0, dev_cap );
  245. }
  246. static inline int
  247. hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
  248. return hermon_cmd ( hermon,
  249. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
  250. 1, sizeof ( *fw ) ),
  251. 0, NULL, 0, fw );
  252. }
  253. static inline int
  254. hermon_cmd_init_hca ( struct hermon *hermon,
  255. const struct hermonprm_init_hca *init_hca ) {
  256. return hermon_cmd ( hermon,
  257. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
  258. 1, sizeof ( *init_hca ) ),
  259. 0, init_hca, 0, NULL );
  260. }
  261. static inline int
  262. hermon_cmd_close_hca ( struct hermon *hermon ) {
  263. return hermon_cmd ( hermon,
  264. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
  265. 0, NULL, 0, NULL );
  266. }
  267. static inline int
  268. hermon_cmd_init_port ( struct hermon *hermon, unsigned int port ) {
  269. return hermon_cmd ( hermon,
  270. HERMON_HCR_VOID_CMD ( HERMON_HCR_INIT_PORT ),
  271. 0, NULL, port, NULL );
  272. }
  273. static inline int
  274. hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
  275. return hermon_cmd ( hermon,
  276. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
  277. 0, NULL, port, NULL );
  278. }
  279. static inline int
  280. hermon_cmd_set_port ( struct hermon *hermon, int is_ethernet,
  281. unsigned int port_selector,
  282. const union hermonprm_set_port *set_port ) {
  283. return hermon_cmd ( hermon,
  284. HERMON_HCR_IN_CMD ( HERMON_HCR_SET_PORT,
  285. 1, sizeof ( *set_port ) ),
  286. is_ethernet, set_port, port_selector, NULL );
  287. }
  288. static inline int
  289. hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
  290. const struct hermonprm_mpt *mpt ) {
  291. return hermon_cmd ( hermon,
  292. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
  293. 1, sizeof ( *mpt ) ),
  294. 0, mpt, index, NULL );
  295. }
  296. static inline int
  297. hermon_cmd_write_mtt ( struct hermon *hermon,
  298. const struct hermonprm_write_mtt *write_mtt ) {
  299. return hermon_cmd ( hermon,
  300. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
  301. 1, sizeof ( *write_mtt ) ),
  302. 0, write_mtt, 1, NULL );
  303. }
  304. static inline int
  305. hermon_cmd_map_eq ( struct hermon *hermon, unsigned long index_map,
  306. const struct hermonprm_event_mask *mask ) {
  307. return hermon_cmd ( hermon,
  308. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_EQ,
  309. 0, sizeof ( *mask ) ),
  310. 0, mask, index_map, NULL );
  311. }
  312. static inline int
  313. hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
  314. const struct hermonprm_eqc *eqctx ) {
  315. return hermon_cmd ( hermon,
  316. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
  317. 1, sizeof ( *eqctx ) ),
  318. 0, eqctx, index, NULL );
  319. }
  320. static inline int
  321. hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index,
  322. struct hermonprm_eqc *eqctx ) {
  323. return hermon_cmd ( hermon,
  324. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_EQ,
  325. 1, sizeof ( *eqctx ) ),
  326. 1, NULL, index, eqctx );
  327. }
  328. static inline int
  329. hermon_cmd_query_eq ( struct hermon *hermon, unsigned int index,
  330. struct hermonprm_eqc *eqctx ) {
  331. return hermon_cmd ( hermon,
  332. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_EQ,
  333. 1, sizeof ( *eqctx ) ),
  334. 0, NULL, index, eqctx );
  335. }
  336. static inline int
  337. hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
  338. const struct hermonprm_completion_queue_context *cqctx ){
  339. return hermon_cmd ( hermon,
  340. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
  341. 1, sizeof ( *cqctx ) ),
  342. 0, cqctx, cqn, NULL );
  343. }
  344. static inline int
  345. hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
  346. struct hermonprm_completion_queue_context *cqctx ) {
  347. return hermon_cmd ( hermon,
  348. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
  349. 1, sizeof ( *cqctx ) ),
  350. 0, NULL, cqn, cqctx );
  351. }
  352. static inline int
  353. hermon_cmd_query_cq ( struct hermon *hermon, unsigned long cqn,
  354. struct hermonprm_completion_queue_context *cqctx ) {
  355. return hermon_cmd ( hermon,
  356. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_CQ,
  357. 1, sizeof ( *cqctx ) ),
  358. 0, NULL, cqn, cqctx );
  359. }
  360. static inline int
  361. hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
  362. const struct hermonprm_qp_ee_state_transitions *ctx ){
  363. return hermon_cmd ( hermon,
  364. HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
  365. 1, sizeof ( *ctx ) ),
  366. 0, ctx, qpn, NULL );
  367. }
  368. static inline int
  369. hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
  370. const struct hermonprm_qp_ee_state_transitions *ctx ){
  371. return hermon_cmd ( hermon,
  372. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
  373. 1, sizeof ( *ctx ) ),
  374. 0, ctx, qpn, NULL );
  375. }
  376. static inline int
  377. hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
  378. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  379. return hermon_cmd ( hermon,
  380. HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
  381. 1, sizeof ( *ctx ) ),
  382. 0, ctx, qpn, NULL );
  383. }
  384. static inline int
  385. hermon_cmd_rts2rts_qp ( struct hermon *hermon, unsigned long qpn,
  386. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  387. return hermon_cmd ( hermon,
  388. HERMON_HCR_IN_CMD ( HERMON_HCR_RTS2RTS_QP,
  389. 1, sizeof ( *ctx ) ),
  390. 0, ctx, qpn, NULL );
  391. }
  392. static inline int
  393. hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
  394. return hermon_cmd ( hermon,
  395. HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
  396. 0x03, NULL, qpn, NULL );
  397. }
  398. static inline int
  399. hermon_cmd_query_qp ( struct hermon *hermon, unsigned long qpn,
  400. struct hermonprm_qp_ee_state_transitions *ctx ) {
  401. return hermon_cmd ( hermon,
  402. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_QP,
  403. 1, sizeof ( *ctx ) ),
  404. 0, NULL, qpn, ctx );
  405. }
  406. static inline int
  407. hermon_cmd_conf_special_qp ( struct hermon *hermon, unsigned int internal_qps,
  408. unsigned long base_qpn ) {
  409. return hermon_cmd ( hermon,
  410. HERMON_HCR_VOID_CMD ( HERMON_HCR_CONF_SPECIAL_QP ),
  411. internal_qps, NULL, base_qpn, NULL );
  412. }
  413. static inline int
  414. hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
  415. union hermonprm_mad *mad ) {
  416. return hermon_cmd ( hermon,
  417. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
  418. 1, sizeof ( *mad ),
  419. 1, sizeof ( *mad ) ),
  420. 0x03, mad, port, mad );
  421. }
  422. static inline int
  423. hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
  424. struct hermonprm_mcg_entry *mcg ) {
  425. return hermon_cmd ( hermon,
  426. HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
  427. 1, sizeof ( *mcg ) ),
  428. 0, NULL, index, mcg );
  429. }
  430. static inline int
  431. hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
  432. const struct hermonprm_mcg_entry *mcg ) {
  433. return hermon_cmd ( hermon,
  434. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
  435. 1, sizeof ( *mcg ) ),
  436. 0, mcg, index, NULL );
  437. }
  438. static inline int
  439. hermon_cmd_mgid_hash ( struct hermon *hermon, const union ib_gid *gid,
  440. struct hermonprm_mgm_hash *hash ) {
  441. return hermon_cmd ( hermon,
  442. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
  443. 1, sizeof ( *gid ),
  444. 0, sizeof ( *hash ) ),
  445. 0, gid, 0, hash );
  446. }
  447. static inline int
  448. hermon_cmd_query_port ( struct hermon *hermon, unsigned int port,
  449. struct hermonprm_query_port_cap *query_port ) {
  450. return hermon_cmd ( hermon,
  451. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_PORT,
  452. 1, sizeof ( *query_port ) ),
  453. 0, NULL, port, query_port );
  454. }
  455. static inline int
  456. hermon_cmd_sense_port ( struct hermon *hermon, unsigned int port,
  457. struct hermonprm_sense_port *port_type ) {
  458. return hermon_cmd ( hermon,
  459. HERMON_HCR_OUT_CMD ( HERMON_HCR_SENSE_PORT,
  460. 1, sizeof ( *port_type ) ),
  461. 0, NULL, port, port_type );
  462. }
  463. static inline int
  464. hermon_cmd_run_fw ( struct hermon *hermon ) {
  465. return hermon_cmd ( hermon,
  466. HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
  467. 0, NULL, 0, NULL );
  468. }
  469. static inline int
  470. hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
  471. const struct hermonprm_scalar_parameter *offset ) {
  472. return hermon_cmd ( hermon,
  473. HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
  474. 0, sizeof ( *offset ) ),
  475. 0, offset, page_count, NULL );
  476. }
  477. static inline int
  478. hermon_cmd_map_icm ( struct hermon *hermon,
  479. const struct hermonprm_virtual_physical_mapping *map ) {
  480. return hermon_cmd ( hermon,
  481. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
  482. 1, sizeof ( *map ) ),
  483. 0, map, 1, NULL );
  484. }
  485. static inline int
  486. hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
  487. return hermon_cmd ( hermon,
  488. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
  489. 0, NULL, 0, NULL );
  490. }
  491. static inline int
  492. hermon_cmd_map_icm_aux ( struct hermon *hermon,
  493. const struct hermonprm_virtual_physical_mapping *map ) {
  494. return hermon_cmd ( hermon,
  495. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
  496. 1, sizeof ( *map ) ),
  497. 0, map, 1, NULL );
  498. }
  499. static inline int
  500. hermon_cmd_set_icm_size ( struct hermon *hermon,
  501. const struct hermonprm_scalar_parameter *icm_size,
  502. struct hermonprm_scalar_parameter *icm_aux_size ) {
  503. return hermon_cmd ( hermon,
  504. HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
  505. 0, sizeof ( *icm_size ),
  506. 0, sizeof (*icm_aux_size) ),
  507. 0, icm_size, 0, icm_aux_size );
  508. }
  509. static inline int
  510. hermon_cmd_unmap_fa ( struct hermon *hermon ) {
  511. return hermon_cmd ( hermon,
  512. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
  513. 0, NULL, 0, NULL );
  514. }
  515. static inline int
  516. hermon_cmd_map_fa ( struct hermon *hermon,
  517. const struct hermonprm_virtual_physical_mapping *map ) {
  518. return hermon_cmd ( hermon,
  519. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
  520. 1, sizeof ( *map ) ),
  521. 0, map, 1, NULL );
  522. }
  523. /***************************************************************************
  524. *
  525. * Memory translation table operations
  526. *
  527. ***************************************************************************
  528. */
  529. /**
  530. * Allocate MTT entries
  531. *
  532. * @v hermon Hermon device
  533. * @v memory Memory to map into MTT
  534. * @v len Length of memory to map
  535. * @v mtt MTT descriptor to fill in
  536. * @ret rc Return status code
  537. */
  538. static int hermon_alloc_mtt ( struct hermon *hermon,
  539. const void *memory, size_t len,
  540. struct hermon_mtt *mtt ) {
  541. struct hermonprm_write_mtt write_mtt;
  542. physaddr_t start;
  543. physaddr_t addr;
  544. unsigned int page_offset;
  545. unsigned int num_pages;
  546. int mtt_offset;
  547. unsigned int mtt_base_addr;
  548. unsigned int i;
  549. int rc;
  550. /* Find available MTT entries */
  551. start = virt_to_phys ( memory );
  552. page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
  553. start -= page_offset;
  554. len += page_offset;
  555. num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
  556. mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
  557. num_pages );
  558. if ( mtt_offset < 0 ) {
  559. DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
  560. hermon, num_pages );
  561. rc = mtt_offset;
  562. goto err_mtt_offset;
  563. }
  564. mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
  565. hermon->cap.mtt_entry_size );
  566. addr = start;
  567. /* Fill in MTT structure */
  568. mtt->mtt_offset = mtt_offset;
  569. mtt->num_pages = num_pages;
  570. mtt->mtt_base_addr = mtt_base_addr;
  571. mtt->page_offset = page_offset;
  572. /* Construct and issue WRITE_MTT commands */
  573. for ( i = 0 ; i < num_pages ; i++ ) {
  574. memset ( &write_mtt, 0, sizeof ( write_mtt ) );
  575. MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
  576. value, mtt_base_addr );
  577. MLX_FILL_2 ( &write_mtt.mtt, 1,
  578. p, 1,
  579. ptag_l, ( addr >> 3 ) );
  580. if ( ( rc = hermon_cmd_write_mtt ( hermon,
  581. &write_mtt ) ) != 0 ) {
  582. DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
  583. hermon, mtt_base_addr );
  584. goto err_write_mtt;
  585. }
  586. addr += HERMON_PAGE_SIZE;
  587. mtt_base_addr += hermon->cap.mtt_entry_size;
  588. }
  589. DBGC ( hermon, "Hermon %p MTT entries [%#x,%#x] for "
  590. "[%08lx,%08lx,%08lx,%08lx)\n", hermon, mtt->mtt_offset,
  591. ( mtt->mtt_offset + mtt->num_pages - 1 ), start,
  592. ( start + page_offset ), ( start + len ), addr );
  593. return 0;
  594. err_write_mtt:
  595. hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
  596. err_mtt_offset:
  597. return rc;
  598. }
  599. /**
  600. * Free MTT entries
  601. *
  602. * @v hermon Hermon device
  603. * @v mtt MTT descriptor
  604. */
  605. static void hermon_free_mtt ( struct hermon *hermon,
  606. struct hermon_mtt *mtt ) {
  607. DBGC ( hermon, "Hermon %p MTT entries [%#x,%#x] freed\n",
  608. hermon, mtt->mtt_offset,
  609. ( mtt->mtt_offset + mtt->num_pages - 1 ) );
  610. hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
  611. mtt->num_pages );
  612. }
  613. /***************************************************************************
  614. *
  615. * MAD operations
  616. *
  617. ***************************************************************************
  618. */
  619. /**
  620. * Issue management datagram
  621. *
  622. * @v ibdev Infiniband device
  623. * @v mad Management datagram
  624. * @ret rc Return status code
  625. */
  626. static int hermon_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
  627. struct hermon *hermon = ib_get_drvdata ( ibdev );
  628. union hermonprm_mad mad_ifc;
  629. int rc;
  630. linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
  631. mad_size_mismatch );
  632. /* Copy in request packet */
  633. memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
  634. /* Issue MAD */
  635. if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
  636. &mad_ifc ) ) != 0 ) {
  637. DBGC ( hermon, "Hermon %p port %d could not issue MAD IFC: "
  638. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  639. return rc;
  640. }
  641. /* Copy out reply packet */
  642. memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
  643. if ( mad->hdr.status != 0 ) {
  644. DBGC ( hermon, "Hermon %p port %d MAD IFC status %04x\n",
  645. hermon, ibdev->port, ntohs ( mad->hdr.status ) );
  646. return -EIO;
  647. }
  648. return 0;
  649. }
  650. /***************************************************************************
  651. *
  652. * Completion queue operations
  653. *
  654. ***************************************************************************
  655. */
  656. /**
  657. * Dump completion queue context (for debugging only)
  658. *
  659. * @v hermon Hermon device
  660. * @v cq Completion queue
  661. * @ret rc Return status code
  662. */
  663. static __attribute__ (( unused )) int
  664. hermon_dump_cqctx ( struct hermon *hermon, struct ib_completion_queue *cq ) {
  665. struct hermonprm_completion_queue_context cqctx;
  666. int rc;
  667. memset ( &cqctx, 0, sizeof ( cqctx ) );
  668. if ( ( rc = hermon_cmd_query_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  669. DBGC ( hermon, "Hermon %p CQN %#lx QUERY_CQ failed: %s\n",
  670. hermon, cq->cqn, strerror ( rc ) );
  671. return rc;
  672. }
  673. DBGC ( hermon, "Hermon %p CQN %#lx context:\n", hermon, cq->cqn );
  674. DBGC_HDA ( hermon, 0, &cqctx, sizeof ( cqctx ) );
  675. return 0;
  676. }
  677. /**
  678. * Create completion queue
  679. *
  680. * @v ibdev Infiniband device
  681. * @v cq Completion queue
  682. * @ret rc Return status code
  683. */
  684. static int hermon_create_cq ( struct ib_device *ibdev,
  685. struct ib_completion_queue *cq ) {
  686. struct hermon *hermon = ib_get_drvdata ( ibdev );
  687. struct hermon_completion_queue *hermon_cq;
  688. struct hermonprm_completion_queue_context cqctx;
  689. int cqn_offset;
  690. unsigned int i;
  691. int rc;
  692. /* Find a free completion queue number */
  693. cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
  694. HERMON_MAX_CQS, 1 );
  695. if ( cqn_offset < 0 ) {
  696. DBGC ( hermon, "Hermon %p out of completion queues\n",
  697. hermon );
  698. rc = cqn_offset;
  699. goto err_cqn_offset;
  700. }
  701. cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
  702. /* Allocate control structures */
  703. hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
  704. if ( ! hermon_cq ) {
  705. rc = -ENOMEM;
  706. goto err_hermon_cq;
  707. }
  708. /* Allocate doorbell */
  709. hermon_cq->doorbell = malloc_dma ( sizeof ( hermon_cq->doorbell[0] ),
  710. sizeof ( hermon_cq->doorbell[0] ) );
  711. if ( ! hermon_cq->doorbell ) {
  712. rc = -ENOMEM;
  713. goto err_doorbell;
  714. }
  715. memset ( hermon_cq->doorbell, 0, sizeof ( hermon_cq->doorbell[0] ) );
  716. /* Allocate completion queue itself */
  717. hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
  718. hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
  719. sizeof ( hermon_cq->cqe[0] ) );
  720. if ( ! hermon_cq->cqe ) {
  721. rc = -ENOMEM;
  722. goto err_cqe;
  723. }
  724. memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
  725. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  726. MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
  727. }
  728. barrier();
  729. /* Allocate MTT entries */
  730. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
  731. hermon_cq->cqe_size,
  732. &hermon_cq->mtt ) ) != 0 )
  733. goto err_alloc_mtt;
  734. /* Hand queue over to hardware */
  735. memset ( &cqctx, 0, sizeof ( cqctx ) );
  736. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  737. MLX_FILL_1 ( &cqctx, 2,
  738. page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
  739. MLX_FILL_2 ( &cqctx, 3,
  740. usr_page, HERMON_UAR_NON_EQ_PAGE,
  741. log_cq_size, fls ( cq->num_cqes - 1 ) );
  742. MLX_FILL_1 ( &cqctx, 5, c_eqn, hermon->eq.eqn );
  743. MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
  744. ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
  745. MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
  746. ( virt_to_phys ( hermon_cq->doorbell ) >> 3 ) );
  747. if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  748. DBGC ( hermon, "Hermon %p CQN %#lx SW2HW_CQ failed: %s\n",
  749. hermon, cq->cqn, strerror ( rc ) );
  750. goto err_sw2hw_cq;
  751. }
  752. DBGC ( hermon, "Hermon %p CQN %#lx ring [%08lx,%08lx), doorbell "
  753. "%08lx\n", hermon, cq->cqn, virt_to_phys ( hermon_cq->cqe ),
  754. ( virt_to_phys ( hermon_cq->cqe ) + hermon_cq->cqe_size ),
  755. virt_to_phys ( hermon_cq->doorbell ) );
  756. ib_cq_set_drvdata ( cq, hermon_cq );
  757. return 0;
  758. err_sw2hw_cq:
  759. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  760. err_alloc_mtt:
  761. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  762. err_cqe:
  763. free_dma ( hermon_cq->doorbell, sizeof ( hermon_cq->doorbell[0] ) );
  764. err_doorbell:
  765. free ( hermon_cq );
  766. err_hermon_cq:
  767. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  768. err_cqn_offset:
  769. return rc;
  770. }
  771. /**
  772. * Destroy completion queue
  773. *
  774. * @v ibdev Infiniband device
  775. * @v cq Completion queue
  776. */
  777. static void hermon_destroy_cq ( struct ib_device *ibdev,
  778. struct ib_completion_queue *cq ) {
  779. struct hermon *hermon = ib_get_drvdata ( ibdev );
  780. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  781. struct hermonprm_completion_queue_context cqctx;
  782. int cqn_offset;
  783. int rc;
  784. /* Take ownership back from hardware */
  785. if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  786. DBGC ( hermon, "Hermon %p CQN %#lx FATAL HW2SW_CQ failed: "
  787. "%s\n", hermon, cq->cqn, strerror ( rc ) );
  788. /* Leak memory and return; at least we avoid corruption */
  789. return;
  790. }
  791. /* Free MTT entries */
  792. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  793. /* Free memory */
  794. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  795. free_dma ( hermon_cq->doorbell, sizeof ( hermon_cq->doorbell[0] ) );
  796. free ( hermon_cq );
  797. /* Mark queue number as free */
  798. cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
  799. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  800. ib_cq_set_drvdata ( cq, NULL );
  801. }
  802. /***************************************************************************
  803. *
  804. * Queue pair operations
  805. *
  806. ***************************************************************************
  807. */
  808. /**
  809. * Assign queue pair number
  810. *
  811. * @v ibdev Infiniband device
  812. * @v qp Queue pair
  813. * @ret rc Return status code
  814. */
  815. static int hermon_alloc_qpn ( struct ib_device *ibdev,
  816. struct ib_queue_pair *qp ) {
  817. struct hermon *hermon = ib_get_drvdata ( ibdev );
  818. unsigned int port_offset;
  819. int qpn_offset;
  820. /* Calculate queue pair number */
  821. port_offset = ( ibdev->port - HERMON_PORT_BASE );
  822. switch ( qp->type ) {
  823. case IB_QPT_SMI:
  824. qp->qpn = ( hermon->special_qpn_base + port_offset );
  825. return 0;
  826. case IB_QPT_GSI:
  827. qp->qpn = ( hermon->special_qpn_base + 2 + port_offset );
  828. return 0;
  829. case IB_QPT_UD:
  830. case IB_QPT_RC:
  831. case IB_QPT_ETH:
  832. /* Find a free queue pair number */
  833. qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
  834. HERMON_MAX_QPS, 1 );
  835. if ( qpn_offset < 0 ) {
  836. DBGC ( hermon, "Hermon %p out of queue pairs\n",
  837. hermon );
  838. return qpn_offset;
  839. }
  840. qp->qpn = ( ( random() & HERMON_QPN_RANDOM_MASK ) |
  841. ( hermon->qpn_base + qpn_offset ) );
  842. return 0;
  843. default:
  844. DBGC ( hermon, "Hermon %p unsupported QP type %d\n",
  845. hermon, qp->type );
  846. return -ENOTSUP;
  847. }
  848. }
  849. /**
  850. * Free queue pair number
  851. *
  852. * @v ibdev Infiniband device
  853. * @v qp Queue pair
  854. */
  855. static void hermon_free_qpn ( struct ib_device *ibdev,
  856. struct ib_queue_pair *qp ) {
  857. struct hermon *hermon = ib_get_drvdata ( ibdev );
  858. int qpn_offset;
  859. qpn_offset = ( ( qp->qpn & ~HERMON_QPN_RANDOM_MASK )
  860. - hermon->qpn_base );
  861. if ( qpn_offset >= 0 )
  862. hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
  863. }
  864. /**
  865. * Calculate transmission rate
  866. *
  867. * @v av Address vector
  868. * @ret hermon_rate Hermon rate
  869. */
  870. static unsigned int hermon_rate ( struct ib_address_vector *av ) {
  871. return ( ( ( av->rate >= IB_RATE_2_5 ) && ( av->rate <= IB_RATE_120 ) )
  872. ? ( av->rate + 5 ) : 0 );
  873. }
  874. /**
  875. * Calculate schedule queue
  876. *
  877. * @v ibdev Infiniband device
  878. * @v qp Queue pair
  879. * @ret sched_queue Schedule queue
  880. */
  881. static unsigned int hermon_sched_queue ( struct ib_device *ibdev,
  882. struct ib_queue_pair *qp ) {
  883. return ( ( ( qp->type == IB_QPT_SMI ) ?
  884. HERMON_SCHED_QP0 : HERMON_SCHED_DEFAULT ) |
  885. ( ( ibdev->port - 1 ) << 6 ) );
  886. }
  887. /** Queue pair transport service type map */
  888. static uint8_t hermon_qp_st[] = {
  889. [IB_QPT_SMI] = HERMON_ST_MLX,
  890. [IB_QPT_GSI] = HERMON_ST_MLX,
  891. [IB_QPT_UD] = HERMON_ST_UD,
  892. [IB_QPT_RC] = HERMON_ST_RC,
  893. [IB_QPT_ETH] = HERMON_ST_MLX,
  894. };
  895. /**
  896. * Dump queue pair context (for debugging only)
  897. *
  898. * @v hermon Hermon device
  899. * @v qp Queue pair
  900. * @ret rc Return status code
  901. */
  902. static __attribute__ (( unused )) int
  903. hermon_dump_qpctx ( struct hermon *hermon, struct ib_queue_pair *qp ) {
  904. struct hermonprm_qp_ee_state_transitions qpctx;
  905. int rc;
  906. memset ( &qpctx, 0, sizeof ( qpctx ) );
  907. if ( ( rc = hermon_cmd_query_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ) {
  908. DBGC ( hermon, "Hermon %p QPN %#lx QUERY_QP failed: %s\n",
  909. hermon, qp->qpn, strerror ( rc ) );
  910. return rc;
  911. }
  912. DBGC ( hermon, "Hermon %p QPN %#lx context:\n", hermon, qp->qpn );
  913. DBGC_HDA ( hermon, 0, &qpctx.u.dwords[2], ( sizeof ( qpctx ) - 8 ) );
  914. return 0;
  915. }
  916. /**
  917. * Create queue pair
  918. *
  919. * @v ibdev Infiniband device
  920. * @v qp Queue pair
  921. * @ret rc Return status code
  922. */
  923. static int hermon_create_qp ( struct ib_device *ibdev,
  924. struct ib_queue_pair *qp ) {
  925. struct hermon *hermon = ib_get_drvdata ( ibdev );
  926. struct hermon_queue_pair *hermon_qp;
  927. struct hermonprm_qp_ee_state_transitions qpctx;
  928. int rc;
  929. /* Calculate queue pair number */
  930. if ( ( rc = hermon_alloc_qpn ( ibdev, qp ) ) != 0 )
  931. goto err_alloc_qpn;
  932. /* Allocate control structures */
  933. hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
  934. if ( ! hermon_qp ) {
  935. rc = -ENOMEM;
  936. goto err_hermon_qp;
  937. }
  938. /* Allocate doorbells */
  939. hermon_qp->recv.doorbell =
  940. malloc_dma ( sizeof ( hermon_qp->recv.doorbell[0] ),
  941. sizeof ( hermon_qp->recv.doorbell[0] ) );
  942. if ( ! hermon_qp->recv.doorbell ) {
  943. rc = -ENOMEM;
  944. goto err_recv_doorbell;
  945. }
  946. memset ( hermon_qp->recv.doorbell, 0,
  947. sizeof ( hermon_qp->recv.doorbell[0] ) );
  948. hermon_qp->send.doorbell =
  949. ( hermon->uar + HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE +
  950. HERMON_DB_POST_SND_OFFSET );
  951. /* Allocate work queue buffer */
  952. hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
  953. ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
  954. hermon_qp->send.num_wqes =
  955. ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
  956. hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
  957. sizeof ( hermon_qp->send.wqe[0] ) );
  958. hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
  959. sizeof ( hermon_qp->recv.wqe[0] ) );
  960. hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
  961. hermon_qp->recv.wqe_size );
  962. hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
  963. sizeof ( hermon_qp->send.wqe[0] ) );
  964. if ( ! hermon_qp->wqe ) {
  965. rc = -ENOMEM;
  966. goto err_alloc_wqe;
  967. }
  968. hermon_qp->send.wqe = hermon_qp->wqe;
  969. memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
  970. hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
  971. memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
  972. /* Allocate MTT entries */
  973. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
  974. hermon_qp->wqe_size,
  975. &hermon_qp->mtt ) ) != 0 ) {
  976. goto err_alloc_mtt;
  977. }
  978. /* Transition queue to INIT state */
  979. memset ( &qpctx, 0, sizeof ( qpctx ) );
  980. MLX_FILL_2 ( &qpctx, 2,
  981. qpc_eec_data.pm_state, HERMON_PM_STATE_MIGRATED,
  982. qpc_eec_data.st, hermon_qp_st[qp->type] );
  983. MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
  984. MLX_FILL_4 ( &qpctx, 4,
  985. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  986. qpc_eec_data.log_rq_stride,
  987. ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
  988. qpc_eec_data.log_sq_size,
  989. fls ( hermon_qp->send.num_wqes - 1 ),
  990. qpc_eec_data.log_sq_stride,
  991. ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
  992. MLX_FILL_1 ( &qpctx, 5,
  993. qpc_eec_data.usr_page, HERMON_UAR_NON_EQ_PAGE );
  994. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  995. MLX_FILL_4 ( &qpctx, 38,
  996. qpc_eec_data.rre, 1,
  997. qpc_eec_data.rwe, 1,
  998. qpc_eec_data.rae, 1,
  999. qpc_eec_data.page_offset,
  1000. ( hermon_qp->mtt.page_offset >> 6 ) );
  1001. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  1002. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
  1003. ( virt_to_phys ( hermon_qp->recv.doorbell ) >> 2 ) );
  1004. MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
  1005. ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
  1006. if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
  1007. &qpctx ) ) != 0 ) {
  1008. DBGC ( hermon, "Hermon %p QPN %#lx RST2INIT_QP failed: %s\n",
  1009. hermon, qp->qpn, strerror ( rc ) );
  1010. goto err_rst2init_qp;
  1011. }
  1012. hermon_qp->state = HERMON_QP_ST_INIT;
  1013. DBGC ( hermon, "Hermon %p QPN %#lx send ring [%08lx,%08lx), doorbell "
  1014. "%08lx\n", hermon, qp->qpn,
  1015. virt_to_phys ( hermon_qp->send.wqe ),
  1016. ( virt_to_phys ( hermon_qp->send.wqe ) +
  1017. hermon_qp->send.wqe_size ),
  1018. virt_to_phys ( hermon_qp->send.doorbell ) );
  1019. DBGC ( hermon, "Hermon %p QPN %#lx receive ring [%08lx,%08lx), "
  1020. "doorbell %08lx\n", hermon, qp->qpn,
  1021. virt_to_phys ( hermon_qp->recv.wqe ),
  1022. ( virt_to_phys ( hermon_qp->recv.wqe ) +
  1023. hermon_qp->recv.wqe_size ),
  1024. virt_to_phys ( hermon_qp->recv.doorbell ) );
  1025. DBGC ( hermon, "Hermon %p QPN %#lx send CQN %#lx receive CQN %#lx\n",
  1026. hermon, qp->qpn, qp->send.cq->cqn, qp->recv.cq->cqn );
  1027. ib_qp_set_drvdata ( qp, hermon_qp );
  1028. return 0;
  1029. hermon_cmd_2rst_qp ( hermon, qp->qpn );
  1030. err_rst2init_qp:
  1031. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1032. err_alloc_mtt:
  1033. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1034. err_alloc_wqe:
  1035. free_dma ( hermon_qp->recv.doorbell,
  1036. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1037. err_recv_doorbell:
  1038. free ( hermon_qp );
  1039. err_hermon_qp:
  1040. hermon_free_qpn ( ibdev, qp );
  1041. err_alloc_qpn:
  1042. return rc;
  1043. }
  1044. /**
  1045. * Modify queue pair
  1046. *
  1047. * @v ibdev Infiniband device
  1048. * @v qp Queue pair
  1049. * @ret rc Return status code
  1050. */
  1051. static int hermon_modify_qp ( struct ib_device *ibdev,
  1052. struct ib_queue_pair *qp ) {
  1053. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1054. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1055. struct hermonprm_qp_ee_state_transitions qpctx;
  1056. int rc;
  1057. /* Transition queue to RTR state, if applicable */
  1058. if ( hermon_qp->state < HERMON_QP_ST_RTR ) {
  1059. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1060. MLX_FILL_2 ( &qpctx, 4,
  1061. qpc_eec_data.mtu,
  1062. ( ( qp->type == IB_QPT_ETH ) ?
  1063. HERMON_MTU_ETH : HERMON_MTU_2048 ),
  1064. qpc_eec_data.msg_max, 31 );
  1065. MLX_FILL_1 ( &qpctx, 7,
  1066. qpc_eec_data.remote_qpn_een, qp->av.qpn );
  1067. MLX_FILL_1 ( &qpctx, 9,
  1068. qpc_eec_data.primary_address_path.rlid,
  1069. qp->av.lid );
  1070. MLX_FILL_1 ( &qpctx, 10,
  1071. qpc_eec_data.primary_address_path.max_stat_rate,
  1072. hermon_rate ( &qp->av ) );
  1073. memcpy ( &qpctx.u.dwords[12], &qp->av.gid,
  1074. sizeof ( qp->av.gid ) );
  1075. MLX_FILL_1 ( &qpctx, 16,
  1076. qpc_eec_data.primary_address_path.sched_queue,
  1077. hermon_sched_queue ( ibdev, qp ) );
  1078. MLX_FILL_1 ( &qpctx, 39,
  1079. qpc_eec_data.next_rcv_psn, qp->recv.psn );
  1080. if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
  1081. &qpctx ) ) != 0 ) {
  1082. DBGC ( hermon, "Hermon %p QPN %#lx INIT2RTR_QP failed:"
  1083. " %s\n", hermon, qp->qpn, strerror ( rc ) );
  1084. return rc;
  1085. }
  1086. hermon_qp->state = HERMON_QP_ST_RTR;
  1087. }
  1088. /* Transition queue to RTS state */
  1089. if ( hermon_qp->state < HERMON_QP_ST_RTS ) {
  1090. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1091. MLX_FILL_1 ( &qpctx, 10,
  1092. qpc_eec_data.primary_address_path.ack_timeout,
  1093. 14 /* 4.096us * 2^(14) = 67ms */ );
  1094. MLX_FILL_2 ( &qpctx, 30,
  1095. qpc_eec_data.retry_count, HERMON_RETRY_MAX,
  1096. qpc_eec_data.rnr_retry, HERMON_RETRY_MAX );
  1097. MLX_FILL_1 ( &qpctx, 32,
  1098. qpc_eec_data.next_send_psn, qp->send.psn );
  1099. if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn,
  1100. &qpctx ) ) != 0 ) {
  1101. DBGC ( hermon, "Hermon %p QPN %#lx RTR2RTS_QP failed: "
  1102. "%s\n", hermon, qp->qpn, strerror ( rc ) );
  1103. return rc;
  1104. }
  1105. hermon_qp->state = HERMON_QP_ST_RTS;
  1106. }
  1107. /* Update parameters in RTS state */
  1108. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1109. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, HERMON_QP_OPT_PARAM_QKEY );
  1110. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  1111. if ( ( rc = hermon_cmd_rts2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
  1112. DBGC ( hermon, "Hermon %p QPN %#lx RTS2RTS_QP failed: %s\n",
  1113. hermon, qp->qpn, strerror ( rc ) );
  1114. return rc;
  1115. }
  1116. return 0;
  1117. }
  1118. /**
  1119. * Destroy queue pair
  1120. *
  1121. * @v ibdev Infiniband device
  1122. * @v qp Queue pair
  1123. */
  1124. static void hermon_destroy_qp ( struct ib_device *ibdev,
  1125. struct ib_queue_pair *qp ) {
  1126. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1127. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1128. int rc;
  1129. /* Take ownership back from hardware */
  1130. if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
  1131. DBGC ( hermon, "Hermon %p QPN %#lx FATAL 2RST_QP failed: %s\n",
  1132. hermon, qp->qpn, strerror ( rc ) );
  1133. /* Leak memory and return; at least we avoid corruption */
  1134. return;
  1135. }
  1136. /* Free MTT entries */
  1137. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1138. /* Free memory */
  1139. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1140. free_dma ( hermon_qp->recv.doorbell,
  1141. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1142. free ( hermon_qp );
  1143. /* Mark queue number as free */
  1144. hermon_free_qpn ( ibdev, qp );
  1145. ib_qp_set_drvdata ( qp, NULL );
  1146. }
  1147. /***************************************************************************
  1148. *
  1149. * Work request operations
  1150. *
  1151. ***************************************************************************
  1152. */
  1153. /**
  1154. * Construct UD send work queue entry
  1155. *
  1156. * @v ibdev Infiniband device
  1157. * @v qp Queue pair
  1158. * @v av Address vector
  1159. * @v iobuf I/O buffer
  1160. * @v wqe Send work queue entry
  1161. * @ret opcode Control opcode
  1162. */
  1163. static __attribute__ (( unused )) unsigned int
  1164. hermon_fill_nop_send_wqe ( struct ib_device *ibdev __unused,
  1165. struct ib_queue_pair *qp __unused,
  1166. struct ib_address_vector *av __unused,
  1167. struct io_buffer *iobuf __unused,
  1168. union hermon_send_wqe *wqe ) {
  1169. MLX_FILL_1 ( &wqe->ctrl, 1, ds, ( sizeof ( wqe->ctrl ) / 16 ) );
  1170. MLX_FILL_1 ( &wqe->ctrl, 2, c, 0x03 /* generate completion */ );
  1171. return HERMON_OPCODE_NOP;
  1172. }
  1173. /**
  1174. * Construct UD send work queue entry
  1175. *
  1176. * @v ibdev Infiniband device
  1177. * @v qp Queue pair
  1178. * @v av Address vector
  1179. * @v iobuf I/O buffer
  1180. * @v wqe Send work queue entry
  1181. * @ret opcode Control opcode
  1182. */
  1183. static unsigned int
  1184. hermon_fill_ud_send_wqe ( struct ib_device *ibdev,
  1185. struct ib_queue_pair *qp __unused,
  1186. struct ib_address_vector *av,
  1187. struct io_buffer *iobuf,
  1188. union hermon_send_wqe *wqe ) {
  1189. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1190. MLX_FILL_1 ( &wqe->ud.ctrl, 1, ds,
  1191. ( ( offsetof ( typeof ( wqe->ud ), data[1] ) / 16 ) ) );
  1192. MLX_FILL_1 ( &wqe->ud.ctrl, 2, c, 0x03 /* generate completion */ );
  1193. MLX_FILL_2 ( &wqe->ud.ud, 0,
  1194. ud_address_vector.pd, HERMON_GLOBAL_PD,
  1195. ud_address_vector.port_number, ibdev->port );
  1196. MLX_FILL_2 ( &wqe->ud.ud, 1,
  1197. ud_address_vector.rlid, av->lid,
  1198. ud_address_vector.g, av->gid_present );
  1199. MLX_FILL_1 ( &wqe->ud.ud, 2,
  1200. ud_address_vector.max_stat_rate, hermon_rate ( av ) );
  1201. MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, av->sl );
  1202. memcpy ( &wqe->ud.ud.u.dwords[4], &av->gid, sizeof ( av->gid ) );
  1203. MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, av->qpn );
  1204. MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, av->qkey );
  1205. MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
  1206. MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, hermon->lkey );
  1207. MLX_FILL_1 ( &wqe->ud.data[0], 3,
  1208. local_address_l, virt_to_bus ( iobuf->data ) );
  1209. return HERMON_OPCODE_SEND;
  1210. }
  1211. /**
  1212. * Construct MLX send work queue entry
  1213. *
  1214. * @v ibdev Infiniband device
  1215. * @v qp Queue pair
  1216. * @v av Address vector
  1217. * @v iobuf I/O buffer
  1218. * @v wqe Send work queue entry
  1219. * @ret opcode Control opcode
  1220. */
  1221. static unsigned int
  1222. hermon_fill_mlx_send_wqe ( struct ib_device *ibdev,
  1223. struct ib_queue_pair *qp,
  1224. struct ib_address_vector *av,
  1225. struct io_buffer *iobuf,
  1226. union hermon_send_wqe *wqe ) {
  1227. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1228. struct io_buffer headers;
  1229. /* Construct IB headers */
  1230. iob_populate ( &headers, &wqe->mlx.headers, 0,
  1231. sizeof ( wqe->mlx.headers ) );
  1232. iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
  1233. ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
  1234. /* Fill work queue entry */
  1235. MLX_FILL_1 ( &wqe->mlx.ctrl, 1, ds,
  1236. ( ( offsetof ( typeof ( wqe->mlx ), data[2] ) / 16 ) ) );
  1237. MLX_FILL_5 ( &wqe->mlx.ctrl, 2,
  1238. c, 0x03 /* generate completion */,
  1239. icrc, 0 /* generate ICRC */,
  1240. max_statrate, hermon_rate ( av ),
  1241. slr, 0,
  1242. v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
  1243. MLX_FILL_1 ( &wqe->mlx.ctrl, 3, rlid, av->lid );
  1244. MLX_FILL_1 ( &wqe->mlx.data[0], 0,
  1245. byte_count, iob_len ( &headers ) );
  1246. MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, hermon->lkey );
  1247. MLX_FILL_1 ( &wqe->mlx.data[0], 3,
  1248. local_address_l, virt_to_bus ( headers.data ) );
  1249. MLX_FILL_1 ( &wqe->mlx.data[1], 0,
  1250. byte_count, ( iob_len ( iobuf ) + 4 /* ICRC */ ) );
  1251. MLX_FILL_1 ( &wqe->mlx.data[1], 1, l_key, hermon->lkey );
  1252. MLX_FILL_1 ( &wqe->mlx.data[1], 3,
  1253. local_address_l, virt_to_bus ( iobuf->data ) );
  1254. return HERMON_OPCODE_SEND;
  1255. }
  1256. /**
  1257. * Construct RC send work queue entry
  1258. *
  1259. * @v ibdev Infiniband device
  1260. * @v qp Queue pair
  1261. * @v av Address vector
  1262. * @v iobuf I/O buffer
  1263. * @v wqe Send work queue entry
  1264. * @ret opcode Control opcode
  1265. */
  1266. static unsigned int
  1267. hermon_fill_rc_send_wqe ( struct ib_device *ibdev,
  1268. struct ib_queue_pair *qp __unused,
  1269. struct ib_address_vector *av __unused,
  1270. struct io_buffer *iobuf,
  1271. union hermon_send_wqe *wqe ) {
  1272. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1273. MLX_FILL_1 ( &wqe->rc.ctrl, 1, ds,
  1274. ( ( offsetof ( typeof ( wqe->rc ), data[1] ) / 16 ) ) );
  1275. MLX_FILL_1 ( &wqe->rc.ctrl, 2, c, 0x03 /* generate completion */ );
  1276. MLX_FILL_1 ( &wqe->rc.data[0], 0, byte_count, iob_len ( iobuf ) );
  1277. MLX_FILL_1 ( &wqe->rc.data[0], 1, l_key, hermon->lkey );
  1278. MLX_FILL_1 ( &wqe->rc.data[0], 3,
  1279. local_address_l, virt_to_bus ( iobuf->data ) );
  1280. return HERMON_OPCODE_SEND;
  1281. }
  1282. /**
  1283. * Construct Ethernet send work queue entry
  1284. *
  1285. * @v ibdev Infiniband device
  1286. * @v qp Queue pair
  1287. * @v av Address vector
  1288. * @v iobuf I/O buffer
  1289. * @v wqe Send work queue entry
  1290. * @ret opcode Control opcode
  1291. */
  1292. static unsigned int
  1293. hermon_fill_eth_send_wqe ( struct ib_device *ibdev,
  1294. struct ib_queue_pair *qp __unused,
  1295. struct ib_address_vector *av __unused,
  1296. struct io_buffer *iobuf,
  1297. union hermon_send_wqe *wqe ) {
  1298. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1299. /* Fill work queue entry */
  1300. MLX_FILL_1 ( &wqe->eth.ctrl, 1, ds,
  1301. ( ( offsetof ( typeof ( wqe->mlx ), data[1] ) / 16 ) ) );
  1302. MLX_FILL_2 ( &wqe->eth.ctrl, 2,
  1303. c, 0x03 /* generate completion */,
  1304. s, 1 /* inhibit ICRC */ );
  1305. MLX_FILL_1 ( &wqe->eth.data[0], 0,
  1306. byte_count, iob_len ( iobuf ) );
  1307. MLX_FILL_1 ( &wqe->eth.data[0], 1, l_key, hermon->lkey );
  1308. MLX_FILL_1 ( &wqe->eth.data[0], 3,
  1309. local_address_l, virt_to_bus ( iobuf->data ) );
  1310. return HERMON_OPCODE_SEND;
  1311. }
  1312. /** Work queue entry constructors */
  1313. static unsigned int
  1314. ( * hermon_fill_send_wqe[] ) ( struct ib_device *ibdev,
  1315. struct ib_queue_pair *qp,
  1316. struct ib_address_vector *av,
  1317. struct io_buffer *iobuf,
  1318. union hermon_send_wqe *wqe ) = {
  1319. [IB_QPT_SMI] = hermon_fill_mlx_send_wqe,
  1320. [IB_QPT_GSI] = hermon_fill_mlx_send_wqe,
  1321. [IB_QPT_UD] = hermon_fill_ud_send_wqe,
  1322. [IB_QPT_RC] = hermon_fill_rc_send_wqe,
  1323. [IB_QPT_ETH] = hermon_fill_eth_send_wqe,
  1324. };
  1325. /**
  1326. * Post send work queue entry
  1327. *
  1328. * @v ibdev Infiniband device
  1329. * @v qp Queue pair
  1330. * @v av Address vector
  1331. * @v iobuf I/O buffer
  1332. * @ret rc Return status code
  1333. */
  1334. static int hermon_post_send ( struct ib_device *ibdev,
  1335. struct ib_queue_pair *qp,
  1336. struct ib_address_vector *av,
  1337. struct io_buffer *iobuf ) {
  1338. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1339. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1340. struct ib_work_queue *wq = &qp->send;
  1341. struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
  1342. union hermon_send_wqe *wqe;
  1343. union hermonprm_doorbell_register db_reg;
  1344. unsigned long wqe_idx_mask;
  1345. unsigned long wqe_idx;
  1346. unsigned int owner;
  1347. unsigned int opcode;
  1348. /* Allocate work queue entry */
  1349. wqe_idx = ( wq->next_idx & ( hermon_send_wq->num_wqes - 1 ) );
  1350. owner = ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 );
  1351. wqe_idx_mask = ( wq->num_wqes - 1 );
  1352. if ( wq->iobufs[ wqe_idx & wqe_idx_mask ] ) {
  1353. DBGC ( hermon, "Hermon %p QPN %#lx send queue full",
  1354. hermon, qp->qpn );
  1355. return -ENOBUFS;
  1356. }
  1357. wq->iobufs[ wqe_idx & wqe_idx_mask ] = iobuf;
  1358. wqe = &hermon_send_wq->wqe[wqe_idx];
  1359. /* Construct work queue entry */
  1360. memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
  1361. ( sizeof ( *wqe ) - 4 ) );
  1362. assert ( qp->type < ( sizeof ( hermon_fill_send_wqe ) /
  1363. sizeof ( hermon_fill_send_wqe[0] ) ) );
  1364. assert ( hermon_fill_send_wqe[qp->type] != NULL );
  1365. opcode = hermon_fill_send_wqe[qp->type] ( ibdev, qp, av, iobuf, wqe );
  1366. barrier();
  1367. MLX_FILL_2 ( &wqe->ctrl, 0,
  1368. opcode, opcode,
  1369. owner, owner );
  1370. DBGCP ( hermon, "Hermon %p QPN %#lx posting send WQE %#lx:\n",
  1371. hermon, qp->qpn, wqe_idx );
  1372. DBGCP_HDA ( hermon, virt_to_phys ( wqe ), wqe, sizeof ( *wqe ) );
  1373. /* Ring doorbell register */
  1374. MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
  1375. barrier();
  1376. writel ( db_reg.dword[0], hermon_send_wq->doorbell );
  1377. /* Update work queue's index */
  1378. wq->next_idx++;
  1379. return 0;
  1380. }
  1381. /**
  1382. * Post receive work queue entry
  1383. *
  1384. * @v ibdev Infiniband device
  1385. * @v qp Queue pair
  1386. * @v iobuf I/O buffer
  1387. * @ret rc Return status code
  1388. */
  1389. static int hermon_post_recv ( struct ib_device *ibdev,
  1390. struct ib_queue_pair *qp,
  1391. struct io_buffer *iobuf ) {
  1392. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1393. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1394. struct ib_work_queue *wq = &qp->recv;
  1395. struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
  1396. struct hermonprm_recv_wqe *wqe;
  1397. unsigned int wqe_idx_mask;
  1398. /* Allocate work queue entry */
  1399. wqe_idx_mask = ( wq->num_wqes - 1 );
  1400. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1401. DBGC ( hermon, "Hermon %p QPN %#lx receive queue full",
  1402. hermon, qp->qpn );
  1403. return -ENOBUFS;
  1404. }
  1405. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1406. wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  1407. /* Construct work queue entry */
  1408. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
  1409. MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->lkey );
  1410. MLX_FILL_1 ( &wqe->data[0], 3,
  1411. local_address_l, virt_to_bus ( iobuf->data ) );
  1412. /* Update work queue's index */
  1413. wq->next_idx++;
  1414. /* Update doorbell record */
  1415. barrier();
  1416. MLX_FILL_1 ( hermon_recv_wq->doorbell, 0, receive_wqe_counter,
  1417. ( wq->next_idx & 0xffff ) );
  1418. return 0;
  1419. }
  1420. /**
  1421. * Handle completion
  1422. *
  1423. * @v ibdev Infiniband device
  1424. * @v cq Completion queue
  1425. * @v cqe Hardware completion queue entry
  1426. * @ret rc Return status code
  1427. */
  1428. static int hermon_complete ( struct ib_device *ibdev,
  1429. struct ib_completion_queue *cq,
  1430. union hermonprm_completion_entry *cqe ) {
  1431. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1432. struct ib_work_queue *wq;
  1433. struct ib_queue_pair *qp;
  1434. struct hermon_queue_pair *hermon_qp;
  1435. struct io_buffer *iobuf;
  1436. struct ib_address_vector recv_av;
  1437. struct ib_global_route_header *grh;
  1438. struct ib_address_vector *av;
  1439. unsigned int opcode;
  1440. unsigned long qpn;
  1441. int is_send;
  1442. unsigned long wqe_idx;
  1443. unsigned long wqe_idx_mask;
  1444. size_t len;
  1445. int rc = 0;
  1446. /* Parse completion */
  1447. qpn = MLX_GET ( &cqe->normal, qpn );
  1448. is_send = MLX_GET ( &cqe->normal, s_r );
  1449. opcode = MLX_GET ( &cqe->normal, opcode );
  1450. if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
  1451. /* "s" field is not valid for error opcodes */
  1452. is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
  1453. DBGC ( hermon, "Hermon %p CQN %#lx syndrome %x vendor %x\n",
  1454. hermon, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
  1455. MLX_GET ( &cqe->error, vendor_error_syndrome ) );
  1456. rc = -EIO;
  1457. /* Don't return immediately; propagate error to completer */
  1458. }
  1459. /* Identify work queue */
  1460. wq = ib_find_wq ( cq, qpn, is_send );
  1461. if ( ! wq ) {
  1462. DBGC ( hermon, "Hermon %p CQN %#lx unknown %s QPN %#lx\n",
  1463. hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1464. return -EIO;
  1465. }
  1466. qp = wq->qp;
  1467. hermon_qp = ib_qp_get_drvdata ( qp );
  1468. /* Identify work queue entry */
  1469. wqe_idx = MLX_GET ( &cqe->normal, wqe_counter );
  1470. wqe_idx_mask = ( wq->num_wqes - 1 );
  1471. DBGCP ( hermon, "Hermon %p CQN %#lx QPN %#lx %s WQE %#lx completed:\n",
  1472. hermon, cq->cqn, qp->qpn, ( is_send ? "send" : "recv" ),
  1473. wqe_idx );
  1474. DBGCP_HDA ( hermon, virt_to_phys ( cqe ), cqe, sizeof ( *cqe ) );
  1475. /* Identify I/O buffer */
  1476. iobuf = wq->iobufs[ wqe_idx & wqe_idx_mask ];
  1477. if ( ! iobuf ) {
  1478. DBGC ( hermon, "Hermon %p CQN %#lx QPN %#lx empty %s WQE "
  1479. "%#lx\n", hermon, cq->cqn, qp->qpn,
  1480. ( is_send ? "send" : "recv" ), wqe_idx );
  1481. return -EIO;
  1482. }
  1483. wq->iobufs[ wqe_idx & wqe_idx_mask ] = NULL;
  1484. if ( is_send ) {
  1485. /* Hand off to completion handler */
  1486. ib_complete_send ( ibdev, qp, iobuf, rc );
  1487. } else {
  1488. /* Set received length */
  1489. len = MLX_GET ( &cqe->normal, byte_cnt );
  1490. assert ( len <= iob_tailroom ( iobuf ) );
  1491. iob_put ( iobuf, len );
  1492. memset ( &recv_av, 0, sizeof ( recv_av ) );
  1493. switch ( qp->type ) {
  1494. case IB_QPT_SMI:
  1495. case IB_QPT_GSI:
  1496. case IB_QPT_UD:
  1497. assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
  1498. grh = iobuf->data;
  1499. iob_pull ( iobuf, sizeof ( *grh ) );
  1500. /* Construct address vector */
  1501. av = &recv_av;
  1502. av->qpn = MLX_GET ( &cqe->normal, srq_rqpn );
  1503. av->lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
  1504. av->sl = MLX_GET ( &cqe->normal, sl );
  1505. av->gid_present = MLX_GET ( &cqe->normal, g );
  1506. memcpy ( &av->gid, &grh->sgid, sizeof ( av->gid ) );
  1507. break;
  1508. case IB_QPT_RC:
  1509. av = &qp->av;
  1510. break;
  1511. case IB_QPT_ETH:
  1512. /* Construct address vector */
  1513. av = &recv_av;
  1514. av->vlan_present = MLX_GET ( &cqe->normal, vlan );
  1515. av->vlan = MLX_GET ( &cqe->normal, vid );
  1516. break;
  1517. default:
  1518. assert ( 0 );
  1519. return -EINVAL;
  1520. }
  1521. /* Hand off to completion handler */
  1522. ib_complete_recv ( ibdev, qp, av, iobuf, rc );
  1523. }
  1524. return rc;
  1525. }
  1526. /**
  1527. * Poll completion queue
  1528. *
  1529. * @v ibdev Infiniband device
  1530. * @v cq Completion queue
  1531. */
  1532. static void hermon_poll_cq ( struct ib_device *ibdev,
  1533. struct ib_completion_queue *cq ) {
  1534. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1535. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  1536. union hermonprm_completion_entry *cqe;
  1537. unsigned int cqe_idx_mask;
  1538. int rc;
  1539. while ( 1 ) {
  1540. /* Look for completion entry */
  1541. cqe_idx_mask = ( cq->num_cqes - 1 );
  1542. cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
  1543. if ( MLX_GET ( &cqe->normal, owner ) ^
  1544. ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
  1545. /* Entry still owned by hardware; end of poll */
  1546. break;
  1547. }
  1548. /* Handle completion */
  1549. if ( ( rc = hermon_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1550. DBGC ( hermon, "Hermon %p CQN %#lx failed to complete:"
  1551. " %s\n", hermon, cq->cqn, strerror ( rc ) );
  1552. DBGC_HDA ( hermon, virt_to_phys ( cqe ),
  1553. cqe, sizeof ( *cqe ) );
  1554. }
  1555. /* Update completion queue's index */
  1556. cq->next_idx++;
  1557. /* Update doorbell record */
  1558. MLX_FILL_1 ( hermon_cq->doorbell, 0, update_ci,
  1559. ( cq->next_idx & 0x00ffffffUL ) );
  1560. }
  1561. }
  1562. /***************************************************************************
  1563. *
  1564. * Event queues
  1565. *
  1566. ***************************************************************************
  1567. */
  1568. /**
  1569. * Create event queue
  1570. *
  1571. * @v hermon Hermon device
  1572. * @ret rc Return status code
  1573. */
  1574. static int hermon_create_eq ( struct hermon *hermon ) {
  1575. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1576. struct hermonprm_eqc eqctx;
  1577. struct hermonprm_event_mask mask;
  1578. unsigned int i;
  1579. int rc;
  1580. /* Select event queue number */
  1581. hermon_eq->eqn = ( 4 * hermon->cap.reserved_uars );
  1582. if ( hermon_eq->eqn < hermon->cap.reserved_eqs )
  1583. hermon_eq->eqn = hermon->cap.reserved_eqs;
  1584. /* Calculate doorbell address */
  1585. hermon_eq->doorbell =
  1586. ( hermon->uar + HERMON_DB_EQ_OFFSET ( hermon_eq->eqn ) );
  1587. /* Allocate event queue itself */
  1588. hermon_eq->eqe_size =
  1589. ( HERMON_NUM_EQES * sizeof ( hermon_eq->eqe[0] ) );
  1590. hermon_eq->eqe = malloc_dma ( hermon_eq->eqe_size,
  1591. sizeof ( hermon_eq->eqe[0] ) );
  1592. if ( ! hermon_eq->eqe ) {
  1593. rc = -ENOMEM;
  1594. goto err_eqe;
  1595. }
  1596. memset ( hermon_eq->eqe, 0, hermon_eq->eqe_size );
  1597. for ( i = 0 ; i < HERMON_NUM_EQES ; i++ ) {
  1598. MLX_FILL_1 ( &hermon_eq->eqe[i].generic, 7, owner, 1 );
  1599. }
  1600. barrier();
  1601. /* Allocate MTT entries */
  1602. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_eq->eqe,
  1603. hermon_eq->eqe_size,
  1604. &hermon_eq->mtt ) ) != 0 )
  1605. goto err_alloc_mtt;
  1606. /* Hand queue over to hardware */
  1607. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1608. MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
  1609. MLX_FILL_1 ( &eqctx, 2,
  1610. page_offset, ( hermon_eq->mtt.page_offset >> 5 ) );
  1611. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( HERMON_NUM_EQES - 1 ) );
  1612. MLX_FILL_1 ( &eqctx, 7, mtt_base_addr_l,
  1613. ( hermon_eq->mtt.mtt_base_addr >> 3 ) );
  1614. if ( ( rc = hermon_cmd_sw2hw_eq ( hermon, hermon_eq->eqn,
  1615. &eqctx ) ) != 0 ) {
  1616. DBGC ( hermon, "Hermon %p EQN %#lx SW2HW_EQ failed: %s\n",
  1617. hermon, hermon_eq->eqn, strerror ( rc ) );
  1618. goto err_sw2hw_eq;
  1619. }
  1620. /* Map all events to this event queue */
  1621. memset ( &mask, 0xff, sizeof ( mask ) );
  1622. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1623. ( HERMON_MAP_EQ | hermon_eq->eqn ),
  1624. &mask ) ) != 0 ) {
  1625. DBGC ( hermon, "Hermon %p EQN %#lx MAP_EQ failed: %s\n",
  1626. hermon, hermon_eq->eqn, strerror ( rc ) );
  1627. goto err_map_eq;
  1628. }
  1629. DBGC ( hermon, "Hermon %p EQN %#lx ring [%08lx,%08lx), doorbell "
  1630. "%08lx\n", hermon, hermon_eq->eqn,
  1631. virt_to_phys ( hermon_eq->eqe ),
  1632. ( virt_to_phys ( hermon_eq->eqe ) + hermon_eq->eqe_size ),
  1633. virt_to_phys ( hermon_eq->doorbell ) );
  1634. return 0;
  1635. err_map_eq:
  1636. hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn, &eqctx );
  1637. err_sw2hw_eq:
  1638. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1639. err_alloc_mtt:
  1640. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1641. err_eqe:
  1642. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1643. return rc;
  1644. }
  1645. /**
  1646. * Destroy event queue
  1647. *
  1648. * @v hermon Hermon device
  1649. */
  1650. static void hermon_destroy_eq ( struct hermon *hermon ) {
  1651. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1652. struct hermonprm_eqc eqctx;
  1653. struct hermonprm_event_mask mask;
  1654. int rc;
  1655. /* Unmap events from event queue */
  1656. memset ( &mask, 0, sizeof ( mask ) );
  1657. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1658. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1659. ( HERMON_UNMAP_EQ | hermon_eq->eqn ),
  1660. &mask ) ) != 0 ) {
  1661. DBGC ( hermon, "Hermon %p EQN %#lx FATAL MAP_EQ failed to "
  1662. "unmap: %s\n", hermon, hermon_eq->eqn, strerror ( rc ) );
  1663. /* Continue; HCA may die but system should survive */
  1664. }
  1665. /* Take ownership back from hardware */
  1666. if ( ( rc = hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn,
  1667. &eqctx ) ) != 0 ) {
  1668. DBGC ( hermon, "Hermon %p EQN %#lx FATAL HW2SW_EQ failed: %s\n",
  1669. hermon, hermon_eq->eqn, strerror ( rc ) );
  1670. /* Leak memory and return; at least we avoid corruption */
  1671. return;
  1672. }
  1673. /* Free MTT entries */
  1674. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1675. /* Free memory */
  1676. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1677. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1678. }
  1679. /**
  1680. * Handle port state event
  1681. *
  1682. * @v hermon Hermon device
  1683. * @v eqe Port state change event queue entry
  1684. */
  1685. static void hermon_event_port_state_change ( struct hermon *hermon,
  1686. union hermonprm_event_entry *eqe){
  1687. unsigned int port;
  1688. int link_up;
  1689. /* Get port and link status */
  1690. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1691. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1692. DBGC ( hermon, "Hermon %p port %d link %s\n", hermon, ( port + 1 ),
  1693. ( link_up ? "up" : "down" ) );
  1694. /* Sanity check */
  1695. if ( port >= hermon->cap.num_ports ) {
  1696. DBGC ( hermon, "Hermon %p port %d does not exist!\n",
  1697. hermon, ( port + 1 ) );
  1698. return;
  1699. }
  1700. /* Notify device of port state change */
  1701. hermon->port[port].type->state_change ( hermon, &hermon->port[port],
  1702. link_up );
  1703. }
  1704. /**
  1705. * Poll event queue
  1706. *
  1707. * @v ibdev Infiniband device
  1708. */
  1709. static void hermon_poll_eq ( struct ib_device *ibdev ) {
  1710. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1711. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1712. union hermonprm_event_entry *eqe;
  1713. union hermonprm_doorbell_register db_reg;
  1714. unsigned int eqe_idx_mask;
  1715. unsigned int event_type;
  1716. /* No event is generated upon reaching INIT, so we must poll
  1717. * separately for link state changes while we remain DOWN.
  1718. */
  1719. if ( ib_is_open ( ibdev ) &&
  1720. ( ibdev->port_state == IB_PORT_STATE_DOWN ) ) {
  1721. ib_smc_update ( ibdev, hermon_mad );
  1722. }
  1723. /* Poll event queue */
  1724. while ( 1 ) {
  1725. /* Look for event entry */
  1726. eqe_idx_mask = ( HERMON_NUM_EQES - 1 );
  1727. eqe = &hermon_eq->eqe[hermon_eq->next_idx & eqe_idx_mask];
  1728. if ( MLX_GET ( &eqe->generic, owner ) ^
  1729. ( ( hermon_eq->next_idx & HERMON_NUM_EQES ) ? 1 : 0 ) ) {
  1730. /* Entry still owned by hardware; end of poll */
  1731. break;
  1732. }
  1733. DBGCP ( hermon, "Hermon %p EQN %#lx event:\n",
  1734. hermon, hermon_eq->eqn );
  1735. DBGCP_HDA ( hermon, virt_to_phys ( eqe ),
  1736. eqe, sizeof ( *eqe ) );
  1737. /* Handle event */
  1738. event_type = MLX_GET ( &eqe->generic, event_type );
  1739. switch ( event_type ) {
  1740. case HERMON_EV_PORT_STATE_CHANGE:
  1741. hermon_event_port_state_change ( hermon, eqe );
  1742. break;
  1743. default:
  1744. DBGC ( hermon, "Hermon %p EQN %#lx unrecognised event "
  1745. "type %#x:\n",
  1746. hermon, hermon_eq->eqn, event_type );
  1747. DBGC_HDA ( hermon, virt_to_phys ( eqe ),
  1748. eqe, sizeof ( *eqe ) );
  1749. break;
  1750. }
  1751. /* Update event queue's index */
  1752. hermon_eq->next_idx++;
  1753. /* Ring doorbell */
  1754. MLX_FILL_1 ( &db_reg.event, 0,
  1755. ci, ( hermon_eq->next_idx & 0x00ffffffUL ) );
  1756. writel ( db_reg.dword[0], hermon_eq->doorbell );
  1757. }
  1758. }
  1759. /***************************************************************************
  1760. *
  1761. * Infiniband link-layer operations
  1762. *
  1763. ***************************************************************************
  1764. */
  1765. /**
  1766. * Initialise Infiniband link
  1767. *
  1768. * @v ibdev Infiniband device
  1769. * @ret rc Return status code
  1770. */
  1771. static int hermon_open ( struct ib_device *ibdev ) {
  1772. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1773. union hermonprm_set_port set_port;
  1774. int rc;
  1775. /* Set port parameters */
  1776. memset ( &set_port, 0, sizeof ( set_port ) );
  1777. MLX_FILL_7 ( &set_port.ib, 0,
  1778. mmc, 1,
  1779. mvc, 1,
  1780. mp, 1,
  1781. mg, 1,
  1782. mtu_cap, IB_MTU_2048,
  1783. vl_cap, IB_VL_0,
  1784. rcm, 1 );
  1785. MLX_FILL_2 ( &set_port.ib, 10,
  1786. max_pkey, 1,
  1787. max_gid, 1 );
  1788. if ( ( rc = hermon_cmd_set_port ( hermon, 0, ibdev->port,
  1789. &set_port ) ) != 0 ) {
  1790. DBGC ( hermon, "Hermon %p port %d could not set port: %s\n",
  1791. hermon, ibdev->port, strerror ( rc ) );
  1792. return rc;
  1793. }
  1794. /* Initialise port */
  1795. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port ) ) != 0 ) {
  1796. DBGC ( hermon, "Hermon %p port %d could not initialise port: "
  1797. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  1798. return rc;
  1799. }
  1800. /* Update MAD parameters */
  1801. ib_smc_update ( ibdev, hermon_mad );
  1802. return 0;
  1803. }
  1804. /**
  1805. * Close Infiniband link
  1806. *
  1807. * @v ibdev Infiniband device
  1808. */
  1809. static void hermon_close ( struct ib_device *ibdev ) {
  1810. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1811. int rc;
  1812. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  1813. DBGC ( hermon, "Hermon %p port %d could not close port: %s\n",
  1814. hermon, ibdev->port, strerror ( rc ) );
  1815. /* Nothing we can do about this */
  1816. }
  1817. }
  1818. /**
  1819. * Inform embedded subnet management agent of a received MAD
  1820. *
  1821. * @v ibdev Infiniband device
  1822. * @v mad MAD
  1823. * @ret rc Return status code
  1824. */
  1825. static int hermon_inform_sma ( struct ib_device *ibdev,
  1826. union ib_mad *mad ) {
  1827. int rc;
  1828. /* Send the MAD to the embedded SMA */
  1829. if ( ( rc = hermon_mad ( ibdev, mad ) ) != 0 )
  1830. return rc;
  1831. /* Update parameters held in software */
  1832. ib_smc_update ( ibdev, hermon_mad );
  1833. return 0;
  1834. }
  1835. /***************************************************************************
  1836. *
  1837. * Multicast group operations
  1838. *
  1839. ***************************************************************************
  1840. */
  1841. /**
  1842. * Attach to multicast group
  1843. *
  1844. * @v ibdev Infiniband device
  1845. * @v qp Queue pair
  1846. * @v gid Multicast GID
  1847. * @ret rc Return status code
  1848. */
  1849. static int hermon_mcast_attach ( struct ib_device *ibdev,
  1850. struct ib_queue_pair *qp,
  1851. union ib_gid *gid ) {
  1852. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1853. struct hermonprm_mgm_hash hash;
  1854. struct hermonprm_mcg_entry mcg;
  1855. unsigned int index;
  1856. int rc;
  1857. /* Generate hash table index */
  1858. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  1859. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  1860. hermon, strerror ( rc ) );
  1861. return rc;
  1862. }
  1863. index = MLX_GET ( &hash, hash );
  1864. /* Check for existing hash table entry */
  1865. if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1866. DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
  1867. hermon, index, strerror ( rc ) );
  1868. return rc;
  1869. }
  1870. if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
  1871. /* FIXME: this implementation allows only a single QP
  1872. * per multicast group, and doesn't handle hash
  1873. * collisions. Sufficient for IPoIB but may need to
  1874. * be extended in future.
  1875. */
  1876. DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
  1877. hermon, index );
  1878. return -EBUSY;
  1879. }
  1880. /* Update hash table entry */
  1881. MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
  1882. MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
  1883. memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
  1884. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1885. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  1886. hermon, index, strerror ( rc ) );
  1887. return rc;
  1888. }
  1889. return 0;
  1890. }
  1891. /**
  1892. * Detach from multicast group
  1893. *
  1894. * @v ibdev Infiniband device
  1895. * @v qp Queue pair
  1896. * @v gid Multicast GID
  1897. */
  1898. static void hermon_mcast_detach ( struct ib_device *ibdev,
  1899. struct ib_queue_pair *qp __unused,
  1900. union ib_gid *gid ) {
  1901. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1902. struct hermonprm_mgm_hash hash;
  1903. struct hermonprm_mcg_entry mcg;
  1904. unsigned int index;
  1905. int rc;
  1906. /* Generate hash table index */
  1907. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  1908. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  1909. hermon, strerror ( rc ) );
  1910. return;
  1911. }
  1912. index = MLX_GET ( &hash, hash );
  1913. /* Clear hash table entry */
  1914. memset ( &mcg, 0, sizeof ( mcg ) );
  1915. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1916. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  1917. hermon, index, strerror ( rc ) );
  1918. return;
  1919. }
  1920. }
  1921. /** Hermon Infiniband operations */
  1922. static struct ib_device_operations hermon_ib_operations = {
  1923. .create_cq = hermon_create_cq,
  1924. .destroy_cq = hermon_destroy_cq,
  1925. .create_qp = hermon_create_qp,
  1926. .modify_qp = hermon_modify_qp,
  1927. .destroy_qp = hermon_destroy_qp,
  1928. .post_send = hermon_post_send,
  1929. .post_recv = hermon_post_recv,
  1930. .poll_cq = hermon_poll_cq,
  1931. .poll_eq = hermon_poll_eq,
  1932. .open = hermon_open,
  1933. .close = hermon_close,
  1934. .mcast_attach = hermon_mcast_attach,
  1935. .mcast_detach = hermon_mcast_detach,
  1936. .set_port_info = hermon_inform_sma,
  1937. .set_pkey_table = hermon_inform_sma,
  1938. };
  1939. /**
  1940. * Register Hermon Infiniband device
  1941. *
  1942. * @v hermon Hermon device
  1943. * @v port Hermon port
  1944. * @ret rc Return status code
  1945. */
  1946. static int hermon_register_ibdev ( struct hermon *hermon,
  1947. struct hermon_port *port ) {
  1948. struct ib_device *ibdev = port->ibdev;
  1949. int rc;
  1950. /* Initialise parameters using SMC */
  1951. ib_smc_init ( ibdev, hermon_mad );
  1952. /* Register Infiniband device */
  1953. if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
  1954. DBGC ( hermon, "Hermon %p port %d could not register IB "
  1955. "device: %s\n", hermon, ibdev->port, strerror ( rc ) );
  1956. return rc;
  1957. }
  1958. return 0;
  1959. }
  1960. /**
  1961. * Handle Hermon Infiniband device port state change
  1962. *
  1963. * @v hermon Hermon device
  1964. * @v port Hermon port
  1965. * @v link_up Link is up
  1966. */
  1967. static void hermon_state_change_ibdev ( struct hermon *hermon __unused,
  1968. struct hermon_port *port,
  1969. int link_up __unused ) {
  1970. struct ib_device *ibdev = port->ibdev;
  1971. /* Update MAD parameters */
  1972. ib_smc_update ( ibdev, hermon_mad );
  1973. }
  1974. /**
  1975. * Unregister Hermon Infiniband device
  1976. *
  1977. * @v hermon Hermon device
  1978. * @v port Hermon port
  1979. */
  1980. static void hermon_unregister_ibdev ( struct hermon *hermon __unused,
  1981. struct hermon_port *port ) {
  1982. struct ib_device *ibdev = port->ibdev;
  1983. unregister_ibdev ( ibdev );
  1984. }
  1985. /** Hermon Infiniband port type */
  1986. static struct hermon_port_type hermon_port_type_ib = {
  1987. .register_dev = hermon_register_ibdev,
  1988. .state_change = hermon_state_change_ibdev,
  1989. .unregister_dev = hermon_unregister_ibdev,
  1990. };
  1991. /***************************************************************************
  1992. *
  1993. * Ethernet operation
  1994. *
  1995. ***************************************************************************
  1996. */
  1997. /** Number of Hermon Ethernet send work queue entries */
  1998. #define HERMON_ETH_NUM_SEND_WQES 2
  1999. /** Number of Hermon Ethernet receive work queue entries */
  2000. #define HERMON_ETH_NUM_RECV_WQES 4
  2001. /** Number of Hermon Ethernet completion entries */
  2002. #define HERMON_ETH_NUM_CQES 8
  2003. /**
  2004. * Transmit packet via Hermon Ethernet device
  2005. *
  2006. * @v netdev Network device
  2007. * @v iobuf I/O buffer
  2008. * @ret rc Return status code
  2009. */
  2010. static int hermon_eth_transmit ( struct net_device *netdev,
  2011. struct io_buffer *iobuf ) {
  2012. struct hermon_port *port = netdev->priv;
  2013. struct ib_device *ibdev = port->ibdev;
  2014. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2015. int rc;
  2016. /* Transmit packet */
  2017. if ( ( rc = ib_post_send ( ibdev, port->eth_qp, NULL,
  2018. iobuf ) ) != 0 ) {
  2019. DBGC ( hermon, "Hermon %p port %d could not transmit: %s\n",
  2020. hermon, ibdev->port, strerror ( rc ) );
  2021. return rc;
  2022. }
  2023. return 0;
  2024. }
  2025. /**
  2026. * Handle Hermon Ethernet device send completion
  2027. *
  2028. * @v ibdev Infiniband device
  2029. * @v qp Queue pair
  2030. * @v iobuf I/O buffer
  2031. * @v rc Completion status code
  2032. */
  2033. static void hermon_eth_complete_send ( struct ib_device *ibdev __unused,
  2034. struct ib_queue_pair *qp,
  2035. struct io_buffer *iobuf, int rc ) {
  2036. struct net_device *netdev = ib_qp_get_ownerdata ( qp );
  2037. netdev_tx_complete_err ( netdev, iobuf, rc );
  2038. }
  2039. /**
  2040. * Handle Hermon Ethernet device receive completion
  2041. *
  2042. * @v ibdev Infiniband device
  2043. * @v qp Queue pair
  2044. * @v av Address vector, or NULL
  2045. * @v iobuf I/O buffer
  2046. * @v rc Completion status code
  2047. */
  2048. static void hermon_eth_complete_recv ( struct ib_device *ibdev __unused,
  2049. struct ib_queue_pair *qp,
  2050. struct ib_address_vector *av,
  2051. struct io_buffer *iobuf, int rc ) {
  2052. struct net_device *netdev = ib_qp_get_ownerdata ( qp );
  2053. struct net_device *vlan;
  2054. /* Find VLAN device, if applicable */
  2055. if ( av->vlan_present ) {
  2056. if ( ( vlan = vlan_find ( netdev, av->vlan ) ) != NULL ) {
  2057. netdev = vlan;
  2058. } else if ( rc == 0 ) {
  2059. rc = -ENODEV;
  2060. }
  2061. }
  2062. /* Hand off to network layer */
  2063. if ( rc == 0 ) {
  2064. netdev_rx ( netdev, iobuf );
  2065. } else {
  2066. netdev_rx_err ( netdev, iobuf, rc );
  2067. }
  2068. }
  2069. /** Hermon Ethernet device completion operations */
  2070. static struct ib_completion_queue_operations hermon_eth_cq_op = {
  2071. .complete_send = hermon_eth_complete_send,
  2072. .complete_recv = hermon_eth_complete_recv,
  2073. };
  2074. /**
  2075. * Poll Hermon Ethernet device
  2076. *
  2077. * @v netdev Network device
  2078. */
  2079. static void hermon_eth_poll ( struct net_device *netdev ) {
  2080. struct hermon_port *port = netdev->priv;
  2081. struct ib_device *ibdev = port->ibdev;
  2082. ib_poll_eq ( ibdev );
  2083. }
  2084. /**
  2085. * Open Hermon Ethernet device
  2086. *
  2087. * @v netdev Network device
  2088. * @ret rc Return status code
  2089. */
  2090. static int hermon_eth_open ( struct net_device *netdev ) {
  2091. struct hermon_port *port = netdev->priv;
  2092. struct ib_device *ibdev = port->ibdev;
  2093. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2094. union hermonprm_set_port set_port;
  2095. int rc;
  2096. /* Allocate completion queue */
  2097. port->eth_cq = ib_create_cq ( ibdev, HERMON_ETH_NUM_CQES,
  2098. &hermon_eth_cq_op );
  2099. if ( ! port->eth_cq ) {
  2100. DBGC ( hermon, "Hermon %p port %d could not create completion "
  2101. "queue\n", hermon, ibdev->port );
  2102. rc = -ENOMEM;
  2103. goto err_create_cq;
  2104. }
  2105. /* Allocate queue pair */
  2106. port->eth_qp = ib_create_qp ( ibdev, IB_QPT_ETH,
  2107. HERMON_ETH_NUM_SEND_WQES, port->eth_cq,
  2108. HERMON_ETH_NUM_RECV_WQES, port->eth_cq );
  2109. if ( ! port->eth_qp ) {
  2110. DBGC ( hermon, "Hermon %p port %d could not create queue "
  2111. "pair\n", hermon, ibdev->port );
  2112. rc = -ENOMEM;
  2113. goto err_create_qp;
  2114. }
  2115. ib_qp_set_ownerdata ( port->eth_qp, netdev );
  2116. /* Activate queue pair */
  2117. if ( ( rc = ib_modify_qp ( ibdev, port->eth_qp ) ) != 0 ) {
  2118. DBGC ( hermon, "Hermon %p port %d could not modify queue "
  2119. "pair: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2120. goto err_modify_qp;
  2121. }
  2122. /* Fill receive rings */
  2123. ib_refill_recv ( ibdev, port->eth_qp );
  2124. /* Set port general parameters */
  2125. memset ( &set_port, 0, sizeof ( set_port ) );
  2126. MLX_FILL_3 ( &set_port.general, 0,
  2127. v_mtu, 1,
  2128. v_pprx, 1,
  2129. v_pptx, 1 );
  2130. MLX_FILL_1 ( &set_port.general, 1,
  2131. mtu, ( ETH_FRAME_LEN + 40 /* Used by card */ ) );
  2132. MLX_FILL_1 ( &set_port.general, 2,
  2133. pfctx, ( 1 << FCOE_VLAN_PRIORITY ) );
  2134. MLX_FILL_1 ( &set_port.general, 3,
  2135. pfcrx, ( 1 << FCOE_VLAN_PRIORITY ) );
  2136. if ( ( rc = hermon_cmd_set_port ( hermon, 1,
  2137. ( HERMON_SET_PORT_GENERAL_PARAM |
  2138. ibdev->port ),
  2139. &set_port ) ) != 0 ) {
  2140. DBGC ( hermon, "Hermon %p port %d could not set port general "
  2141. "parameters: %s\n",
  2142. hermon, ibdev->port, strerror ( rc ) );
  2143. goto err_set_port_general_params;
  2144. }
  2145. /* Set port receive QP */
  2146. memset ( &set_port, 0, sizeof ( set_port ) );
  2147. MLX_FILL_1 ( &set_port.rqp_calc, 0, base_qpn, port->eth_qp->qpn );
  2148. MLX_FILL_1 ( &set_port.rqp_calc, 2,
  2149. mac_miss_index, 128 /* MAC misses go to promisc QP */ );
  2150. MLX_FILL_2 ( &set_port.rqp_calc, 3,
  2151. vlan_miss_index, 127 /* VLAN misses go to promisc QP */,
  2152. no_vlan_index, 126 /* VLAN-free go to promisc QP */ );
  2153. MLX_FILL_2 ( &set_port.rqp_calc, 5,
  2154. promisc_qpn, port->eth_qp->qpn,
  2155. en_uc_promisc, 1 );
  2156. MLX_FILL_2 ( &set_port.rqp_calc, 6,
  2157. def_mcast_qpn, port->eth_qp->qpn,
  2158. mc_promisc_mode, 2 /* Receive all multicasts */ );
  2159. if ( ( rc = hermon_cmd_set_port ( hermon, 1,
  2160. ( HERMON_SET_PORT_RECEIVE_QP |
  2161. ibdev->port ),
  2162. &set_port ) ) != 0 ) {
  2163. DBGC ( hermon, "Hermon %p port %d could not set port receive "
  2164. "QP: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2165. goto err_set_port_receive_qp;
  2166. }
  2167. /* Initialise port */
  2168. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port ) ) != 0 ) {
  2169. DBGC ( hermon, "Hermon %p port %d could not initialise port: "
  2170. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  2171. goto err_init_port;
  2172. }
  2173. return 0;
  2174. err_init_port:
  2175. err_set_port_receive_qp:
  2176. err_set_port_general_params:
  2177. err_modify_qp:
  2178. ib_destroy_qp ( ibdev, port->eth_qp );
  2179. err_create_qp:
  2180. ib_destroy_cq ( ibdev, port->eth_cq );
  2181. err_create_cq:
  2182. return rc;
  2183. }
  2184. /**
  2185. * Close Hermon Ethernet device
  2186. *
  2187. * @v netdev Network device
  2188. */
  2189. static void hermon_eth_close ( struct net_device *netdev ) {
  2190. struct hermon_port *port = netdev->priv;
  2191. struct ib_device *ibdev = port->ibdev;
  2192. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2193. int rc;
  2194. /* Close port */
  2195. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  2196. DBGC ( hermon, "Hermon %p port %d could not close port: %s\n",
  2197. hermon, ibdev->port, strerror ( rc ) );
  2198. /* Nothing we can do about this */
  2199. }
  2200. /* Tear down the queues */
  2201. ib_destroy_qp ( ibdev, port->eth_qp );
  2202. ib_destroy_cq ( ibdev, port->eth_cq );
  2203. }
  2204. /** Hermon Ethernet network device operations */
  2205. static struct net_device_operations hermon_eth_operations = {
  2206. .open = hermon_eth_open,
  2207. .close = hermon_eth_close,
  2208. .transmit = hermon_eth_transmit,
  2209. .poll = hermon_eth_poll,
  2210. };
  2211. /**
  2212. * Register Hermon Ethernet device
  2213. *
  2214. * @v hermon Hermon device
  2215. * @v port Hermon port
  2216. * @ret rc Return status code
  2217. */
  2218. static int hermon_register_netdev ( struct hermon *hermon,
  2219. struct hermon_port *port ) {
  2220. struct net_device *netdev = port->netdev;
  2221. struct ib_device *ibdev = port->ibdev;
  2222. struct hermonprm_query_port_cap query_port;
  2223. union {
  2224. uint8_t bytes[8];
  2225. uint32_t dwords[2];
  2226. } mac;
  2227. int rc;
  2228. /* Retrieve MAC address */
  2229. if ( ( rc = hermon_cmd_query_port ( hermon, ibdev->port,
  2230. &query_port ) ) != 0 ) {
  2231. DBGC ( hermon, "Hermon %p port %d could not query port: %s\n",
  2232. hermon, ibdev->port, strerror ( rc ) );
  2233. return rc;
  2234. }
  2235. mac.dwords[0] = htonl ( MLX_GET ( &query_port, mac_47_32 ) );
  2236. mac.dwords[1] = htonl ( MLX_GET ( &query_port, mac_31_0 ) );
  2237. memcpy ( netdev->hw_addr,
  2238. &mac.bytes[ sizeof ( mac.bytes ) - ETH_ALEN ], ETH_ALEN );
  2239. /* Register network device */
  2240. if ( ( rc = register_netdev ( netdev ) ) != 0 ) {
  2241. DBGC ( hermon, "Hermon %p port %d could not register network "
  2242. "device: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2243. return rc;
  2244. }
  2245. return 0;
  2246. }
  2247. /**
  2248. * Handle Hermon Ethernet device port state change
  2249. *
  2250. * @v hermon Hermon device
  2251. * @v port Hermon port
  2252. * @v link_up Link is up
  2253. */
  2254. static void hermon_state_change_netdev ( struct hermon *hermon __unused,
  2255. struct hermon_port *port,
  2256. int link_up ) {
  2257. struct net_device *netdev = port->netdev;
  2258. if ( link_up ) {
  2259. netdev_link_up ( netdev );
  2260. } else {
  2261. netdev_link_down ( netdev );
  2262. }
  2263. }
  2264. /**
  2265. * Unregister Hermon Ethernet device
  2266. *
  2267. * @v hermon Hermon device
  2268. * @v port Hermon port
  2269. */
  2270. static void hermon_unregister_netdev ( struct hermon *hermon __unused,
  2271. struct hermon_port *port ) {
  2272. struct net_device *netdev = port->netdev;
  2273. unregister_netdev ( netdev );
  2274. }
  2275. /** Hermon Ethernet port type */
  2276. static struct hermon_port_type hermon_port_type_eth = {
  2277. .register_dev = hermon_register_netdev,
  2278. .state_change = hermon_state_change_netdev,
  2279. .unregister_dev = hermon_unregister_netdev,
  2280. };
  2281. /***************************************************************************
  2282. *
  2283. * Port type detection
  2284. *
  2285. ***************************************************************************
  2286. */
  2287. /** Timeout for port sensing */
  2288. #define HERMON_SENSE_PORT_TIMEOUT ( TICKS_PER_SEC / 2 )
  2289. /**
  2290. * Name port type
  2291. *
  2292. * @v port_type Port type
  2293. * @v port_type_name Port type name
  2294. */
  2295. static inline const char * hermon_name_port_type ( unsigned int port_type ) {
  2296. switch ( port_type ) {
  2297. case HERMON_PORT_TYPE_UNKNOWN: return "unknown";
  2298. case HERMON_PORT_TYPE_IB: return "Infiniband";
  2299. case HERMON_PORT_TYPE_ETH: return "Ethernet";
  2300. default: return "INVALID";
  2301. }
  2302. }
  2303. /**
  2304. * Sense port type
  2305. *
  2306. * @v hermon Hermon device
  2307. * @v port Hermon port
  2308. * @ret port_type Port type, or negative error
  2309. */
  2310. static int hermon_sense_port_type ( struct hermon *hermon,
  2311. struct hermon_port *port ) {
  2312. struct ib_device *ibdev = port->ibdev;
  2313. struct hermonprm_sense_port sense_port;
  2314. int port_type;
  2315. int rc;
  2316. /* If DPDP is not supported, always assume Infiniband */
  2317. if ( ! hermon->cap.dpdp ) {
  2318. port_type = HERMON_PORT_TYPE_IB;
  2319. DBGC ( hermon, "Hermon %p port %d does not support DPDP; "
  2320. "assuming an %s network\n", hermon, ibdev->port,
  2321. hermon_name_port_type ( port_type ) );
  2322. return port_type;
  2323. }
  2324. /* Sense the port type */
  2325. if ( ( rc = hermon_cmd_sense_port ( hermon, ibdev->port,
  2326. &sense_port ) ) != 0 ) {
  2327. DBGC ( hermon, "Hermon %p port %d sense failed: %s\n",
  2328. hermon, ibdev->port, strerror ( rc ) );
  2329. return rc;
  2330. }
  2331. port_type = MLX_GET ( &sense_port, port_type );
  2332. DBGC ( hermon, "Hermon %p port %d sensed an %s network\n",
  2333. hermon, ibdev->port, hermon_name_port_type ( port_type ) );
  2334. return port_type;
  2335. }
  2336. /**
  2337. * Set port type
  2338. *
  2339. * @v hermon Hermon device
  2340. * @v port Hermon port
  2341. * @ret rc Return status code
  2342. */
  2343. static int hermon_set_port_type ( struct hermon *hermon,
  2344. struct hermon_port *port ) {
  2345. struct ib_device *ibdev = port->ibdev;
  2346. struct hermonprm_query_port_cap query_port;
  2347. int ib_supported;
  2348. int eth_supported;
  2349. int port_type;
  2350. unsigned long start;
  2351. unsigned long elapsed;
  2352. int rc;
  2353. /* Check to see which types are supported */
  2354. if ( ( rc = hermon_cmd_query_port ( hermon, ibdev->port,
  2355. &query_port ) ) != 0 ) {
  2356. DBGC ( hermon, "Hermon %p port %d could not query port: %s\n",
  2357. hermon, ibdev->port, strerror ( rc ) );
  2358. return rc;
  2359. }
  2360. ib_supported = MLX_GET ( &query_port, ib );
  2361. eth_supported = MLX_GET ( &query_port, eth );
  2362. DBGC ( hermon, "Hermon %p port %d supports%s%s%s\n",
  2363. hermon, ibdev->port, ( ib_supported ? " Infiniband" : "" ),
  2364. ( ( ib_supported && eth_supported ) ? " and" : "" ),
  2365. ( eth_supported ? " Ethernet" : "" ) );
  2366. /* Sense network, if applicable */
  2367. if ( ib_supported && eth_supported ) {
  2368. /* Both types are supported; try sensing network */
  2369. start = currticks();
  2370. do {
  2371. /* Try sensing port */
  2372. port_type = hermon_sense_port_type ( hermon, port );
  2373. if ( port_type < 0 ) {
  2374. rc = port_type;
  2375. return rc;
  2376. }
  2377. } while ( ( port_type == HERMON_PORT_TYPE_UNKNOWN ) &&
  2378. ( ( elapsed = ( currticks() - start ) ) <
  2379. HERMON_SENSE_PORT_TIMEOUT ) );
  2380. /* Set port type based on sensed network, defaulting
  2381. * to Infiniband if nothing was sensed.
  2382. */
  2383. switch ( port_type ) {
  2384. case HERMON_PORT_TYPE_ETH:
  2385. port->type = &hermon_port_type_eth;
  2386. break;
  2387. case HERMON_PORT_TYPE_IB:
  2388. case HERMON_PORT_TYPE_UNKNOWN:
  2389. port->type = &hermon_port_type_ib;
  2390. break;
  2391. default:
  2392. return -EINVAL;
  2393. }
  2394. } else if ( eth_supported ) {
  2395. port->type = &hermon_port_type_eth;
  2396. } else {
  2397. port->type = &hermon_port_type_ib;
  2398. }
  2399. assert ( port->type != NULL );
  2400. return 0;
  2401. }
  2402. /***************************************************************************
  2403. *
  2404. * Firmware control
  2405. *
  2406. ***************************************************************************
  2407. */
  2408. /**
  2409. * Map virtual to physical address for firmware usage
  2410. *
  2411. * @v hermon Hermon device
  2412. * @v map Mapping function
  2413. * @v va Virtual address
  2414. * @v pa Physical address
  2415. * @v len Length of region
  2416. * @ret rc Return status code
  2417. */
  2418. static int hermon_map_vpm ( struct hermon *hermon,
  2419. int ( *map ) ( struct hermon *hermon,
  2420. const struct hermonprm_virtual_physical_mapping* ),
  2421. uint64_t va, physaddr_t pa, size_t len ) {
  2422. struct hermonprm_virtual_physical_mapping mapping;
  2423. physaddr_t start;
  2424. physaddr_t low;
  2425. physaddr_t high;
  2426. physaddr_t end;
  2427. size_t size;
  2428. int rc;
  2429. /* Sanity checks */
  2430. assert ( ( va & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  2431. assert ( ( pa & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  2432. assert ( ( len & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  2433. /* Calculate starting points */
  2434. start = pa;
  2435. end = ( start + len );
  2436. size = ( 1UL << ( fls ( start ^ end ) - 1 ) );
  2437. low = high = ( end & ~( size - 1 ) );
  2438. assert ( start < low );
  2439. assert ( high <= end );
  2440. /* These mappings tend to generate huge volumes of
  2441. * uninteresting debug data, which basically makes it
  2442. * impossible to use debugging otherwise.
  2443. */
  2444. DBG_DISABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  2445. /* Map blocks in descending order of size */
  2446. while ( size >= HERMON_PAGE_SIZE ) {
  2447. /* Find the next candidate block */
  2448. if ( ( low - size ) >= start ) {
  2449. low -= size;
  2450. pa = low;
  2451. } else if ( ( high + size ) <= end ) {
  2452. pa = high;
  2453. high += size;
  2454. } else {
  2455. size >>= 1;
  2456. continue;
  2457. }
  2458. assert ( ( va & ( size - 1 ) ) == 0 );
  2459. assert ( ( pa & ( size - 1 ) ) == 0 );
  2460. /* Map this block */
  2461. memset ( &mapping, 0, sizeof ( mapping ) );
  2462. MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
  2463. MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
  2464. MLX_FILL_2 ( &mapping, 3,
  2465. log2size, ( ( fls ( size ) - 1 ) - 12 ),
  2466. pa_l, ( pa >> 12 ) );
  2467. if ( ( rc = map ( hermon, &mapping ) ) != 0 ) {
  2468. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  2469. DBGC ( hermon, "Hermon %p could not map %08llx+%zx to "
  2470. "%08lx: %s\n",
  2471. hermon, va, size, pa, strerror ( rc ) );
  2472. return rc;
  2473. }
  2474. va += size;
  2475. }
  2476. assert ( low == start );
  2477. assert ( high == end );
  2478. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  2479. return 0;
  2480. }
  2481. /**
  2482. * Start firmware running
  2483. *
  2484. * @v hermon Hermon device
  2485. * @ret rc Return status code
  2486. */
  2487. static int hermon_start_firmware ( struct hermon *hermon ) {
  2488. struct hermonprm_query_fw fw;
  2489. unsigned int fw_pages;
  2490. size_t fw_size;
  2491. physaddr_t fw_base;
  2492. int rc;
  2493. /* Get firmware parameters */
  2494. if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
  2495. DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
  2496. hermon, strerror ( rc ) );
  2497. goto err_query_fw;
  2498. }
  2499. DBGC ( hermon, "Hermon %p firmware version %d.%d.%d\n", hermon,
  2500. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  2501. MLX_GET ( &fw, fw_rev_subminor ) );
  2502. fw_pages = MLX_GET ( &fw, fw_pages );
  2503. DBGC ( hermon, "Hermon %p requires %d pages (%d kB) for firmware\n",
  2504. hermon, fw_pages, ( fw_pages * 4 ) );
  2505. /* Allocate firmware pages and map firmware area */
  2506. fw_size = ( fw_pages * HERMON_PAGE_SIZE );
  2507. hermon->firmware_area = umalloc ( fw_size );
  2508. if ( ! hermon->firmware_area ) {
  2509. rc = -ENOMEM;
  2510. goto err_alloc_fa;
  2511. }
  2512. fw_base = user_to_phys ( hermon->firmware_area, 0 );
  2513. DBGC ( hermon, "Hermon %p firmware area at physical [%08lx,%08lx)\n",
  2514. hermon, fw_base, ( fw_base + fw_size ) );
  2515. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_fa,
  2516. 0, fw_base, fw_size ) ) != 0 ) {
  2517. DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
  2518. hermon, strerror ( rc ) );
  2519. goto err_map_fa;
  2520. }
  2521. /* Start firmware */
  2522. if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
  2523. DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
  2524. hermon, strerror ( rc ) );
  2525. goto err_run_fw;
  2526. }
  2527. DBGC ( hermon, "Hermon %p firmware started\n", hermon );
  2528. return 0;
  2529. err_run_fw:
  2530. err_map_fa:
  2531. hermon_cmd_unmap_fa ( hermon );
  2532. ufree ( hermon->firmware_area );
  2533. hermon->firmware_area = UNULL;
  2534. err_alloc_fa:
  2535. err_query_fw:
  2536. return rc;
  2537. }
  2538. /**
  2539. * Stop firmware running
  2540. *
  2541. * @v hermon Hermon device
  2542. */
  2543. static void hermon_stop_firmware ( struct hermon *hermon ) {
  2544. int rc;
  2545. if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
  2546. DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
  2547. hermon, strerror ( rc ) );
  2548. /* Leak memory and return; at least we avoid corruption */
  2549. return;
  2550. }
  2551. ufree ( hermon->firmware_area );
  2552. hermon->firmware_area = UNULL;
  2553. }
  2554. /***************************************************************************
  2555. *
  2556. * Infinihost Context Memory management
  2557. *
  2558. ***************************************************************************
  2559. */
  2560. /**
  2561. * Get device limits
  2562. *
  2563. * @v hermon Hermon device
  2564. * @ret rc Return status code
  2565. */
  2566. static int hermon_get_cap ( struct hermon *hermon ) {
  2567. struct hermonprm_query_dev_cap dev_cap;
  2568. int rc;
  2569. if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
  2570. DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
  2571. hermon, strerror ( rc ) );
  2572. return rc;
  2573. }
  2574. hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
  2575. hermon->cap.reserved_qps =
  2576. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
  2577. hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
  2578. hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
  2579. hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
  2580. hermon->cap.reserved_srqs =
  2581. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
  2582. hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
  2583. hermon->cap.reserved_cqs =
  2584. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
  2585. hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
  2586. hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
  2587. hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
  2588. hermon->cap.reserved_mtts =
  2589. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
  2590. hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
  2591. hermon->cap.reserved_mrws =
  2592. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
  2593. hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
  2594. hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
  2595. hermon->cap.num_ports = MLX_GET ( &dev_cap, num_ports );
  2596. hermon->cap.dpdp = MLX_GET ( &dev_cap, dpdp );
  2597. /* Sanity check */
  2598. if ( hermon->cap.num_ports > HERMON_MAX_PORTS ) {
  2599. DBGC ( hermon, "Hermon %p has %d ports (only %d supported)\n",
  2600. hermon, hermon->cap.num_ports, HERMON_MAX_PORTS );
  2601. hermon->cap.num_ports = HERMON_MAX_PORTS;
  2602. }
  2603. return 0;
  2604. }
  2605. /**
  2606. * Align ICM table
  2607. *
  2608. * @v icm_offset Current ICM offset
  2609. * @v len ICM table length
  2610. * @ret icm_offset ICM offset
  2611. */
  2612. static uint64_t icm_align ( uint64_t icm_offset, size_t len ) {
  2613. /* Round up to a multiple of the table size */
  2614. assert ( len == ( 1UL << ( fls ( len ) - 1 ) ) );
  2615. return ( ( icm_offset + len - 1 ) & ~( ( ( uint64_t ) len ) - 1 ) );
  2616. }
  2617. /**
  2618. * Allocate ICM
  2619. *
  2620. * @v hermon Hermon device
  2621. * @v init_hca INIT_HCA structure to fill in
  2622. * @ret rc Return status code
  2623. */
  2624. static int hermon_alloc_icm ( struct hermon *hermon,
  2625. struct hermonprm_init_hca *init_hca ) {
  2626. struct hermonprm_scalar_parameter icm_size;
  2627. struct hermonprm_scalar_parameter icm_aux_size;
  2628. uint64_t icm_offset = 0;
  2629. unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
  2630. unsigned int log_num_mtts, log_num_mpts, log_num_mcs;
  2631. size_t cmpt_max_len;
  2632. size_t icm_len, icm_aux_len;
  2633. size_t len;
  2634. physaddr_t icm_phys;
  2635. int i;
  2636. int rc;
  2637. /*
  2638. * Start by carving up the ICM virtual address space
  2639. *
  2640. */
  2641. /* Calculate number of each object type within ICM */
  2642. log_num_qps = fls ( hermon->cap.reserved_qps +
  2643. HERMON_RSVD_SPECIAL_QPS + HERMON_MAX_QPS - 1 );
  2644. log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
  2645. log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
  2646. log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
  2647. log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
  2648. log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
  2649. log_num_mcs = HERMON_LOG_MULTICAST_HASH_SIZE;
  2650. /* ICM starts with the cMPT tables, which are sparse */
  2651. cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
  2652. ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
  2653. len = ( ( ( ( 1 << log_num_qps ) * hermon->cap.cmpt_entry_size ) +
  2654. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2655. hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
  2656. hermon->icm_map[HERMON_ICM_QP_CMPT].len = len;
  2657. icm_offset += cmpt_max_len;
  2658. len = ( ( ( ( 1 << log_num_srqs ) * hermon->cap.cmpt_entry_size ) +
  2659. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2660. hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
  2661. hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = len;
  2662. icm_offset += cmpt_max_len;
  2663. len = ( ( ( ( 1 << log_num_cqs ) * hermon->cap.cmpt_entry_size ) +
  2664. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2665. hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
  2666. hermon->icm_map[HERMON_ICM_CQ_CMPT].len = len;
  2667. icm_offset += cmpt_max_len;
  2668. len = ( ( ( ( 1 << log_num_eqs ) * hermon->cap.cmpt_entry_size ) +
  2669. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2670. hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
  2671. hermon->icm_map[HERMON_ICM_EQ_CMPT].len = len;
  2672. icm_offset += cmpt_max_len;
  2673. hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
  2674. /* Queue pair contexts */
  2675. len = ( ( 1 << log_num_qps ) * hermon->cap.qpc_entry_size );
  2676. icm_offset = icm_align ( icm_offset, len );
  2677. MLX_FILL_1 ( init_hca, 12,
  2678. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
  2679. ( icm_offset >> 32 ) );
  2680. MLX_FILL_2 ( init_hca, 13,
  2681. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  2682. ( icm_offset >> 5 ),
  2683. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  2684. log_num_qps );
  2685. DBGC ( hermon, "Hermon %p ICM QPC is %d x %#zx at [%08llx,%08llx)\n",
  2686. hermon, ( 1 << log_num_qps ), hermon->cap.qpc_entry_size,
  2687. icm_offset, ( icm_offset + len ) );
  2688. icm_offset += len;
  2689. /* Extended alternate path contexts */
  2690. len = ( ( 1 << log_num_qps ) * hermon->cap.altc_entry_size );
  2691. icm_offset = icm_align ( icm_offset, len );
  2692. MLX_FILL_1 ( init_hca, 24,
  2693. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
  2694. ( icm_offset >> 32 ) );
  2695. MLX_FILL_1 ( init_hca, 25,
  2696. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
  2697. icm_offset );
  2698. DBGC ( hermon, "Hermon %p ICM ALTC is %d x %#zx at [%08llx,%08llx)\n",
  2699. hermon, ( 1 << log_num_qps ), hermon->cap.altc_entry_size,
  2700. icm_offset, ( icm_offset + len ) );
  2701. icm_offset += len;
  2702. /* Extended auxiliary contexts */
  2703. len = ( ( 1 << log_num_qps ) * hermon->cap.auxc_entry_size );
  2704. icm_offset = icm_align ( icm_offset, len );
  2705. MLX_FILL_1 ( init_hca, 28,
  2706. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
  2707. ( icm_offset >> 32 ) );
  2708. MLX_FILL_1 ( init_hca, 29,
  2709. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
  2710. icm_offset );
  2711. DBGC ( hermon, "Hermon %p ICM AUXC is %d x %#zx at [%08llx,%08llx)\n",
  2712. hermon, ( 1 << log_num_qps ), hermon->cap.auxc_entry_size,
  2713. icm_offset, ( icm_offset + len ) );
  2714. icm_offset += len;
  2715. /* Shared receive queue contexts */
  2716. len = ( ( 1 << log_num_srqs ) * hermon->cap.srqc_entry_size );
  2717. icm_offset = icm_align ( icm_offset, len );
  2718. MLX_FILL_1 ( init_hca, 18,
  2719. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
  2720. ( icm_offset >> 32 ) );
  2721. MLX_FILL_2 ( init_hca, 19,
  2722. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  2723. ( icm_offset >> 5 ),
  2724. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  2725. log_num_srqs );
  2726. DBGC ( hermon, "Hermon %p ICM SRQC is %d x %#zx at [%08llx,%08llx)\n",
  2727. hermon, ( 1 << log_num_srqs ), hermon->cap.srqc_entry_size,
  2728. icm_offset, ( icm_offset + len ) );
  2729. icm_offset += len;
  2730. /* Completion queue contexts */
  2731. len = ( ( 1 << log_num_cqs ) * hermon->cap.cqc_entry_size );
  2732. icm_offset = icm_align ( icm_offset, len );
  2733. MLX_FILL_1 ( init_hca, 20,
  2734. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
  2735. ( icm_offset >> 32 ) );
  2736. MLX_FILL_2 ( init_hca, 21,
  2737. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  2738. ( icm_offset >> 5 ),
  2739. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  2740. log_num_cqs );
  2741. DBGC ( hermon, "Hermon %p ICM CQC is %d x %#zx at [%08llx,%08llx)\n",
  2742. hermon, ( 1 << log_num_cqs ), hermon->cap.cqc_entry_size,
  2743. icm_offset, ( icm_offset + len ) );
  2744. icm_offset += len;
  2745. /* Event queue contexts */
  2746. len = ( ( 1 << log_num_eqs ) * hermon->cap.eqc_entry_size );
  2747. icm_offset = icm_align ( icm_offset, len );
  2748. MLX_FILL_1 ( init_hca, 32,
  2749. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
  2750. ( icm_offset >> 32 ) );
  2751. MLX_FILL_2 ( init_hca, 33,
  2752. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  2753. ( icm_offset >> 5 ),
  2754. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
  2755. log_num_eqs );
  2756. DBGC ( hermon, "Hermon %p ICM EQC is %d x %#zx at [%08llx,%08llx)\n",
  2757. hermon, ( 1 << log_num_eqs ), hermon->cap.eqc_entry_size,
  2758. icm_offset, ( icm_offset + len ) );
  2759. icm_offset += len;
  2760. /* Memory translation table */
  2761. len = ( ( 1 << log_num_mtts ) * hermon->cap.mtt_entry_size );
  2762. icm_offset = icm_align ( icm_offset, len );
  2763. MLX_FILL_1 ( init_hca, 64,
  2764. tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
  2765. MLX_FILL_1 ( init_hca, 65,
  2766. tpt_parameters.mtt_base_addr_l, icm_offset );
  2767. DBGC ( hermon, "Hermon %p ICM MTT is %d x %#zx at [%08llx,%08llx)\n",
  2768. hermon, ( 1 << log_num_mtts ), hermon->cap.mtt_entry_size,
  2769. icm_offset, ( icm_offset + len ) );
  2770. icm_offset += len;
  2771. /* Memory protection table */
  2772. len = ( ( 1 << log_num_mpts ) * hermon->cap.dmpt_entry_size );
  2773. icm_offset = icm_align ( icm_offset, len );
  2774. MLX_FILL_1 ( init_hca, 60,
  2775. tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
  2776. MLX_FILL_1 ( init_hca, 61,
  2777. tpt_parameters.dmpt_base_adr_l, icm_offset );
  2778. MLX_FILL_1 ( init_hca, 62,
  2779. tpt_parameters.log_dmpt_sz, log_num_mpts );
  2780. DBGC ( hermon, "Hermon %p ICM DMPT is %d x %#zx at [%08llx,%08llx)\n",
  2781. hermon, ( 1 << log_num_mpts ), hermon->cap.dmpt_entry_size,
  2782. icm_offset, ( icm_offset + len ) );
  2783. icm_offset += len;
  2784. /* Multicast table */
  2785. len = ( ( 1 << log_num_mcs ) * sizeof ( struct hermonprm_mcg_entry ) );
  2786. icm_offset = icm_align ( icm_offset, len );
  2787. MLX_FILL_1 ( init_hca, 48,
  2788. multicast_parameters.mc_base_addr_h,
  2789. ( icm_offset >> 32 ) );
  2790. MLX_FILL_1 ( init_hca, 49,
  2791. multicast_parameters.mc_base_addr_l, icm_offset );
  2792. MLX_FILL_1 ( init_hca, 52,
  2793. multicast_parameters.log_mc_table_entry_sz,
  2794. fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
  2795. MLX_FILL_1 ( init_hca, 53,
  2796. multicast_parameters.log_mc_table_hash_sz, log_num_mcs );
  2797. MLX_FILL_1 ( init_hca, 54,
  2798. multicast_parameters.log_mc_table_sz, log_num_mcs );
  2799. DBGC ( hermon, "Hermon %p ICM MC is %d x %#zx at [%08llx,%08llx)\n",
  2800. hermon, ( 1 << log_num_mcs ),
  2801. sizeof ( struct hermonprm_mcg_entry ),
  2802. icm_offset, ( icm_offset + len ) );
  2803. icm_offset += len;
  2804. hermon->icm_map[HERMON_ICM_OTHER].len =
  2805. ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
  2806. /*
  2807. * Allocate and map physical memory for (portions of) ICM
  2808. *
  2809. * Map is:
  2810. * ICM AUX area (aligned to its own size)
  2811. * cMPT areas
  2812. * Other areas
  2813. */
  2814. /* Calculate physical memory required for ICM */
  2815. icm_len = 0;
  2816. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2817. icm_len += hermon->icm_map[i].len;
  2818. }
  2819. /* Get ICM auxiliary area size */
  2820. memset ( &icm_size, 0, sizeof ( icm_size ) );
  2821. MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
  2822. MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
  2823. if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
  2824. &icm_aux_size ) ) != 0 ) {
  2825. DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
  2826. hermon, strerror ( rc ) );
  2827. goto err_set_icm_size;
  2828. }
  2829. icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
  2830. /* Allocate ICM data and auxiliary area */
  2831. DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
  2832. hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
  2833. hermon->icm = umalloc ( icm_aux_len + icm_len );
  2834. if ( ! hermon->icm ) {
  2835. rc = -ENOMEM;
  2836. goto err_alloc;
  2837. }
  2838. icm_phys = user_to_phys ( hermon->icm, 0 );
  2839. /* Map ICM auxiliary area */
  2840. DBGC ( hermon, "Hermon %p mapping ICM AUX => %08lx\n",
  2841. hermon, icm_phys );
  2842. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm_aux,
  2843. 0, icm_phys, icm_aux_len ) ) != 0 ) {
  2844. DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
  2845. hermon, strerror ( rc ) );
  2846. goto err_map_icm_aux;
  2847. }
  2848. icm_phys += icm_aux_len;
  2849. /* MAP ICM area */
  2850. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2851. DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx => %08lx\n",
  2852. hermon, hermon->icm_map[i].offset,
  2853. hermon->icm_map[i].len, icm_phys );
  2854. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm,
  2855. hermon->icm_map[i].offset,
  2856. icm_phys,
  2857. hermon->icm_map[i].len ) ) != 0 ){
  2858. DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
  2859. hermon, strerror ( rc ) );
  2860. goto err_map_icm;
  2861. }
  2862. icm_phys += hermon->icm_map[i].len;
  2863. }
  2864. return 0;
  2865. err_map_icm:
  2866. assert ( i == 0 ); /* We don't handle partial failure at present */
  2867. err_map_icm_aux:
  2868. hermon_cmd_unmap_icm_aux ( hermon );
  2869. ufree ( hermon->icm );
  2870. hermon->icm = UNULL;
  2871. err_alloc:
  2872. err_set_icm_size:
  2873. return rc;
  2874. }
  2875. /**
  2876. * Free ICM
  2877. *
  2878. * @v hermon Hermon device
  2879. */
  2880. static void hermon_free_icm ( struct hermon *hermon ) {
  2881. struct hermonprm_scalar_parameter unmap_icm;
  2882. int i;
  2883. for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
  2884. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2885. MLX_FILL_1 ( &unmap_icm, 0, value_hi,
  2886. ( hermon->icm_map[i].offset >> 32 ) );
  2887. MLX_FILL_1 ( &unmap_icm, 1, value,
  2888. hermon->icm_map[i].offset );
  2889. hermon_cmd_unmap_icm ( hermon,
  2890. ( 1 << fls ( ( hermon->icm_map[i].len /
  2891. HERMON_PAGE_SIZE ) - 1)),
  2892. &unmap_icm );
  2893. }
  2894. hermon_cmd_unmap_icm_aux ( hermon );
  2895. ufree ( hermon->icm );
  2896. hermon->icm = UNULL;
  2897. }
  2898. /***************************************************************************
  2899. *
  2900. * PCI interface
  2901. *
  2902. ***************************************************************************
  2903. */
  2904. /**
  2905. * Set up memory protection table
  2906. *
  2907. * @v hermon Hermon device
  2908. * @ret rc Return status code
  2909. */
  2910. static int hermon_setup_mpt ( struct hermon *hermon ) {
  2911. struct hermonprm_mpt mpt;
  2912. uint32_t key;
  2913. int rc;
  2914. /* Derive key */
  2915. key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
  2916. hermon->lkey = ( ( key << 8 ) | ( key >> 24 ) );
  2917. /* Initialise memory protection table */
  2918. memset ( &mpt, 0, sizeof ( mpt ) );
  2919. MLX_FILL_7 ( &mpt, 0,
  2920. atomic, 1,
  2921. rw, 1,
  2922. rr, 1,
  2923. lw, 1,
  2924. lr, 1,
  2925. pa, 1,
  2926. r_w, 1 );
  2927. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  2928. MLX_FILL_1 ( &mpt, 3,
  2929. pd, HERMON_GLOBAL_PD );
  2930. MLX_FILL_1 ( &mpt, 10, len64, 1 );
  2931. if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
  2932. hermon->cap.reserved_mrws,
  2933. &mpt ) ) != 0 ) {
  2934. DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
  2935. hermon, strerror ( rc ) );
  2936. return rc;
  2937. }
  2938. return 0;
  2939. }
  2940. /**
  2941. * Configure special queue pairs
  2942. *
  2943. * @v hermon Hermon device
  2944. * @ret rc Return status code
  2945. */
  2946. static int hermon_configure_special_qps ( struct hermon *hermon ) {
  2947. int rc;
  2948. /* Special QP block must be aligned on its own size */
  2949. hermon->special_qpn_base = ( ( hermon->cap.reserved_qps +
  2950. HERMON_NUM_SPECIAL_QPS - 1 )
  2951. & ~( HERMON_NUM_SPECIAL_QPS - 1 ) );
  2952. hermon->qpn_base = ( hermon->special_qpn_base +
  2953. HERMON_NUM_SPECIAL_QPS );
  2954. DBGC ( hermon, "Hermon %p special QPs at [%lx,%lx]\n", hermon,
  2955. hermon->special_qpn_base, ( hermon->qpn_base - 1 ) );
  2956. /* Issue command to configure special QPs */
  2957. if ( ( rc = hermon_cmd_conf_special_qp ( hermon, 0x00,
  2958. hermon->special_qpn_base ) ) != 0 ) {
  2959. DBGC ( hermon, "Hermon %p could not configure special QPs: "
  2960. "%s\n", hermon, strerror ( rc ) );
  2961. return rc;
  2962. }
  2963. return 0;
  2964. }
  2965. /**
  2966. * Reset device
  2967. *
  2968. * @v hermon Hermon device
  2969. * @v pci PCI device
  2970. */
  2971. static void hermon_reset ( struct hermon *hermon,
  2972. struct pci_device *pci ) {
  2973. struct pci_config_backup backup;
  2974. static const uint8_t backup_exclude[] =
  2975. PCI_CONFIG_BACKUP_EXCLUDE ( 0x58, 0x5c );
  2976. pci_backup ( pci, &backup, backup_exclude );
  2977. writel ( HERMON_RESET_MAGIC,
  2978. ( hermon->config + HERMON_RESET_OFFSET ) );
  2979. mdelay ( HERMON_RESET_WAIT_TIME_MS );
  2980. pci_restore ( pci, &backup, backup_exclude );
  2981. }
  2982. /**
  2983. * Probe PCI device
  2984. *
  2985. * @v pci PCI device
  2986. * @v id PCI ID
  2987. * @ret rc Return status code
  2988. */
  2989. static int hermon_probe ( struct pci_device *pci,
  2990. const struct pci_device_id *id __unused ) {
  2991. struct hermon *hermon;
  2992. struct ib_device *ibdev;
  2993. struct net_device *netdev;
  2994. struct hermon_port *port;
  2995. struct hermonprm_init_hca init_hca;
  2996. unsigned int i;
  2997. int rc;
  2998. /* Allocate Hermon device */
  2999. hermon = zalloc ( sizeof ( *hermon ) );
  3000. if ( ! hermon ) {
  3001. rc = -ENOMEM;
  3002. goto err_alloc_hermon;
  3003. }
  3004. pci_set_drvdata ( pci, hermon );
  3005. /* Fix up PCI device */
  3006. adjust_pci_device ( pci );
  3007. /* Get PCI BARs */
  3008. hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR),
  3009. HERMON_PCI_CONFIG_BAR_SIZE );
  3010. hermon->uar = ioremap ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ),
  3011. HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE );
  3012. /* Reset device */
  3013. hermon_reset ( hermon, pci );
  3014. /* Allocate space for mailboxes */
  3015. hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
  3016. HERMON_MBOX_ALIGN );
  3017. if ( ! hermon->mailbox_in ) {
  3018. rc = -ENOMEM;
  3019. goto err_mailbox_in;
  3020. }
  3021. hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
  3022. HERMON_MBOX_ALIGN );
  3023. if ( ! hermon->mailbox_out ) {
  3024. rc = -ENOMEM;
  3025. goto err_mailbox_out;
  3026. }
  3027. /* Start firmware */
  3028. if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
  3029. goto err_start_firmware;
  3030. /* Get device limits */
  3031. if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
  3032. goto err_get_cap;
  3033. /* Allocate Infiniband devices */
  3034. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3035. ibdev = alloc_ibdev ( 0 );
  3036. if ( ! ibdev ) {
  3037. rc = -ENOMEM;
  3038. goto err_alloc_ibdev;
  3039. }
  3040. hermon->port[i].ibdev = ibdev;
  3041. ibdev->op = &hermon_ib_operations;
  3042. ibdev->dev = &pci->dev;
  3043. ibdev->port = ( HERMON_PORT_BASE + i );
  3044. ib_set_drvdata ( ibdev, hermon );
  3045. }
  3046. /* Allocate network devices */
  3047. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3048. netdev = alloc_etherdev ( 0 );
  3049. if ( ! netdev ) {
  3050. rc = -ENOMEM;
  3051. goto err_alloc_netdev;
  3052. }
  3053. hermon->port[i].netdev = netdev;
  3054. netdev_init ( netdev, &hermon_eth_operations );
  3055. netdev->dev = &pci->dev;
  3056. netdev->priv = &hermon->port[i];
  3057. }
  3058. /* Allocate ICM */
  3059. memset ( &init_hca, 0, sizeof ( init_hca ) );
  3060. if ( ( rc = hermon_alloc_icm ( hermon, &init_hca ) ) != 0 )
  3061. goto err_alloc_icm;
  3062. /* Initialise HCA */
  3063. MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
  3064. MLX_FILL_1 ( &init_hca, 5, udp, 1 );
  3065. MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
  3066. if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
  3067. DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
  3068. hermon, strerror ( rc ) );
  3069. goto err_init_hca;
  3070. }
  3071. /* Set up memory protection */
  3072. if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
  3073. goto err_setup_mpt;
  3074. for ( i = 0 ; i < hermon->cap.num_ports ; i++ )
  3075. hermon->port[i].ibdev->rdma_key = hermon->lkey;
  3076. /* Set up event queue */
  3077. if ( ( rc = hermon_create_eq ( hermon ) ) != 0 )
  3078. goto err_create_eq;
  3079. /* Configure special QPs */
  3080. if ( ( rc = hermon_configure_special_qps ( hermon ) ) != 0 )
  3081. goto err_conf_special_qps;
  3082. /* Determine port types */
  3083. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3084. port = &hermon->port[i];
  3085. if ( ( rc = hermon_set_port_type ( hermon, port ) ) != 0 )
  3086. goto err_set_port_type;
  3087. }
  3088. /* Register devices */
  3089. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3090. port = &hermon->port[i];
  3091. if ( ( rc = port->type->register_dev ( hermon, port ) ) != 0 )
  3092. goto err_register;
  3093. }
  3094. return 0;
  3095. i = hermon->cap.num_ports;
  3096. err_register:
  3097. for ( i-- ; ( signed int ) i >= 0 ; i-- ) {
  3098. port = &hermon->port[i];
  3099. port->type->unregister_dev ( hermon, port );
  3100. }
  3101. err_set_port_type:
  3102. err_conf_special_qps:
  3103. hermon_destroy_eq ( hermon );
  3104. err_create_eq:
  3105. err_setup_mpt:
  3106. hermon_cmd_close_hca ( hermon );
  3107. err_init_hca:
  3108. hermon_free_icm ( hermon );
  3109. err_alloc_icm:
  3110. i = hermon->cap.num_ports;
  3111. err_alloc_netdev:
  3112. for ( i-- ; ( signed int ) i >= 0 ; i-- ) {
  3113. netdev_nullify ( hermon->port[i].netdev );
  3114. netdev_put ( hermon->port[i].netdev );
  3115. }
  3116. i = hermon->cap.num_ports;
  3117. err_alloc_ibdev:
  3118. for ( i-- ; ( signed int ) i >= 0 ; i-- )
  3119. ibdev_put ( hermon->port[i].ibdev );
  3120. err_get_cap:
  3121. hermon_stop_firmware ( hermon );
  3122. err_start_firmware:
  3123. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  3124. err_mailbox_out:
  3125. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  3126. err_mailbox_in:
  3127. free ( hermon );
  3128. err_alloc_hermon:
  3129. return rc;
  3130. }
  3131. /**
  3132. * Remove PCI device
  3133. *
  3134. * @v pci PCI device
  3135. */
  3136. static void hermon_remove ( struct pci_device *pci ) {
  3137. struct hermon *hermon = pci_get_drvdata ( pci );
  3138. struct hermon_port *port;
  3139. int i;
  3140. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- ) {
  3141. port = &hermon->port[i];
  3142. port->type->unregister_dev ( hermon, port );
  3143. }
  3144. hermon_destroy_eq ( hermon );
  3145. hermon_cmd_close_hca ( hermon );
  3146. hermon_free_icm ( hermon );
  3147. hermon_stop_firmware ( hermon );
  3148. hermon_stop_firmware ( hermon );
  3149. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  3150. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  3151. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- ) {
  3152. netdev_nullify ( hermon->port[i].netdev );
  3153. netdev_put ( hermon->port[i].netdev );
  3154. }
  3155. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
  3156. ibdev_put ( hermon->port[i].ibdev );
  3157. free ( hermon );
  3158. }
  3159. static struct pci_device_id hermon_nics[] = {
  3160. PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver", 0 ),
  3161. PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver", 0 ),
  3162. PCI_ROM ( 0x15b3, 0x6732, "mt26418", "MT26418 HCA driver", 0 ),
  3163. PCI_ROM ( 0x15b3, 0x673c, "mt26428", "MT26428 HCA driver", 0 ),
  3164. PCI_ROM ( 0x15b3, 0x6746, "mt26438", "MT26438 HCA driver", 0 ),
  3165. PCI_ROM ( 0x15b3, 0x6778, "mt26488", "MT26488 HCA driver", 0 ),
  3166. PCI_ROM ( 0x15b3, 0x6368, "mt25448", "MT25448 HCA driver", 0 ),
  3167. PCI_ROM ( 0x15b3, 0x6750, "mt26448", "MT26448 HCA driver", 0 ),
  3168. PCI_ROM ( 0x15b3, 0x6372, "mt25458", "MT25458 HCA driver", 0 ),
  3169. PCI_ROM ( 0x15b3, 0x675a, "mt26458", "MT26458 HCA driver", 0 ),
  3170. PCI_ROM ( 0x15b3, 0x6764, "mt26468", "MT26468 HCA driver", 0 ),
  3171. PCI_ROM ( 0x15b3, 0x676e, "mt26478", "MT26478 HCA driver", 0 ),
  3172. };
  3173. struct pci_driver hermon_driver __pci_driver = {
  3174. .ids = hermon_nics,
  3175. .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
  3176. .probe = hermon_probe,
  3177. .remove = hermon_remove,
  3178. };