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  1. /*
  2. * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
  3. * Copyright (C) 2008 Mellanox Technologies Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of the
  8. * License, or any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  18. * 02110-1301, USA.
  19. */
  20. FILE_LICENCE ( GPL2_OR_LATER );
  21. #include <stdint.h>
  22. #include <stdlib.h>
  23. #include <stdio.h>
  24. #include <string.h>
  25. #include <strings.h>
  26. #include <unistd.h>
  27. #include <errno.h>
  28. #include <byteswap.h>
  29. #include <ipxe/io.h>
  30. #include <ipxe/pci.h>
  31. #include <ipxe/pcibackup.h>
  32. #include <ipxe/malloc.h>
  33. #include <ipxe/umalloc.h>
  34. #include <ipxe/iobuf.h>
  35. #include <ipxe/netdevice.h>
  36. #include <ipxe/infiniband.h>
  37. #include <ipxe/ib_smc.h>
  38. #include <ipxe/if_ether.h>
  39. #include <ipxe/ethernet.h>
  40. #include <ipxe/fcoe.h>
  41. #include <ipxe/vlan.h>
  42. #include <ipxe/bofm.h>
  43. #include <ipxe/nvsvpd.h>
  44. #include <ipxe/nvo.h>
  45. #include "hermon.h"
  46. /**
  47. * @file
  48. *
  49. * Mellanox Hermon Infiniband HCA
  50. *
  51. */
  52. /***************************************************************************
  53. *
  54. * Queue number allocation
  55. *
  56. ***************************************************************************
  57. */
  58. /**
  59. * Allocate offsets within usage bitmask
  60. *
  61. * @v bits Usage bitmask
  62. * @v bits_len Length of usage bitmask
  63. * @v num_bits Number of contiguous bits to allocate within bitmask
  64. * @ret bit First free bit within bitmask, or negative error
  65. */
  66. static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
  67. unsigned int bits_len,
  68. unsigned int num_bits ) {
  69. unsigned int bit = 0;
  70. hermon_bitmask_t mask = 1;
  71. unsigned int found = 0;
  72. /* Search bits for num_bits contiguous free bits */
  73. while ( bit < bits_len ) {
  74. if ( ( mask & *bits ) == 0 ) {
  75. if ( ++found == num_bits )
  76. goto found;
  77. } else {
  78. found = 0;
  79. }
  80. bit++;
  81. mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
  82. if ( mask == 1 )
  83. bits++;
  84. }
  85. return -ENFILE;
  86. found:
  87. /* Mark bits as in-use */
  88. do {
  89. *bits |= mask;
  90. if ( mask == 1 )
  91. bits--;
  92. mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
  93. } while ( --found );
  94. return ( bit - num_bits + 1 );
  95. }
  96. /**
  97. * Free offsets within usage bitmask
  98. *
  99. * @v bits Usage bitmask
  100. * @v bit Starting bit within bitmask
  101. * @v num_bits Number of contiguous bits to free within bitmask
  102. */
  103. static void hermon_bitmask_free ( hermon_bitmask_t *bits,
  104. int bit, unsigned int num_bits ) {
  105. hermon_bitmask_t mask;
  106. for ( ; num_bits ; bit++, num_bits-- ) {
  107. mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
  108. bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
  109. }
  110. }
  111. /***************************************************************************
  112. *
  113. * HCA commands
  114. *
  115. ***************************************************************************
  116. */
  117. /**
  118. * Wait for Hermon command completion
  119. *
  120. * @v hermon Hermon device
  121. * @v hcr HCA command registers
  122. * @ret rc Return status code
  123. */
  124. static int hermon_cmd_wait ( struct hermon *hermon,
  125. struct hermonprm_hca_command_register *hcr ) {
  126. unsigned int wait;
  127. for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  128. hcr->u.dwords[6] =
  129. readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
  130. if ( ( MLX_GET ( hcr, go ) == 0 ) &&
  131. ( MLX_GET ( hcr, t ) == hermon->toggle ) )
  132. return 0;
  133. mdelay ( 1 );
  134. }
  135. return -EBUSY;
  136. }
  137. /**
  138. * Issue HCA command
  139. *
  140. * @v hermon Hermon device
  141. * @v command Command opcode, flags and input/output lengths
  142. * @v op_mod Opcode modifier (0 if no modifier applicable)
  143. * @v in Input parameters
  144. * @v in_mod Input modifier (0 if no modifier applicable)
  145. * @v out Output parameters
  146. * @ret rc Return status code
  147. */
  148. static int hermon_cmd ( struct hermon *hermon, unsigned long command,
  149. unsigned int op_mod, const void *in,
  150. unsigned int in_mod, void *out ) {
  151. struct hermonprm_hca_command_register hcr;
  152. unsigned int opcode = HERMON_HCR_OPCODE ( command );
  153. size_t in_len = HERMON_HCR_IN_LEN ( command );
  154. size_t out_len = HERMON_HCR_OUT_LEN ( command );
  155. void *in_buffer;
  156. void *out_buffer;
  157. unsigned int status;
  158. unsigned int i;
  159. int rc;
  160. assert ( in_len <= HERMON_MBOX_SIZE );
  161. assert ( out_len <= HERMON_MBOX_SIZE );
  162. DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
  163. hermon, opcode, in_len,
  164. ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  165. ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  166. /* Check that HCR is free */
  167. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  168. DBGC ( hermon, "Hermon %p command interface locked\n",
  169. hermon );
  170. return rc;
  171. }
  172. /* Flip HCR toggle */
  173. hermon->toggle = ( 1 - hermon->toggle );
  174. /* Prepare HCR */
  175. memset ( &hcr, 0, sizeof ( hcr ) );
  176. in_buffer = &hcr.u.dwords[0];
  177. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  178. memset ( hermon->mailbox_in, 0, HERMON_MBOX_SIZE );
  179. in_buffer = hermon->mailbox_in;
  180. MLX_FILL_H ( &hcr, 0, in_param_h, virt_to_bus ( in_buffer ) );
  181. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  182. }
  183. memcpy ( in_buffer, in, in_len );
  184. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  185. out_buffer = &hcr.u.dwords[3];
  186. if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
  187. out_buffer = hermon->mailbox_out;
  188. MLX_FILL_H ( &hcr, 3, out_param_h,
  189. virt_to_bus ( out_buffer ) );
  190. MLX_FILL_1 ( &hcr, 4, out_param_l,
  191. virt_to_bus ( out_buffer ) );
  192. }
  193. MLX_FILL_4 ( &hcr, 6,
  194. opcode, opcode,
  195. opcode_modifier, op_mod,
  196. go, 1,
  197. t, hermon->toggle );
  198. DBGC ( hermon, "Hermon %p issuing command %04x\n",
  199. hermon, opcode );
  200. DBGC2_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  201. &hcr, sizeof ( hcr ) );
  202. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  203. DBGC2 ( hermon, "Input mailbox:\n" );
  204. DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
  205. ( ( in_len < 512 ) ? in_len : 512 ) );
  206. }
  207. /* Issue command */
  208. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  209. i++ ) {
  210. writel ( hcr.u.dwords[i],
  211. hermon->config + HERMON_HCR_REG ( i ) );
  212. barrier();
  213. }
  214. /* Wait for command completion */
  215. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  216. DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
  217. hermon );
  218. DBGC_HDA ( hermon,
  219. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  220. &hcr, sizeof ( hcr ) );
  221. return rc;
  222. }
  223. /* Check command status */
  224. status = MLX_GET ( &hcr, status );
  225. if ( status != 0 ) {
  226. DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
  227. hermon, status );
  228. DBGC_HDA ( hermon,
  229. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  230. &hcr, sizeof ( hcr ) );
  231. return -EIO;
  232. }
  233. /* Read output parameters, if any */
  234. hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
  235. hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
  236. memcpy ( out, out_buffer, out_len );
  237. if ( out_len ) {
  238. DBGC2 ( hermon, "Output%s:\n",
  239. ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
  240. DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
  241. ( ( out_len < 512 ) ? out_len : 512 ) );
  242. }
  243. return 0;
  244. }
  245. static inline int
  246. hermon_cmd_query_dev_cap ( struct hermon *hermon,
  247. struct hermonprm_query_dev_cap *dev_cap ) {
  248. return hermon_cmd ( hermon,
  249. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
  250. 1, sizeof ( *dev_cap ) ),
  251. 0, NULL, 0, dev_cap );
  252. }
  253. static inline int
  254. hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
  255. return hermon_cmd ( hermon,
  256. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
  257. 1, sizeof ( *fw ) ),
  258. 0, NULL, 0, fw );
  259. }
  260. static inline int
  261. hermon_cmd_init_hca ( struct hermon *hermon,
  262. const struct hermonprm_init_hca *init_hca ) {
  263. return hermon_cmd ( hermon,
  264. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
  265. 1, sizeof ( *init_hca ) ),
  266. 0, init_hca, 0, NULL );
  267. }
  268. static inline int
  269. hermon_cmd_close_hca ( struct hermon *hermon ) {
  270. return hermon_cmd ( hermon,
  271. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
  272. 0, NULL, 0, NULL );
  273. }
  274. static inline int
  275. hermon_cmd_init_port ( struct hermon *hermon, unsigned int port ) {
  276. return hermon_cmd ( hermon,
  277. HERMON_HCR_VOID_CMD ( HERMON_HCR_INIT_PORT ),
  278. 0, NULL, port, NULL );
  279. }
  280. static inline int
  281. hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
  282. return hermon_cmd ( hermon,
  283. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
  284. 0, NULL, port, NULL );
  285. }
  286. static inline int
  287. hermon_cmd_set_port ( struct hermon *hermon, int is_ethernet,
  288. unsigned int port_selector,
  289. const union hermonprm_set_port *set_port ) {
  290. return hermon_cmd ( hermon,
  291. HERMON_HCR_IN_CMD ( HERMON_HCR_SET_PORT,
  292. 1, sizeof ( *set_port ) ),
  293. is_ethernet, set_port, port_selector, NULL );
  294. }
  295. static inline int
  296. hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
  297. const struct hermonprm_mpt *mpt ) {
  298. return hermon_cmd ( hermon,
  299. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
  300. 1, sizeof ( *mpt ) ),
  301. 0, mpt, index, NULL );
  302. }
  303. static inline int
  304. hermon_cmd_write_mtt ( struct hermon *hermon,
  305. const struct hermonprm_write_mtt *write_mtt ) {
  306. return hermon_cmd ( hermon,
  307. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
  308. 1, sizeof ( *write_mtt ) ),
  309. 0, write_mtt, 1, NULL );
  310. }
  311. static inline int
  312. hermon_cmd_map_eq ( struct hermon *hermon, unsigned long index_map,
  313. const struct hermonprm_event_mask *mask ) {
  314. return hermon_cmd ( hermon,
  315. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_EQ,
  316. 0, sizeof ( *mask ) ),
  317. 0, mask, index_map, NULL );
  318. }
  319. static inline int
  320. hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
  321. const struct hermonprm_eqc *eqctx ) {
  322. return hermon_cmd ( hermon,
  323. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
  324. 1, sizeof ( *eqctx ) ),
  325. 0, eqctx, index, NULL );
  326. }
  327. static inline int
  328. hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index,
  329. struct hermonprm_eqc *eqctx ) {
  330. return hermon_cmd ( hermon,
  331. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_EQ,
  332. 1, sizeof ( *eqctx ) ),
  333. 1, NULL, index, eqctx );
  334. }
  335. static inline int
  336. hermon_cmd_query_eq ( struct hermon *hermon, unsigned int index,
  337. struct hermonprm_eqc *eqctx ) {
  338. return hermon_cmd ( hermon,
  339. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_EQ,
  340. 1, sizeof ( *eqctx ) ),
  341. 0, NULL, index, eqctx );
  342. }
  343. static inline int
  344. hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
  345. const struct hermonprm_completion_queue_context *cqctx ){
  346. return hermon_cmd ( hermon,
  347. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
  348. 1, sizeof ( *cqctx ) ),
  349. 0, cqctx, cqn, NULL );
  350. }
  351. static inline int
  352. hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
  353. struct hermonprm_completion_queue_context *cqctx ) {
  354. return hermon_cmd ( hermon,
  355. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
  356. 1, sizeof ( *cqctx ) ),
  357. 0, NULL, cqn, cqctx );
  358. }
  359. static inline int
  360. hermon_cmd_query_cq ( struct hermon *hermon, unsigned long cqn,
  361. struct hermonprm_completion_queue_context *cqctx ) {
  362. return hermon_cmd ( hermon,
  363. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_CQ,
  364. 1, sizeof ( *cqctx ) ),
  365. 0, NULL, cqn, cqctx );
  366. }
  367. static inline int
  368. hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
  369. const struct hermonprm_qp_ee_state_transitions *ctx ){
  370. return hermon_cmd ( hermon,
  371. HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
  372. 1, sizeof ( *ctx ) ),
  373. 0, ctx, qpn, NULL );
  374. }
  375. static inline int
  376. hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
  377. const struct hermonprm_qp_ee_state_transitions *ctx ){
  378. return hermon_cmd ( hermon,
  379. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
  380. 1, sizeof ( *ctx ) ),
  381. 0, ctx, qpn, NULL );
  382. }
  383. static inline int
  384. hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
  385. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  386. return hermon_cmd ( hermon,
  387. HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
  388. 1, sizeof ( *ctx ) ),
  389. 0, ctx, qpn, NULL );
  390. }
  391. static inline int
  392. hermon_cmd_rts2rts_qp ( struct hermon *hermon, unsigned long qpn,
  393. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  394. return hermon_cmd ( hermon,
  395. HERMON_HCR_IN_CMD ( HERMON_HCR_RTS2RTS_QP,
  396. 1, sizeof ( *ctx ) ),
  397. 0, ctx, qpn, NULL );
  398. }
  399. static inline int
  400. hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
  401. return hermon_cmd ( hermon,
  402. HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
  403. 0x03, NULL, qpn, NULL );
  404. }
  405. static inline int
  406. hermon_cmd_query_qp ( struct hermon *hermon, unsigned long qpn,
  407. struct hermonprm_qp_ee_state_transitions *ctx ) {
  408. return hermon_cmd ( hermon,
  409. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_QP,
  410. 1, sizeof ( *ctx ) ),
  411. 0, NULL, qpn, ctx );
  412. }
  413. static inline int
  414. hermon_cmd_conf_special_qp ( struct hermon *hermon, unsigned int internal_qps,
  415. unsigned long base_qpn ) {
  416. return hermon_cmd ( hermon,
  417. HERMON_HCR_VOID_CMD ( HERMON_HCR_CONF_SPECIAL_QP ),
  418. internal_qps, NULL, base_qpn, NULL );
  419. }
  420. static inline int
  421. hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
  422. union hermonprm_mad *mad ) {
  423. return hermon_cmd ( hermon,
  424. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
  425. 1, sizeof ( *mad ),
  426. 1, sizeof ( *mad ) ),
  427. 0x03, mad, port, mad );
  428. }
  429. static inline int
  430. hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
  431. struct hermonprm_mcg_entry *mcg ) {
  432. return hermon_cmd ( hermon,
  433. HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
  434. 1, sizeof ( *mcg ) ),
  435. 0, NULL, index, mcg );
  436. }
  437. static inline int
  438. hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
  439. const struct hermonprm_mcg_entry *mcg ) {
  440. return hermon_cmd ( hermon,
  441. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
  442. 1, sizeof ( *mcg ) ),
  443. 0, mcg, index, NULL );
  444. }
  445. static inline int
  446. hermon_cmd_mgid_hash ( struct hermon *hermon, const union ib_gid *gid,
  447. struct hermonprm_mgm_hash *hash ) {
  448. return hermon_cmd ( hermon,
  449. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
  450. 1, sizeof ( *gid ),
  451. 0, sizeof ( *hash ) ),
  452. 0, gid, 0, hash );
  453. }
  454. static inline int
  455. hermon_cmd_mod_stat_cfg ( struct hermon *hermon, unsigned int mode,
  456. unsigned int input_mod,
  457. struct hermonprm_scalar_parameter *portion ) {
  458. return hermon_cmd ( hermon,
  459. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MOD_STAT_CFG,
  460. 0, sizeof ( *portion ),
  461. 0, sizeof ( *portion ) ),
  462. mode, portion, input_mod, portion );
  463. }
  464. static inline int
  465. hermon_cmd_query_port ( struct hermon *hermon, unsigned int port,
  466. struct hermonprm_query_port_cap *query_port ) {
  467. return hermon_cmd ( hermon,
  468. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_PORT,
  469. 1, sizeof ( *query_port ) ),
  470. 0, NULL, port, query_port );
  471. }
  472. static inline int
  473. hermon_cmd_sense_port ( struct hermon *hermon, unsigned int port,
  474. struct hermonprm_sense_port *port_type ) {
  475. return hermon_cmd ( hermon,
  476. HERMON_HCR_OUT_CMD ( HERMON_HCR_SENSE_PORT,
  477. 0, sizeof ( *port_type ) ),
  478. 0, NULL, port, port_type );
  479. }
  480. static inline int
  481. hermon_cmd_run_fw ( struct hermon *hermon ) {
  482. return hermon_cmd ( hermon,
  483. HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
  484. 0, NULL, 0, NULL );
  485. }
  486. static inline int
  487. hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
  488. const struct hermonprm_scalar_parameter *offset ) {
  489. return hermon_cmd ( hermon,
  490. HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
  491. 0, sizeof ( *offset ) ),
  492. 0, offset, page_count, NULL );
  493. }
  494. static inline int
  495. hermon_cmd_map_icm ( struct hermon *hermon,
  496. const struct hermonprm_virtual_physical_mapping *map ) {
  497. return hermon_cmd ( hermon,
  498. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
  499. 1, sizeof ( *map ) ),
  500. 0, map, 1, NULL );
  501. }
  502. static inline int
  503. hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
  504. return hermon_cmd ( hermon,
  505. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
  506. 0, NULL, 0, NULL );
  507. }
  508. static inline int
  509. hermon_cmd_map_icm_aux ( struct hermon *hermon,
  510. const struct hermonprm_virtual_physical_mapping *map ) {
  511. return hermon_cmd ( hermon,
  512. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
  513. 1, sizeof ( *map ) ),
  514. 0, map, 1, NULL );
  515. }
  516. static inline int
  517. hermon_cmd_set_icm_size ( struct hermon *hermon,
  518. const struct hermonprm_scalar_parameter *icm_size,
  519. struct hermonprm_scalar_parameter *icm_aux_size ) {
  520. return hermon_cmd ( hermon,
  521. HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
  522. 0, sizeof ( *icm_size ),
  523. 0, sizeof (*icm_aux_size) ),
  524. 0, icm_size, 0, icm_aux_size );
  525. }
  526. static inline int
  527. hermon_cmd_unmap_fa ( struct hermon *hermon ) {
  528. return hermon_cmd ( hermon,
  529. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
  530. 0, NULL, 0, NULL );
  531. }
  532. static inline int
  533. hermon_cmd_map_fa ( struct hermon *hermon,
  534. const struct hermonprm_virtual_physical_mapping *map ) {
  535. return hermon_cmd ( hermon,
  536. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
  537. 1, sizeof ( *map ) ),
  538. 0, map, 1, NULL );
  539. }
  540. /***************************************************************************
  541. *
  542. * Memory translation table operations
  543. *
  544. ***************************************************************************
  545. */
  546. /**
  547. * Allocate MTT entries
  548. *
  549. * @v hermon Hermon device
  550. * @v memory Memory to map into MTT
  551. * @v len Length of memory to map
  552. * @v mtt MTT descriptor to fill in
  553. * @ret rc Return status code
  554. */
  555. static int hermon_alloc_mtt ( struct hermon *hermon,
  556. const void *memory, size_t len,
  557. struct hermon_mtt *mtt ) {
  558. struct hermonprm_write_mtt write_mtt;
  559. physaddr_t start;
  560. physaddr_t addr;
  561. unsigned int page_offset;
  562. unsigned int num_pages;
  563. int mtt_offset;
  564. unsigned int mtt_base_addr;
  565. unsigned int i;
  566. int rc;
  567. /* Find available MTT entries */
  568. start = virt_to_phys ( memory );
  569. page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
  570. start -= page_offset;
  571. len += page_offset;
  572. num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
  573. mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
  574. num_pages );
  575. if ( mtt_offset < 0 ) {
  576. DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
  577. hermon, num_pages );
  578. rc = mtt_offset;
  579. goto err_mtt_offset;
  580. }
  581. mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
  582. hermon->cap.mtt_entry_size );
  583. addr = start;
  584. /* Fill in MTT structure */
  585. mtt->mtt_offset = mtt_offset;
  586. mtt->num_pages = num_pages;
  587. mtt->mtt_base_addr = mtt_base_addr;
  588. mtt->page_offset = page_offset;
  589. /* Construct and issue WRITE_MTT commands */
  590. for ( i = 0 ; i < num_pages ; i++ ) {
  591. memset ( &write_mtt, 0, sizeof ( write_mtt ) );
  592. MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
  593. value, mtt_base_addr );
  594. MLX_FILL_H ( &write_mtt.mtt, 0, ptag_h, addr );
  595. MLX_FILL_2 ( &write_mtt.mtt, 1,
  596. p, 1,
  597. ptag_l, ( addr >> 3 ) );
  598. if ( ( rc = hermon_cmd_write_mtt ( hermon,
  599. &write_mtt ) ) != 0 ) {
  600. DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
  601. hermon, mtt_base_addr );
  602. goto err_write_mtt;
  603. }
  604. addr += HERMON_PAGE_SIZE;
  605. mtt_base_addr += hermon->cap.mtt_entry_size;
  606. }
  607. DBGC ( hermon, "Hermon %p MTT entries [%#x,%#x] for "
  608. "[%08lx,%08lx,%08lx,%08lx)\n", hermon, mtt->mtt_offset,
  609. ( mtt->mtt_offset + mtt->num_pages - 1 ), start,
  610. ( start + page_offset ), ( start + len ), addr );
  611. return 0;
  612. err_write_mtt:
  613. hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
  614. err_mtt_offset:
  615. return rc;
  616. }
  617. /**
  618. * Free MTT entries
  619. *
  620. * @v hermon Hermon device
  621. * @v mtt MTT descriptor
  622. */
  623. static void hermon_free_mtt ( struct hermon *hermon,
  624. struct hermon_mtt *mtt ) {
  625. DBGC ( hermon, "Hermon %p MTT entries [%#x,%#x] freed\n",
  626. hermon, mtt->mtt_offset,
  627. ( mtt->mtt_offset + mtt->num_pages - 1 ) );
  628. hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
  629. mtt->num_pages );
  630. }
  631. /***************************************************************************
  632. *
  633. * Static configuration operations
  634. *
  635. ***************************************************************************
  636. */
  637. /**
  638. * Calculate offset within static configuration
  639. *
  640. * @v field Field
  641. * @ret offset Offset
  642. */
  643. #define HERMON_MOD_STAT_CFG_OFFSET( field ) \
  644. ( ( MLX_BIT_OFFSET ( struct hermonprm_mod_stat_cfg_st, field ) / 8 ) \
  645. & ~( sizeof ( struct hermonprm_scalar_parameter ) - 1 ) )
  646. /**
  647. * Query or modify static configuration
  648. *
  649. * @v hermon Hermon device
  650. * @v port Port
  651. * @v mode Command mode
  652. * @v offset Offset within static configuration
  653. * @v stat_cfg Static configuration
  654. * @ret rc Return status code
  655. */
  656. static int hermon_mod_stat_cfg ( struct hermon *hermon, unsigned int port,
  657. unsigned int mode, unsigned int offset,
  658. struct hermonprm_mod_stat_cfg *stat_cfg ) {
  659. struct hermonprm_scalar_parameter *portion =
  660. ( ( void * ) &stat_cfg->u.bytes[offset] );
  661. struct hermonprm_mod_stat_cfg_input_mod mod;
  662. int rc;
  663. /* Sanity check */
  664. assert ( ( offset % sizeof ( *portion ) ) == 0 );
  665. /* Construct input modifier */
  666. memset ( &mod, 0, sizeof ( mod ) );
  667. MLX_FILL_2 ( &mod, 0,
  668. portnum, port,
  669. offset, offset );
  670. /* Issue command */
  671. if ( ( rc = hermon_cmd_mod_stat_cfg ( hermon, mode,
  672. be32_to_cpu ( mod.u.dwords[0] ),
  673. portion ) ) != 0 )
  674. return rc;
  675. return 0;
  676. }
  677. /***************************************************************************
  678. *
  679. * MAD operations
  680. *
  681. ***************************************************************************
  682. */
  683. /**
  684. * Issue management datagram
  685. *
  686. * @v ibdev Infiniband device
  687. * @v mad Management datagram
  688. * @ret rc Return status code
  689. */
  690. static int hermon_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
  691. struct hermon *hermon = ib_get_drvdata ( ibdev );
  692. union hermonprm_mad mad_ifc;
  693. int rc;
  694. linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
  695. mad_size_mismatch );
  696. /* Copy in request packet */
  697. memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
  698. /* Issue MAD */
  699. if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
  700. &mad_ifc ) ) != 0 ) {
  701. DBGC ( hermon, "Hermon %p port %d could not issue MAD IFC: "
  702. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  703. return rc;
  704. }
  705. /* Copy out reply packet */
  706. memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
  707. if ( mad->hdr.status != 0 ) {
  708. DBGC ( hermon, "Hermon %p port %d MAD IFC status %04x\n",
  709. hermon, ibdev->port, ntohs ( mad->hdr.status ) );
  710. return -EIO;
  711. }
  712. return 0;
  713. }
  714. /***************************************************************************
  715. *
  716. * Completion queue operations
  717. *
  718. ***************************************************************************
  719. */
  720. /**
  721. * Dump completion queue context (for debugging only)
  722. *
  723. * @v hermon Hermon device
  724. * @v cq Completion queue
  725. * @ret rc Return status code
  726. */
  727. static __attribute__ (( unused )) int
  728. hermon_dump_cqctx ( struct hermon *hermon, struct ib_completion_queue *cq ) {
  729. struct hermonprm_completion_queue_context cqctx;
  730. int rc;
  731. memset ( &cqctx, 0, sizeof ( cqctx ) );
  732. if ( ( rc = hermon_cmd_query_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  733. DBGC ( hermon, "Hermon %p CQN %#lx QUERY_CQ failed: %s\n",
  734. hermon, cq->cqn, strerror ( rc ) );
  735. return rc;
  736. }
  737. DBGC ( hermon, "Hermon %p CQN %#lx context:\n", hermon, cq->cqn );
  738. DBGC_HDA ( hermon, 0, &cqctx, sizeof ( cqctx ) );
  739. return 0;
  740. }
  741. /**
  742. * Create completion queue
  743. *
  744. * @v ibdev Infiniband device
  745. * @v cq Completion queue
  746. * @ret rc Return status code
  747. */
  748. static int hermon_create_cq ( struct ib_device *ibdev,
  749. struct ib_completion_queue *cq ) {
  750. struct hermon *hermon = ib_get_drvdata ( ibdev );
  751. struct hermon_completion_queue *hermon_cq;
  752. struct hermonprm_completion_queue_context cqctx;
  753. int cqn_offset;
  754. unsigned int i;
  755. int rc;
  756. /* Find a free completion queue number */
  757. cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
  758. HERMON_MAX_CQS, 1 );
  759. if ( cqn_offset < 0 ) {
  760. DBGC ( hermon, "Hermon %p out of completion queues\n",
  761. hermon );
  762. rc = cqn_offset;
  763. goto err_cqn_offset;
  764. }
  765. cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
  766. /* Allocate control structures */
  767. hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
  768. if ( ! hermon_cq ) {
  769. rc = -ENOMEM;
  770. goto err_hermon_cq;
  771. }
  772. /* Allocate doorbell */
  773. hermon_cq->doorbell = malloc_dma ( sizeof ( hermon_cq->doorbell[0] ),
  774. sizeof ( hermon_cq->doorbell[0] ) );
  775. if ( ! hermon_cq->doorbell ) {
  776. rc = -ENOMEM;
  777. goto err_doorbell;
  778. }
  779. memset ( hermon_cq->doorbell, 0, sizeof ( hermon_cq->doorbell[0] ) );
  780. /* Allocate completion queue itself */
  781. hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
  782. hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
  783. sizeof ( hermon_cq->cqe[0] ) );
  784. if ( ! hermon_cq->cqe ) {
  785. rc = -ENOMEM;
  786. goto err_cqe;
  787. }
  788. memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
  789. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  790. MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
  791. }
  792. barrier();
  793. /* Allocate MTT entries */
  794. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
  795. hermon_cq->cqe_size,
  796. &hermon_cq->mtt ) ) != 0 )
  797. goto err_alloc_mtt;
  798. /* Hand queue over to hardware */
  799. memset ( &cqctx, 0, sizeof ( cqctx ) );
  800. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  801. MLX_FILL_1 ( &cqctx, 2,
  802. page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
  803. MLX_FILL_2 ( &cqctx, 3,
  804. usr_page, HERMON_UAR_NON_EQ_PAGE,
  805. log_cq_size, fls ( cq->num_cqes - 1 ) );
  806. MLX_FILL_1 ( &cqctx, 5, c_eqn, hermon->eq.eqn );
  807. MLX_FILL_H ( &cqctx, 6, mtt_base_addr_h,
  808. hermon_cq->mtt.mtt_base_addr );
  809. MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
  810. ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
  811. MLX_FILL_H ( &cqctx, 14, db_record_addr_h,
  812. virt_to_phys ( hermon_cq->doorbell ) );
  813. MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
  814. ( virt_to_phys ( hermon_cq->doorbell ) >> 3 ) );
  815. if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  816. DBGC ( hermon, "Hermon %p CQN %#lx SW2HW_CQ failed: %s\n",
  817. hermon, cq->cqn, strerror ( rc ) );
  818. goto err_sw2hw_cq;
  819. }
  820. DBGC ( hermon, "Hermon %p CQN %#lx ring [%08lx,%08lx), doorbell "
  821. "%08lx\n", hermon, cq->cqn, virt_to_phys ( hermon_cq->cqe ),
  822. ( virt_to_phys ( hermon_cq->cqe ) + hermon_cq->cqe_size ),
  823. virt_to_phys ( hermon_cq->doorbell ) );
  824. ib_cq_set_drvdata ( cq, hermon_cq );
  825. return 0;
  826. err_sw2hw_cq:
  827. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  828. err_alloc_mtt:
  829. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  830. err_cqe:
  831. free_dma ( hermon_cq->doorbell, sizeof ( hermon_cq->doorbell[0] ) );
  832. err_doorbell:
  833. free ( hermon_cq );
  834. err_hermon_cq:
  835. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  836. err_cqn_offset:
  837. return rc;
  838. }
  839. /**
  840. * Destroy completion queue
  841. *
  842. * @v ibdev Infiniband device
  843. * @v cq Completion queue
  844. */
  845. static void hermon_destroy_cq ( struct ib_device *ibdev,
  846. struct ib_completion_queue *cq ) {
  847. struct hermon *hermon = ib_get_drvdata ( ibdev );
  848. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  849. struct hermonprm_completion_queue_context cqctx;
  850. int cqn_offset;
  851. int rc;
  852. /* Take ownership back from hardware */
  853. if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  854. DBGC ( hermon, "Hermon %p CQN %#lx FATAL HW2SW_CQ failed: "
  855. "%s\n", hermon, cq->cqn, strerror ( rc ) );
  856. /* Leak memory and return; at least we avoid corruption */
  857. return;
  858. }
  859. /* Free MTT entries */
  860. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  861. /* Free memory */
  862. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  863. free_dma ( hermon_cq->doorbell, sizeof ( hermon_cq->doorbell[0] ) );
  864. free ( hermon_cq );
  865. /* Mark queue number as free */
  866. cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
  867. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  868. ib_cq_set_drvdata ( cq, NULL );
  869. }
  870. /***************************************************************************
  871. *
  872. * Queue pair operations
  873. *
  874. ***************************************************************************
  875. */
  876. /**
  877. * Assign queue pair number
  878. *
  879. * @v ibdev Infiniband device
  880. * @v qp Queue pair
  881. * @ret rc Return status code
  882. */
  883. static int hermon_alloc_qpn ( struct ib_device *ibdev,
  884. struct ib_queue_pair *qp ) {
  885. struct hermon *hermon = ib_get_drvdata ( ibdev );
  886. unsigned int port_offset;
  887. int qpn_offset;
  888. /* Calculate queue pair number */
  889. port_offset = ( ibdev->port - HERMON_PORT_BASE );
  890. switch ( qp->type ) {
  891. case IB_QPT_SMI:
  892. qp->qpn = ( hermon->special_qpn_base + port_offset );
  893. return 0;
  894. case IB_QPT_GSI:
  895. qp->qpn = ( hermon->special_qpn_base + 2 + port_offset );
  896. return 0;
  897. case IB_QPT_UD:
  898. case IB_QPT_RC:
  899. case IB_QPT_ETH:
  900. /* Find a free queue pair number */
  901. qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
  902. HERMON_MAX_QPS, 1 );
  903. if ( qpn_offset < 0 ) {
  904. DBGC ( hermon, "Hermon %p out of queue pairs\n",
  905. hermon );
  906. return qpn_offset;
  907. }
  908. qp->qpn = ( ( random() & HERMON_QPN_RANDOM_MASK ) |
  909. ( hermon->qpn_base + qpn_offset ) );
  910. return 0;
  911. default:
  912. DBGC ( hermon, "Hermon %p unsupported QP type %d\n",
  913. hermon, qp->type );
  914. return -ENOTSUP;
  915. }
  916. }
  917. /**
  918. * Free queue pair number
  919. *
  920. * @v ibdev Infiniband device
  921. * @v qp Queue pair
  922. */
  923. static void hermon_free_qpn ( struct ib_device *ibdev,
  924. struct ib_queue_pair *qp ) {
  925. struct hermon *hermon = ib_get_drvdata ( ibdev );
  926. int qpn_offset;
  927. qpn_offset = ( ( qp->qpn & ~HERMON_QPN_RANDOM_MASK )
  928. - hermon->qpn_base );
  929. if ( qpn_offset >= 0 )
  930. hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
  931. }
  932. /**
  933. * Calculate transmission rate
  934. *
  935. * @v av Address vector
  936. * @ret hermon_rate Hermon rate
  937. */
  938. static unsigned int hermon_rate ( struct ib_address_vector *av ) {
  939. return ( ( ( av->rate >= IB_RATE_2_5 ) && ( av->rate <= IB_RATE_120 ) )
  940. ? ( av->rate + 5 ) : 0 );
  941. }
  942. /**
  943. * Calculate schedule queue
  944. *
  945. * @v ibdev Infiniband device
  946. * @v qp Queue pair
  947. * @ret sched_queue Schedule queue
  948. */
  949. static unsigned int hermon_sched_queue ( struct ib_device *ibdev,
  950. struct ib_queue_pair *qp ) {
  951. return ( ( ( qp->type == IB_QPT_SMI ) ?
  952. HERMON_SCHED_QP0 : HERMON_SCHED_DEFAULT ) |
  953. ( ( ibdev->port - 1 ) << 6 ) );
  954. }
  955. /** Queue pair transport service type map */
  956. static uint8_t hermon_qp_st[] = {
  957. [IB_QPT_SMI] = HERMON_ST_MLX,
  958. [IB_QPT_GSI] = HERMON_ST_MLX,
  959. [IB_QPT_UD] = HERMON_ST_UD,
  960. [IB_QPT_RC] = HERMON_ST_RC,
  961. [IB_QPT_ETH] = HERMON_ST_MLX,
  962. };
  963. /**
  964. * Dump queue pair context (for debugging only)
  965. *
  966. * @v hermon Hermon device
  967. * @v qp Queue pair
  968. * @ret rc Return status code
  969. */
  970. static __attribute__ (( unused )) int
  971. hermon_dump_qpctx ( struct hermon *hermon, struct ib_queue_pair *qp ) {
  972. struct hermonprm_qp_ee_state_transitions qpctx;
  973. int rc;
  974. memset ( &qpctx, 0, sizeof ( qpctx ) );
  975. if ( ( rc = hermon_cmd_query_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ) {
  976. DBGC ( hermon, "Hermon %p QPN %#lx QUERY_QP failed: %s\n",
  977. hermon, qp->qpn, strerror ( rc ) );
  978. return rc;
  979. }
  980. DBGC ( hermon, "Hermon %p QPN %#lx context:\n", hermon, qp->qpn );
  981. DBGC_HDA ( hermon, 0, &qpctx.u.dwords[2], ( sizeof ( qpctx ) - 8 ) );
  982. return 0;
  983. }
  984. /**
  985. * Create queue pair
  986. *
  987. * @v ibdev Infiniband device
  988. * @v qp Queue pair
  989. * @ret rc Return status code
  990. */
  991. static int hermon_create_qp ( struct ib_device *ibdev,
  992. struct ib_queue_pair *qp ) {
  993. struct hermon *hermon = ib_get_drvdata ( ibdev );
  994. struct hermon_queue_pair *hermon_qp;
  995. struct hermonprm_qp_ee_state_transitions qpctx;
  996. struct hermonprm_wqe_segment_data_ptr *data;
  997. unsigned int i;
  998. int rc;
  999. /* Calculate queue pair number */
  1000. if ( ( rc = hermon_alloc_qpn ( ibdev, qp ) ) != 0 )
  1001. goto err_alloc_qpn;
  1002. /* Allocate control structures */
  1003. hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
  1004. if ( ! hermon_qp ) {
  1005. rc = -ENOMEM;
  1006. goto err_hermon_qp;
  1007. }
  1008. /* Allocate doorbells */
  1009. hermon_qp->recv.doorbell =
  1010. malloc_dma ( sizeof ( hermon_qp->recv.doorbell[0] ),
  1011. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1012. if ( ! hermon_qp->recv.doorbell ) {
  1013. rc = -ENOMEM;
  1014. goto err_recv_doorbell;
  1015. }
  1016. memset ( hermon_qp->recv.doorbell, 0,
  1017. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1018. hermon_qp->send.doorbell =
  1019. ( hermon->uar + HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE +
  1020. HERMON_DB_POST_SND_OFFSET );
  1021. /* Allocate work queue buffer */
  1022. hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
  1023. ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
  1024. hermon_qp->send.num_wqes =
  1025. ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
  1026. hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
  1027. sizeof ( hermon_qp->send.wqe[0] ) );
  1028. hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
  1029. sizeof ( hermon_qp->recv.wqe[0] ) );
  1030. if ( ( qp->type == IB_QPT_SMI ) || ( qp->type == IB_QPT_GSI ) ||
  1031. ( qp->type == IB_QPT_UD ) ) {
  1032. hermon_qp->recv.grh_size = ( qp->recv.num_wqes *
  1033. sizeof ( hermon_qp->recv.grh[0] ));
  1034. }
  1035. hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
  1036. hermon_qp->recv.wqe_size +
  1037. hermon_qp->recv.grh_size );
  1038. hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
  1039. sizeof ( hermon_qp->send.wqe[0] ) );
  1040. if ( ! hermon_qp->wqe ) {
  1041. rc = -ENOMEM;
  1042. goto err_alloc_wqe;
  1043. }
  1044. hermon_qp->send.wqe = hermon_qp->wqe;
  1045. hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
  1046. if ( hermon_qp->recv.grh_size ) {
  1047. hermon_qp->recv.grh = ( hermon_qp->wqe +
  1048. hermon_qp->send.wqe_size +
  1049. hermon_qp->recv.wqe_size );
  1050. }
  1051. /* Initialise work queue entries */
  1052. memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
  1053. memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
  1054. data = &hermon_qp->recv.wqe[0].recv.data[0];
  1055. for ( i = 0 ; i < ( hermon_qp->recv.wqe_size / sizeof ( *data ) ); i++){
  1056. MLX_FILL_1 ( data, 1, l_key, HERMON_INVALID_LKEY );
  1057. data++;
  1058. }
  1059. /* Allocate MTT entries */
  1060. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
  1061. hermon_qp->wqe_size,
  1062. &hermon_qp->mtt ) ) != 0 ) {
  1063. goto err_alloc_mtt;
  1064. }
  1065. /* Transition queue to INIT state */
  1066. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1067. MLX_FILL_2 ( &qpctx, 2,
  1068. qpc_eec_data.pm_state, HERMON_PM_STATE_MIGRATED,
  1069. qpc_eec_data.st, hermon_qp_st[qp->type] );
  1070. MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
  1071. MLX_FILL_4 ( &qpctx, 4,
  1072. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  1073. qpc_eec_data.log_rq_stride,
  1074. ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
  1075. qpc_eec_data.log_sq_size,
  1076. fls ( hermon_qp->send.num_wqes - 1 ),
  1077. qpc_eec_data.log_sq_stride,
  1078. ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
  1079. MLX_FILL_1 ( &qpctx, 5,
  1080. qpc_eec_data.usr_page, HERMON_UAR_NON_EQ_PAGE );
  1081. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  1082. MLX_FILL_4 ( &qpctx, 38,
  1083. qpc_eec_data.rre, 1,
  1084. qpc_eec_data.rwe, 1,
  1085. qpc_eec_data.rae, 1,
  1086. qpc_eec_data.page_offset,
  1087. ( hermon_qp->mtt.page_offset >> 6 ) );
  1088. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  1089. MLX_FILL_H ( &qpctx, 42, qpc_eec_data.db_record_addr_h,
  1090. virt_to_phys ( hermon_qp->recv.doorbell ) );
  1091. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
  1092. ( virt_to_phys ( hermon_qp->recv.doorbell ) >> 2 ) );
  1093. MLX_FILL_H ( &qpctx, 52, qpc_eec_data.mtt_base_addr_h,
  1094. hermon_qp->mtt.mtt_base_addr );
  1095. MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
  1096. ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
  1097. if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
  1098. &qpctx ) ) != 0 ) {
  1099. DBGC ( hermon, "Hermon %p QPN %#lx RST2INIT_QP failed: %s\n",
  1100. hermon, qp->qpn, strerror ( rc ) );
  1101. goto err_rst2init_qp;
  1102. }
  1103. hermon_qp->state = HERMON_QP_ST_INIT;
  1104. DBGC ( hermon, "Hermon %p QPN %#lx send ring [%08lx,%08lx), doorbell "
  1105. "%08lx\n", hermon, qp->qpn,
  1106. virt_to_phys ( hermon_qp->send.wqe ),
  1107. ( virt_to_phys ( hermon_qp->send.wqe ) +
  1108. hermon_qp->send.wqe_size ),
  1109. virt_to_phys ( hermon_qp->send.doorbell ) );
  1110. DBGC ( hermon, "Hermon %p QPN %#lx receive ring [%08lx,%08lx), "
  1111. "doorbell %08lx\n", hermon, qp->qpn,
  1112. virt_to_phys ( hermon_qp->recv.wqe ),
  1113. ( virt_to_phys ( hermon_qp->recv.wqe ) +
  1114. hermon_qp->recv.wqe_size ),
  1115. virt_to_phys ( hermon_qp->recv.doorbell ) );
  1116. DBGC ( hermon, "Hermon %p QPN %#lx send CQN %#lx receive CQN %#lx\n",
  1117. hermon, qp->qpn, qp->send.cq->cqn, qp->recv.cq->cqn );
  1118. ib_qp_set_drvdata ( qp, hermon_qp );
  1119. return 0;
  1120. hermon_cmd_2rst_qp ( hermon, qp->qpn );
  1121. err_rst2init_qp:
  1122. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1123. err_alloc_mtt:
  1124. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1125. err_alloc_wqe:
  1126. free_dma ( hermon_qp->recv.doorbell,
  1127. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1128. err_recv_doorbell:
  1129. free ( hermon_qp );
  1130. err_hermon_qp:
  1131. hermon_free_qpn ( ibdev, qp );
  1132. err_alloc_qpn:
  1133. return rc;
  1134. }
  1135. /**
  1136. * Modify queue pair
  1137. *
  1138. * @v ibdev Infiniband device
  1139. * @v qp Queue pair
  1140. * @ret rc Return status code
  1141. */
  1142. static int hermon_modify_qp ( struct ib_device *ibdev,
  1143. struct ib_queue_pair *qp ) {
  1144. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1145. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1146. struct hermonprm_qp_ee_state_transitions qpctx;
  1147. int rc;
  1148. /* Transition queue to RTR state, if applicable */
  1149. if ( hermon_qp->state < HERMON_QP_ST_RTR ) {
  1150. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1151. MLX_FILL_2 ( &qpctx, 4,
  1152. qpc_eec_data.mtu,
  1153. ( ( qp->type == IB_QPT_ETH ) ?
  1154. HERMON_MTU_ETH : HERMON_MTU_2048 ),
  1155. qpc_eec_data.msg_max, 31 );
  1156. MLX_FILL_1 ( &qpctx, 7,
  1157. qpc_eec_data.remote_qpn_een, qp->av.qpn );
  1158. MLX_FILL_1 ( &qpctx, 9,
  1159. qpc_eec_data.primary_address_path.rlid,
  1160. qp->av.lid );
  1161. MLX_FILL_1 ( &qpctx, 10,
  1162. qpc_eec_data.primary_address_path.max_stat_rate,
  1163. hermon_rate ( &qp->av ) );
  1164. memcpy ( &qpctx.u.dwords[12], &qp->av.gid,
  1165. sizeof ( qp->av.gid ) );
  1166. MLX_FILL_1 ( &qpctx, 16,
  1167. qpc_eec_data.primary_address_path.sched_queue,
  1168. hermon_sched_queue ( ibdev, qp ) );
  1169. MLX_FILL_1 ( &qpctx, 39,
  1170. qpc_eec_data.next_rcv_psn, qp->recv.psn );
  1171. if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
  1172. &qpctx ) ) != 0 ) {
  1173. DBGC ( hermon, "Hermon %p QPN %#lx INIT2RTR_QP failed:"
  1174. " %s\n", hermon, qp->qpn, strerror ( rc ) );
  1175. return rc;
  1176. }
  1177. hermon_qp->state = HERMON_QP_ST_RTR;
  1178. }
  1179. /* Transition queue to RTS state */
  1180. if ( hermon_qp->state < HERMON_QP_ST_RTS ) {
  1181. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1182. MLX_FILL_1 ( &qpctx, 10,
  1183. qpc_eec_data.primary_address_path.ack_timeout,
  1184. 14 /* 4.096us * 2^(14) = 67ms */ );
  1185. MLX_FILL_2 ( &qpctx, 30,
  1186. qpc_eec_data.retry_count, HERMON_RETRY_MAX,
  1187. qpc_eec_data.rnr_retry, HERMON_RETRY_MAX );
  1188. MLX_FILL_1 ( &qpctx, 32,
  1189. qpc_eec_data.next_send_psn, qp->send.psn );
  1190. if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn,
  1191. &qpctx ) ) != 0 ) {
  1192. DBGC ( hermon, "Hermon %p QPN %#lx RTR2RTS_QP failed: "
  1193. "%s\n", hermon, qp->qpn, strerror ( rc ) );
  1194. return rc;
  1195. }
  1196. hermon_qp->state = HERMON_QP_ST_RTS;
  1197. }
  1198. /* Update parameters in RTS state */
  1199. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1200. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, HERMON_QP_OPT_PARAM_QKEY );
  1201. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  1202. if ( ( rc = hermon_cmd_rts2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
  1203. DBGC ( hermon, "Hermon %p QPN %#lx RTS2RTS_QP failed: %s\n",
  1204. hermon, qp->qpn, strerror ( rc ) );
  1205. return rc;
  1206. }
  1207. return 0;
  1208. }
  1209. /**
  1210. * Destroy queue pair
  1211. *
  1212. * @v ibdev Infiniband device
  1213. * @v qp Queue pair
  1214. */
  1215. static void hermon_destroy_qp ( struct ib_device *ibdev,
  1216. struct ib_queue_pair *qp ) {
  1217. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1218. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1219. int rc;
  1220. /* Take ownership back from hardware */
  1221. if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
  1222. DBGC ( hermon, "Hermon %p QPN %#lx FATAL 2RST_QP failed: %s\n",
  1223. hermon, qp->qpn, strerror ( rc ) );
  1224. /* Leak memory and return; at least we avoid corruption */
  1225. return;
  1226. }
  1227. /* Free MTT entries */
  1228. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1229. /* Free memory */
  1230. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1231. free_dma ( hermon_qp->recv.doorbell,
  1232. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1233. free ( hermon_qp );
  1234. /* Mark queue number as free */
  1235. hermon_free_qpn ( ibdev, qp );
  1236. ib_qp_set_drvdata ( qp, NULL );
  1237. }
  1238. /***************************************************************************
  1239. *
  1240. * Work request operations
  1241. *
  1242. ***************************************************************************
  1243. */
  1244. /**
  1245. * Construct UD send work queue entry
  1246. *
  1247. * @v ibdev Infiniband device
  1248. * @v qp Queue pair
  1249. * @v dest Destination address vector
  1250. * @v iobuf I/O buffer
  1251. * @v wqe Send work queue entry
  1252. * @ret opcode Control opcode
  1253. */
  1254. static __attribute__ (( unused )) unsigned int
  1255. hermon_fill_nop_send_wqe ( struct ib_device *ibdev __unused,
  1256. struct ib_queue_pair *qp __unused,
  1257. struct ib_address_vector *dest __unused,
  1258. struct io_buffer *iobuf __unused,
  1259. union hermon_send_wqe *wqe ) {
  1260. MLX_FILL_1 ( &wqe->ctrl, 1, ds, ( sizeof ( wqe->ctrl ) / 16 ) );
  1261. MLX_FILL_1 ( &wqe->ctrl, 2, c, 0x03 /* generate completion */ );
  1262. return HERMON_OPCODE_NOP;
  1263. }
  1264. /**
  1265. * Construct UD send work queue entry
  1266. *
  1267. * @v ibdev Infiniband device
  1268. * @v qp Queue pair
  1269. * @v dest Destination address vector
  1270. * @v iobuf I/O buffer
  1271. * @v wqe Send work queue entry
  1272. * @ret opcode Control opcode
  1273. */
  1274. static unsigned int
  1275. hermon_fill_ud_send_wqe ( struct ib_device *ibdev,
  1276. struct ib_queue_pair *qp __unused,
  1277. struct ib_address_vector *dest,
  1278. struct io_buffer *iobuf,
  1279. union hermon_send_wqe *wqe ) {
  1280. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1281. MLX_FILL_1 ( &wqe->ud.ctrl, 1, ds,
  1282. ( ( offsetof ( typeof ( wqe->ud ), data[1] ) / 16 ) ) );
  1283. MLX_FILL_1 ( &wqe->ud.ctrl, 2, c, 0x03 /* generate completion */ );
  1284. MLX_FILL_2 ( &wqe->ud.ud, 0,
  1285. ud_address_vector.pd, HERMON_GLOBAL_PD,
  1286. ud_address_vector.port_number, ibdev->port );
  1287. MLX_FILL_2 ( &wqe->ud.ud, 1,
  1288. ud_address_vector.rlid, dest->lid,
  1289. ud_address_vector.g, dest->gid_present );
  1290. MLX_FILL_1 ( &wqe->ud.ud, 2,
  1291. ud_address_vector.max_stat_rate, hermon_rate ( dest ) );
  1292. MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, dest->sl );
  1293. memcpy ( &wqe->ud.ud.u.dwords[4], &dest->gid, sizeof ( dest->gid ) );
  1294. MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, dest->qpn );
  1295. MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, dest->qkey );
  1296. MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
  1297. MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, hermon->lkey );
  1298. MLX_FILL_H ( &wqe->ud.data[0], 2,
  1299. local_address_h, virt_to_bus ( iobuf->data ) );
  1300. MLX_FILL_1 ( &wqe->ud.data[0], 3,
  1301. local_address_l, virt_to_bus ( iobuf->data ) );
  1302. return HERMON_OPCODE_SEND;
  1303. }
  1304. /**
  1305. * Construct MLX send work queue entry
  1306. *
  1307. * @v ibdev Infiniband device
  1308. * @v qp Queue pair
  1309. * @v dest Destination address vector
  1310. * @v iobuf I/O buffer
  1311. * @v wqe Send work queue entry
  1312. * @ret opcode Control opcode
  1313. */
  1314. static unsigned int
  1315. hermon_fill_mlx_send_wqe ( struct ib_device *ibdev,
  1316. struct ib_queue_pair *qp,
  1317. struct ib_address_vector *dest,
  1318. struct io_buffer *iobuf,
  1319. union hermon_send_wqe *wqe ) {
  1320. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1321. struct io_buffer headers;
  1322. /* Construct IB headers */
  1323. iob_populate ( &headers, &wqe->mlx.headers, 0,
  1324. sizeof ( wqe->mlx.headers ) );
  1325. iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
  1326. ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), dest );
  1327. /* Fill work queue entry */
  1328. MLX_FILL_1 ( &wqe->mlx.ctrl, 1, ds,
  1329. ( ( offsetof ( typeof ( wqe->mlx ), data[2] ) / 16 ) ) );
  1330. MLX_FILL_5 ( &wqe->mlx.ctrl, 2,
  1331. c, 0x03 /* generate completion */,
  1332. icrc, 0 /* generate ICRC */,
  1333. max_statrate, hermon_rate ( dest ),
  1334. slr, 0,
  1335. v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
  1336. MLX_FILL_1 ( &wqe->mlx.ctrl, 3, rlid, dest->lid );
  1337. MLX_FILL_1 ( &wqe->mlx.data[0], 0,
  1338. byte_count, iob_len ( &headers ) );
  1339. MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, hermon->lkey );
  1340. MLX_FILL_H ( &wqe->mlx.data[0], 2,
  1341. local_address_h, virt_to_bus ( headers.data ) );
  1342. MLX_FILL_1 ( &wqe->mlx.data[0], 3,
  1343. local_address_l, virt_to_bus ( headers.data ) );
  1344. MLX_FILL_1 ( &wqe->mlx.data[1], 0,
  1345. byte_count, ( iob_len ( iobuf ) + 4 /* ICRC */ ) );
  1346. MLX_FILL_1 ( &wqe->mlx.data[1], 1, l_key, hermon->lkey );
  1347. MLX_FILL_H ( &wqe->mlx.data[1], 2,
  1348. local_address_h, virt_to_bus ( iobuf->data ) );
  1349. MLX_FILL_1 ( &wqe->mlx.data[1], 3,
  1350. local_address_l, virt_to_bus ( iobuf->data ) );
  1351. return HERMON_OPCODE_SEND;
  1352. }
  1353. /**
  1354. * Construct RC send work queue entry
  1355. *
  1356. * @v ibdev Infiniband device
  1357. * @v qp Queue pair
  1358. * @v dest Destination address vector
  1359. * @v iobuf I/O buffer
  1360. * @v wqe Send work queue entry
  1361. * @ret opcode Control opcode
  1362. */
  1363. static unsigned int
  1364. hermon_fill_rc_send_wqe ( struct ib_device *ibdev,
  1365. struct ib_queue_pair *qp __unused,
  1366. struct ib_address_vector *dest __unused,
  1367. struct io_buffer *iobuf,
  1368. union hermon_send_wqe *wqe ) {
  1369. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1370. MLX_FILL_1 ( &wqe->rc.ctrl, 1, ds,
  1371. ( ( offsetof ( typeof ( wqe->rc ), data[1] ) / 16 ) ) );
  1372. MLX_FILL_1 ( &wqe->rc.ctrl, 2, c, 0x03 /* generate completion */ );
  1373. MLX_FILL_1 ( &wqe->rc.data[0], 0, byte_count, iob_len ( iobuf ) );
  1374. MLX_FILL_1 ( &wqe->rc.data[0], 1, l_key, hermon->lkey );
  1375. MLX_FILL_H ( &wqe->rc.data[0], 2,
  1376. local_address_h, virt_to_bus ( iobuf->data ) );
  1377. MLX_FILL_1 ( &wqe->rc.data[0], 3,
  1378. local_address_l, virt_to_bus ( iobuf->data ) );
  1379. return HERMON_OPCODE_SEND;
  1380. }
  1381. /**
  1382. * Construct Ethernet send work queue entry
  1383. *
  1384. * @v ibdev Infiniband device
  1385. * @v qp Queue pair
  1386. * @v dest Destination address vector
  1387. * @v iobuf I/O buffer
  1388. * @v wqe Send work queue entry
  1389. * @ret opcode Control opcode
  1390. */
  1391. static unsigned int
  1392. hermon_fill_eth_send_wqe ( struct ib_device *ibdev,
  1393. struct ib_queue_pair *qp __unused,
  1394. struct ib_address_vector *dest __unused,
  1395. struct io_buffer *iobuf,
  1396. union hermon_send_wqe *wqe ) {
  1397. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1398. /* Fill work queue entry */
  1399. MLX_FILL_1 ( &wqe->eth.ctrl, 1, ds,
  1400. ( ( offsetof ( typeof ( wqe->mlx ), data[1] ) / 16 ) ) );
  1401. MLX_FILL_2 ( &wqe->eth.ctrl, 2,
  1402. c, 0x03 /* generate completion */,
  1403. s, 1 /* inhibit ICRC */ );
  1404. MLX_FILL_1 ( &wqe->eth.data[0], 0,
  1405. byte_count, iob_len ( iobuf ) );
  1406. MLX_FILL_1 ( &wqe->eth.data[0], 1, l_key, hermon->lkey );
  1407. MLX_FILL_H ( &wqe->eth.data[0], 2,
  1408. local_address_h, virt_to_bus ( iobuf->data ) );
  1409. MLX_FILL_1 ( &wqe->eth.data[0], 3,
  1410. local_address_l, virt_to_bus ( iobuf->data ) );
  1411. return HERMON_OPCODE_SEND;
  1412. }
  1413. /** Work queue entry constructors */
  1414. static unsigned int
  1415. ( * hermon_fill_send_wqe[] ) ( struct ib_device *ibdev,
  1416. struct ib_queue_pair *qp,
  1417. struct ib_address_vector *dest,
  1418. struct io_buffer *iobuf,
  1419. union hermon_send_wqe *wqe ) = {
  1420. [IB_QPT_SMI] = hermon_fill_mlx_send_wqe,
  1421. [IB_QPT_GSI] = hermon_fill_mlx_send_wqe,
  1422. [IB_QPT_UD] = hermon_fill_ud_send_wqe,
  1423. [IB_QPT_RC] = hermon_fill_rc_send_wqe,
  1424. [IB_QPT_ETH] = hermon_fill_eth_send_wqe,
  1425. };
  1426. /**
  1427. * Post send work queue entry
  1428. *
  1429. * @v ibdev Infiniband device
  1430. * @v qp Queue pair
  1431. * @v dest Destination address vector
  1432. * @v iobuf I/O buffer
  1433. * @ret rc Return status code
  1434. */
  1435. static int hermon_post_send ( struct ib_device *ibdev,
  1436. struct ib_queue_pair *qp,
  1437. struct ib_address_vector *dest,
  1438. struct io_buffer *iobuf ) {
  1439. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1440. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1441. struct ib_work_queue *wq = &qp->send;
  1442. struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
  1443. union hermon_send_wqe *wqe;
  1444. union hermonprm_doorbell_register db_reg;
  1445. unsigned long wqe_idx_mask;
  1446. unsigned long wqe_idx;
  1447. unsigned int owner;
  1448. unsigned int opcode;
  1449. /* Allocate work queue entry */
  1450. wqe_idx = ( wq->next_idx & ( hermon_send_wq->num_wqes - 1 ) );
  1451. owner = ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 );
  1452. wqe_idx_mask = ( wq->num_wqes - 1 );
  1453. if ( wq->iobufs[ wqe_idx & wqe_idx_mask ] ) {
  1454. DBGC ( hermon, "Hermon %p QPN %#lx send queue full",
  1455. hermon, qp->qpn );
  1456. return -ENOBUFS;
  1457. }
  1458. wq->iobufs[ wqe_idx & wqe_idx_mask ] = iobuf;
  1459. wqe = &hermon_send_wq->wqe[wqe_idx];
  1460. /* Construct work queue entry */
  1461. memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
  1462. ( sizeof ( *wqe ) - 4 ) );
  1463. assert ( qp->type < ( sizeof ( hermon_fill_send_wqe ) /
  1464. sizeof ( hermon_fill_send_wqe[0] ) ) );
  1465. assert ( hermon_fill_send_wqe[qp->type] != NULL );
  1466. opcode = hermon_fill_send_wqe[qp->type] ( ibdev, qp, dest, iobuf, wqe );
  1467. barrier();
  1468. MLX_FILL_2 ( &wqe->ctrl, 0,
  1469. opcode, opcode,
  1470. owner, owner );
  1471. DBGCP ( hermon, "Hermon %p QPN %#lx posting send WQE %#lx:\n",
  1472. hermon, qp->qpn, wqe_idx );
  1473. DBGCP_HDA ( hermon, virt_to_phys ( wqe ), wqe, sizeof ( *wqe ) );
  1474. /* Ring doorbell register */
  1475. MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
  1476. barrier();
  1477. writel ( db_reg.dword[0], hermon_send_wq->doorbell );
  1478. /* Update work queue's index */
  1479. wq->next_idx++;
  1480. return 0;
  1481. }
  1482. /**
  1483. * Post receive work queue entry
  1484. *
  1485. * @v ibdev Infiniband device
  1486. * @v qp Queue pair
  1487. * @v iobuf I/O buffer
  1488. * @ret rc Return status code
  1489. */
  1490. static int hermon_post_recv ( struct ib_device *ibdev,
  1491. struct ib_queue_pair *qp,
  1492. struct io_buffer *iobuf ) {
  1493. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1494. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1495. struct ib_work_queue *wq = &qp->recv;
  1496. struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
  1497. struct hermonprm_recv_wqe *wqe;
  1498. struct hermonprm_wqe_segment_data_ptr *data;
  1499. struct ib_global_route_header *grh;
  1500. unsigned int wqe_idx_mask;
  1501. /* Allocate work queue entry */
  1502. wqe_idx_mask = ( wq->num_wqes - 1 );
  1503. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1504. DBGC ( hermon, "Hermon %p QPN %#lx receive queue full",
  1505. hermon, qp->qpn );
  1506. return -ENOBUFS;
  1507. }
  1508. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1509. wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  1510. /* Construct work queue entry */
  1511. data = &wqe->data[0];
  1512. if ( hermon_qp->recv.grh ) {
  1513. grh = &hermon_qp->recv.grh[wq->next_idx & wqe_idx_mask];
  1514. MLX_FILL_1 ( data, 0, byte_count, sizeof ( *grh ) );
  1515. MLX_FILL_1 ( data, 1, l_key, hermon->lkey );
  1516. MLX_FILL_H ( data, 2, local_address_h, virt_to_bus ( grh ) );
  1517. MLX_FILL_1 ( data, 3, local_address_l, virt_to_bus ( grh ) );
  1518. data++;
  1519. }
  1520. MLX_FILL_1 ( data, 0, byte_count, iob_tailroom ( iobuf ) );
  1521. MLX_FILL_1 ( data, 1, l_key, hermon->lkey );
  1522. MLX_FILL_H ( data, 2, local_address_h, virt_to_bus ( iobuf->data ) );
  1523. MLX_FILL_1 ( data, 3, local_address_l, virt_to_bus ( iobuf->data ) );
  1524. /* Update work queue's index */
  1525. wq->next_idx++;
  1526. /* Update doorbell record */
  1527. barrier();
  1528. MLX_FILL_1 ( hermon_recv_wq->doorbell, 0, receive_wqe_counter,
  1529. ( wq->next_idx & 0xffff ) );
  1530. return 0;
  1531. }
  1532. /**
  1533. * Handle completion
  1534. *
  1535. * @v ibdev Infiniband device
  1536. * @v cq Completion queue
  1537. * @v cqe Hardware completion queue entry
  1538. * @ret rc Return status code
  1539. */
  1540. static int hermon_complete ( struct ib_device *ibdev,
  1541. struct ib_completion_queue *cq,
  1542. union hermonprm_completion_entry *cqe ) {
  1543. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1544. struct hermon_queue_pair *hermon_qp;
  1545. struct ib_work_queue *wq;
  1546. struct ib_queue_pair *qp;
  1547. struct io_buffer *iobuf;
  1548. struct ib_address_vector recv_dest;
  1549. struct ib_address_vector recv_source;
  1550. struct ib_global_route_header *grh;
  1551. struct ib_address_vector *source;
  1552. unsigned int opcode;
  1553. unsigned long qpn;
  1554. int is_send;
  1555. unsigned long wqe_idx;
  1556. unsigned long wqe_idx_mask;
  1557. size_t len;
  1558. int rc = 0;
  1559. /* Parse completion */
  1560. qpn = MLX_GET ( &cqe->normal, qpn );
  1561. is_send = MLX_GET ( &cqe->normal, s_r );
  1562. opcode = MLX_GET ( &cqe->normal, opcode );
  1563. if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
  1564. /* "s" field is not valid for error opcodes */
  1565. is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
  1566. DBGC ( hermon, "Hermon %p CQN %#lx syndrome %x vendor %x\n",
  1567. hermon, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
  1568. MLX_GET ( &cqe->error, vendor_error_syndrome ) );
  1569. rc = -EIO;
  1570. /* Don't return immediately; propagate error to completer */
  1571. }
  1572. /* Identify work queue */
  1573. wq = ib_find_wq ( cq, qpn, is_send );
  1574. if ( ! wq ) {
  1575. DBGC ( hermon, "Hermon %p CQN %#lx unknown %s QPN %#lx\n",
  1576. hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1577. return -EIO;
  1578. }
  1579. qp = wq->qp;
  1580. hermon_qp = ib_qp_get_drvdata ( qp );
  1581. /* Identify work queue entry */
  1582. wqe_idx = MLX_GET ( &cqe->normal, wqe_counter );
  1583. wqe_idx_mask = ( wq->num_wqes - 1 );
  1584. DBGCP ( hermon, "Hermon %p CQN %#lx QPN %#lx %s WQE %#lx completed:\n",
  1585. hermon, cq->cqn, qp->qpn, ( is_send ? "send" : "recv" ),
  1586. wqe_idx );
  1587. DBGCP_HDA ( hermon, virt_to_phys ( cqe ), cqe, sizeof ( *cqe ) );
  1588. /* Identify I/O buffer */
  1589. iobuf = wq->iobufs[ wqe_idx & wqe_idx_mask ];
  1590. if ( ! iobuf ) {
  1591. DBGC ( hermon, "Hermon %p CQN %#lx QPN %#lx empty %s WQE "
  1592. "%#lx\n", hermon, cq->cqn, qp->qpn,
  1593. ( is_send ? "send" : "recv" ), wqe_idx );
  1594. return -EIO;
  1595. }
  1596. wq->iobufs[ wqe_idx & wqe_idx_mask ] = NULL;
  1597. if ( is_send ) {
  1598. /* Hand off to completion handler */
  1599. ib_complete_send ( ibdev, qp, iobuf, rc );
  1600. } else {
  1601. /* Set received length */
  1602. len = MLX_GET ( &cqe->normal, byte_cnt );
  1603. memset ( &recv_dest, 0, sizeof ( recv_dest ) );
  1604. recv_dest.qpn = qpn;
  1605. memset ( &recv_source, 0, sizeof ( recv_source ) );
  1606. switch ( qp->type ) {
  1607. case IB_QPT_SMI:
  1608. case IB_QPT_GSI:
  1609. case IB_QPT_UD:
  1610. /* Locate corresponding GRH */
  1611. assert ( hermon_qp->recv.grh != NULL );
  1612. grh = &hermon_qp->recv.grh[ wqe_idx & wqe_idx_mask ];
  1613. len -= sizeof ( *grh );
  1614. /* Construct address vector */
  1615. source = &recv_source;
  1616. source->qpn = MLX_GET ( &cqe->normal, srq_rqpn );
  1617. source->lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
  1618. source->sl = MLX_GET ( &cqe->normal, sl );
  1619. recv_dest.gid_present = source->gid_present =
  1620. MLX_GET ( &cqe->normal, g );
  1621. memcpy ( &recv_dest.gid, &grh->dgid,
  1622. sizeof ( recv_dest.gid ) );
  1623. memcpy ( &source->gid, &grh->sgid,
  1624. sizeof ( source->gid ) );
  1625. break;
  1626. case IB_QPT_RC:
  1627. source = &qp->av;
  1628. break;
  1629. case IB_QPT_ETH:
  1630. /* Construct address vector */
  1631. source = &recv_source;
  1632. source->vlan_present = MLX_GET ( &cqe->normal, vlan );
  1633. source->vlan = MLX_GET ( &cqe->normal, vid );
  1634. break;
  1635. default:
  1636. assert ( 0 );
  1637. return -EINVAL;
  1638. }
  1639. assert ( len <= iob_tailroom ( iobuf ) );
  1640. iob_put ( iobuf, len );
  1641. /* Hand off to completion handler */
  1642. ib_complete_recv ( ibdev, qp, &recv_dest, source, iobuf, rc );
  1643. }
  1644. return rc;
  1645. }
  1646. /**
  1647. * Poll completion queue
  1648. *
  1649. * @v ibdev Infiniband device
  1650. * @v cq Completion queue
  1651. */
  1652. static void hermon_poll_cq ( struct ib_device *ibdev,
  1653. struct ib_completion_queue *cq ) {
  1654. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1655. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  1656. union hermonprm_completion_entry *cqe;
  1657. unsigned int cqe_idx_mask;
  1658. int rc;
  1659. while ( 1 ) {
  1660. /* Look for completion entry */
  1661. cqe_idx_mask = ( cq->num_cqes - 1 );
  1662. cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
  1663. if ( MLX_GET ( &cqe->normal, owner ) ^
  1664. ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
  1665. /* Entry still owned by hardware; end of poll */
  1666. break;
  1667. }
  1668. /* Handle completion */
  1669. if ( ( rc = hermon_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1670. DBGC ( hermon, "Hermon %p CQN %#lx failed to complete:"
  1671. " %s\n", hermon, cq->cqn, strerror ( rc ) );
  1672. DBGC_HDA ( hermon, virt_to_phys ( cqe ),
  1673. cqe, sizeof ( *cqe ) );
  1674. }
  1675. /* Update completion queue's index */
  1676. cq->next_idx++;
  1677. /* Update doorbell record */
  1678. MLX_FILL_1 ( hermon_cq->doorbell, 0, update_ci,
  1679. ( cq->next_idx & 0x00ffffffUL ) );
  1680. }
  1681. }
  1682. /***************************************************************************
  1683. *
  1684. * Event queues
  1685. *
  1686. ***************************************************************************
  1687. */
  1688. /**
  1689. * Create event queue
  1690. *
  1691. * @v hermon Hermon device
  1692. * @ret rc Return status code
  1693. */
  1694. static int hermon_create_eq ( struct hermon *hermon ) {
  1695. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1696. struct hermonprm_eqc eqctx;
  1697. struct hermonprm_event_mask mask;
  1698. unsigned int i;
  1699. int rc;
  1700. /* Select event queue number */
  1701. hermon_eq->eqn = ( 4 * hermon->cap.reserved_uars );
  1702. if ( hermon_eq->eqn < hermon->cap.reserved_eqs )
  1703. hermon_eq->eqn = hermon->cap.reserved_eqs;
  1704. /* Calculate doorbell address */
  1705. hermon_eq->doorbell =
  1706. ( hermon->uar + HERMON_DB_EQ_OFFSET ( hermon_eq->eqn ) );
  1707. /* Allocate event queue itself */
  1708. hermon_eq->eqe_size =
  1709. ( HERMON_NUM_EQES * sizeof ( hermon_eq->eqe[0] ) );
  1710. hermon_eq->eqe = malloc_dma ( hermon_eq->eqe_size,
  1711. sizeof ( hermon_eq->eqe[0] ) );
  1712. if ( ! hermon_eq->eqe ) {
  1713. rc = -ENOMEM;
  1714. goto err_eqe;
  1715. }
  1716. memset ( hermon_eq->eqe, 0, hermon_eq->eqe_size );
  1717. for ( i = 0 ; i < HERMON_NUM_EQES ; i++ ) {
  1718. MLX_FILL_1 ( &hermon_eq->eqe[i].generic, 7, owner, 1 );
  1719. }
  1720. barrier();
  1721. /* Allocate MTT entries */
  1722. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_eq->eqe,
  1723. hermon_eq->eqe_size,
  1724. &hermon_eq->mtt ) ) != 0 )
  1725. goto err_alloc_mtt;
  1726. /* Hand queue over to hardware */
  1727. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1728. MLX_FILL_2 ( &eqctx, 0,
  1729. st, 0xa /* "Fired" */,
  1730. oi, 1 );
  1731. MLX_FILL_1 ( &eqctx, 2,
  1732. page_offset, ( hermon_eq->mtt.page_offset >> 5 ) );
  1733. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( HERMON_NUM_EQES - 1 ) );
  1734. MLX_FILL_H ( &eqctx, 6, mtt_base_addr_h,
  1735. hermon_eq->mtt.mtt_base_addr );
  1736. MLX_FILL_1 ( &eqctx, 7, mtt_base_addr_l,
  1737. ( hermon_eq->mtt.mtt_base_addr >> 3 ) );
  1738. if ( ( rc = hermon_cmd_sw2hw_eq ( hermon, hermon_eq->eqn,
  1739. &eqctx ) ) != 0 ) {
  1740. DBGC ( hermon, "Hermon %p EQN %#lx SW2HW_EQ failed: %s\n",
  1741. hermon, hermon_eq->eqn, strerror ( rc ) );
  1742. goto err_sw2hw_eq;
  1743. }
  1744. /* Map all events to this event queue */
  1745. memset ( &mask, 0xff, sizeof ( mask ) );
  1746. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1747. ( HERMON_MAP_EQ | hermon_eq->eqn ),
  1748. &mask ) ) != 0 ) {
  1749. DBGC ( hermon, "Hermon %p EQN %#lx MAP_EQ failed: %s\n",
  1750. hermon, hermon_eq->eqn, strerror ( rc ) );
  1751. goto err_map_eq;
  1752. }
  1753. DBGC ( hermon, "Hermon %p EQN %#lx ring [%08lx,%08lx), doorbell "
  1754. "%08lx\n", hermon, hermon_eq->eqn,
  1755. virt_to_phys ( hermon_eq->eqe ),
  1756. ( virt_to_phys ( hermon_eq->eqe ) + hermon_eq->eqe_size ),
  1757. virt_to_phys ( hermon_eq->doorbell ) );
  1758. return 0;
  1759. err_map_eq:
  1760. hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn, &eqctx );
  1761. err_sw2hw_eq:
  1762. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1763. err_alloc_mtt:
  1764. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1765. err_eqe:
  1766. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1767. return rc;
  1768. }
  1769. /**
  1770. * Destroy event queue
  1771. *
  1772. * @v hermon Hermon device
  1773. */
  1774. static void hermon_destroy_eq ( struct hermon *hermon ) {
  1775. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1776. struct hermonprm_eqc eqctx;
  1777. struct hermonprm_event_mask mask;
  1778. int rc;
  1779. /* Unmap events from event queue */
  1780. memset ( &mask, 0xff, sizeof ( mask ) );
  1781. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1782. ( HERMON_UNMAP_EQ | hermon_eq->eqn ),
  1783. &mask ) ) != 0 ) {
  1784. DBGC ( hermon, "Hermon %p EQN %#lx FATAL MAP_EQ failed to "
  1785. "unmap: %s\n", hermon, hermon_eq->eqn, strerror ( rc ) );
  1786. /* Continue; HCA may die but system should survive */
  1787. }
  1788. /* Take ownership back from hardware */
  1789. if ( ( rc = hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn,
  1790. &eqctx ) ) != 0 ) {
  1791. DBGC ( hermon, "Hermon %p EQN %#lx FATAL HW2SW_EQ failed: %s\n",
  1792. hermon, hermon_eq->eqn, strerror ( rc ) );
  1793. /* Leak memory and return; at least we avoid corruption */
  1794. return;
  1795. }
  1796. /* Free MTT entries */
  1797. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1798. /* Free memory */
  1799. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1800. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1801. }
  1802. /**
  1803. * Handle port state event
  1804. *
  1805. * @v hermon Hermon device
  1806. * @v eqe Port state change event queue entry
  1807. */
  1808. static void hermon_event_port_state_change ( struct hermon *hermon,
  1809. union hermonprm_event_entry *eqe){
  1810. unsigned int port;
  1811. int link_up;
  1812. /* Get port and link status */
  1813. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1814. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1815. DBGC ( hermon, "Hermon %p port %d link %s\n", hermon, ( port + 1 ),
  1816. ( link_up ? "up" : "down" ) );
  1817. /* Sanity check */
  1818. if ( port >= hermon->cap.num_ports ) {
  1819. DBGC ( hermon, "Hermon %p port %d does not exist!\n",
  1820. hermon, ( port + 1 ) );
  1821. return;
  1822. }
  1823. /* Notify device of port state change */
  1824. hermon->port[port].type->state_change ( hermon, &hermon->port[port],
  1825. link_up );
  1826. }
  1827. /**
  1828. * Poll event queue
  1829. *
  1830. * @v ibdev Infiniband device
  1831. */
  1832. static void hermon_poll_eq ( struct ib_device *ibdev ) {
  1833. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1834. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1835. union hermonprm_event_entry *eqe;
  1836. union hermonprm_doorbell_register db_reg;
  1837. unsigned int eqe_idx_mask;
  1838. unsigned int event_type;
  1839. /* No event is generated upon reaching INIT, so we must poll
  1840. * separately for link state changes while we remain DOWN.
  1841. */
  1842. if ( ib_is_open ( ibdev ) &&
  1843. ( ibdev->port_state == IB_PORT_STATE_DOWN ) ) {
  1844. ib_smc_update ( ibdev, hermon_mad );
  1845. }
  1846. /* Poll event queue */
  1847. while ( 1 ) {
  1848. /* Look for event entry */
  1849. eqe_idx_mask = ( HERMON_NUM_EQES - 1 );
  1850. eqe = &hermon_eq->eqe[hermon_eq->next_idx & eqe_idx_mask];
  1851. if ( MLX_GET ( &eqe->generic, owner ) ^
  1852. ( ( hermon_eq->next_idx & HERMON_NUM_EQES ) ? 1 : 0 ) ) {
  1853. /* Entry still owned by hardware; end of poll */
  1854. break;
  1855. }
  1856. DBGCP ( hermon, "Hermon %p EQN %#lx event:\n",
  1857. hermon, hermon_eq->eqn );
  1858. DBGCP_HDA ( hermon, virt_to_phys ( eqe ),
  1859. eqe, sizeof ( *eqe ) );
  1860. /* Handle event */
  1861. event_type = MLX_GET ( &eqe->generic, event_type );
  1862. switch ( event_type ) {
  1863. case HERMON_EV_PORT_STATE_CHANGE:
  1864. hermon_event_port_state_change ( hermon, eqe );
  1865. break;
  1866. default:
  1867. DBGC ( hermon, "Hermon %p EQN %#lx unrecognised event "
  1868. "type %#x:\n",
  1869. hermon, hermon_eq->eqn, event_type );
  1870. DBGC_HDA ( hermon, virt_to_phys ( eqe ),
  1871. eqe, sizeof ( *eqe ) );
  1872. break;
  1873. }
  1874. /* Update event queue's index */
  1875. hermon_eq->next_idx++;
  1876. /* Ring doorbell */
  1877. MLX_FILL_1 ( &db_reg.event, 0,
  1878. ci, ( hermon_eq->next_idx & 0x00ffffffUL ) );
  1879. writel ( db_reg.dword[0], hermon_eq->doorbell );
  1880. }
  1881. }
  1882. /***************************************************************************
  1883. *
  1884. * Firmware control
  1885. *
  1886. ***************************************************************************
  1887. */
  1888. /**
  1889. * Map virtual to physical address for firmware usage
  1890. *
  1891. * @v hermon Hermon device
  1892. * @v map Mapping function
  1893. * @v va Virtual address
  1894. * @v pa Physical address
  1895. * @v len Length of region
  1896. * @ret rc Return status code
  1897. */
  1898. static int hermon_map_vpm ( struct hermon *hermon,
  1899. int ( *map ) ( struct hermon *hermon,
  1900. const struct hermonprm_virtual_physical_mapping* ),
  1901. uint64_t va, physaddr_t pa, size_t len ) {
  1902. struct hermonprm_virtual_physical_mapping mapping;
  1903. physaddr_t start;
  1904. physaddr_t low;
  1905. physaddr_t high;
  1906. physaddr_t end;
  1907. size_t size;
  1908. int rc;
  1909. /* Sanity checks */
  1910. assert ( ( va & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1911. assert ( ( pa & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1912. assert ( ( len & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1913. /* Calculate starting points */
  1914. start = pa;
  1915. end = ( start + len );
  1916. size = ( 1UL << ( fls ( start ^ end ) - 1 ) );
  1917. low = high = ( end & ~( size - 1 ) );
  1918. assert ( start < low );
  1919. assert ( high <= end );
  1920. /* These mappings tend to generate huge volumes of
  1921. * uninteresting debug data, which basically makes it
  1922. * impossible to use debugging otherwise.
  1923. */
  1924. DBG_DISABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1925. /* Map blocks in descending order of size */
  1926. while ( size >= HERMON_PAGE_SIZE ) {
  1927. /* Find the next candidate block */
  1928. if ( ( low - size ) >= start ) {
  1929. low -= size;
  1930. pa = low;
  1931. } else if ( high <= ( end - size ) ) {
  1932. pa = high;
  1933. high += size;
  1934. } else {
  1935. size >>= 1;
  1936. continue;
  1937. }
  1938. assert ( ( va & ( size - 1 ) ) == 0 );
  1939. assert ( ( pa & ( size - 1 ) ) == 0 );
  1940. /* Map this block */
  1941. memset ( &mapping, 0, sizeof ( mapping ) );
  1942. MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
  1943. MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
  1944. MLX_FILL_H ( &mapping, 2, pa_h, pa );
  1945. MLX_FILL_2 ( &mapping, 3,
  1946. log2size, ( ( fls ( size ) - 1 ) - 12 ),
  1947. pa_l, ( pa >> 12 ) );
  1948. if ( ( rc = map ( hermon, &mapping ) ) != 0 ) {
  1949. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1950. DBGC ( hermon, "Hermon %p could not map %08llx+%zx to "
  1951. "%08lx: %s\n",
  1952. hermon, va, size, pa, strerror ( rc ) );
  1953. return rc;
  1954. }
  1955. va += size;
  1956. }
  1957. assert ( low == start );
  1958. assert ( high == end );
  1959. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1960. return 0;
  1961. }
  1962. /**
  1963. * Start firmware running
  1964. *
  1965. * @v hermon Hermon device
  1966. * @ret rc Return status code
  1967. */
  1968. static int hermon_start_firmware ( struct hermon *hermon ) {
  1969. struct hermonprm_query_fw fw;
  1970. unsigned int fw_pages;
  1971. size_t fw_len;
  1972. physaddr_t fw_base;
  1973. int rc;
  1974. /* Get firmware parameters */
  1975. if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
  1976. DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
  1977. hermon, strerror ( rc ) );
  1978. goto err_query_fw;
  1979. }
  1980. DBGC ( hermon, "Hermon %p firmware version %d.%d.%d\n", hermon,
  1981. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  1982. MLX_GET ( &fw, fw_rev_subminor ) );
  1983. fw_pages = MLX_GET ( &fw, fw_pages );
  1984. DBGC ( hermon, "Hermon %p requires %d pages (%d kB) for firmware\n",
  1985. hermon, fw_pages, ( fw_pages * 4 ) );
  1986. /* Allocate firmware pages and map firmware area */
  1987. fw_len = ( fw_pages * HERMON_PAGE_SIZE );
  1988. if ( ! hermon->firmware_area ) {
  1989. hermon->firmware_len = fw_len;
  1990. hermon->firmware_area = umalloc ( hermon->firmware_len );
  1991. if ( ! hermon->firmware_area ) {
  1992. rc = -ENOMEM;
  1993. goto err_alloc_fa;
  1994. }
  1995. } else {
  1996. assert ( hermon->firmware_len == fw_len );
  1997. }
  1998. fw_base = user_to_phys ( hermon->firmware_area, 0 );
  1999. DBGC ( hermon, "Hermon %p firmware area at physical [%08lx,%08lx)\n",
  2000. hermon, fw_base, ( fw_base + fw_len ) );
  2001. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_fa,
  2002. 0, fw_base, fw_len ) ) != 0 ) {
  2003. DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
  2004. hermon, strerror ( rc ) );
  2005. goto err_map_fa;
  2006. }
  2007. /* Start firmware */
  2008. if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
  2009. DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
  2010. hermon, strerror ( rc ) );
  2011. goto err_run_fw;
  2012. }
  2013. DBGC ( hermon, "Hermon %p firmware started\n", hermon );
  2014. return 0;
  2015. err_run_fw:
  2016. err_map_fa:
  2017. hermon_cmd_unmap_fa ( hermon );
  2018. err_alloc_fa:
  2019. err_query_fw:
  2020. return rc;
  2021. }
  2022. /**
  2023. * Stop firmware running
  2024. *
  2025. * @v hermon Hermon device
  2026. */
  2027. static void hermon_stop_firmware ( struct hermon *hermon ) {
  2028. int rc;
  2029. if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
  2030. DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
  2031. hermon, strerror ( rc ) );
  2032. /* Leak memory and return; at least we avoid corruption */
  2033. hermon->firmware_area = UNULL;
  2034. return;
  2035. }
  2036. }
  2037. /***************************************************************************
  2038. *
  2039. * Infinihost Context Memory management
  2040. *
  2041. ***************************************************************************
  2042. */
  2043. /**
  2044. * Get device limits
  2045. *
  2046. * @v hermon Hermon device
  2047. * @ret rc Return status code
  2048. */
  2049. static int hermon_get_cap ( struct hermon *hermon ) {
  2050. struct hermonprm_query_dev_cap dev_cap;
  2051. int rc;
  2052. if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
  2053. DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
  2054. hermon, strerror ( rc ) );
  2055. return rc;
  2056. }
  2057. hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
  2058. hermon->cap.reserved_qps =
  2059. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
  2060. hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
  2061. hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
  2062. hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
  2063. hermon->cap.reserved_srqs =
  2064. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
  2065. hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
  2066. hermon->cap.reserved_cqs =
  2067. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
  2068. hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
  2069. hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
  2070. if ( hermon->cap.reserved_eqs == 0 ) {
  2071. /* Backward compatibility */
  2072. hermon->cap.reserved_eqs =
  2073. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_eqs ) );
  2074. }
  2075. hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
  2076. hermon->cap.reserved_mtts =
  2077. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
  2078. hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
  2079. hermon->cap.reserved_mrws =
  2080. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
  2081. hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
  2082. hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
  2083. hermon->cap.num_ports = MLX_GET ( &dev_cap, num_ports );
  2084. hermon->cap.dpdp = MLX_GET ( &dev_cap, dpdp );
  2085. /* Sanity check */
  2086. if ( hermon->cap.num_ports > HERMON_MAX_PORTS ) {
  2087. DBGC ( hermon, "Hermon %p has %d ports (only %d supported)\n",
  2088. hermon, hermon->cap.num_ports, HERMON_MAX_PORTS );
  2089. hermon->cap.num_ports = HERMON_MAX_PORTS;
  2090. }
  2091. return 0;
  2092. }
  2093. /**
  2094. * Align ICM table
  2095. *
  2096. * @v icm_offset Current ICM offset
  2097. * @v len ICM table length
  2098. * @ret icm_offset ICM offset
  2099. */
  2100. static uint64_t icm_align ( uint64_t icm_offset, size_t len ) {
  2101. /* Round up to a multiple of the table size */
  2102. assert ( len == ( 1UL << ( fls ( len ) - 1 ) ) );
  2103. return ( ( icm_offset + len - 1 ) & ~( ( ( uint64_t ) len ) - 1 ) );
  2104. }
  2105. /**
  2106. * Map ICM (allocating if necessary)
  2107. *
  2108. * @v hermon Hermon device
  2109. * @v init_hca INIT_HCA structure to fill in
  2110. * @ret rc Return status code
  2111. */
  2112. static int hermon_map_icm ( struct hermon *hermon,
  2113. struct hermonprm_init_hca *init_hca ) {
  2114. struct hermonprm_scalar_parameter icm_size;
  2115. struct hermonprm_scalar_parameter icm_aux_size;
  2116. uint64_t icm_offset = 0;
  2117. unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
  2118. unsigned int log_num_mtts, log_num_mpts, log_num_mcs;
  2119. size_t cmpt_max_len;
  2120. size_t icm_len, icm_aux_len;
  2121. size_t len;
  2122. physaddr_t icm_phys;
  2123. int i;
  2124. int rc;
  2125. /*
  2126. * Start by carving up the ICM virtual address space
  2127. *
  2128. */
  2129. /* Calculate number of each object type within ICM */
  2130. log_num_qps = fls ( hermon->cap.reserved_qps +
  2131. HERMON_RSVD_SPECIAL_QPS + HERMON_MAX_QPS - 1 );
  2132. log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
  2133. log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
  2134. log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
  2135. log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
  2136. log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
  2137. log_num_mcs = HERMON_LOG_MULTICAST_HASH_SIZE;
  2138. /* ICM starts with the cMPT tables, which are sparse */
  2139. cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
  2140. ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
  2141. len = ( ( ( ( 1 << log_num_qps ) * hermon->cap.cmpt_entry_size ) +
  2142. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2143. hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
  2144. hermon->icm_map[HERMON_ICM_QP_CMPT].len = len;
  2145. icm_offset += cmpt_max_len;
  2146. len = ( ( ( ( 1 << log_num_srqs ) * hermon->cap.cmpt_entry_size ) +
  2147. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2148. hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
  2149. hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = len;
  2150. icm_offset += cmpt_max_len;
  2151. len = ( ( ( ( 1 << log_num_cqs ) * hermon->cap.cmpt_entry_size ) +
  2152. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2153. hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
  2154. hermon->icm_map[HERMON_ICM_CQ_CMPT].len = len;
  2155. icm_offset += cmpt_max_len;
  2156. len = ( ( ( ( 1 << log_num_eqs ) * hermon->cap.cmpt_entry_size ) +
  2157. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2158. hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
  2159. hermon->icm_map[HERMON_ICM_EQ_CMPT].len = len;
  2160. icm_offset += cmpt_max_len;
  2161. hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
  2162. /* Queue pair contexts */
  2163. len = ( ( 1 << log_num_qps ) * hermon->cap.qpc_entry_size );
  2164. icm_offset = icm_align ( icm_offset, len );
  2165. MLX_FILL_1 ( init_hca, 12,
  2166. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
  2167. ( icm_offset >> 32 ) );
  2168. MLX_FILL_2 ( init_hca, 13,
  2169. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  2170. ( icm_offset >> 5 ),
  2171. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  2172. log_num_qps );
  2173. DBGC ( hermon, "Hermon %p ICM QPC is %d x %#zx at [%08llx,%08llx)\n",
  2174. hermon, ( 1 << log_num_qps ), hermon->cap.qpc_entry_size,
  2175. icm_offset, ( icm_offset + len ) );
  2176. icm_offset += len;
  2177. /* Extended alternate path contexts */
  2178. len = ( ( 1 << log_num_qps ) * hermon->cap.altc_entry_size );
  2179. icm_offset = icm_align ( icm_offset, len );
  2180. MLX_FILL_1 ( init_hca, 24,
  2181. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
  2182. ( icm_offset >> 32 ) );
  2183. MLX_FILL_1 ( init_hca, 25,
  2184. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
  2185. icm_offset );
  2186. DBGC ( hermon, "Hermon %p ICM ALTC is %d x %#zx at [%08llx,%08llx)\n",
  2187. hermon, ( 1 << log_num_qps ), hermon->cap.altc_entry_size,
  2188. icm_offset, ( icm_offset + len ) );
  2189. icm_offset += len;
  2190. /* Extended auxiliary contexts */
  2191. len = ( ( 1 << log_num_qps ) * hermon->cap.auxc_entry_size );
  2192. icm_offset = icm_align ( icm_offset, len );
  2193. MLX_FILL_1 ( init_hca, 28,
  2194. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
  2195. ( icm_offset >> 32 ) );
  2196. MLX_FILL_1 ( init_hca, 29,
  2197. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
  2198. icm_offset );
  2199. DBGC ( hermon, "Hermon %p ICM AUXC is %d x %#zx at [%08llx,%08llx)\n",
  2200. hermon, ( 1 << log_num_qps ), hermon->cap.auxc_entry_size,
  2201. icm_offset, ( icm_offset + len ) );
  2202. icm_offset += len;
  2203. /* Shared receive queue contexts */
  2204. len = ( ( 1 << log_num_srqs ) * hermon->cap.srqc_entry_size );
  2205. icm_offset = icm_align ( icm_offset, len );
  2206. MLX_FILL_1 ( init_hca, 18,
  2207. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
  2208. ( icm_offset >> 32 ) );
  2209. MLX_FILL_2 ( init_hca, 19,
  2210. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  2211. ( icm_offset >> 5 ),
  2212. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  2213. log_num_srqs );
  2214. DBGC ( hermon, "Hermon %p ICM SRQC is %d x %#zx at [%08llx,%08llx)\n",
  2215. hermon, ( 1 << log_num_srqs ), hermon->cap.srqc_entry_size,
  2216. icm_offset, ( icm_offset + len ) );
  2217. icm_offset += len;
  2218. /* Completion queue contexts */
  2219. len = ( ( 1 << log_num_cqs ) * hermon->cap.cqc_entry_size );
  2220. icm_offset = icm_align ( icm_offset, len );
  2221. MLX_FILL_1 ( init_hca, 20,
  2222. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
  2223. ( icm_offset >> 32 ) );
  2224. MLX_FILL_2 ( init_hca, 21,
  2225. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  2226. ( icm_offset >> 5 ),
  2227. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  2228. log_num_cqs );
  2229. DBGC ( hermon, "Hermon %p ICM CQC is %d x %#zx at [%08llx,%08llx)\n",
  2230. hermon, ( 1 << log_num_cqs ), hermon->cap.cqc_entry_size,
  2231. icm_offset, ( icm_offset + len ) );
  2232. icm_offset += len;
  2233. /* Event queue contexts */
  2234. len = ( ( 1 << log_num_eqs ) * hermon->cap.eqc_entry_size );
  2235. icm_offset = icm_align ( icm_offset, len );
  2236. MLX_FILL_1 ( init_hca, 32,
  2237. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
  2238. ( icm_offset >> 32 ) );
  2239. MLX_FILL_2 ( init_hca, 33,
  2240. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  2241. ( icm_offset >> 5 ),
  2242. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
  2243. log_num_eqs );
  2244. DBGC ( hermon, "Hermon %p ICM EQC is %d x %#zx at [%08llx,%08llx)\n",
  2245. hermon, ( 1 << log_num_eqs ), hermon->cap.eqc_entry_size,
  2246. icm_offset, ( icm_offset + len ) );
  2247. icm_offset += len;
  2248. /* Memory translation table */
  2249. len = ( ( 1 << log_num_mtts ) * hermon->cap.mtt_entry_size );
  2250. icm_offset = icm_align ( icm_offset, len );
  2251. MLX_FILL_1 ( init_hca, 64,
  2252. tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
  2253. MLX_FILL_1 ( init_hca, 65,
  2254. tpt_parameters.mtt_base_addr_l, icm_offset );
  2255. DBGC ( hermon, "Hermon %p ICM MTT is %d x %#zx at [%08llx,%08llx)\n",
  2256. hermon, ( 1 << log_num_mtts ), hermon->cap.mtt_entry_size,
  2257. icm_offset, ( icm_offset + len ) );
  2258. icm_offset += len;
  2259. /* Memory protection table */
  2260. len = ( ( 1 << log_num_mpts ) * hermon->cap.dmpt_entry_size );
  2261. icm_offset = icm_align ( icm_offset, len );
  2262. MLX_FILL_1 ( init_hca, 60,
  2263. tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
  2264. MLX_FILL_1 ( init_hca, 61,
  2265. tpt_parameters.dmpt_base_adr_l, icm_offset );
  2266. MLX_FILL_1 ( init_hca, 62,
  2267. tpt_parameters.log_dmpt_sz, log_num_mpts );
  2268. DBGC ( hermon, "Hermon %p ICM DMPT is %d x %#zx at [%08llx,%08llx)\n",
  2269. hermon, ( 1 << log_num_mpts ), hermon->cap.dmpt_entry_size,
  2270. icm_offset, ( icm_offset + len ) );
  2271. icm_offset += len;
  2272. /* Multicast table */
  2273. len = ( ( 1 << log_num_mcs ) * sizeof ( struct hermonprm_mcg_entry ) );
  2274. icm_offset = icm_align ( icm_offset, len );
  2275. MLX_FILL_1 ( init_hca, 48,
  2276. multicast_parameters.mc_base_addr_h,
  2277. ( icm_offset >> 32 ) );
  2278. MLX_FILL_1 ( init_hca, 49,
  2279. multicast_parameters.mc_base_addr_l, icm_offset );
  2280. MLX_FILL_1 ( init_hca, 52,
  2281. multicast_parameters.log_mc_table_entry_sz,
  2282. fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
  2283. MLX_FILL_1 ( init_hca, 53,
  2284. multicast_parameters.log_mc_table_hash_sz, log_num_mcs );
  2285. MLX_FILL_1 ( init_hca, 54,
  2286. multicast_parameters.log_mc_table_sz, log_num_mcs );
  2287. DBGC ( hermon, "Hermon %p ICM MC is %d x %#zx at [%08llx,%08llx)\n",
  2288. hermon, ( 1 << log_num_mcs ),
  2289. sizeof ( struct hermonprm_mcg_entry ),
  2290. icm_offset, ( icm_offset + len ) );
  2291. icm_offset += len;
  2292. hermon->icm_map[HERMON_ICM_OTHER].len =
  2293. ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
  2294. /*
  2295. * Allocate and map physical memory for (portions of) ICM
  2296. *
  2297. * Map is:
  2298. * ICM AUX area (aligned to its own size)
  2299. * cMPT areas
  2300. * Other areas
  2301. */
  2302. /* Calculate physical memory required for ICM */
  2303. icm_len = 0;
  2304. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2305. icm_len += hermon->icm_map[i].len;
  2306. }
  2307. /* Get ICM auxiliary area size */
  2308. memset ( &icm_size, 0, sizeof ( icm_size ) );
  2309. MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
  2310. MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
  2311. if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
  2312. &icm_aux_size ) ) != 0 ) {
  2313. DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
  2314. hermon, strerror ( rc ) );
  2315. goto err_set_icm_size;
  2316. }
  2317. icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
  2318. /* Allocate ICM data and auxiliary area */
  2319. DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
  2320. hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
  2321. if ( ! hermon->icm ) {
  2322. hermon->icm_len = icm_len;
  2323. hermon->icm_aux_len = icm_aux_len;
  2324. hermon->icm = umalloc ( hermon->icm_aux_len + hermon->icm_len );
  2325. if ( ! hermon->icm ) {
  2326. rc = -ENOMEM;
  2327. goto err_alloc;
  2328. }
  2329. } else {
  2330. assert ( hermon->icm_len == icm_len );
  2331. assert ( hermon->icm_aux_len == icm_aux_len );
  2332. }
  2333. icm_phys = user_to_phys ( hermon->icm, 0 );
  2334. /* Map ICM auxiliary area */
  2335. DBGC ( hermon, "Hermon %p mapping ICM AUX => %08lx\n",
  2336. hermon, icm_phys );
  2337. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm_aux,
  2338. 0, icm_phys, icm_aux_len ) ) != 0 ) {
  2339. DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
  2340. hermon, strerror ( rc ) );
  2341. goto err_map_icm_aux;
  2342. }
  2343. icm_phys += icm_aux_len;
  2344. /* MAP ICM area */
  2345. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2346. DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx => %08lx\n",
  2347. hermon, hermon->icm_map[i].offset,
  2348. hermon->icm_map[i].len, icm_phys );
  2349. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm,
  2350. hermon->icm_map[i].offset,
  2351. icm_phys,
  2352. hermon->icm_map[i].len ) ) != 0 ){
  2353. DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
  2354. hermon, strerror ( rc ) );
  2355. goto err_map_icm;
  2356. }
  2357. icm_phys += hermon->icm_map[i].len;
  2358. }
  2359. return 0;
  2360. err_map_icm:
  2361. assert ( i == 0 ); /* We don't handle partial failure at present */
  2362. err_map_icm_aux:
  2363. hermon_cmd_unmap_icm_aux ( hermon );
  2364. err_alloc:
  2365. err_set_icm_size:
  2366. return rc;
  2367. }
  2368. /**
  2369. * Unmap ICM
  2370. *
  2371. * @v hermon Hermon device
  2372. */
  2373. static void hermon_unmap_icm ( struct hermon *hermon ) {
  2374. struct hermonprm_scalar_parameter unmap_icm;
  2375. int i;
  2376. for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
  2377. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2378. MLX_FILL_1 ( &unmap_icm, 0, value_hi,
  2379. ( hermon->icm_map[i].offset >> 32 ) );
  2380. MLX_FILL_1 ( &unmap_icm, 1, value,
  2381. hermon->icm_map[i].offset );
  2382. hermon_cmd_unmap_icm ( hermon,
  2383. ( 1 << fls ( ( hermon->icm_map[i].len /
  2384. HERMON_PAGE_SIZE ) - 1)),
  2385. &unmap_icm );
  2386. }
  2387. hermon_cmd_unmap_icm_aux ( hermon );
  2388. }
  2389. /***************************************************************************
  2390. *
  2391. * Initialisation and teardown
  2392. *
  2393. ***************************************************************************
  2394. */
  2395. /**
  2396. * Reset device
  2397. *
  2398. * @v hermon Hermon device
  2399. */
  2400. static void hermon_reset ( struct hermon *hermon ) {
  2401. struct pci_device *pci = hermon->pci;
  2402. struct pci_config_backup backup;
  2403. static const uint8_t backup_exclude[] =
  2404. PCI_CONFIG_BACKUP_EXCLUDE ( 0x58, 0x5c );
  2405. /* Perform device reset and preserve PCI configuration */
  2406. pci_backup ( pci, &backup, backup_exclude );
  2407. writel ( HERMON_RESET_MAGIC,
  2408. ( hermon->config + HERMON_RESET_OFFSET ) );
  2409. mdelay ( HERMON_RESET_WAIT_TIME_MS );
  2410. pci_restore ( pci, &backup, backup_exclude );
  2411. /* Reset command interface toggle */
  2412. hermon->toggle = 0;
  2413. }
  2414. /**
  2415. * Set up memory protection table
  2416. *
  2417. * @v hermon Hermon device
  2418. * @ret rc Return status code
  2419. */
  2420. static int hermon_setup_mpt ( struct hermon *hermon ) {
  2421. struct hermonprm_mpt mpt;
  2422. uint32_t key;
  2423. int rc;
  2424. /* Derive key */
  2425. key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
  2426. hermon->lkey = ( ( key << 8 ) | ( key >> 24 ) );
  2427. /* Initialise memory protection table */
  2428. memset ( &mpt, 0, sizeof ( mpt ) );
  2429. MLX_FILL_7 ( &mpt, 0,
  2430. atomic, 1,
  2431. rw, 1,
  2432. rr, 1,
  2433. lw, 1,
  2434. lr, 1,
  2435. pa, 1,
  2436. r_w, 1 );
  2437. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  2438. MLX_FILL_1 ( &mpt, 3,
  2439. pd, HERMON_GLOBAL_PD );
  2440. MLX_FILL_1 ( &mpt, 10, len64, 1 );
  2441. if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
  2442. hermon->cap.reserved_mrws,
  2443. &mpt ) ) != 0 ) {
  2444. DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
  2445. hermon, strerror ( rc ) );
  2446. return rc;
  2447. }
  2448. return 0;
  2449. }
  2450. /**
  2451. * Configure special queue pairs
  2452. *
  2453. * @v hermon Hermon device
  2454. * @ret rc Return status code
  2455. */
  2456. static int hermon_configure_special_qps ( struct hermon *hermon ) {
  2457. int rc;
  2458. /* Special QP block must be aligned on its own size */
  2459. hermon->special_qpn_base = ( ( hermon->cap.reserved_qps +
  2460. HERMON_NUM_SPECIAL_QPS - 1 )
  2461. & ~( HERMON_NUM_SPECIAL_QPS - 1 ) );
  2462. hermon->qpn_base = ( hermon->special_qpn_base +
  2463. HERMON_NUM_SPECIAL_QPS );
  2464. DBGC ( hermon, "Hermon %p special QPs at [%lx,%lx]\n", hermon,
  2465. hermon->special_qpn_base, ( hermon->qpn_base - 1 ) );
  2466. /* Issue command to configure special QPs */
  2467. if ( ( rc = hermon_cmd_conf_special_qp ( hermon, 0x00,
  2468. hermon->special_qpn_base ) ) != 0 ) {
  2469. DBGC ( hermon, "Hermon %p could not configure special QPs: "
  2470. "%s\n", hermon, strerror ( rc ) );
  2471. return rc;
  2472. }
  2473. return 0;
  2474. }
  2475. /**
  2476. * Start Hermon device
  2477. *
  2478. * @v hermon Hermon device
  2479. * @v running Firmware is already running
  2480. * @ret rc Return status code
  2481. */
  2482. static int hermon_start ( struct hermon *hermon, int running ) {
  2483. struct hermonprm_init_hca init_hca;
  2484. unsigned int i;
  2485. int rc;
  2486. /* Start firmware if not already running */
  2487. if ( ! running ) {
  2488. if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
  2489. goto err_start_firmware;
  2490. }
  2491. /* Allocate and map ICM */
  2492. memset ( &init_hca, 0, sizeof ( init_hca ) );
  2493. if ( ( rc = hermon_map_icm ( hermon, &init_hca ) ) != 0 )
  2494. goto err_map_icm;
  2495. /* Initialise HCA */
  2496. MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
  2497. MLX_FILL_1 ( &init_hca, 5, udp, 1 );
  2498. MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
  2499. if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
  2500. DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
  2501. hermon, strerror ( rc ) );
  2502. goto err_init_hca;
  2503. }
  2504. /* Set up memory protection */
  2505. if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
  2506. goto err_setup_mpt;
  2507. for ( i = 0 ; i < hermon->cap.num_ports ; i++ )
  2508. hermon->port[i].ibdev->rdma_key = hermon->lkey;
  2509. /* Set up event queue */
  2510. if ( ( rc = hermon_create_eq ( hermon ) ) != 0 )
  2511. goto err_create_eq;
  2512. /* Configure special QPs */
  2513. if ( ( rc = hermon_configure_special_qps ( hermon ) ) != 0 )
  2514. goto err_conf_special_qps;
  2515. return 0;
  2516. err_conf_special_qps:
  2517. hermon_destroy_eq ( hermon );
  2518. err_create_eq:
  2519. err_setup_mpt:
  2520. hermon_cmd_close_hca ( hermon );
  2521. err_init_hca:
  2522. hermon_unmap_icm ( hermon );
  2523. err_map_icm:
  2524. hermon_stop_firmware ( hermon );
  2525. err_start_firmware:
  2526. return rc;
  2527. }
  2528. /**
  2529. * Stop Hermon device
  2530. *
  2531. * @v hermon Hermon device
  2532. */
  2533. static void hermon_stop ( struct hermon *hermon ) {
  2534. hermon_destroy_eq ( hermon );
  2535. hermon_cmd_close_hca ( hermon );
  2536. hermon_unmap_icm ( hermon );
  2537. hermon_stop_firmware ( hermon );
  2538. hermon_reset ( hermon );
  2539. }
  2540. /**
  2541. * Open Hermon device
  2542. *
  2543. * @v hermon Hermon device
  2544. * @ret rc Return status code
  2545. */
  2546. static int hermon_open ( struct hermon *hermon ) {
  2547. int rc;
  2548. /* Start device if applicable */
  2549. if ( hermon->open_count == 0 ) {
  2550. if ( ( rc = hermon_start ( hermon, 0 ) ) != 0 )
  2551. return rc;
  2552. }
  2553. /* Increment open counter */
  2554. hermon->open_count++;
  2555. return 0;
  2556. }
  2557. /**
  2558. * Close Hermon device
  2559. *
  2560. * @v hermon Hermon device
  2561. */
  2562. static void hermon_close ( struct hermon *hermon ) {
  2563. /* Decrement open counter */
  2564. assert ( hermon->open_count != 0 );
  2565. hermon->open_count--;
  2566. /* Stop device if applicable */
  2567. if ( hermon->open_count == 0 )
  2568. hermon_stop ( hermon );
  2569. }
  2570. /***************************************************************************
  2571. *
  2572. * Infiniband link-layer operations
  2573. *
  2574. ***************************************************************************
  2575. */
  2576. /**
  2577. * Initialise Infiniband link
  2578. *
  2579. * @v ibdev Infiniband device
  2580. * @ret rc Return status code
  2581. */
  2582. static int hermon_ib_open ( struct ib_device *ibdev ) {
  2583. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2584. union hermonprm_set_port set_port;
  2585. int rc;
  2586. /* Open hardware */
  2587. if ( ( rc = hermon_open ( hermon ) ) != 0 )
  2588. goto err_open;
  2589. /* Set port parameters */
  2590. memset ( &set_port, 0, sizeof ( set_port ) );
  2591. MLX_FILL_8 ( &set_port.ib, 0,
  2592. mmc, 1,
  2593. mvc, 1,
  2594. mp, 1,
  2595. mg, 1,
  2596. mtu_cap, IB_MTU_2048,
  2597. vl_cap, IB_VL_0,
  2598. rcm, 1,
  2599. lss, 1 );
  2600. MLX_FILL_2 ( &set_port.ib, 10,
  2601. max_pkey, 1,
  2602. max_gid, 1 );
  2603. MLX_FILL_1 ( &set_port.ib, 28,
  2604. link_speed_supported, 1 );
  2605. if ( ( rc = hermon_cmd_set_port ( hermon, 0, ibdev->port,
  2606. &set_port ) ) != 0 ) {
  2607. DBGC ( hermon, "Hermon %p port %d could not set port: %s\n",
  2608. hermon, ibdev->port, strerror ( rc ) );
  2609. goto err_set_port;
  2610. }
  2611. /* Initialise port */
  2612. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port ) ) != 0 ) {
  2613. DBGC ( hermon, "Hermon %p port %d could not initialise port: "
  2614. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  2615. goto err_init_port;
  2616. }
  2617. /* Update MAD parameters */
  2618. ib_smc_update ( ibdev, hermon_mad );
  2619. return 0;
  2620. err_init_port:
  2621. err_set_port:
  2622. hermon_close ( hermon );
  2623. err_open:
  2624. return rc;
  2625. }
  2626. /**
  2627. * Close Infiniband link
  2628. *
  2629. * @v ibdev Infiniband device
  2630. */
  2631. static void hermon_ib_close ( struct ib_device *ibdev ) {
  2632. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2633. int rc;
  2634. /* Close port */
  2635. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  2636. DBGC ( hermon, "Hermon %p port %d could not close port: %s\n",
  2637. hermon, ibdev->port, strerror ( rc ) );
  2638. /* Nothing we can do about this */
  2639. }
  2640. /* Close hardware */
  2641. hermon_close ( hermon );
  2642. }
  2643. /**
  2644. * Inform embedded subnet management agent of a received MAD
  2645. *
  2646. * @v ibdev Infiniband device
  2647. * @v mad MAD
  2648. * @ret rc Return status code
  2649. */
  2650. static int hermon_inform_sma ( struct ib_device *ibdev,
  2651. union ib_mad *mad ) {
  2652. int rc;
  2653. /* Send the MAD to the embedded SMA */
  2654. if ( ( rc = hermon_mad ( ibdev, mad ) ) != 0 )
  2655. return rc;
  2656. /* Update parameters held in software */
  2657. ib_smc_update ( ibdev, hermon_mad );
  2658. return 0;
  2659. }
  2660. /***************************************************************************
  2661. *
  2662. * Multicast group operations
  2663. *
  2664. ***************************************************************************
  2665. */
  2666. /**
  2667. * Attach to multicast group
  2668. *
  2669. * @v ibdev Infiniband device
  2670. * @v qp Queue pair
  2671. * @v gid Multicast GID
  2672. * @ret rc Return status code
  2673. */
  2674. static int hermon_mcast_attach ( struct ib_device *ibdev,
  2675. struct ib_queue_pair *qp,
  2676. union ib_gid *gid ) {
  2677. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2678. struct hermonprm_mgm_hash hash;
  2679. struct hermonprm_mcg_entry mcg;
  2680. unsigned int index;
  2681. int rc;
  2682. /* Generate hash table index */
  2683. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  2684. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  2685. hermon, strerror ( rc ) );
  2686. return rc;
  2687. }
  2688. index = MLX_GET ( &hash, hash );
  2689. /* Check for existing hash table entry */
  2690. if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
  2691. DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
  2692. hermon, index, strerror ( rc ) );
  2693. return rc;
  2694. }
  2695. if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
  2696. /* FIXME: this implementation allows only a single QP
  2697. * per multicast group, and doesn't handle hash
  2698. * collisions. Sufficient for IPoIB but may need to
  2699. * be extended in future.
  2700. */
  2701. DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
  2702. hermon, index );
  2703. return -EBUSY;
  2704. }
  2705. /* Update hash table entry */
  2706. MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
  2707. MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
  2708. memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
  2709. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  2710. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  2711. hermon, index, strerror ( rc ) );
  2712. return rc;
  2713. }
  2714. return 0;
  2715. }
  2716. /**
  2717. * Detach from multicast group
  2718. *
  2719. * @v ibdev Infiniband device
  2720. * @v qp Queue pair
  2721. * @v gid Multicast GID
  2722. */
  2723. static void hermon_mcast_detach ( struct ib_device *ibdev,
  2724. struct ib_queue_pair *qp __unused,
  2725. union ib_gid *gid ) {
  2726. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2727. struct hermonprm_mgm_hash hash;
  2728. struct hermonprm_mcg_entry mcg;
  2729. unsigned int index;
  2730. int rc;
  2731. /* Generate hash table index */
  2732. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  2733. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  2734. hermon, strerror ( rc ) );
  2735. return;
  2736. }
  2737. index = MLX_GET ( &hash, hash );
  2738. /* Clear hash table entry */
  2739. memset ( &mcg, 0, sizeof ( mcg ) );
  2740. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  2741. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  2742. hermon, index, strerror ( rc ) );
  2743. return;
  2744. }
  2745. }
  2746. /** Hermon Infiniband operations */
  2747. static struct ib_device_operations hermon_ib_operations = {
  2748. .create_cq = hermon_create_cq,
  2749. .destroy_cq = hermon_destroy_cq,
  2750. .create_qp = hermon_create_qp,
  2751. .modify_qp = hermon_modify_qp,
  2752. .destroy_qp = hermon_destroy_qp,
  2753. .post_send = hermon_post_send,
  2754. .post_recv = hermon_post_recv,
  2755. .poll_cq = hermon_poll_cq,
  2756. .poll_eq = hermon_poll_eq,
  2757. .open = hermon_ib_open,
  2758. .close = hermon_ib_close,
  2759. .mcast_attach = hermon_mcast_attach,
  2760. .mcast_detach = hermon_mcast_detach,
  2761. .set_port_info = hermon_inform_sma,
  2762. .set_pkey_table = hermon_inform_sma,
  2763. };
  2764. /**
  2765. * Register Hermon Infiniband device
  2766. *
  2767. * @v hermon Hermon device
  2768. * @v port Hermon port
  2769. * @ret rc Return status code
  2770. */
  2771. static int hermon_register_ibdev ( struct hermon *hermon,
  2772. struct hermon_port *port ) {
  2773. struct ib_device *ibdev = port->ibdev;
  2774. int rc;
  2775. /* Initialise parameters using SMC */
  2776. ib_smc_init ( ibdev, hermon_mad );
  2777. /* Register Infiniband device */
  2778. if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
  2779. DBGC ( hermon, "Hermon %p port %d could not register IB "
  2780. "device: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2781. return rc;
  2782. }
  2783. return 0;
  2784. }
  2785. /**
  2786. * Handle Hermon Infiniband device port state change
  2787. *
  2788. * @v hermon Hermon device
  2789. * @v port Hermon port
  2790. * @v link_up Link is up
  2791. */
  2792. static void hermon_state_change_ibdev ( struct hermon *hermon __unused,
  2793. struct hermon_port *port,
  2794. int link_up __unused ) {
  2795. struct ib_device *ibdev = port->ibdev;
  2796. /* Update MAD parameters */
  2797. ib_smc_update ( ibdev, hermon_mad );
  2798. }
  2799. /**
  2800. * Unregister Hermon Infiniband device
  2801. *
  2802. * @v hermon Hermon device
  2803. * @v port Hermon port
  2804. */
  2805. static void hermon_unregister_ibdev ( struct hermon *hermon __unused,
  2806. struct hermon_port *port ) {
  2807. struct ib_device *ibdev = port->ibdev;
  2808. unregister_ibdev ( ibdev );
  2809. }
  2810. /** Hermon Infiniband port type */
  2811. static struct hermon_port_type hermon_port_type_ib = {
  2812. .register_dev = hermon_register_ibdev,
  2813. .state_change = hermon_state_change_ibdev,
  2814. .unregister_dev = hermon_unregister_ibdev,
  2815. };
  2816. /***************************************************************************
  2817. *
  2818. * Ethernet operation
  2819. *
  2820. ***************************************************************************
  2821. */
  2822. /** Number of Hermon Ethernet send work queue entries */
  2823. #define HERMON_ETH_NUM_SEND_WQES 2
  2824. /** Number of Hermon Ethernet receive work queue entries */
  2825. #define HERMON_ETH_NUM_RECV_WQES 4
  2826. /** Number of Hermon Ethernet completion entries */
  2827. #define HERMON_ETH_NUM_CQES 8
  2828. /**
  2829. * Transmit packet via Hermon Ethernet device
  2830. *
  2831. * @v netdev Network device
  2832. * @v iobuf I/O buffer
  2833. * @ret rc Return status code
  2834. */
  2835. static int hermon_eth_transmit ( struct net_device *netdev,
  2836. struct io_buffer *iobuf ) {
  2837. struct hermon_port *port = netdev->priv;
  2838. struct ib_device *ibdev = port->ibdev;
  2839. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2840. int rc;
  2841. /* Transmit packet */
  2842. if ( ( rc = ib_post_send ( ibdev, port->eth_qp, NULL,
  2843. iobuf ) ) != 0 ) {
  2844. DBGC ( hermon, "Hermon %p port %d could not transmit: %s\n",
  2845. hermon, ibdev->port, strerror ( rc ) );
  2846. return rc;
  2847. }
  2848. return 0;
  2849. }
  2850. /** Hermon Ethernet queue pair operations */
  2851. static struct ib_queue_pair_operations hermon_eth_qp_op = {
  2852. .alloc_iob = alloc_iob,
  2853. };
  2854. /**
  2855. * Handle Hermon Ethernet device send completion
  2856. *
  2857. * @v ibdev Infiniband device
  2858. * @v qp Queue pair
  2859. * @v iobuf I/O buffer
  2860. * @v rc Completion status code
  2861. */
  2862. static void hermon_eth_complete_send ( struct ib_device *ibdev __unused,
  2863. struct ib_queue_pair *qp,
  2864. struct io_buffer *iobuf, int rc ) {
  2865. struct net_device *netdev = ib_qp_get_ownerdata ( qp );
  2866. netdev_tx_complete_err ( netdev, iobuf, rc );
  2867. }
  2868. /**
  2869. * Handle Hermon Ethernet device receive completion
  2870. *
  2871. * @v ibdev Infiniband device
  2872. * @v qp Queue pair
  2873. * @v dest Destination address vector, or NULL
  2874. * @v source Source address vector, or NULL
  2875. * @v iobuf I/O buffer
  2876. * @v rc Completion status code
  2877. */
  2878. static void hermon_eth_complete_recv ( struct ib_device *ibdev __unused,
  2879. struct ib_queue_pair *qp,
  2880. struct ib_address_vector *dest __unused,
  2881. struct ib_address_vector *source,
  2882. struct io_buffer *iobuf, int rc ) {
  2883. struct net_device *netdev = ib_qp_get_ownerdata ( qp );
  2884. struct net_device *vlan;
  2885. /* Find VLAN device, if applicable */
  2886. if ( source->vlan_present ) {
  2887. if ( ( vlan = vlan_find ( netdev, source->vlan ) ) != NULL ) {
  2888. netdev = vlan;
  2889. } else if ( rc == 0 ) {
  2890. rc = -ENODEV;
  2891. }
  2892. }
  2893. /* Hand off to network layer */
  2894. if ( rc == 0 ) {
  2895. netdev_rx ( netdev, iobuf );
  2896. } else {
  2897. netdev_rx_err ( netdev, iobuf, rc );
  2898. }
  2899. }
  2900. /** Hermon Ethernet device completion operations */
  2901. static struct ib_completion_queue_operations hermon_eth_cq_op = {
  2902. .complete_send = hermon_eth_complete_send,
  2903. .complete_recv = hermon_eth_complete_recv,
  2904. };
  2905. /**
  2906. * Poll Hermon Ethernet device
  2907. *
  2908. * @v netdev Network device
  2909. */
  2910. static void hermon_eth_poll ( struct net_device *netdev ) {
  2911. struct hermon_port *port = netdev->priv;
  2912. struct ib_device *ibdev = port->ibdev;
  2913. ib_poll_eq ( ibdev );
  2914. }
  2915. /**
  2916. * Open Hermon Ethernet device
  2917. *
  2918. * @v netdev Network device
  2919. * @ret rc Return status code
  2920. */
  2921. static int hermon_eth_open ( struct net_device *netdev ) {
  2922. struct hermon_port *port = netdev->priv;
  2923. struct ib_device *ibdev = port->ibdev;
  2924. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2925. union hermonprm_set_port set_port;
  2926. int rc;
  2927. /* Open hardware */
  2928. if ( ( rc = hermon_open ( hermon ) ) != 0 )
  2929. goto err_open;
  2930. /* Allocate completion queue */
  2931. port->eth_cq = ib_create_cq ( ibdev, HERMON_ETH_NUM_CQES,
  2932. &hermon_eth_cq_op );
  2933. if ( ! port->eth_cq ) {
  2934. DBGC ( hermon, "Hermon %p port %d could not create completion "
  2935. "queue\n", hermon, ibdev->port );
  2936. rc = -ENOMEM;
  2937. goto err_create_cq;
  2938. }
  2939. /* Allocate queue pair */
  2940. port->eth_qp = ib_create_qp ( ibdev, IB_QPT_ETH,
  2941. HERMON_ETH_NUM_SEND_WQES, port->eth_cq,
  2942. HERMON_ETH_NUM_RECV_WQES, port->eth_cq,
  2943. &hermon_eth_qp_op, netdev->name );
  2944. if ( ! port->eth_qp ) {
  2945. DBGC ( hermon, "Hermon %p port %d could not create queue "
  2946. "pair\n", hermon, ibdev->port );
  2947. rc = -ENOMEM;
  2948. goto err_create_qp;
  2949. }
  2950. ib_qp_set_ownerdata ( port->eth_qp, netdev );
  2951. /* Activate queue pair */
  2952. if ( ( rc = ib_modify_qp ( ibdev, port->eth_qp ) ) != 0 ) {
  2953. DBGC ( hermon, "Hermon %p port %d could not modify queue "
  2954. "pair: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2955. goto err_modify_qp;
  2956. }
  2957. /* Fill receive rings */
  2958. ib_refill_recv ( ibdev, port->eth_qp );
  2959. /* Set port general parameters */
  2960. memset ( &set_port, 0, sizeof ( set_port ) );
  2961. MLX_FILL_3 ( &set_port.general, 0,
  2962. v_mtu, 1,
  2963. v_pprx, 1,
  2964. v_pptx, 1 );
  2965. MLX_FILL_1 ( &set_port.general, 1,
  2966. mtu, ( ETH_FRAME_LEN + 40 /* Used by card */ ) );
  2967. MLX_FILL_1 ( &set_port.general, 2,
  2968. pfctx, ( 1 << FCOE_VLAN_PRIORITY ) );
  2969. MLX_FILL_1 ( &set_port.general, 3,
  2970. pfcrx, ( 1 << FCOE_VLAN_PRIORITY ) );
  2971. if ( ( rc = hermon_cmd_set_port ( hermon, 1,
  2972. ( HERMON_SET_PORT_GENERAL_PARAM |
  2973. ibdev->port ),
  2974. &set_port ) ) != 0 ) {
  2975. DBGC ( hermon, "Hermon %p port %d could not set port general "
  2976. "parameters: %s\n",
  2977. hermon, ibdev->port, strerror ( rc ) );
  2978. goto err_set_port_general_params;
  2979. }
  2980. /* Set port receive QP */
  2981. memset ( &set_port, 0, sizeof ( set_port ) );
  2982. MLX_FILL_1 ( &set_port.rqp_calc, 0, base_qpn, port->eth_qp->qpn );
  2983. MLX_FILL_1 ( &set_port.rqp_calc, 2,
  2984. mac_miss_index, 128 /* MAC misses go to promisc QP */ );
  2985. MLX_FILL_2 ( &set_port.rqp_calc, 3,
  2986. vlan_miss_index, 127 /* VLAN misses go to promisc QP */,
  2987. no_vlan_index, 126 /* VLAN-free go to promisc QP */ );
  2988. MLX_FILL_2 ( &set_port.rqp_calc, 5,
  2989. promisc_qpn, port->eth_qp->qpn,
  2990. en_uc_promisc, 1 );
  2991. MLX_FILL_2 ( &set_port.rqp_calc, 6,
  2992. def_mcast_qpn, port->eth_qp->qpn,
  2993. mc_promisc_mode, 2 /* Receive all multicasts */ );
  2994. if ( ( rc = hermon_cmd_set_port ( hermon, 1,
  2995. ( HERMON_SET_PORT_RECEIVE_QP |
  2996. ibdev->port ),
  2997. &set_port ) ) != 0 ) {
  2998. DBGC ( hermon, "Hermon %p port %d could not set port receive "
  2999. "QP: %s\n", hermon, ibdev->port, strerror ( rc ) );
  3000. goto err_set_port_receive_qp;
  3001. }
  3002. /* Initialise port */
  3003. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port ) ) != 0 ) {
  3004. DBGC ( hermon, "Hermon %p port %d could not initialise port: "
  3005. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  3006. goto err_init_port;
  3007. }
  3008. return 0;
  3009. err_init_port:
  3010. err_set_port_receive_qp:
  3011. err_set_port_general_params:
  3012. err_modify_qp:
  3013. ib_destroy_qp ( ibdev, port->eth_qp );
  3014. err_create_qp:
  3015. ib_destroy_cq ( ibdev, port->eth_cq );
  3016. err_create_cq:
  3017. hermon_close ( hermon );
  3018. err_open:
  3019. return rc;
  3020. }
  3021. /**
  3022. * Close Hermon Ethernet device
  3023. *
  3024. * @v netdev Network device
  3025. */
  3026. static void hermon_eth_close ( struct net_device *netdev ) {
  3027. struct hermon_port *port = netdev->priv;
  3028. struct ib_device *ibdev = port->ibdev;
  3029. struct hermon *hermon = ib_get_drvdata ( ibdev );
  3030. int rc;
  3031. /* Close port */
  3032. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  3033. DBGC ( hermon, "Hermon %p port %d could not close port: %s\n",
  3034. hermon, ibdev->port, strerror ( rc ) );
  3035. /* Nothing we can do about this */
  3036. }
  3037. /* Tear down the queues */
  3038. ib_destroy_qp ( ibdev, port->eth_qp );
  3039. ib_destroy_cq ( ibdev, port->eth_cq );
  3040. /* Close hardware */
  3041. hermon_close ( hermon );
  3042. }
  3043. /** Hermon Ethernet network device operations */
  3044. static struct net_device_operations hermon_eth_operations = {
  3045. .open = hermon_eth_open,
  3046. .close = hermon_eth_close,
  3047. .transmit = hermon_eth_transmit,
  3048. .poll = hermon_eth_poll,
  3049. };
  3050. /**
  3051. * Register Hermon Ethernet device
  3052. *
  3053. * @v hermon Hermon device
  3054. * @v port Hermon port
  3055. * @ret rc Return status code
  3056. */
  3057. static int hermon_register_netdev ( struct hermon *hermon,
  3058. struct hermon_port *port ) {
  3059. struct net_device *netdev = port->netdev;
  3060. struct ib_device *ibdev = port->ibdev;
  3061. struct hermonprm_query_port_cap query_port;
  3062. union {
  3063. uint8_t bytes[8];
  3064. uint32_t dwords[2];
  3065. } mac;
  3066. int rc;
  3067. /* Retrieve MAC address */
  3068. if ( ( rc = hermon_cmd_query_port ( hermon, ibdev->port,
  3069. &query_port ) ) != 0 ) {
  3070. DBGC ( hermon, "Hermon %p port %d could not query port: %s\n",
  3071. hermon, ibdev->port, strerror ( rc ) );
  3072. goto err_query_port;
  3073. }
  3074. mac.dwords[0] = htonl ( MLX_GET ( &query_port, mac_47_32 ) );
  3075. mac.dwords[1] = htonl ( MLX_GET ( &query_port, mac_31_0 ) );
  3076. memcpy ( netdev->hw_addr,
  3077. &mac.bytes[ sizeof ( mac.bytes ) - ETH_ALEN ], ETH_ALEN );
  3078. /* Register network device */
  3079. if ( ( rc = register_netdev ( netdev ) ) != 0 ) {
  3080. DBGC ( hermon, "Hermon %p port %d could not register network "
  3081. "device: %s\n", hermon, ibdev->port, strerror ( rc ) );
  3082. goto err_register_netdev;
  3083. }
  3084. /* Register non-volatile options */
  3085. if ( ( rc = register_nvo ( &port->nvo,
  3086. netdev_settings ( netdev ) ) ) != 0 ) {
  3087. DBGC ( hermon, "Hermon %p port %d could not register non-"
  3088. "volatile options: %s\n",
  3089. hermon, ibdev->port, strerror ( rc ) );
  3090. goto err_register_nvo;
  3091. }
  3092. return 0;
  3093. unregister_nvo ( &port->nvo );
  3094. err_register_nvo:
  3095. unregister_netdev ( netdev );
  3096. err_register_netdev:
  3097. err_query_port:
  3098. return rc;
  3099. }
  3100. /**
  3101. * Handle Hermon Ethernet device port state change
  3102. *
  3103. * @v hermon Hermon device
  3104. * @v port Hermon port
  3105. * @v link_up Link is up
  3106. */
  3107. static void hermon_state_change_netdev ( struct hermon *hermon __unused,
  3108. struct hermon_port *port,
  3109. int link_up ) {
  3110. struct net_device *netdev = port->netdev;
  3111. if ( link_up ) {
  3112. netdev_link_up ( netdev );
  3113. } else {
  3114. netdev_link_down ( netdev );
  3115. }
  3116. }
  3117. /**
  3118. * Unregister Hermon Ethernet device
  3119. *
  3120. * @v hermon Hermon device
  3121. * @v port Hermon port
  3122. */
  3123. static void hermon_unregister_netdev ( struct hermon *hermon __unused,
  3124. struct hermon_port *port ) {
  3125. struct net_device *netdev = port->netdev;
  3126. unregister_nvo ( &port->nvo );
  3127. unregister_netdev ( netdev );
  3128. }
  3129. /** Hermon Ethernet port type */
  3130. static struct hermon_port_type hermon_port_type_eth = {
  3131. .register_dev = hermon_register_netdev,
  3132. .state_change = hermon_state_change_netdev,
  3133. .unregister_dev = hermon_unregister_netdev,
  3134. };
  3135. /***************************************************************************
  3136. *
  3137. * Port type detection
  3138. *
  3139. ***************************************************************************
  3140. */
  3141. /** Timeout for port sensing */
  3142. #define HERMON_SENSE_PORT_TIMEOUT ( TICKS_PER_SEC / 2 )
  3143. /**
  3144. * Name port type
  3145. *
  3146. * @v port_type Port type
  3147. * @v port_type_name Port type name
  3148. */
  3149. static inline const char * hermon_name_port_type ( unsigned int port_type ) {
  3150. switch ( port_type ) {
  3151. case HERMON_PORT_TYPE_UNKNOWN: return "unknown";
  3152. case HERMON_PORT_TYPE_IB: return "Infiniband";
  3153. case HERMON_PORT_TYPE_ETH: return "Ethernet";
  3154. default: return "INVALID";
  3155. }
  3156. }
  3157. /**
  3158. * Sense port type
  3159. *
  3160. * @v hermon Hermon device
  3161. * @v port Hermon port
  3162. * @ret port_type Port type, or negative error
  3163. */
  3164. static int hermon_sense_port_type ( struct hermon *hermon,
  3165. struct hermon_port *port ) {
  3166. struct ib_device *ibdev = port->ibdev;
  3167. struct hermonprm_sense_port sense_port;
  3168. int port_type;
  3169. int rc;
  3170. /* If DPDP is not supported, always assume Infiniband */
  3171. if ( ! hermon->cap.dpdp ) {
  3172. port_type = HERMON_PORT_TYPE_IB;
  3173. DBGC ( hermon, "Hermon %p port %d does not support DPDP; "
  3174. "assuming an %s network\n", hermon, ibdev->port,
  3175. hermon_name_port_type ( port_type ) );
  3176. return port_type;
  3177. }
  3178. /* Sense the port type */
  3179. if ( ( rc = hermon_cmd_sense_port ( hermon, ibdev->port,
  3180. &sense_port ) ) != 0 ) {
  3181. DBGC ( hermon, "Hermon %p port %d sense failed: %s\n",
  3182. hermon, ibdev->port, strerror ( rc ) );
  3183. return rc;
  3184. }
  3185. port_type = MLX_GET ( &sense_port, port_type );
  3186. DBGC ( hermon, "Hermon %p port %d sensed an %s network\n",
  3187. hermon, ibdev->port, hermon_name_port_type ( port_type ) );
  3188. return port_type;
  3189. }
  3190. /**
  3191. * Set port type
  3192. *
  3193. * @v hermon Hermon device
  3194. * @v port Hermon port
  3195. * @ret rc Return status code
  3196. */
  3197. static int hermon_set_port_type ( struct hermon *hermon,
  3198. struct hermon_port *port ) {
  3199. struct ib_device *ibdev = port->ibdev;
  3200. struct hermonprm_query_port_cap query_port;
  3201. int ib_supported;
  3202. int eth_supported;
  3203. int port_type;
  3204. unsigned long start;
  3205. unsigned long elapsed;
  3206. int rc;
  3207. /* Check to see which types are supported */
  3208. if ( ( rc = hermon_cmd_query_port ( hermon, ibdev->port,
  3209. &query_port ) ) != 0 ) {
  3210. DBGC ( hermon, "Hermon %p port %d could not query port: %s\n",
  3211. hermon, ibdev->port, strerror ( rc ) );
  3212. return rc;
  3213. }
  3214. ib_supported = MLX_GET ( &query_port, ib );
  3215. eth_supported = MLX_GET ( &query_port, eth );
  3216. DBGC ( hermon, "Hermon %p port %d supports%s%s%s\n",
  3217. hermon, ibdev->port, ( ib_supported ? " Infiniband" : "" ),
  3218. ( ( ib_supported && eth_supported ) ? " and" : "" ),
  3219. ( eth_supported ? " Ethernet" : "" ) );
  3220. /* Sense network, if applicable */
  3221. if ( ib_supported && eth_supported ) {
  3222. /* Both types are supported; try sensing network */
  3223. start = currticks();
  3224. do {
  3225. /* Try sensing port */
  3226. port_type = hermon_sense_port_type ( hermon, port );
  3227. if ( port_type < 0 ) {
  3228. rc = port_type;
  3229. return rc;
  3230. }
  3231. } while ( ( port_type == HERMON_PORT_TYPE_UNKNOWN ) &&
  3232. ( ( elapsed = ( currticks() - start ) ) <
  3233. HERMON_SENSE_PORT_TIMEOUT ) );
  3234. /* Set port type based on sensed network, defaulting
  3235. * to Infiniband if nothing was sensed.
  3236. */
  3237. switch ( port_type ) {
  3238. case HERMON_PORT_TYPE_ETH:
  3239. port->type = &hermon_port_type_eth;
  3240. break;
  3241. case HERMON_PORT_TYPE_IB:
  3242. case HERMON_PORT_TYPE_UNKNOWN:
  3243. port->type = &hermon_port_type_ib;
  3244. break;
  3245. default:
  3246. return -EINVAL;
  3247. }
  3248. } else if ( eth_supported ) {
  3249. port->type = &hermon_port_type_eth;
  3250. } else {
  3251. port->type = &hermon_port_type_ib;
  3252. }
  3253. assert ( port->type != NULL );
  3254. return 0;
  3255. }
  3256. /***************************************************************************
  3257. *
  3258. * BOFM interface
  3259. *
  3260. ***************************************************************************
  3261. */
  3262. /**
  3263. * Harvest Ethernet MAC for BOFM
  3264. *
  3265. * @v bofm BOFM device
  3266. * @v mport Multi-port index
  3267. * @v mac MAC to fill in
  3268. * @ret rc Return status code
  3269. */
  3270. static int hermon_bofm_harvest ( struct bofm_device *bofm, unsigned int mport,
  3271. uint8_t *mac ) {
  3272. struct hermon *hermon = container_of ( bofm, struct hermon, bofm );
  3273. struct hermonprm_mod_stat_cfg stat_cfg;
  3274. union {
  3275. uint8_t bytes[8];
  3276. uint32_t dwords[2];
  3277. } buf;
  3278. int rc;
  3279. /* Query static configuration */
  3280. if ( ( rc = hermon_mod_stat_cfg ( hermon, mport,
  3281. HERMON_MOD_STAT_CFG_QUERY,
  3282. HERMON_MOD_STAT_CFG_OFFSET ( mac_m ),
  3283. &stat_cfg ) ) != 0 ) {
  3284. DBGC ( hermon, "Hermon %p port %d could not query "
  3285. "configuration: %s\n", hermon, mport, strerror ( rc ) );
  3286. return rc;
  3287. }
  3288. /* Retrieve MAC address */
  3289. buf.dwords[0] = htonl ( MLX_GET ( &stat_cfg, mac_high ) );
  3290. buf.dwords[1] = htonl ( MLX_GET ( &stat_cfg, mac_low ) );
  3291. memcpy ( mac, &buf.bytes[ sizeof ( buf.bytes ) - ETH_ALEN ],
  3292. ETH_ALEN );
  3293. DBGC ( hermon, "Hermon %p port %d harvested MAC address %s\n",
  3294. hermon, mport, eth_ntoa ( mac ) );
  3295. return 0;
  3296. }
  3297. /**
  3298. * Update Ethernet MAC for BOFM
  3299. *
  3300. * @v bofm BOFM device
  3301. * @v mport Multi-port index
  3302. * @v mac MAC to fill in
  3303. * @ret rc Return status code
  3304. */
  3305. static int hermon_bofm_update ( struct bofm_device *bofm, unsigned int mport,
  3306. const uint8_t *mac ) {
  3307. struct hermon *hermon = container_of ( bofm, struct hermon, bofm );
  3308. struct hermonprm_mod_stat_cfg stat_cfg;
  3309. union {
  3310. uint8_t bytes[8];
  3311. uint32_t dwords[2];
  3312. } buf;
  3313. int rc;
  3314. /* Prepare MAC address */
  3315. memset ( &buf, 0, sizeof ( buf ) );
  3316. memcpy ( &buf.bytes[ sizeof ( buf.bytes ) - ETH_ALEN ], mac,
  3317. ETH_ALEN );
  3318. /* Modify static configuration */
  3319. memset ( &stat_cfg, 0, sizeof ( stat_cfg ) );
  3320. MLX_FILL_2 ( &stat_cfg, 36,
  3321. mac_m, 1,
  3322. mac_high, ntohl ( buf.dwords[0] ) );
  3323. MLX_FILL_1 ( &stat_cfg, 37, mac_low, ntohl ( buf.dwords[1] ) );
  3324. if ( ( rc = hermon_mod_stat_cfg ( hermon, mport,
  3325. HERMON_MOD_STAT_CFG_SET,
  3326. HERMON_MOD_STAT_CFG_OFFSET ( mac_m ),
  3327. &stat_cfg ) ) != 0 ) {
  3328. DBGC ( hermon, "Hermon %p port %d could not modify "
  3329. "configuration: %s\n", hermon, mport, strerror ( rc ) );
  3330. return rc;
  3331. }
  3332. DBGC ( hermon, "Hermon %p port %d updated MAC address to %s\n",
  3333. hermon, mport, eth_ntoa ( mac ) );
  3334. return 0;
  3335. }
  3336. /** Hermon BOFM operations */
  3337. static struct bofm_operations hermon_bofm_operations = {
  3338. .harvest = hermon_bofm_harvest,
  3339. .update = hermon_bofm_update,
  3340. };
  3341. /***************************************************************************
  3342. *
  3343. * PCI interface
  3344. *
  3345. ***************************************************************************
  3346. */
  3347. /**
  3348. * Allocate Hermon device
  3349. *
  3350. * @v pci PCI device
  3351. * @v id PCI ID
  3352. * @ret rc Return status code
  3353. */
  3354. static struct hermon * hermon_alloc ( void ) {
  3355. struct hermon *hermon;
  3356. /* Allocate Hermon device */
  3357. hermon = zalloc ( sizeof ( *hermon ) );
  3358. if ( ! hermon )
  3359. goto err_hermon;
  3360. /* Allocate space for mailboxes */
  3361. hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
  3362. HERMON_MBOX_ALIGN );
  3363. if ( ! hermon->mailbox_in )
  3364. goto err_mailbox_in;
  3365. hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
  3366. HERMON_MBOX_ALIGN );
  3367. if ( ! hermon->mailbox_out )
  3368. goto err_mailbox_out;
  3369. return hermon;
  3370. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  3371. err_mailbox_out:
  3372. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  3373. err_mailbox_in:
  3374. free ( hermon );
  3375. err_hermon:
  3376. return NULL;
  3377. }
  3378. /**
  3379. * Free Hermon device
  3380. *
  3381. * @v hermon Hermon device
  3382. */
  3383. static void hermon_free ( struct hermon *hermon ) {
  3384. ufree ( hermon->icm );
  3385. ufree ( hermon->firmware_area );
  3386. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  3387. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  3388. free ( hermon );
  3389. }
  3390. /**
  3391. * Probe PCI device
  3392. *
  3393. * @v pci PCI device
  3394. * @v id PCI ID
  3395. * @ret rc Return status code
  3396. */
  3397. static int hermon_probe ( struct pci_device *pci ) {
  3398. struct hermon *hermon;
  3399. struct ib_device *ibdev;
  3400. struct net_device *netdev;
  3401. struct hermon_port *port;
  3402. unsigned int i;
  3403. int rc;
  3404. /* Allocate Hermon device */
  3405. hermon = hermon_alloc();
  3406. if ( ! hermon ) {
  3407. rc = -ENOMEM;
  3408. goto err_alloc;
  3409. }
  3410. pci_set_drvdata ( pci, hermon );
  3411. hermon->pci = pci;
  3412. /* Fix up PCI device */
  3413. adjust_pci_device ( pci );
  3414. /* Map PCI BARs */
  3415. hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR ),
  3416. HERMON_PCI_CONFIG_BAR_SIZE );
  3417. hermon->uar = ioremap ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ),
  3418. HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE );
  3419. /* Reset device */
  3420. hermon_reset ( hermon );
  3421. /* Start firmware */
  3422. if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
  3423. goto err_start_firmware;
  3424. /* Get device limits */
  3425. if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
  3426. goto err_get_cap;
  3427. /* Allocate Infiniband devices */
  3428. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3429. ibdev = alloc_ibdev ( 0 );
  3430. if ( ! ibdev ) {
  3431. rc = -ENOMEM;
  3432. goto err_alloc_ibdev;
  3433. }
  3434. hermon->port[i].ibdev = ibdev;
  3435. ibdev->op = &hermon_ib_operations;
  3436. ibdev->dev = &pci->dev;
  3437. ibdev->port = ( HERMON_PORT_BASE + i );
  3438. ib_set_drvdata ( ibdev, hermon );
  3439. }
  3440. /* Allocate network devices */
  3441. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3442. netdev = alloc_etherdev ( 0 );
  3443. if ( ! netdev ) {
  3444. rc = -ENOMEM;
  3445. goto err_alloc_netdev;
  3446. }
  3447. hermon->port[i].netdev = netdev;
  3448. netdev_init ( netdev, &hermon_eth_operations );
  3449. netdev->dev = &pci->dev;
  3450. netdev->priv = &hermon->port[i];
  3451. }
  3452. /* Start device */
  3453. if ( ( rc = hermon_start ( hermon, 1 ) ) != 0 )
  3454. goto err_start;
  3455. /* Determine port types */
  3456. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3457. port = &hermon->port[i];
  3458. if ( ( rc = hermon_set_port_type ( hermon, port ) ) != 0 )
  3459. goto err_set_port_type;
  3460. }
  3461. /* Initialise non-volatile storage */
  3462. nvs_vpd_init ( &hermon->nvsvpd, pci );
  3463. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3464. port = &hermon->port[i];
  3465. nvs_vpd_nvo_init ( &hermon->nvsvpd,
  3466. HERMON_VPD_FIELD ( port->ibdev->port ),
  3467. &port->nvo, NULL );
  3468. }
  3469. /* Register devices */
  3470. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3471. port = &hermon->port[i];
  3472. if ( ( rc = port->type->register_dev ( hermon, port ) ) != 0 )
  3473. goto err_register;
  3474. }
  3475. /* Leave device quiescent until opened */
  3476. if ( hermon->open_count == 0 )
  3477. hermon_stop ( hermon );
  3478. return 0;
  3479. i = hermon->cap.num_ports;
  3480. err_register:
  3481. for ( i-- ; ( signed int ) i >= 0 ; i-- ) {
  3482. port = &hermon->port[i];
  3483. port->type->unregister_dev ( hermon, port );
  3484. }
  3485. err_set_port_type:
  3486. hermon_stop ( hermon );
  3487. err_start:
  3488. i = hermon->cap.num_ports;
  3489. err_alloc_netdev:
  3490. for ( i-- ; ( signed int ) i >= 0 ; i-- ) {
  3491. netdev_nullify ( hermon->port[i].netdev );
  3492. netdev_put ( hermon->port[i].netdev );
  3493. }
  3494. i = hermon->cap.num_ports;
  3495. err_alloc_ibdev:
  3496. for ( i-- ; ( signed int ) i >= 0 ; i-- )
  3497. ibdev_put ( hermon->port[i].ibdev );
  3498. err_get_cap:
  3499. hermon_stop_firmware ( hermon );
  3500. err_start_firmware:
  3501. iounmap ( hermon->uar );
  3502. iounmap ( hermon->config );
  3503. hermon_free ( hermon );
  3504. err_alloc:
  3505. return rc;
  3506. }
  3507. /**
  3508. * Remove PCI device
  3509. *
  3510. * @v pci PCI device
  3511. */
  3512. static void hermon_remove ( struct pci_device *pci ) {
  3513. struct hermon *hermon = pci_get_drvdata ( pci );
  3514. struct hermon_port *port;
  3515. int i;
  3516. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- ) {
  3517. port = &hermon->port[i];
  3518. port->type->unregister_dev ( hermon, port );
  3519. }
  3520. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- ) {
  3521. netdev_nullify ( hermon->port[i].netdev );
  3522. netdev_put ( hermon->port[i].netdev );
  3523. }
  3524. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
  3525. ibdev_put ( hermon->port[i].ibdev );
  3526. iounmap ( hermon->uar );
  3527. iounmap ( hermon->config );
  3528. hermon_free ( hermon );
  3529. }
  3530. /**
  3531. * Probe PCI device for BOFM
  3532. *
  3533. * @v pci PCI device
  3534. * @v id PCI ID
  3535. * @ret rc Return status code
  3536. */
  3537. static int hermon_bofm_probe ( struct pci_device *pci ) {
  3538. struct hermon *hermon;
  3539. int rc;
  3540. /* Allocate Hermon device */
  3541. hermon = hermon_alloc();
  3542. if ( ! hermon ) {
  3543. rc = -ENOMEM;
  3544. goto err_alloc;
  3545. }
  3546. pci_set_drvdata ( pci, hermon );
  3547. hermon->pci = pci;
  3548. /* Fix up PCI device */
  3549. adjust_pci_device ( pci );
  3550. /* Map PCI BAR */
  3551. hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR ),
  3552. HERMON_PCI_CONFIG_BAR_SIZE );
  3553. /* Initialise BOFM device */
  3554. bofm_init ( &hermon->bofm, pci, &hermon_bofm_operations );
  3555. /* Register BOFM device */
  3556. if ( ( rc = bofm_register ( &hermon->bofm ) ) != 0 ) {
  3557. DBGC ( hermon, "Hermon %p could not register BOFM device: "
  3558. "%s\n", hermon, strerror ( rc ) );
  3559. goto err_bofm_register;
  3560. }
  3561. return 0;
  3562. err_bofm_register:
  3563. iounmap ( hermon->config );
  3564. hermon_free ( hermon );
  3565. err_alloc:
  3566. return rc;
  3567. }
  3568. /**
  3569. * Remove PCI device for BOFM
  3570. *
  3571. * @v pci PCI device
  3572. */
  3573. static void hermon_bofm_remove ( struct pci_device *pci ) {
  3574. struct hermon *hermon = pci_get_drvdata ( pci );
  3575. bofm_unregister ( &hermon->bofm );
  3576. iounmap ( hermon->config );
  3577. hermon_free ( hermon );
  3578. }
  3579. static struct pci_device_id hermon_nics[] = {
  3580. PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver", 0 ),
  3581. PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver", 0 ),
  3582. PCI_ROM ( 0x15b3, 0x6732, "mt26418", "MT26418 HCA driver", 0 ),
  3583. PCI_ROM ( 0x15b3, 0x673c, "mt26428", "MT26428 HCA driver", 0 ),
  3584. PCI_ROM ( 0x15b3, 0x6746, "mt26438", "MT26438 HCA driver", 0 ),
  3585. PCI_ROM ( 0x15b3, 0x6778, "mt26488", "MT26488 HCA driver", 0 ),
  3586. PCI_ROM ( 0x15b3, 0x6368, "mt25448", "MT25448 HCA driver", 0 ),
  3587. PCI_ROM ( 0x15b3, 0x6750, "mt26448", "MT26448 HCA driver", 0 ),
  3588. PCI_ROM ( 0x15b3, 0x6372, "mt25458", "MT25458 HCA driver", 0 ),
  3589. PCI_ROM ( 0x15b3, 0x675a, "mt26458", "MT26458 HCA driver", 0 ),
  3590. PCI_ROM ( 0x15b3, 0x6764, "mt26468", "MT26468 HCA driver", 0 ),
  3591. PCI_ROM ( 0x15b3, 0x676e, "mt26478", "MT26478 HCA driver", 0 ),
  3592. };
  3593. struct pci_driver hermon_driver __pci_driver = {
  3594. .ids = hermon_nics,
  3595. .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
  3596. .probe = hermon_probe,
  3597. .remove = hermon_remove,
  3598. };
  3599. struct pci_driver hermon_bofm_driver __bofm_driver = {
  3600. .ids = hermon_nics,
  3601. .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
  3602. .probe = hermon_bofm_probe,
  3603. .remove = hermon_bofm_remove,
  3604. };