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e1000e_main.c 33KB

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  1. /*******************************************************************************
  2. Intel PRO/1000 Linux driver
  3. Copyright(c) 1999 - 2009 Intel Corporation.
  4. Portions Copyright(c) 2010 Marty Connor <mdc@etherboot.org>
  5. Portions Copyright(c) 2010 Entity Cyber, Inc.
  6. Portions Copyright(c) 2010 Northrop Grumman Corporation
  7. This program is free software; you can redistribute it and/or modify it
  8. under the terms and conditions of the GNU General Public License,
  9. version 2, as published by the Free Software Foundation.
  10. This program is distributed in the hope it will be useful, but WITHOUT
  11. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. more details.
  14. You should have received a copy of the GNU General Public License along with
  15. this program; if not, write to the Free Software Foundation, Inc.,
  16. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17. The full GNU General Public License is included in this distribution in
  18. the file called "COPYING".
  19. Contact Information:
  20. Linux NICS <linux.nics@intel.com>
  21. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  22. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  23. *******************************************************************************/
  24. FILE_LICENCE ( GPL2_OR_LATER );
  25. #include "e1000e.h"
  26. static s32 e1000e_get_variants_82571(struct e1000_adapter *adapter)
  27. {
  28. struct e1000_hw *hw = &adapter->hw;
  29. static int global_quad_port_a; /* global port a indication */
  30. struct pci_device *pdev = adapter->pdev;
  31. u16 eeprom_data = 0;
  32. int is_port_b = er32(STATUS) & E1000_STATUS_FUNC_1;
  33. /* tag quad port adapters first, it's used below */
  34. switch (pdev->device) {
  35. case E1000_DEV_ID_82571EB_QUAD_COPPER:
  36. case E1000_DEV_ID_82571EB_QUAD_FIBER:
  37. case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
  38. case E1000_DEV_ID_82571PT_QUAD_COPPER:
  39. adapter->flags |= FLAG_IS_QUAD_PORT;
  40. /* mark the first port */
  41. if (global_quad_port_a == 0)
  42. adapter->flags |= FLAG_IS_QUAD_PORT_A;
  43. /* Reset for multiple quad port adapters */
  44. global_quad_port_a++;
  45. if (global_quad_port_a == 4)
  46. global_quad_port_a = 0;
  47. break;
  48. default:
  49. break;
  50. }
  51. switch (adapter->hw.mac.type) {
  52. case e1000_82571:
  53. /* these dual ports don't have WoL on port B at all */
  54. if (((pdev->device == E1000_DEV_ID_82571EB_FIBER) ||
  55. (pdev->device == E1000_DEV_ID_82571EB_SERDES) ||
  56. (pdev->device == E1000_DEV_ID_82571EB_COPPER)) &&
  57. (is_port_b))
  58. adapter->flags &= ~FLAG_HAS_WOL;
  59. /* quad ports only support WoL on port A */
  60. if (adapter->flags & FLAG_IS_QUAD_PORT &&
  61. (!(adapter->flags & FLAG_IS_QUAD_PORT_A)))
  62. adapter->flags &= ~FLAG_HAS_WOL;
  63. /* Does not support WoL on any port */
  64. if (pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD)
  65. adapter->flags &= ~FLAG_HAS_WOL;
  66. break;
  67. case e1000_82573:
  68. if (pdev->device == E1000_DEV_ID_82573L) {
  69. if (e1000e_read_nvm(&adapter->hw, NVM_INIT_3GIO_3, 1,
  70. &eeprom_data) < 0)
  71. break;
  72. if (!(eeprom_data & NVM_WORD1A_ASPM_MASK)) {
  73. adapter->flags |= FLAG_HAS_JUMBO_FRAMES;
  74. adapter->max_hw_frame_size = DEFAULT_JUMBO;
  75. }
  76. }
  77. break;
  78. default:
  79. break;
  80. }
  81. return 0;
  82. }
  83. static struct e1000_info e1000_82571_info = {
  84. .mac = e1000_82571,
  85. .flags = FLAG_HAS_HW_VLAN_FILTER
  86. | FLAG_HAS_JUMBO_FRAMES
  87. | FLAG_HAS_WOL
  88. | FLAG_APME_IN_CTRL3
  89. | FLAG_RX_CSUM_ENABLED
  90. | FLAG_HAS_CTRLEXT_ON_LOAD
  91. | FLAG_HAS_SMART_POWER_DOWN
  92. | FLAG_RESET_OVERWRITES_LAA /* errata */
  93. | FLAG_TARC_SPEED_MODE_BIT /* errata */
  94. | FLAG_APME_CHECK_PORT_B,
  95. .pba = 38,
  96. .max_hw_frame_size = DEFAULT_JUMBO,
  97. .init_ops = e1000e_init_function_pointers_82571,
  98. .get_variants = e1000e_get_variants_82571,
  99. };
  100. static struct e1000_info e1000_82572_info = {
  101. .mac = e1000_82572,
  102. .flags = FLAG_HAS_HW_VLAN_FILTER
  103. | FLAG_HAS_JUMBO_FRAMES
  104. | FLAG_HAS_WOL
  105. | FLAG_APME_IN_CTRL3
  106. | FLAG_RX_CSUM_ENABLED
  107. | FLAG_HAS_CTRLEXT_ON_LOAD
  108. | FLAG_TARC_SPEED_MODE_BIT, /* errata */
  109. .pba = 38,
  110. .max_hw_frame_size = DEFAULT_JUMBO,
  111. .init_ops = e1000e_init_function_pointers_82571,
  112. .get_variants = e1000e_get_variants_82571,
  113. };
  114. static struct e1000_info e1000_82573_info = {
  115. .mac = e1000_82573,
  116. .flags = FLAG_HAS_HW_VLAN_FILTER
  117. | FLAG_HAS_WOL
  118. | FLAG_APME_IN_CTRL3
  119. | FLAG_RX_CSUM_ENABLED
  120. | FLAG_HAS_SMART_POWER_DOWN
  121. | FLAG_HAS_AMT
  122. | FLAG_HAS_ERT
  123. | FLAG_HAS_SWSM_ON_LOAD,
  124. .pba = 20,
  125. .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN,
  126. .init_ops = e1000e_init_function_pointers_82571,
  127. .get_variants = e1000e_get_variants_82571,
  128. };
  129. static struct e1000_info e1000_82574_info = {
  130. .mac = e1000_82574,
  131. .flags = FLAG_HAS_HW_VLAN_FILTER
  132. #ifdef CONFIG_E1000E_MSIX
  133. | FLAG_HAS_MSIX
  134. #endif
  135. | FLAG_HAS_JUMBO_FRAMES
  136. | FLAG_HAS_WOL
  137. | FLAG_APME_IN_CTRL3
  138. | FLAG_RX_CSUM_ENABLED
  139. | FLAG_HAS_SMART_POWER_DOWN
  140. | FLAG_HAS_AMT
  141. | FLAG_HAS_CTRLEXT_ON_LOAD,
  142. .pba = 20,
  143. .max_hw_frame_size = DEFAULT_JUMBO,
  144. .init_ops = e1000e_init_function_pointers_82571,
  145. .get_variants = e1000e_get_variants_82571,
  146. };
  147. static struct e1000_info e1000_82583_info = {
  148. .mac = e1000_82583,
  149. .flags = FLAG_HAS_HW_VLAN_FILTER
  150. | FLAG_HAS_WOL
  151. | FLAG_APME_IN_CTRL3
  152. | FLAG_RX_CSUM_ENABLED
  153. | FLAG_HAS_SMART_POWER_DOWN
  154. | FLAG_HAS_AMT
  155. | FLAG_HAS_CTRLEXT_ON_LOAD,
  156. .pba = 20,
  157. .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN,
  158. .init_ops = e1000e_init_function_pointers_82571,
  159. .get_variants = e1000e_get_variants_82571,
  160. };
  161. static struct e1000_info e1000_es2_info = {
  162. .mac = e1000_80003es2lan,
  163. .flags = FLAG_HAS_HW_VLAN_FILTER
  164. | FLAG_HAS_JUMBO_FRAMES
  165. | FLAG_HAS_WOL
  166. | FLAG_APME_IN_CTRL3
  167. | FLAG_RX_CSUM_ENABLED
  168. | FLAG_HAS_CTRLEXT_ON_LOAD
  169. | FLAG_RX_NEEDS_RESTART /* errata */
  170. | FLAG_TARC_SET_BIT_ZERO /* errata */
  171. | FLAG_APME_CHECK_PORT_B
  172. | FLAG_DISABLE_FC_PAUSE_TIME /* errata */
  173. | FLAG_TIPG_MEDIUM_FOR_80003ESLAN,
  174. .pba = 38,
  175. .max_hw_frame_size = DEFAULT_JUMBO,
  176. .init_ops = e1000e_init_function_pointers_80003es2lan,
  177. .get_variants = NULL,
  178. };
  179. static s32 e1000e_get_variants_ich8lan(struct e1000_adapter *adapter)
  180. {
  181. if (adapter->hw.phy.type == e1000_phy_ife) {
  182. adapter->flags &= ~FLAG_HAS_JUMBO_FRAMES;
  183. adapter->max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN;
  184. }
  185. if ((adapter->hw.mac.type == e1000_ich8lan) &&
  186. (adapter->hw.phy.type == e1000_phy_igp_3))
  187. adapter->flags |= FLAG_LSC_GIG_SPEED_DROP;
  188. return 0;
  189. }
  190. static struct e1000_info e1000_ich8_info = {
  191. .mac = e1000_ich8lan,
  192. .flags = FLAG_HAS_WOL
  193. | FLAG_IS_ICH
  194. | FLAG_RX_CSUM_ENABLED
  195. | FLAG_HAS_CTRLEXT_ON_LOAD
  196. | FLAG_HAS_AMT
  197. | FLAG_HAS_FLASH
  198. | FLAG_APME_IN_WUC,
  199. .pba = 8,
  200. .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN,
  201. .init_ops = e1000e_init_function_pointers_ich8lan,
  202. .get_variants = e1000e_get_variants_ich8lan,
  203. };
  204. static struct e1000_info e1000_ich9_info = {
  205. .mac = e1000_ich9lan,
  206. .flags = FLAG_HAS_JUMBO_FRAMES
  207. | FLAG_IS_ICH
  208. | FLAG_HAS_WOL
  209. | FLAG_RX_CSUM_ENABLED
  210. | FLAG_HAS_CTRLEXT_ON_LOAD
  211. | FLAG_HAS_AMT
  212. | FLAG_HAS_ERT
  213. | FLAG_HAS_FLASH
  214. | FLAG_APME_IN_WUC,
  215. .pba = 10,
  216. .max_hw_frame_size = DEFAULT_JUMBO,
  217. .init_ops = e1000e_init_function_pointers_ich8lan,
  218. .get_variants = e1000e_get_variants_ich8lan,
  219. };
  220. static struct e1000_info e1000_ich10_info = {
  221. .mac = e1000_ich10lan,
  222. .flags = FLAG_HAS_JUMBO_FRAMES
  223. | FLAG_IS_ICH
  224. | FLAG_HAS_WOL
  225. | FLAG_RX_CSUM_ENABLED
  226. | FLAG_HAS_CTRLEXT_ON_LOAD
  227. | FLAG_HAS_AMT
  228. | FLAG_HAS_ERT
  229. | FLAG_HAS_FLASH
  230. | FLAG_APME_IN_WUC,
  231. .pba = 10,
  232. .max_hw_frame_size = DEFAULT_JUMBO,
  233. .init_ops = e1000e_init_function_pointers_ich8lan,
  234. .get_variants = e1000e_get_variants_ich8lan,
  235. };
  236. static struct e1000_info e1000_pch_info = {
  237. .mac = e1000_pchlan,
  238. .flags = FLAG_IS_ICH
  239. | FLAG_HAS_WOL
  240. | FLAG_RX_CSUM_ENABLED
  241. | FLAG_HAS_CTRLEXT_ON_LOAD
  242. | FLAG_HAS_AMT
  243. | FLAG_HAS_FLASH
  244. | FLAG_HAS_JUMBO_FRAMES
  245. | FLAG_DISABLE_FC_PAUSE_TIME /* errata */
  246. | FLAG_APME_IN_WUC,
  247. .pba = 26,
  248. .max_hw_frame_size = 4096,
  249. .init_ops = e1000e_init_function_pointers_ich8lan,
  250. .get_variants = e1000e_get_variants_ich8lan,
  251. };
  252. static const struct e1000_info *e1000_info_tbl[] = {
  253. [board_82571] = &e1000_82571_info,
  254. [board_82572] = &e1000_82572_info,
  255. [board_82573] = &e1000_82573_info,
  256. [board_82574] = &e1000_82574_info,
  257. [board_82583] = &e1000_82583_info,
  258. [board_80003es2lan] = &e1000_es2_info,
  259. [board_ich8lan] = &e1000_ich8_info,
  260. [board_ich9lan] = &e1000_ich9_info,
  261. [board_ich10lan] = &e1000_ich10_info,
  262. [board_pchlan] = &e1000_pch_info,
  263. };
  264. /* Low-level support routines */
  265. s32 e1000e_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
  266. {
  267. u16 cap_offset;
  268. cap_offset = pci_find_capability(hw->adapter->pdev, PCI_CAP_ID_EXP);
  269. if (!cap_offset)
  270. return -E1000_ERR_CONFIG;
  271. pci_read_config_word(hw->adapter->pdev, cap_offset + reg, value);
  272. return E1000_SUCCESS;
  273. }
  274. /**
  275. * e1000e_irq_disable - Mask off interrupt generation on the NIC
  276. **/
  277. static void e1000e_irq_disable(struct e1000_adapter *adapter)
  278. {
  279. struct e1000_hw *hw = &adapter->hw;
  280. ew32(IMC, ~0);
  281. e1e_flush();
  282. }
  283. /**
  284. * e1000e_irq_enable - Enable default interrupt generation settings
  285. **/
  286. static void e1000e_irq_enable(struct e1000_adapter *adapter)
  287. {
  288. struct e1000_hw *hw = &adapter->hw;
  289. ew32(IMS, IMS_ENABLE_MASK);
  290. e1e_flush();
  291. }
  292. /**
  293. * e1000_get_hw_control - get control of the h/w from f/w
  294. * @adapter: address of board private structure
  295. *
  296. * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
  297. * For ASF and Pass Through versions of f/w this means that
  298. * the driver is loaded. For AMT version (only with 82573)
  299. * of the f/w this means that the network i/f is open.
  300. **/
  301. static void e1000e_get_hw_control(struct e1000_adapter *adapter)
  302. {
  303. struct e1000_hw *hw = &adapter->hw;
  304. u32 ctrl_ext;
  305. u32 swsm;
  306. /* Let firmware know the driver has taken over */
  307. if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
  308. swsm = er32(SWSM);
  309. ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
  310. } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
  311. ctrl_ext = er32(CTRL_EXT);
  312. ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  313. }
  314. }
  315. /**
  316. * e1000e_power_up_phy - restore link in case the phy was powered down
  317. * @adapter: address of board private structure
  318. *
  319. * The phy may be powered down to save power and turn off link when the
  320. * driver is unloaded and wake on lan is not enabled (among others)
  321. * *** this routine MUST be followed by a call to e1000e_reset ***
  322. **/
  323. void e1000e_power_up_phy(struct e1000_adapter *adapter)
  324. {
  325. if (adapter->hw.phy.ops.power_up)
  326. adapter->hw.phy.ops.power_up(&adapter->hw);
  327. adapter->hw.mac.ops.setup_link(&adapter->hw);
  328. }
  329. /**
  330. * e1000_power_down_phy - Power down the PHY
  331. *
  332. * Power down the PHY so no link is implied when interface is down.
  333. * The PHY cannot be powered down if management or WoL is active.
  334. */
  335. void e1000e_power_down_phy(struct e1000_adapter *adapter)
  336. {
  337. /* WoL is enabled */
  338. if (adapter->wol)
  339. return;
  340. if (adapter->hw.phy.ops.power_down)
  341. adapter->hw.phy.ops.power_down(&adapter->hw);
  342. }
  343. /**
  344. * e1000e_reset - bring the hardware into a known good state
  345. *
  346. * This function boots the hardware and enables some settings that
  347. * require a configuration cycle of the hardware - those cannot be
  348. * set/changed during runtime. After reset the device needs to be
  349. * properly configured for Rx, Tx etc.
  350. */
  351. void e1000e_reset(struct e1000_adapter *adapter)
  352. {
  353. struct e1000_mac_info *mac = &adapter->hw.mac;
  354. struct e1000_fc_info *fc = &adapter->hw.fc;
  355. u32 pba = adapter->pba;
  356. struct e1000_hw *hw = &adapter->hw;
  357. /* Reset Packet Buffer Allocation to default */
  358. ew32(PBA, pba);
  359. hw->fc.requested_mode = e1000_fc_none;
  360. fc->current_mode = fc->requested_mode;
  361. /* Allow time for pending master requests to run */
  362. mac->ops.reset_hw(hw);
  363. /*
  364. * For parts with AMT enabled, let the firmware know
  365. * that the network interface is in control
  366. */
  367. if (adapter->flags & FLAG_HAS_AMT)
  368. e1000e_get_hw_control(adapter);
  369. ew32(WUC, 0);
  370. if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
  371. e1e_wphy(&adapter->hw, BM_WUC, 0);
  372. if (mac->ops.init_hw(hw))
  373. DBG("Hardware Error\n");
  374. /* additional part of the flow-control workaround above */
  375. if (hw->mac.type == e1000_pchlan)
  376. ew32(FCRTV_PCH, 0x1000);
  377. e1000e_reset_adaptive(hw);
  378. e1000e_get_phy_info(hw);
  379. if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
  380. !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
  381. u16 phy_data = 0;
  382. /*
  383. * speed up time to link by disabling smart power down, ignore
  384. * the return value of this function because there is nothing
  385. * different we would do if it failed
  386. */
  387. e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
  388. phy_data &= ~IGP02E1000_PM_SPD;
  389. e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
  390. }
  391. }
  392. static int e1000e_sw_init(struct e1000_adapter *adapter)
  393. {
  394. s32 rc;
  395. /* Set various function pointers */
  396. adapter->ei->init_ops(&adapter->hw);
  397. rc = adapter->hw.mac.ops.init_params(&adapter->hw);
  398. if (rc)
  399. return rc;
  400. rc = adapter->hw.nvm.ops.init_params(&adapter->hw);
  401. if (rc)
  402. return rc;
  403. rc = adapter->hw.phy.ops.init_params(&adapter->hw);
  404. if (rc)
  405. return rc;
  406. /* Explicitly disable IRQ since the NIC can be in any state. */
  407. e1000e_irq_disable(adapter);
  408. return E1000_SUCCESS;
  409. }
  410. /* TX support routines */
  411. /**
  412. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  413. *
  414. * @v adapter e1000 private structure
  415. *
  416. * @ret rc Returns 0 on success, negative on failure
  417. **/
  418. static int e1000e_setup_tx_resources ( struct e1000_adapter *adapter )
  419. {
  420. DBGP ( "e1000_setup_tx_resources\n" );
  421. /* Allocate transmit descriptor ring memory.
  422. It must not cross a 64K boundary because of hardware errata #23
  423. so we use malloc_dma() requesting a 128 byte block that is
  424. 128 byte aligned. This should guarantee that the memory
  425. allocated will not cross a 64K boundary, because 128 is an
  426. even multiple of 65536 ( 65536 / 128 == 512 ), so all possible
  427. allocations of 128 bytes on a 128 byte boundary will not
  428. cross 64K bytes.
  429. */
  430. adapter->tx_base =
  431. malloc_dma ( adapter->tx_ring_size, adapter->tx_ring_size );
  432. if ( ! adapter->tx_base ) {
  433. return -ENOMEM;
  434. }
  435. memset ( adapter->tx_base, 0, adapter->tx_ring_size );
  436. DBG ( "adapter->tx_base = %#08lx\n", virt_to_bus ( adapter->tx_base ) );
  437. return 0;
  438. }
  439. /**
  440. * e1000_process_tx_packets - process transmitted packets
  441. *
  442. * @v netdev network interface device structure
  443. **/
  444. static void e1000e_process_tx_packets ( struct net_device *netdev )
  445. {
  446. struct e1000_adapter *adapter = netdev_priv ( netdev );
  447. uint32_t i;
  448. uint32_t tx_status;
  449. struct e1000_tx_desc *tx_curr_desc;
  450. /* Check status of transmitted packets
  451. */
  452. DBG ( "process_tx_packets: tx_head = %d, tx_tail = %d\n", adapter->tx_head,
  453. adapter->tx_tail );
  454. while ( ( i = adapter->tx_head ) != adapter->tx_tail ) {
  455. tx_curr_desc = ( void * ) ( adapter->tx_base ) +
  456. ( i * sizeof ( *adapter->tx_base ) );
  457. tx_status = tx_curr_desc->upper.data;
  458. DBG ( " tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
  459. DBG ( " tx_status = %#08x\n", tx_status );
  460. /* if the packet at tx_head is not owned by hardware it is for us */
  461. if ( ! ( tx_status & E1000_TXD_STAT_DD ) )
  462. break;
  463. DBG ( "Sent packet. tx_head: %d tx_tail: %d tx_status: %#08x\n",
  464. adapter->tx_head, adapter->tx_tail, tx_status );
  465. if ( tx_status & ( E1000_TXD_STAT_EC | E1000_TXD_STAT_LC |
  466. E1000_TXD_STAT_TU ) ) {
  467. netdev_tx_complete_err ( netdev, adapter->tx_iobuf[i], -EINVAL );
  468. DBG ( "Error transmitting packet, tx_status: %#08x\n",
  469. tx_status );
  470. } else {
  471. netdev_tx_complete ( netdev, adapter->tx_iobuf[i] );
  472. DBG ( "Success transmitting packet, tx_status: %#08x\n",
  473. tx_status );
  474. }
  475. /* Decrement count of used descriptors, clear this descriptor
  476. */
  477. adapter->tx_fill_ctr--;
  478. memset ( tx_curr_desc, 0, sizeof ( *tx_curr_desc ) );
  479. adapter->tx_head = ( adapter->tx_head + 1 ) % NUM_TX_DESC;
  480. }
  481. }
  482. static void e1000e_free_tx_resources ( struct e1000_adapter *adapter )
  483. {
  484. DBGP ( "e1000_free_tx_resources\n" );
  485. free_dma ( adapter->tx_base, adapter->tx_ring_size );
  486. }
  487. /**
  488. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  489. * @adapter: board private structure
  490. *
  491. * Configure the Tx unit of the MAC after a reset.
  492. **/
  493. static void e1000e_configure_tx ( struct e1000_adapter *adapter )
  494. {
  495. struct e1000_hw *hw = &adapter->hw;
  496. u32 tctl, tipg, tarc;
  497. u32 ipgr1, ipgr2;
  498. DBGP ( "e1000_configure_tx\n" );
  499. /* disable transmits while setting up the descriptors */
  500. tctl = E1000_READ_REG ( hw, E1000_TCTL );
  501. E1000_WRITE_REG ( hw, E1000_TCTL, tctl & ~E1000_TCTL_EN );
  502. e1e_flush();
  503. mdelay(10);
  504. E1000_WRITE_REG ( hw, E1000_TDBAH(0), 0 );
  505. E1000_WRITE_REG ( hw, E1000_TDBAL(0), virt_to_bus ( adapter->tx_base ) );
  506. E1000_WRITE_REG ( hw, E1000_TDLEN(0), adapter->tx_ring_size );
  507. DBG ( "E1000_TDBAL(0): %#08x\n", E1000_READ_REG ( hw, E1000_TDBAL(0) ) );
  508. DBG ( "E1000_TDLEN(0): %d\n", E1000_READ_REG ( hw, E1000_TDLEN(0) ) );
  509. /* Setup the HW Tx Head and Tail descriptor pointers */
  510. E1000_WRITE_REG ( hw, E1000_TDH(0), 0 );
  511. E1000_WRITE_REG ( hw, E1000_TDT(0), 0 );
  512. adapter->tx_head = 0;
  513. adapter->tx_tail = 0;
  514. adapter->tx_fill_ctr = 0;
  515. /* Set the default values for the Tx Inter Packet Gap timer */
  516. tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
  517. ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
  518. ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
  519. if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
  520. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
  521. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  522. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  523. ew32(TIPG, tipg);
  524. /* Program the Transmit Control Register */
  525. tctl = er32(TCTL);
  526. tctl &= ~E1000_TCTL_CT;
  527. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  528. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  529. if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
  530. tarc = er32(TARC(0));
  531. /*
  532. * set the speed mode bit, we'll clear it if we're not at
  533. * gigabit link later
  534. */
  535. #define SPEED_MODE_BIT (1 << 21)
  536. tarc |= SPEED_MODE_BIT;
  537. ew32(TARC(0), tarc);
  538. }
  539. /* errata: program both queues to unweighted RR */
  540. if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
  541. tarc = er32(TARC(0));
  542. tarc |= 1;
  543. ew32(TARC(0), tarc);
  544. tarc = er32(TARC(1));
  545. tarc |= 1;
  546. ew32(TARC(1), tarc);
  547. }
  548. /* Setup Transmit Descriptor Settings for eop descriptor */
  549. adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
  550. /* enable Report Status bit */
  551. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  552. /*
  553. * enable transmits in the hardware, need to do this
  554. * after setting TARC(0)
  555. */
  556. tctl |= E1000_TCTL_EN;
  557. ew32(TCTL, tctl);
  558. e1e_flush();
  559. e1000e_config_collision_dist(hw);
  560. }
  561. /* RX support routines */
  562. static void e1000e_free_rx_resources ( struct e1000_adapter *adapter )
  563. {
  564. int i;
  565. DBGP ( "e1000_free_rx_resources\n" );
  566. free_dma ( adapter->rx_base, adapter->rx_ring_size );
  567. for ( i = 0; i < NUM_RX_DESC; i++ ) {
  568. free_iob ( adapter->rx_iobuf[i] );
  569. }
  570. }
  571. /**
  572. * e1000_refill_rx_ring - allocate Rx io_buffers
  573. *
  574. * @v adapter e1000 private structure
  575. *
  576. * @ret rc Returns 0 on success, negative on failure
  577. **/
  578. static int e1000e_refill_rx_ring ( struct e1000_adapter *adapter )
  579. {
  580. int i, rx_curr;
  581. int rc = 0;
  582. struct e1000_rx_desc *rx_curr_desc;
  583. struct e1000_hw *hw = &adapter->hw;
  584. struct io_buffer *iob;
  585. DBGP ("e1000_refill_rx_ring\n");
  586. for ( i = 0; i < NUM_RX_DESC; i++ ) {
  587. rx_curr = ( ( adapter->rx_curr + i ) % NUM_RX_DESC );
  588. rx_curr_desc = adapter->rx_base + rx_curr;
  589. if ( rx_curr_desc->status & E1000_RXD_STAT_DD )
  590. continue;
  591. if ( adapter->rx_iobuf[rx_curr] != NULL )
  592. continue;
  593. DBG2 ( "Refilling rx desc %d\n", rx_curr );
  594. iob = alloc_iob ( MAXIMUM_ETHERNET_VLAN_SIZE );
  595. adapter->rx_iobuf[rx_curr] = iob;
  596. if ( ! iob ) {
  597. DBG ( "alloc_iob failed\n" );
  598. rc = -ENOMEM;
  599. break;
  600. } else {
  601. rx_curr_desc->buffer_addr = virt_to_bus ( iob->data );
  602. E1000_WRITE_REG ( hw, E1000_RDT(0), rx_curr );
  603. }
  604. }
  605. return rc;
  606. }
  607. /**
  608. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  609. *
  610. * @v adapter e1000 private structure
  611. *
  612. * @ret rc Returns 0 on success, negative on failure
  613. **/
  614. static int e1000e_setup_rx_resources ( struct e1000_adapter *adapter )
  615. {
  616. int i, rc = 0;
  617. DBGP ( "e1000_setup_rx_resources\n" );
  618. /* Allocate receive descriptor ring memory.
  619. It must not cross a 64K boundary because of hardware errata
  620. */
  621. adapter->rx_base =
  622. malloc_dma ( adapter->rx_ring_size, adapter->rx_ring_size );
  623. if ( ! adapter->rx_base ) {
  624. return -ENOMEM;
  625. }
  626. memset ( adapter->rx_base, 0, adapter->rx_ring_size );
  627. for ( i = 0; i < NUM_RX_DESC; i++ ) {
  628. /* let e1000_refill_rx_ring() io_buffer allocations */
  629. adapter->rx_iobuf[i] = NULL;
  630. }
  631. /* allocate io_buffers */
  632. rc = e1000e_refill_rx_ring ( adapter );
  633. if ( rc < 0 )
  634. e1000e_free_rx_resources ( adapter );
  635. return rc;
  636. }
  637. /**
  638. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  639. * @adapter: board private structure
  640. *
  641. * Configure the Rx unit of the MAC after a reset.
  642. **/
  643. static void e1000e_configure_rx ( struct e1000_adapter *adapter )
  644. {
  645. struct e1000_hw *hw = &adapter->hw;
  646. uint32_t rctl;
  647. DBGP ( "e1000_configure_rx\n" );
  648. /* disable receives while setting up the descriptors */
  649. rctl = E1000_READ_REG ( hw, E1000_RCTL );
  650. E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
  651. e1e_flush();
  652. mdelay(10);
  653. adapter->rx_curr = 0;
  654. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  655. * the Base and Length of the Rx Descriptor Ring */
  656. E1000_WRITE_REG ( hw, E1000_RDBAL(0), virt_to_bus ( adapter->rx_base ) );
  657. E1000_WRITE_REG ( hw, E1000_RDBAH(0), 0 );
  658. E1000_WRITE_REG ( hw, E1000_RDLEN(0), adapter->rx_ring_size );
  659. E1000_WRITE_REG ( hw, E1000_RDH(0), 0 );
  660. E1000_WRITE_REG ( hw, E1000_RDT(0), NUM_RX_DESC - 1 );
  661. /* Enable Receives */
  662. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  663. E1000_RCTL_MPE;
  664. E1000_WRITE_REG ( hw, E1000_RCTL, rctl );
  665. e1e_flush();
  666. DBG ( "E1000_RDBAL(0): %#08x\n", E1000_READ_REG ( hw, E1000_RDBAL(0) ) );
  667. DBG ( "E1000_RDLEN(0): %d\n", E1000_READ_REG ( hw, E1000_RDLEN(0) ) );
  668. DBG ( "E1000_RCTL: %#08x\n", E1000_READ_REG ( hw, E1000_RCTL ) );
  669. }
  670. /**
  671. * e1000_process_rx_packets - process received packets
  672. *
  673. * @v netdev network interface device structure
  674. **/
  675. static void e1000e_process_rx_packets ( struct net_device *netdev )
  676. {
  677. struct e1000_adapter *adapter = netdev_priv ( netdev );
  678. uint32_t i;
  679. uint32_t rx_status;
  680. uint32_t rx_len;
  681. uint32_t rx_err;
  682. struct e1000_rx_desc *rx_curr_desc;
  683. /* Process received packets
  684. */
  685. while ( 1 ) {
  686. i = adapter->rx_curr;
  687. rx_curr_desc = ( void * ) ( adapter->rx_base ) +
  688. ( i * sizeof ( *adapter->rx_base ) );
  689. rx_status = rx_curr_desc->status;
  690. DBG2 ( "Before DD Check RX_status: %#08x\n", rx_status );
  691. if ( ! ( rx_status & E1000_RXD_STAT_DD ) )
  692. break;
  693. if ( adapter->rx_iobuf[i] == NULL )
  694. break;
  695. DBG ( "E1000_RCTL = %#08x\n", E1000_READ_REG ( &adapter->hw, E1000_RCTL ) );
  696. rx_len = rx_curr_desc->length;
  697. DBG ( "Received packet, rx_curr: %d rx_status: %#08x rx_len: %d\n",
  698. i, rx_status, rx_len );
  699. rx_err = rx_curr_desc->errors;
  700. iob_put ( adapter->rx_iobuf[i], rx_len );
  701. if ( rx_err & E1000_RXD_ERR_FRAME_ERR_MASK ) {
  702. netdev_rx_err ( netdev, adapter->rx_iobuf[i], -EINVAL );
  703. DBG ( "e1000_poll: Corrupted packet received!"
  704. " rx_err: %#08x\n", rx_err );
  705. } else {
  706. /* Add this packet to the receive queue. */
  707. netdev_rx ( netdev, adapter->rx_iobuf[i] );
  708. }
  709. adapter->rx_iobuf[i] = NULL;
  710. memset ( rx_curr_desc, 0, sizeof ( *rx_curr_desc ) );
  711. adapter->rx_curr = ( adapter->rx_curr + 1 ) % NUM_RX_DESC;
  712. }
  713. }
  714. /** Functions that implement the iPXE driver API **/
  715. /**
  716. * e1000_close - Disables a network interface
  717. *
  718. * @v netdev network interface device structure
  719. *
  720. **/
  721. static void e1000e_close ( struct net_device *netdev )
  722. {
  723. struct e1000_adapter *adapter = netdev_priv ( netdev );
  724. struct e1000_hw *hw = &adapter->hw;
  725. uint32_t rctl;
  726. uint32_t icr;
  727. DBGP ( "e1000_close\n" );
  728. /* Acknowledge interrupts */
  729. icr = E1000_READ_REG ( hw, E1000_ICR );
  730. e1000e_irq_disable ( adapter );
  731. /* disable receives */
  732. rctl = E1000_READ_REG ( hw, E1000_RCTL );
  733. E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
  734. e1e_flush();
  735. e1000e_reset ( adapter );
  736. e1000e_free_tx_resources ( adapter );
  737. e1000e_free_rx_resources ( adapter );
  738. }
  739. /**
  740. * e1000_transmit - Transmit a packet
  741. *
  742. * @v netdev Network device
  743. * @v iobuf I/O buffer
  744. *
  745. * @ret rc Returns 0 on success, negative on failure
  746. */
  747. static int e1000e_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
  748. {
  749. struct e1000_adapter *adapter = netdev_priv( netdev );
  750. struct e1000_hw *hw = &adapter->hw;
  751. uint32_t tx_curr = adapter->tx_tail;
  752. struct e1000_tx_desc *tx_curr_desc;
  753. DBGP ("e1000_transmit\n");
  754. if ( adapter->tx_fill_ctr == NUM_TX_DESC ) {
  755. DBG ("TX overflow\n");
  756. return -ENOBUFS;
  757. }
  758. /* Save pointer to iobuf we have been given to transmit,
  759. netdev_tx_complete() will need it later
  760. */
  761. adapter->tx_iobuf[tx_curr] = iobuf;
  762. tx_curr_desc = ( void * ) ( adapter->tx_base ) +
  763. ( tx_curr * sizeof ( *adapter->tx_base ) );
  764. DBG ( "tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
  765. DBG ( "tx_curr_desc + 16 = %#08lx\n", virt_to_bus ( tx_curr_desc ) + 16 );
  766. DBG ( "iobuf->data = %#08lx\n", virt_to_bus ( iobuf->data ) );
  767. /* Add the packet to TX ring
  768. */
  769. tx_curr_desc->buffer_addr = virt_to_bus ( iobuf->data );
  770. tx_curr_desc->upper.data = 0;
  771. tx_curr_desc->lower.data = adapter->txd_cmd | iob_len ( iobuf );
  772. DBG ( "TX fill: %d tx_curr: %d addr: %#08lx len: %zd\n", adapter->tx_fill_ctr,
  773. tx_curr, virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
  774. /* Point to next free descriptor */
  775. adapter->tx_tail = ( adapter->tx_tail + 1 ) % NUM_TX_DESC;
  776. adapter->tx_fill_ctr++;
  777. /* Write new tail to NIC, making packet available for transmit
  778. */
  779. E1000_WRITE_REG ( hw, E1000_TDT(0), adapter->tx_tail );
  780. e1e_flush();
  781. return 0;
  782. }
  783. /**
  784. * e1000_poll - Poll for received packets
  785. *
  786. * @v netdev Network device
  787. */
  788. static void e1000e_poll ( struct net_device *netdev )
  789. {
  790. struct e1000_adapter *adapter = netdev_priv( netdev );
  791. struct e1000_hw *hw = &adapter->hw;
  792. uint32_t icr;
  793. DBGP ( "e1000_poll\n" );
  794. /* Acknowledge interrupts */
  795. icr = E1000_READ_REG ( hw, E1000_ICR );
  796. if ( ! icr )
  797. return;
  798. DBG ( "e1000_poll: intr_status = %#08x\n", icr );
  799. e1000e_process_tx_packets ( netdev );
  800. e1000e_process_rx_packets ( netdev );
  801. e1000e_refill_rx_ring(adapter);
  802. }
  803. /**
  804. * e1000_irq - enable or Disable interrupts
  805. *
  806. * @v adapter e1000 adapter
  807. * @v action requested interrupt action
  808. **/
  809. static void e1000e_irq ( struct net_device *netdev, int enable )
  810. {
  811. struct e1000_adapter *adapter = netdev_priv ( netdev );
  812. DBGP ( "e1000_irq\n" );
  813. if ( enable ) {
  814. e1000e_irq_enable ( adapter );
  815. } else {
  816. e1000e_irq_disable ( adapter );
  817. }
  818. }
  819. static struct net_device_operations e1000e_operations;
  820. /**
  821. * e1000_probe - Initial configuration of e1000 NIC
  822. *
  823. * @v pci PCI device
  824. * @v id PCI IDs
  825. *
  826. * @ret rc Return status code
  827. **/
  828. int e1000e_probe ( struct pci_device *pdev,
  829. const struct pci_device_id *ent)
  830. {
  831. int i, err;
  832. struct net_device *netdev;
  833. struct e1000_adapter *adapter;
  834. unsigned long mmio_start, mmio_len;
  835. unsigned long flash_start, flash_len;
  836. struct e1000_hw *hw;
  837. const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
  838. DBGP ( "e1000_probe\n" );
  839. err = -ENOMEM;
  840. /* Allocate net device ( also allocates memory for netdev->priv
  841. and makes netdev-priv point to it ) */
  842. netdev = alloc_etherdev ( sizeof ( struct e1000_adapter ) );
  843. if ( ! netdev ) {
  844. DBG ( "err_alloc_etherdev\n" );
  845. goto err_alloc_etherdev;
  846. }
  847. /* Associate e1000-specific network operations operations with
  848. * generic network device layer */
  849. netdev_init ( netdev, &e1000e_operations );
  850. /* Associate this network device with given PCI device */
  851. pci_set_drvdata ( pdev, netdev );
  852. netdev->dev = &pdev->dev;
  853. /* Initialize driver private storage */
  854. adapter = netdev_priv ( netdev );
  855. memset ( adapter, 0, ( sizeof ( *adapter ) ) );
  856. adapter->pdev = pdev;
  857. adapter->ioaddr = pdev->ioaddr;
  858. adapter->hw.io_base = pdev->ioaddr;
  859. hw = &adapter->hw;
  860. hw->device_id = pdev->device;
  861. adapter->irqno = pdev->irq;
  862. adapter->netdev = netdev;
  863. adapter->hw.back = adapter;
  864. adapter->ei = ei;
  865. adapter->pba = ei->pba;
  866. adapter->flags = ei->flags;
  867. adapter->flags2 = ei->flags2;
  868. adapter->hw.adapter = adapter;
  869. adapter->hw.mac.type = ei->mac;
  870. adapter->max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN;
  871. adapter->tx_ring_size = sizeof ( *adapter->tx_base ) * NUM_TX_DESC;
  872. adapter->rx_ring_size = sizeof ( *adapter->rx_base ) * NUM_RX_DESC;
  873. /* Fix up PCI device */
  874. adjust_pci_device ( pdev );
  875. err = -EIO;
  876. mmio_start = pci_bar_start ( pdev, PCI_BASE_ADDRESS_0 );
  877. mmio_len = pci_bar_size ( pdev, PCI_BASE_ADDRESS_0 );
  878. DBG ( "mmio_start: %#08lx\n", mmio_start );
  879. DBG ( "mmio_len: %#08lx\n", mmio_len );
  880. adapter->hw.hw_addr = ioremap ( mmio_start, mmio_len );
  881. DBG ( "adapter->hw.hw_addr: %p\n", adapter->hw.hw_addr );
  882. if ( ! adapter->hw.hw_addr ) {
  883. DBG ( "err_ioremap\n" );
  884. goto err_ioremap;
  885. }
  886. /* Flash BAR mapping depends on mac_type */
  887. if ( ( adapter->flags & FLAG_HAS_FLASH) && ( pdev->ioaddr ) ) {
  888. flash_start = pci_bar_start ( pdev, PCI_BASE_ADDRESS_1 );
  889. flash_len = pci_bar_size ( pdev, PCI_BASE_ADDRESS_1 );
  890. adapter->hw.flash_address = ioremap ( flash_start, flash_len );
  891. if ( ! adapter->hw.flash_address ) {
  892. DBG ( "err_flashmap\n" );
  893. goto err_flashmap;
  894. }
  895. }
  896. /* setup adapter struct */
  897. err = e1000e_sw_init ( adapter );
  898. if (err) {
  899. DBG ( "err_sw_init\n" );
  900. goto err_sw_init;
  901. }
  902. if (ei->get_variants) {
  903. err = ei->get_variants(adapter);
  904. if (err) {
  905. DBG ( "err_hw_initr\n" );
  906. goto err_hw_init;
  907. }
  908. }
  909. /* Copper options */
  910. if (adapter->hw.phy.media_type == e1000_media_type_copper) {
  911. adapter->hw.phy.mdix = AUTO_ALL_MODES;
  912. adapter->hw.phy.disable_polarity_correction = 0;
  913. adapter->hw.phy.ms_type = e1000_ms_hw_default;
  914. }
  915. DBG ( "adapter->hw.mac.type: %#08x\n", adapter->hw.mac.type );
  916. /* Force auto-negotiation */
  917. adapter->hw.mac.autoneg = 1;
  918. adapter->fc_autoneg = 1;
  919. adapter->hw.phy.autoneg_wait_to_complete = true;
  920. adapter->hw.mac.adaptive_ifs = true;
  921. adapter->hw.fc.requested_mode = e1000_fc_default;
  922. adapter->hw.fc.current_mode = e1000_fc_default;
  923. /*
  924. * before reading the NVM, reset the controller to
  925. * put the device in a known good starting state
  926. */
  927. adapter->hw.mac.ops.reset_hw(&adapter->hw);
  928. /*
  929. * systems with ASPM and others may see the checksum fail on the first
  930. * attempt. Let's give it a few tries
  931. */
  932. for (i = 0;; i++) {
  933. if (e1000e_validate_nvm_checksum(&adapter->hw) >= 0)
  934. break;
  935. if (i == 2) {
  936. DBG("The NVM Checksum Is Not Valid\n");
  937. err = -EIO;
  938. goto err_eeprom;
  939. }
  940. }
  941. /* copy the MAC address out of the EEPROM */
  942. if ( e1000e_read_mac_addr ( &adapter->hw ) )
  943. DBG ( "EEPROM Read Error\n" );
  944. memcpy ( netdev->hw_addr, adapter->hw.mac.perm_addr, ETH_ALEN );
  945. /* reset the hardware with the new settings */
  946. e1000e_reset ( adapter );
  947. if ( ( err = register_netdev ( netdev ) ) != 0) {
  948. DBG ( "err_register\n" );
  949. goto err_register;
  950. }
  951. /* Mark as link up; we don't yet handle link state */
  952. netdev_link_up ( netdev );
  953. for (i = 0; i < 6; i++)
  954. DBG ("%02x%s", netdev->ll_addr[i], i == 5 ? "\n" : ":");
  955. DBG ( "e1000e_probe succeeded!\n" );
  956. /* No errors, return success */
  957. return 0;
  958. /* Error return paths */
  959. err_register:
  960. err_hw_init:
  961. err_eeprom:
  962. err_flashmap:
  963. if (!e1000e_check_reset_block(&adapter->hw))
  964. e1000e_phy_hw_reset(&adapter->hw);
  965. if (adapter->hw.flash_address)
  966. iounmap(adapter->hw.flash_address);
  967. err_sw_init:
  968. iounmap ( adapter->hw.hw_addr );
  969. err_ioremap:
  970. netdev_put ( netdev );
  971. err_alloc_etherdev:
  972. return err;
  973. }
  974. /**
  975. * e1000e_remove - Device Removal Routine
  976. *
  977. * @v pdev PCI device information struct
  978. *
  979. **/
  980. void e1000e_remove ( struct pci_device *pdev )
  981. {
  982. struct net_device *netdev = pci_get_drvdata ( pdev );
  983. struct e1000_adapter *adapter = netdev_priv ( netdev );
  984. DBGP ( "e1000e_remove\n" );
  985. if ( adapter->hw.flash_address )
  986. iounmap ( adapter->hw.flash_address );
  987. if ( adapter->hw.hw_addr )
  988. iounmap ( adapter->hw.hw_addr );
  989. unregister_netdev ( netdev );
  990. e1000e_reset ( adapter );
  991. netdev_nullify ( netdev );
  992. netdev_put ( netdev );
  993. }
  994. /**
  995. * e1000e_open - Called when a network interface is made active
  996. *
  997. * @v netdev network interface device structure
  998. * @ret rc Return status code, 0 on success, negative value on failure
  999. *
  1000. **/
  1001. static int e1000e_open ( struct net_device *netdev )
  1002. {
  1003. struct e1000_adapter *adapter = netdev_priv(netdev);
  1004. int err;
  1005. DBGP ( "e1000e_open\n" );
  1006. /* allocate transmit descriptors */
  1007. err = e1000e_setup_tx_resources ( adapter );
  1008. if ( err ) {
  1009. DBG ( "Error setting up TX resources!\n" );
  1010. goto err_setup_tx;
  1011. }
  1012. /* allocate receive descriptors */
  1013. err = e1000e_setup_rx_resources ( adapter );
  1014. if ( err ) {
  1015. DBG ( "Error setting up RX resources!\n" );
  1016. goto err_setup_rx;
  1017. }
  1018. e1000e_configure_tx ( adapter );
  1019. e1000e_configure_rx ( adapter );
  1020. DBG ( "E1000_RXDCTL(0): %#08x\n", E1000_READ_REG ( &adapter->hw, E1000_RXDCTL(0) ) );
  1021. return 0;
  1022. err_setup_rx:
  1023. DBG ( "err_setup_rx\n" );
  1024. e1000e_free_tx_resources ( adapter );
  1025. err_setup_tx:
  1026. DBG ( "err_setup_tx\n" );
  1027. e1000e_reset ( adapter );
  1028. return err;
  1029. }
  1030. /** e1000e net device operations */
  1031. static struct net_device_operations e1000e_operations = {
  1032. .open = e1000e_open,
  1033. .close = e1000e_close,
  1034. .transmit = e1000e_transmit,
  1035. .poll = e1000e_poll,
  1036. .irq = e1000e_irq,
  1037. };