You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

hermon.c 103KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532
  1. /*
  2. * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
  3. * Copyright (C) 2008 Mellanox Technologies Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of the
  8. * License, or any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. FILE_LICENCE ( GPL2_OR_LATER );
  20. #include <stdint.h>
  21. #include <stdlib.h>
  22. #include <stdio.h>
  23. #include <string.h>
  24. #include <strings.h>
  25. #include <unistd.h>
  26. #include <errno.h>
  27. #include <byteswap.h>
  28. #include <ipxe/io.h>
  29. #include <ipxe/pci.h>
  30. #include <ipxe/pcibackup.h>
  31. #include <ipxe/malloc.h>
  32. #include <ipxe/umalloc.h>
  33. #include <ipxe/iobuf.h>
  34. #include <ipxe/netdevice.h>
  35. #include <ipxe/infiniband.h>
  36. #include <ipxe/ib_smc.h>
  37. #include <ipxe/if_ether.h>
  38. #include <ipxe/ethernet.h>
  39. #include "hermon.h"
  40. /**
  41. * @file
  42. *
  43. * Mellanox Hermon Infiniband HCA
  44. *
  45. */
  46. /***************************************************************************
  47. *
  48. * Queue number allocation
  49. *
  50. ***************************************************************************
  51. */
  52. /**
  53. * Allocate offsets within usage bitmask
  54. *
  55. * @v bits Usage bitmask
  56. * @v bits_len Length of usage bitmask
  57. * @v num_bits Number of contiguous bits to allocate within bitmask
  58. * @ret bit First free bit within bitmask, or negative error
  59. */
  60. static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
  61. unsigned int bits_len,
  62. unsigned int num_bits ) {
  63. unsigned int bit = 0;
  64. hermon_bitmask_t mask = 1;
  65. unsigned int found = 0;
  66. /* Search bits for num_bits contiguous free bits */
  67. while ( bit < bits_len ) {
  68. if ( ( mask & *bits ) == 0 ) {
  69. if ( ++found == num_bits )
  70. goto found;
  71. } else {
  72. found = 0;
  73. }
  74. bit++;
  75. mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
  76. if ( mask == 1 )
  77. bits++;
  78. }
  79. return -ENFILE;
  80. found:
  81. /* Mark bits as in-use */
  82. do {
  83. *bits |= mask;
  84. if ( mask == 1 )
  85. bits--;
  86. mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
  87. } while ( --found );
  88. return ( bit - num_bits + 1 );
  89. }
  90. /**
  91. * Free offsets within usage bitmask
  92. *
  93. * @v bits Usage bitmask
  94. * @v bit Starting bit within bitmask
  95. * @v num_bits Number of contiguous bits to free within bitmask
  96. */
  97. static void hermon_bitmask_free ( hermon_bitmask_t *bits,
  98. int bit, unsigned int num_bits ) {
  99. hermon_bitmask_t mask;
  100. for ( ; num_bits ; bit++, num_bits-- ) {
  101. mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
  102. bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
  103. }
  104. }
  105. /***************************************************************************
  106. *
  107. * HCA commands
  108. *
  109. ***************************************************************************
  110. */
  111. /**
  112. * Wait for Hermon command completion
  113. *
  114. * @v hermon Hermon device
  115. * @v hcr HCA command registers
  116. * @ret rc Return status code
  117. */
  118. static int hermon_cmd_wait ( struct hermon *hermon,
  119. struct hermonprm_hca_command_register *hcr ) {
  120. unsigned int wait;
  121. for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  122. hcr->u.dwords[6] =
  123. readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
  124. if ( ( MLX_GET ( hcr, go ) == 0 ) &&
  125. ( MLX_GET ( hcr, t ) == hermon->toggle ) )
  126. return 0;
  127. mdelay ( 1 );
  128. }
  129. return -EBUSY;
  130. }
  131. /**
  132. * Issue HCA command
  133. *
  134. * @v hermon Hermon device
  135. * @v command Command opcode, flags and input/output lengths
  136. * @v op_mod Opcode modifier (0 if no modifier applicable)
  137. * @v in Input parameters
  138. * @v in_mod Input modifier (0 if no modifier applicable)
  139. * @v out Output parameters
  140. * @ret rc Return status code
  141. */
  142. static int hermon_cmd ( struct hermon *hermon, unsigned long command,
  143. unsigned int op_mod, const void *in,
  144. unsigned int in_mod, void *out ) {
  145. struct hermonprm_hca_command_register hcr;
  146. unsigned int opcode = HERMON_HCR_OPCODE ( command );
  147. size_t in_len = HERMON_HCR_IN_LEN ( command );
  148. size_t out_len = HERMON_HCR_OUT_LEN ( command );
  149. void *in_buffer;
  150. void *out_buffer;
  151. unsigned int status;
  152. unsigned int i;
  153. int rc;
  154. assert ( in_len <= HERMON_MBOX_SIZE );
  155. assert ( out_len <= HERMON_MBOX_SIZE );
  156. DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
  157. hermon, opcode, in_len,
  158. ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  159. ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  160. /* Check that HCR is free */
  161. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  162. DBGC ( hermon, "Hermon %p command interface locked\n",
  163. hermon );
  164. return rc;
  165. }
  166. /* Flip HCR toggle */
  167. hermon->toggle = ( 1 - hermon->toggle );
  168. /* Prepare HCR */
  169. memset ( &hcr, 0, sizeof ( hcr ) );
  170. in_buffer = &hcr.u.dwords[0];
  171. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  172. memset ( hermon->mailbox_in, 0, HERMON_MBOX_SIZE );
  173. in_buffer = hermon->mailbox_in;
  174. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  175. }
  176. memcpy ( in_buffer, in, in_len );
  177. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  178. out_buffer = &hcr.u.dwords[3];
  179. if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
  180. out_buffer = hermon->mailbox_out;
  181. MLX_FILL_1 ( &hcr, 4, out_param_l,
  182. virt_to_bus ( out_buffer ) );
  183. }
  184. MLX_FILL_4 ( &hcr, 6,
  185. opcode, opcode,
  186. opcode_modifier, op_mod,
  187. go, 1,
  188. t, hermon->toggle );
  189. DBGC ( hermon, "Hermon %p issuing command %04x\n",
  190. hermon, opcode );
  191. DBGC2_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  192. &hcr, sizeof ( hcr ) );
  193. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  194. DBGC2 ( hermon, "Input mailbox:\n" );
  195. DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
  196. ( ( in_len < 512 ) ? in_len : 512 ) );
  197. }
  198. /* Issue command */
  199. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  200. i++ ) {
  201. writel ( hcr.u.dwords[i],
  202. hermon->config + HERMON_HCR_REG ( i ) );
  203. barrier();
  204. }
  205. /* Wait for command completion */
  206. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  207. DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
  208. hermon );
  209. DBGC_HDA ( hermon,
  210. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  211. &hcr, sizeof ( hcr ) );
  212. return rc;
  213. }
  214. /* Check command status */
  215. status = MLX_GET ( &hcr, status );
  216. if ( status != 0 ) {
  217. DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
  218. hermon, status );
  219. DBGC_HDA ( hermon,
  220. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  221. &hcr, sizeof ( hcr ) );
  222. return -EIO;
  223. }
  224. /* Read output parameters, if any */
  225. hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
  226. hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
  227. memcpy ( out, out_buffer, out_len );
  228. if ( out_len ) {
  229. DBGC2 ( hermon, "Output%s:\n",
  230. ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
  231. DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
  232. ( ( out_len < 512 ) ? out_len : 512 ) );
  233. }
  234. return 0;
  235. }
  236. static inline int
  237. hermon_cmd_query_dev_cap ( struct hermon *hermon,
  238. struct hermonprm_query_dev_cap *dev_cap ) {
  239. return hermon_cmd ( hermon,
  240. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
  241. 1, sizeof ( *dev_cap ) ),
  242. 0, NULL, 0, dev_cap );
  243. }
  244. static inline int
  245. hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
  246. return hermon_cmd ( hermon,
  247. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
  248. 1, sizeof ( *fw ) ),
  249. 0, NULL, 0, fw );
  250. }
  251. static inline int
  252. hermon_cmd_init_hca ( struct hermon *hermon,
  253. const struct hermonprm_init_hca *init_hca ) {
  254. return hermon_cmd ( hermon,
  255. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
  256. 1, sizeof ( *init_hca ) ),
  257. 0, init_hca, 0, NULL );
  258. }
  259. static inline int
  260. hermon_cmd_close_hca ( struct hermon *hermon ) {
  261. return hermon_cmd ( hermon,
  262. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
  263. 0, NULL, 0, NULL );
  264. }
  265. static inline int
  266. hermon_cmd_init_port ( struct hermon *hermon, unsigned int port ) {
  267. return hermon_cmd ( hermon,
  268. HERMON_HCR_VOID_CMD ( HERMON_HCR_INIT_PORT ),
  269. 0, NULL, port, NULL );
  270. }
  271. static inline int
  272. hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
  273. return hermon_cmd ( hermon,
  274. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
  275. 0, NULL, port, NULL );
  276. }
  277. static inline int
  278. hermon_cmd_set_port ( struct hermon *hermon, int is_ethernet,
  279. unsigned int port_selector,
  280. const union hermonprm_set_port *set_port ) {
  281. return hermon_cmd ( hermon,
  282. HERMON_HCR_IN_CMD ( HERMON_HCR_SET_PORT,
  283. 1, sizeof ( *set_port ) ),
  284. is_ethernet, set_port, port_selector, NULL );
  285. }
  286. static inline int
  287. hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
  288. const struct hermonprm_mpt *mpt ) {
  289. return hermon_cmd ( hermon,
  290. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
  291. 1, sizeof ( *mpt ) ),
  292. 0, mpt, index, NULL );
  293. }
  294. static inline int
  295. hermon_cmd_write_mtt ( struct hermon *hermon,
  296. const struct hermonprm_write_mtt *write_mtt ) {
  297. return hermon_cmd ( hermon,
  298. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
  299. 1, sizeof ( *write_mtt ) ),
  300. 0, write_mtt, 1, NULL );
  301. }
  302. static inline int
  303. hermon_cmd_map_eq ( struct hermon *hermon, unsigned long index_map,
  304. const struct hermonprm_event_mask *mask ) {
  305. return hermon_cmd ( hermon,
  306. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_EQ,
  307. 0, sizeof ( *mask ) ),
  308. 0, mask, index_map, NULL );
  309. }
  310. static inline int
  311. hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
  312. const struct hermonprm_eqc *eqctx ) {
  313. return hermon_cmd ( hermon,
  314. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
  315. 1, sizeof ( *eqctx ) ),
  316. 0, eqctx, index, NULL );
  317. }
  318. static inline int
  319. hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index,
  320. struct hermonprm_eqc *eqctx ) {
  321. return hermon_cmd ( hermon,
  322. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_EQ,
  323. 1, sizeof ( *eqctx ) ),
  324. 1, NULL, index, eqctx );
  325. }
  326. static inline int
  327. hermon_cmd_query_eq ( struct hermon *hermon, unsigned int index,
  328. struct hermonprm_eqc *eqctx ) {
  329. return hermon_cmd ( hermon,
  330. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_EQ,
  331. 1, sizeof ( *eqctx ) ),
  332. 0, NULL, index, eqctx );
  333. }
  334. static inline int
  335. hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
  336. const struct hermonprm_completion_queue_context *cqctx ){
  337. return hermon_cmd ( hermon,
  338. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
  339. 1, sizeof ( *cqctx ) ),
  340. 0, cqctx, cqn, NULL );
  341. }
  342. static inline int
  343. hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
  344. struct hermonprm_completion_queue_context *cqctx ) {
  345. return hermon_cmd ( hermon,
  346. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
  347. 1, sizeof ( *cqctx ) ),
  348. 0, NULL, cqn, cqctx );
  349. }
  350. static inline int
  351. hermon_cmd_query_cq ( struct hermon *hermon, unsigned long cqn,
  352. struct hermonprm_completion_queue_context *cqctx ) {
  353. return hermon_cmd ( hermon,
  354. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_CQ,
  355. 1, sizeof ( *cqctx ) ),
  356. 0, NULL, cqn, cqctx );
  357. }
  358. static inline int
  359. hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
  360. const struct hermonprm_qp_ee_state_transitions *ctx ){
  361. return hermon_cmd ( hermon,
  362. HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
  363. 1, sizeof ( *ctx ) ),
  364. 0, ctx, qpn, NULL );
  365. }
  366. static inline int
  367. hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
  368. const struct hermonprm_qp_ee_state_transitions *ctx ){
  369. return hermon_cmd ( hermon,
  370. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
  371. 1, sizeof ( *ctx ) ),
  372. 0, ctx, qpn, NULL );
  373. }
  374. static inline int
  375. hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
  376. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  377. return hermon_cmd ( hermon,
  378. HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
  379. 1, sizeof ( *ctx ) ),
  380. 0, ctx, qpn, NULL );
  381. }
  382. static inline int
  383. hermon_cmd_rts2rts_qp ( struct hermon *hermon, unsigned long qpn,
  384. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  385. return hermon_cmd ( hermon,
  386. HERMON_HCR_IN_CMD ( HERMON_HCR_RTS2RTS_QP,
  387. 1, sizeof ( *ctx ) ),
  388. 0, ctx, qpn, NULL );
  389. }
  390. static inline int
  391. hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
  392. return hermon_cmd ( hermon,
  393. HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
  394. 0x03, NULL, qpn, NULL );
  395. }
  396. static inline int
  397. hermon_cmd_query_qp ( struct hermon *hermon, unsigned long qpn,
  398. struct hermonprm_qp_ee_state_transitions *ctx ) {
  399. return hermon_cmd ( hermon,
  400. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_QP,
  401. 1, sizeof ( *ctx ) ),
  402. 0, NULL, qpn, ctx );
  403. }
  404. static inline int
  405. hermon_cmd_conf_special_qp ( struct hermon *hermon, unsigned int internal_qps,
  406. unsigned long base_qpn ) {
  407. return hermon_cmd ( hermon,
  408. HERMON_HCR_VOID_CMD ( HERMON_HCR_CONF_SPECIAL_QP ),
  409. internal_qps, NULL, base_qpn, NULL );
  410. }
  411. static inline int
  412. hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
  413. union hermonprm_mad *mad ) {
  414. return hermon_cmd ( hermon,
  415. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
  416. 1, sizeof ( *mad ),
  417. 1, sizeof ( *mad ) ),
  418. 0x03, mad, port, mad );
  419. }
  420. static inline int
  421. hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
  422. struct hermonprm_mcg_entry *mcg ) {
  423. return hermon_cmd ( hermon,
  424. HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
  425. 1, sizeof ( *mcg ) ),
  426. 0, NULL, index, mcg );
  427. }
  428. static inline int
  429. hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
  430. const struct hermonprm_mcg_entry *mcg ) {
  431. return hermon_cmd ( hermon,
  432. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
  433. 1, sizeof ( *mcg ) ),
  434. 0, mcg, index, NULL );
  435. }
  436. static inline int
  437. hermon_cmd_mgid_hash ( struct hermon *hermon, const union ib_gid *gid,
  438. struct hermonprm_mgm_hash *hash ) {
  439. return hermon_cmd ( hermon,
  440. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
  441. 1, sizeof ( *gid ),
  442. 0, sizeof ( *hash ) ),
  443. 0, gid, 0, hash );
  444. }
  445. static inline int
  446. hermon_cmd_query_port ( struct hermon *hermon, unsigned int port,
  447. struct hermonprm_query_port_cap *query_port ) {
  448. return hermon_cmd ( hermon,
  449. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_PORT,
  450. 1, sizeof ( *query_port ) ),
  451. 0, NULL, port, query_port );
  452. }
  453. static inline int
  454. hermon_cmd_sense_port ( struct hermon *hermon, unsigned int port,
  455. struct hermonprm_sense_port *port_type ) {
  456. return hermon_cmd ( hermon,
  457. HERMON_HCR_OUT_CMD ( HERMON_HCR_SENSE_PORT,
  458. 1, sizeof ( *port_type ) ),
  459. 0, NULL, port, port_type );
  460. }
  461. static inline int
  462. hermon_cmd_run_fw ( struct hermon *hermon ) {
  463. return hermon_cmd ( hermon,
  464. HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
  465. 0, NULL, 0, NULL );
  466. }
  467. static inline int
  468. hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
  469. const struct hermonprm_scalar_parameter *offset ) {
  470. return hermon_cmd ( hermon,
  471. HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
  472. 0, sizeof ( *offset ) ),
  473. 0, offset, page_count, NULL );
  474. }
  475. static inline int
  476. hermon_cmd_map_icm ( struct hermon *hermon,
  477. const struct hermonprm_virtual_physical_mapping *map ) {
  478. return hermon_cmd ( hermon,
  479. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
  480. 1, sizeof ( *map ) ),
  481. 0, map, 1, NULL );
  482. }
  483. static inline int
  484. hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
  485. return hermon_cmd ( hermon,
  486. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
  487. 0, NULL, 0, NULL );
  488. }
  489. static inline int
  490. hermon_cmd_map_icm_aux ( struct hermon *hermon,
  491. const struct hermonprm_virtual_physical_mapping *map ) {
  492. return hermon_cmd ( hermon,
  493. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
  494. 1, sizeof ( *map ) ),
  495. 0, map, 1, NULL );
  496. }
  497. static inline int
  498. hermon_cmd_set_icm_size ( struct hermon *hermon,
  499. const struct hermonprm_scalar_parameter *icm_size,
  500. struct hermonprm_scalar_parameter *icm_aux_size ) {
  501. return hermon_cmd ( hermon,
  502. HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
  503. 0, sizeof ( *icm_size ),
  504. 0, sizeof (*icm_aux_size) ),
  505. 0, icm_size, 0, icm_aux_size );
  506. }
  507. static inline int
  508. hermon_cmd_unmap_fa ( struct hermon *hermon ) {
  509. return hermon_cmd ( hermon,
  510. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
  511. 0, NULL, 0, NULL );
  512. }
  513. static inline int
  514. hermon_cmd_map_fa ( struct hermon *hermon,
  515. const struct hermonprm_virtual_physical_mapping *map ) {
  516. return hermon_cmd ( hermon,
  517. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
  518. 1, sizeof ( *map ) ),
  519. 0, map, 1, NULL );
  520. }
  521. /***************************************************************************
  522. *
  523. * Memory translation table operations
  524. *
  525. ***************************************************************************
  526. */
  527. /**
  528. * Allocate MTT entries
  529. *
  530. * @v hermon Hermon device
  531. * @v memory Memory to map into MTT
  532. * @v len Length of memory to map
  533. * @v mtt MTT descriptor to fill in
  534. * @ret rc Return status code
  535. */
  536. static int hermon_alloc_mtt ( struct hermon *hermon,
  537. const void *memory, size_t len,
  538. struct hermon_mtt *mtt ) {
  539. struct hermonprm_write_mtt write_mtt;
  540. physaddr_t start;
  541. physaddr_t addr;
  542. unsigned int page_offset;
  543. unsigned int num_pages;
  544. int mtt_offset;
  545. unsigned int mtt_base_addr;
  546. unsigned int i;
  547. int rc;
  548. /* Find available MTT entries */
  549. start = virt_to_phys ( memory );
  550. page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
  551. start -= page_offset;
  552. len += page_offset;
  553. num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
  554. mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
  555. num_pages );
  556. if ( mtt_offset < 0 ) {
  557. DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
  558. hermon, num_pages );
  559. rc = mtt_offset;
  560. goto err_mtt_offset;
  561. }
  562. mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
  563. hermon->cap.mtt_entry_size );
  564. addr = start;
  565. /* Fill in MTT structure */
  566. mtt->mtt_offset = mtt_offset;
  567. mtt->num_pages = num_pages;
  568. mtt->mtt_base_addr = mtt_base_addr;
  569. mtt->page_offset = page_offset;
  570. /* Construct and issue WRITE_MTT commands */
  571. for ( i = 0 ; i < num_pages ; i++ ) {
  572. memset ( &write_mtt, 0, sizeof ( write_mtt ) );
  573. MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
  574. value, mtt_base_addr );
  575. MLX_FILL_2 ( &write_mtt.mtt, 1,
  576. p, 1,
  577. ptag_l, ( addr >> 3 ) );
  578. if ( ( rc = hermon_cmd_write_mtt ( hermon,
  579. &write_mtt ) ) != 0 ) {
  580. DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
  581. hermon, mtt_base_addr );
  582. goto err_write_mtt;
  583. }
  584. addr += HERMON_PAGE_SIZE;
  585. mtt_base_addr += hermon->cap.mtt_entry_size;
  586. }
  587. DBGC ( hermon, "Hermon %p MTT entries [%#x,%#x] for "
  588. "[%08lx,%08lx,%08lx,%08lx)\n", hermon, mtt->mtt_offset,
  589. ( mtt->mtt_offset + mtt->num_pages - 1 ), start,
  590. ( start + page_offset ), ( start + len ), addr );
  591. return 0;
  592. err_write_mtt:
  593. hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
  594. err_mtt_offset:
  595. return rc;
  596. }
  597. /**
  598. * Free MTT entries
  599. *
  600. * @v hermon Hermon device
  601. * @v mtt MTT descriptor
  602. */
  603. static void hermon_free_mtt ( struct hermon *hermon,
  604. struct hermon_mtt *mtt ) {
  605. DBGC ( hermon, "Hermon %p MTT entries [%#x,%#x] freed\n",
  606. hermon, mtt->mtt_offset,
  607. ( mtt->mtt_offset + mtt->num_pages - 1 ) );
  608. hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
  609. mtt->num_pages );
  610. }
  611. /***************************************************************************
  612. *
  613. * MAD operations
  614. *
  615. ***************************************************************************
  616. */
  617. /**
  618. * Issue management datagram
  619. *
  620. * @v ibdev Infiniband device
  621. * @v mad Management datagram
  622. * @ret rc Return status code
  623. */
  624. static int hermon_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
  625. struct hermon *hermon = ib_get_drvdata ( ibdev );
  626. union hermonprm_mad mad_ifc;
  627. int rc;
  628. linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
  629. mad_size_mismatch );
  630. /* Copy in request packet */
  631. memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
  632. /* Issue MAD */
  633. if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
  634. &mad_ifc ) ) != 0 ) {
  635. DBGC ( hermon, "Hermon %p port %d could not issue MAD IFC: "
  636. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  637. return rc;
  638. }
  639. /* Copy out reply packet */
  640. memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
  641. if ( mad->hdr.status != 0 ) {
  642. DBGC ( hermon, "Hermon %p port %d MAD IFC status %04x\n",
  643. hermon, ibdev->port, ntohs ( mad->hdr.status ) );
  644. return -EIO;
  645. }
  646. return 0;
  647. }
  648. /***************************************************************************
  649. *
  650. * Completion queue operations
  651. *
  652. ***************************************************************************
  653. */
  654. /**
  655. * Dump completion queue context (for debugging only)
  656. *
  657. * @v hermon Hermon device
  658. * @v cq Completion queue
  659. * @ret rc Return status code
  660. */
  661. static __attribute__ (( unused )) int
  662. hermon_dump_cqctx ( struct hermon *hermon, struct ib_completion_queue *cq ) {
  663. struct hermonprm_completion_queue_context cqctx;
  664. int rc;
  665. memset ( &cqctx, 0, sizeof ( cqctx ) );
  666. if ( ( rc = hermon_cmd_query_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  667. DBGC ( hermon, "Hermon %p CQN %#lx QUERY_CQ failed: %s\n",
  668. hermon, cq->cqn, strerror ( rc ) );
  669. return rc;
  670. }
  671. DBGC ( hermon, "Hermon %p CQN %#lx context:\n", hermon, cq->cqn );
  672. DBGC_HDA ( hermon, 0, &cqctx, sizeof ( cqctx ) );
  673. return 0;
  674. }
  675. /**
  676. * Create completion queue
  677. *
  678. * @v ibdev Infiniband device
  679. * @v cq Completion queue
  680. * @ret rc Return status code
  681. */
  682. static int hermon_create_cq ( struct ib_device *ibdev,
  683. struct ib_completion_queue *cq ) {
  684. struct hermon *hermon = ib_get_drvdata ( ibdev );
  685. struct hermon_completion_queue *hermon_cq;
  686. struct hermonprm_completion_queue_context cqctx;
  687. int cqn_offset;
  688. unsigned int i;
  689. int rc;
  690. /* Find a free completion queue number */
  691. cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
  692. HERMON_MAX_CQS, 1 );
  693. if ( cqn_offset < 0 ) {
  694. DBGC ( hermon, "Hermon %p out of completion queues\n",
  695. hermon );
  696. rc = cqn_offset;
  697. goto err_cqn_offset;
  698. }
  699. cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
  700. /* Allocate control structures */
  701. hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
  702. if ( ! hermon_cq ) {
  703. rc = -ENOMEM;
  704. goto err_hermon_cq;
  705. }
  706. /* Allocate doorbell */
  707. hermon_cq->doorbell = malloc_dma ( sizeof ( hermon_cq->doorbell[0] ),
  708. sizeof ( hermon_cq->doorbell[0] ) );
  709. if ( ! hermon_cq->doorbell ) {
  710. rc = -ENOMEM;
  711. goto err_doorbell;
  712. }
  713. memset ( hermon_cq->doorbell, 0, sizeof ( hermon_cq->doorbell[0] ) );
  714. /* Allocate completion queue itself */
  715. hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
  716. hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
  717. sizeof ( hermon_cq->cqe[0] ) );
  718. if ( ! hermon_cq->cqe ) {
  719. rc = -ENOMEM;
  720. goto err_cqe;
  721. }
  722. memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
  723. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  724. MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
  725. }
  726. barrier();
  727. /* Allocate MTT entries */
  728. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
  729. hermon_cq->cqe_size,
  730. &hermon_cq->mtt ) ) != 0 )
  731. goto err_alloc_mtt;
  732. /* Hand queue over to hardware */
  733. memset ( &cqctx, 0, sizeof ( cqctx ) );
  734. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  735. MLX_FILL_1 ( &cqctx, 2,
  736. page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
  737. MLX_FILL_2 ( &cqctx, 3,
  738. usr_page, HERMON_UAR_NON_EQ_PAGE,
  739. log_cq_size, fls ( cq->num_cqes - 1 ) );
  740. MLX_FILL_1 ( &cqctx, 5, c_eqn, hermon->eq.eqn );
  741. MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
  742. ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
  743. MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
  744. ( virt_to_phys ( hermon_cq->doorbell ) >> 3 ) );
  745. if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  746. DBGC ( hermon, "Hermon %p CQN %#lx SW2HW_CQ failed: %s\n",
  747. hermon, cq->cqn, strerror ( rc ) );
  748. goto err_sw2hw_cq;
  749. }
  750. DBGC ( hermon, "Hermon %p CQN %#lx ring [%08lx,%08lx), doorbell "
  751. "%08lx\n", hermon, cq->cqn, virt_to_phys ( hermon_cq->cqe ),
  752. ( virt_to_phys ( hermon_cq->cqe ) + hermon_cq->cqe_size ),
  753. virt_to_phys ( hermon_cq->doorbell ) );
  754. ib_cq_set_drvdata ( cq, hermon_cq );
  755. return 0;
  756. err_sw2hw_cq:
  757. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  758. err_alloc_mtt:
  759. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  760. err_cqe:
  761. free_dma ( hermon_cq->doorbell, sizeof ( hermon_cq->doorbell[0] ) );
  762. err_doorbell:
  763. free ( hermon_cq );
  764. err_hermon_cq:
  765. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  766. err_cqn_offset:
  767. return rc;
  768. }
  769. /**
  770. * Destroy completion queue
  771. *
  772. * @v ibdev Infiniband device
  773. * @v cq Completion queue
  774. */
  775. static void hermon_destroy_cq ( struct ib_device *ibdev,
  776. struct ib_completion_queue *cq ) {
  777. struct hermon *hermon = ib_get_drvdata ( ibdev );
  778. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  779. struct hermonprm_completion_queue_context cqctx;
  780. int cqn_offset;
  781. int rc;
  782. /* Take ownership back from hardware */
  783. if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  784. DBGC ( hermon, "Hermon %p CQN %#lx FATAL HW2SW_CQ failed: "
  785. "%s\n", hermon, cq->cqn, strerror ( rc ) );
  786. /* Leak memory and return; at least we avoid corruption */
  787. return;
  788. }
  789. /* Free MTT entries */
  790. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  791. /* Free memory */
  792. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  793. free_dma ( hermon_cq->doorbell, sizeof ( hermon_cq->doorbell[0] ) );
  794. free ( hermon_cq );
  795. /* Mark queue number as free */
  796. cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
  797. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  798. ib_cq_set_drvdata ( cq, NULL );
  799. }
  800. /***************************************************************************
  801. *
  802. * Queue pair operations
  803. *
  804. ***************************************************************************
  805. */
  806. /**
  807. * Assign queue pair number
  808. *
  809. * @v ibdev Infiniband device
  810. * @v qp Queue pair
  811. * @ret rc Return status code
  812. */
  813. static int hermon_alloc_qpn ( struct ib_device *ibdev,
  814. struct ib_queue_pair *qp ) {
  815. struct hermon *hermon = ib_get_drvdata ( ibdev );
  816. unsigned int port_offset;
  817. int qpn_offset;
  818. /* Calculate queue pair number */
  819. port_offset = ( ibdev->port - HERMON_PORT_BASE );
  820. switch ( qp->type ) {
  821. case IB_QPT_SMI:
  822. qp->qpn = ( hermon->special_qpn_base + port_offset );
  823. return 0;
  824. case IB_QPT_GSI:
  825. qp->qpn = ( hermon->special_qpn_base + 2 + port_offset );
  826. return 0;
  827. case IB_QPT_UD:
  828. case IB_QPT_RC:
  829. case IB_QPT_ETH:
  830. /* Find a free queue pair number */
  831. qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
  832. HERMON_MAX_QPS, 1 );
  833. if ( qpn_offset < 0 ) {
  834. DBGC ( hermon, "Hermon %p out of queue pairs\n",
  835. hermon );
  836. return qpn_offset;
  837. }
  838. qp->qpn = ( ( random() & HERMON_QPN_RANDOM_MASK ) |
  839. ( hermon->qpn_base + qpn_offset ) );
  840. return 0;
  841. default:
  842. DBGC ( hermon, "Hermon %p unsupported QP type %d\n",
  843. hermon, qp->type );
  844. return -ENOTSUP;
  845. }
  846. }
  847. /**
  848. * Free queue pair number
  849. *
  850. * @v ibdev Infiniband device
  851. * @v qp Queue pair
  852. */
  853. static void hermon_free_qpn ( struct ib_device *ibdev,
  854. struct ib_queue_pair *qp ) {
  855. struct hermon *hermon = ib_get_drvdata ( ibdev );
  856. int qpn_offset;
  857. qpn_offset = ( ( qp->qpn & ~HERMON_QPN_RANDOM_MASK )
  858. - hermon->qpn_base );
  859. if ( qpn_offset >= 0 )
  860. hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
  861. }
  862. /**
  863. * Calculate transmission rate
  864. *
  865. * @v av Address vector
  866. * @ret hermon_rate Hermon rate
  867. */
  868. static unsigned int hermon_rate ( struct ib_address_vector *av ) {
  869. return ( ( ( av->rate >= IB_RATE_2_5 ) && ( av->rate <= IB_RATE_120 ) )
  870. ? ( av->rate + 5 ) : 0 );
  871. }
  872. /**
  873. * Calculate schedule queue
  874. *
  875. * @v ibdev Infiniband device
  876. * @v qp Queue pair
  877. * @ret sched_queue Schedule queue
  878. */
  879. static unsigned int hermon_sched_queue ( struct ib_device *ibdev,
  880. struct ib_queue_pair *qp ) {
  881. return ( ( ( qp->type == IB_QPT_SMI ) ?
  882. HERMON_SCHED_QP0 : HERMON_SCHED_DEFAULT ) |
  883. ( ( ibdev->port - 1 ) << 6 ) );
  884. }
  885. /** Queue pair transport service type map */
  886. static uint8_t hermon_qp_st[] = {
  887. [IB_QPT_SMI] = HERMON_ST_MLX,
  888. [IB_QPT_GSI] = HERMON_ST_MLX,
  889. [IB_QPT_UD] = HERMON_ST_UD,
  890. [IB_QPT_RC] = HERMON_ST_RC,
  891. [IB_QPT_ETH] = HERMON_ST_MLX,
  892. };
  893. /**
  894. * Dump queue pair context (for debugging only)
  895. *
  896. * @v hermon Hermon device
  897. * @v qp Queue pair
  898. * @ret rc Return status code
  899. */
  900. static __attribute__ (( unused )) int
  901. hermon_dump_qpctx ( struct hermon *hermon, struct ib_queue_pair *qp ) {
  902. struct hermonprm_qp_ee_state_transitions qpctx;
  903. int rc;
  904. memset ( &qpctx, 0, sizeof ( qpctx ) );
  905. if ( ( rc = hermon_cmd_query_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ) {
  906. DBGC ( hermon, "Hermon %p QPN %#lx QUERY_QP failed: %s\n",
  907. hermon, qp->qpn, strerror ( rc ) );
  908. return rc;
  909. }
  910. DBGC ( hermon, "Hermon %p QPN %#lx context:\n", hermon, qp->qpn );
  911. DBGC_HDA ( hermon, 0, &qpctx.u.dwords[2], ( sizeof ( qpctx ) - 8 ) );
  912. return 0;
  913. }
  914. /**
  915. * Create queue pair
  916. *
  917. * @v ibdev Infiniband device
  918. * @v qp Queue pair
  919. * @ret rc Return status code
  920. */
  921. static int hermon_create_qp ( struct ib_device *ibdev,
  922. struct ib_queue_pair *qp ) {
  923. struct hermon *hermon = ib_get_drvdata ( ibdev );
  924. struct hermon_queue_pair *hermon_qp;
  925. struct hermonprm_qp_ee_state_transitions qpctx;
  926. int rc;
  927. /* Calculate queue pair number */
  928. if ( ( rc = hermon_alloc_qpn ( ibdev, qp ) ) != 0 )
  929. goto err_alloc_qpn;
  930. /* Allocate control structures */
  931. hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
  932. if ( ! hermon_qp ) {
  933. rc = -ENOMEM;
  934. goto err_hermon_qp;
  935. }
  936. /* Allocate doorbells */
  937. hermon_qp->recv.doorbell =
  938. malloc_dma ( sizeof ( hermon_qp->recv.doorbell[0] ),
  939. sizeof ( hermon_qp->recv.doorbell[0] ) );
  940. if ( ! hermon_qp->recv.doorbell ) {
  941. rc = -ENOMEM;
  942. goto err_recv_doorbell;
  943. }
  944. memset ( hermon_qp->recv.doorbell, 0,
  945. sizeof ( hermon_qp->recv.doorbell[0] ) );
  946. hermon_qp->send.doorbell =
  947. ( hermon->uar + HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE +
  948. HERMON_DB_POST_SND_OFFSET );
  949. /* Allocate work queue buffer */
  950. hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
  951. ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
  952. hermon_qp->send.num_wqes =
  953. ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
  954. hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
  955. sizeof ( hermon_qp->send.wqe[0] ) );
  956. hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
  957. sizeof ( hermon_qp->recv.wqe[0] ) );
  958. hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
  959. hermon_qp->recv.wqe_size );
  960. hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
  961. sizeof ( hermon_qp->send.wqe[0] ) );
  962. if ( ! hermon_qp->wqe ) {
  963. rc = -ENOMEM;
  964. goto err_alloc_wqe;
  965. }
  966. hermon_qp->send.wqe = hermon_qp->wqe;
  967. memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
  968. hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
  969. memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
  970. /* Allocate MTT entries */
  971. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
  972. hermon_qp->wqe_size,
  973. &hermon_qp->mtt ) ) != 0 ) {
  974. goto err_alloc_mtt;
  975. }
  976. /* Transition queue to INIT state */
  977. memset ( &qpctx, 0, sizeof ( qpctx ) );
  978. MLX_FILL_2 ( &qpctx, 2,
  979. qpc_eec_data.pm_state, HERMON_PM_STATE_MIGRATED,
  980. qpc_eec_data.st, hermon_qp_st[qp->type] );
  981. MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
  982. MLX_FILL_4 ( &qpctx, 4,
  983. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  984. qpc_eec_data.log_rq_stride,
  985. ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
  986. qpc_eec_data.log_sq_size,
  987. fls ( hermon_qp->send.num_wqes - 1 ),
  988. qpc_eec_data.log_sq_stride,
  989. ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
  990. MLX_FILL_1 ( &qpctx, 5,
  991. qpc_eec_data.usr_page, HERMON_UAR_NON_EQ_PAGE );
  992. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  993. MLX_FILL_4 ( &qpctx, 38,
  994. qpc_eec_data.rre, 1,
  995. qpc_eec_data.rwe, 1,
  996. qpc_eec_data.rae, 1,
  997. qpc_eec_data.page_offset,
  998. ( hermon_qp->mtt.page_offset >> 6 ) );
  999. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  1000. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
  1001. ( virt_to_phys ( hermon_qp->recv.doorbell ) >> 2 ) );
  1002. MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
  1003. ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
  1004. if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
  1005. &qpctx ) ) != 0 ) {
  1006. DBGC ( hermon, "Hermon %p QPN %#lx RST2INIT_QP failed: %s\n",
  1007. hermon, qp->qpn, strerror ( rc ) );
  1008. goto err_rst2init_qp;
  1009. }
  1010. hermon_qp->state = HERMON_QP_ST_INIT;
  1011. DBGC ( hermon, "Hermon %p QPN %#lx send ring [%08lx,%08lx), doorbell "
  1012. "%08lx\n", hermon, qp->qpn,
  1013. virt_to_phys ( hermon_qp->send.wqe ),
  1014. ( virt_to_phys ( hermon_qp->send.wqe ) +
  1015. hermon_qp->send.wqe_size ),
  1016. virt_to_phys ( hermon_qp->send.doorbell ) );
  1017. DBGC ( hermon, "Hermon %p QPN %#lx receive ring [%08lx,%08lx), "
  1018. "doorbell %08lx\n", hermon, qp->qpn,
  1019. virt_to_phys ( hermon_qp->recv.wqe ),
  1020. ( virt_to_phys ( hermon_qp->recv.wqe ) +
  1021. hermon_qp->recv.wqe_size ),
  1022. virt_to_phys ( hermon_qp->recv.doorbell ) );
  1023. DBGC ( hermon, "Hermon %p QPN %#lx send CQN %#lx receive CQN %#lx\n",
  1024. hermon, qp->qpn, qp->send.cq->cqn, qp->recv.cq->cqn );
  1025. ib_qp_set_drvdata ( qp, hermon_qp );
  1026. return 0;
  1027. hermon_cmd_2rst_qp ( hermon, qp->qpn );
  1028. err_rst2init_qp:
  1029. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1030. err_alloc_mtt:
  1031. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1032. err_alloc_wqe:
  1033. free_dma ( hermon_qp->recv.doorbell,
  1034. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1035. err_recv_doorbell:
  1036. free ( hermon_qp );
  1037. err_hermon_qp:
  1038. hermon_free_qpn ( ibdev, qp );
  1039. err_alloc_qpn:
  1040. return rc;
  1041. }
  1042. /**
  1043. * Modify queue pair
  1044. *
  1045. * @v ibdev Infiniband device
  1046. * @v qp Queue pair
  1047. * @ret rc Return status code
  1048. */
  1049. static int hermon_modify_qp ( struct ib_device *ibdev,
  1050. struct ib_queue_pair *qp ) {
  1051. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1052. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1053. struct hermonprm_qp_ee_state_transitions qpctx;
  1054. int rc;
  1055. /* Transition queue to RTR state, if applicable */
  1056. if ( hermon_qp->state < HERMON_QP_ST_RTR ) {
  1057. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1058. MLX_FILL_2 ( &qpctx, 4,
  1059. qpc_eec_data.mtu,
  1060. ( ( qp->type == IB_QPT_ETH ) ?
  1061. HERMON_MTU_ETH : HERMON_MTU_2048 ),
  1062. qpc_eec_data.msg_max, 31 );
  1063. MLX_FILL_1 ( &qpctx, 7,
  1064. qpc_eec_data.remote_qpn_een, qp->av.qpn );
  1065. MLX_FILL_1 ( &qpctx, 9,
  1066. qpc_eec_data.primary_address_path.rlid,
  1067. qp->av.lid );
  1068. MLX_FILL_1 ( &qpctx, 10,
  1069. qpc_eec_data.primary_address_path.max_stat_rate,
  1070. hermon_rate ( &qp->av ) );
  1071. memcpy ( &qpctx.u.dwords[12], &qp->av.gid,
  1072. sizeof ( qp->av.gid ) );
  1073. MLX_FILL_1 ( &qpctx, 16,
  1074. qpc_eec_data.primary_address_path.sched_queue,
  1075. hermon_sched_queue ( ibdev, qp ) );
  1076. MLX_FILL_1 ( &qpctx, 39,
  1077. qpc_eec_data.next_rcv_psn, qp->recv.psn );
  1078. if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
  1079. &qpctx ) ) != 0 ) {
  1080. DBGC ( hermon, "Hermon %p QPN %#lx INIT2RTR_QP failed:"
  1081. " %s\n", hermon, qp->qpn, strerror ( rc ) );
  1082. return rc;
  1083. }
  1084. hermon_qp->state = HERMON_QP_ST_RTR;
  1085. }
  1086. /* Transition queue to RTS state */
  1087. if ( hermon_qp->state < HERMON_QP_ST_RTS ) {
  1088. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1089. MLX_FILL_1 ( &qpctx, 10,
  1090. qpc_eec_data.primary_address_path.ack_timeout,
  1091. 14 /* 4.096us * 2^(14) = 67ms */ );
  1092. MLX_FILL_2 ( &qpctx, 30,
  1093. qpc_eec_data.retry_count, HERMON_RETRY_MAX,
  1094. qpc_eec_data.rnr_retry, HERMON_RETRY_MAX );
  1095. MLX_FILL_1 ( &qpctx, 32,
  1096. qpc_eec_data.next_send_psn, qp->send.psn );
  1097. if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn,
  1098. &qpctx ) ) != 0 ) {
  1099. DBGC ( hermon, "Hermon %p QPN %#lx RTR2RTS_QP failed: "
  1100. "%s\n", hermon, qp->qpn, strerror ( rc ) );
  1101. return rc;
  1102. }
  1103. hermon_qp->state = HERMON_QP_ST_RTS;
  1104. }
  1105. /* Update parameters in RTS state */
  1106. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1107. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, HERMON_QP_OPT_PARAM_QKEY );
  1108. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  1109. if ( ( rc = hermon_cmd_rts2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
  1110. DBGC ( hermon, "Hermon %p QPN %#lx RTS2RTS_QP failed: %s\n",
  1111. hermon, qp->qpn, strerror ( rc ) );
  1112. return rc;
  1113. }
  1114. return 0;
  1115. }
  1116. /**
  1117. * Destroy queue pair
  1118. *
  1119. * @v ibdev Infiniband device
  1120. * @v qp Queue pair
  1121. */
  1122. static void hermon_destroy_qp ( struct ib_device *ibdev,
  1123. struct ib_queue_pair *qp ) {
  1124. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1125. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1126. int rc;
  1127. /* Take ownership back from hardware */
  1128. if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
  1129. DBGC ( hermon, "Hermon %p QPN %#lx FATAL 2RST_QP failed: %s\n",
  1130. hermon, qp->qpn, strerror ( rc ) );
  1131. /* Leak memory and return; at least we avoid corruption */
  1132. return;
  1133. }
  1134. /* Free MTT entries */
  1135. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1136. /* Free memory */
  1137. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1138. free_dma ( hermon_qp->recv.doorbell,
  1139. sizeof ( hermon_qp->recv.doorbell[0] ) );
  1140. free ( hermon_qp );
  1141. /* Mark queue number as free */
  1142. hermon_free_qpn ( ibdev, qp );
  1143. ib_qp_set_drvdata ( qp, NULL );
  1144. }
  1145. /***************************************************************************
  1146. *
  1147. * Work request operations
  1148. *
  1149. ***************************************************************************
  1150. */
  1151. /**
  1152. * Construct UD send work queue entry
  1153. *
  1154. * @v ibdev Infiniband device
  1155. * @v qp Queue pair
  1156. * @v av Address vector
  1157. * @v iobuf I/O buffer
  1158. * @v wqe Send work queue entry
  1159. * @ret opcode Control opcode
  1160. */
  1161. static __attribute__ (( unused )) unsigned int
  1162. hermon_fill_nop_send_wqe ( struct ib_device *ibdev __unused,
  1163. struct ib_queue_pair *qp __unused,
  1164. struct ib_address_vector *av __unused,
  1165. struct io_buffer *iobuf __unused,
  1166. union hermon_send_wqe *wqe ) {
  1167. MLX_FILL_1 ( &wqe->ctrl, 1, ds, ( sizeof ( wqe->ctrl ) / 16 ) );
  1168. MLX_FILL_1 ( &wqe->ctrl, 2, c, 0x03 /* generate completion */ );
  1169. return HERMON_OPCODE_NOP;
  1170. }
  1171. /**
  1172. * Construct UD send work queue entry
  1173. *
  1174. * @v ibdev Infiniband device
  1175. * @v qp Queue pair
  1176. * @v av Address vector
  1177. * @v iobuf I/O buffer
  1178. * @v wqe Send work queue entry
  1179. * @ret opcode Control opcode
  1180. */
  1181. static unsigned int
  1182. hermon_fill_ud_send_wqe ( struct ib_device *ibdev,
  1183. struct ib_queue_pair *qp __unused,
  1184. struct ib_address_vector *av,
  1185. struct io_buffer *iobuf,
  1186. union hermon_send_wqe *wqe ) {
  1187. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1188. MLX_FILL_1 ( &wqe->ud.ctrl, 1, ds,
  1189. ( ( offsetof ( typeof ( wqe->ud ), data[1] ) / 16 ) ) );
  1190. MLX_FILL_1 ( &wqe->ud.ctrl, 2, c, 0x03 /* generate completion */ );
  1191. MLX_FILL_2 ( &wqe->ud.ud, 0,
  1192. ud_address_vector.pd, HERMON_GLOBAL_PD,
  1193. ud_address_vector.port_number, ibdev->port );
  1194. MLX_FILL_2 ( &wqe->ud.ud, 1,
  1195. ud_address_vector.rlid, av->lid,
  1196. ud_address_vector.g, av->gid_present );
  1197. MLX_FILL_1 ( &wqe->ud.ud, 2,
  1198. ud_address_vector.max_stat_rate, hermon_rate ( av ) );
  1199. MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, av->sl );
  1200. memcpy ( &wqe->ud.ud.u.dwords[4], &av->gid, sizeof ( av->gid ) );
  1201. MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, av->qpn );
  1202. MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, av->qkey );
  1203. MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
  1204. MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, hermon->lkey );
  1205. MLX_FILL_1 ( &wqe->ud.data[0], 3,
  1206. local_address_l, virt_to_bus ( iobuf->data ) );
  1207. return HERMON_OPCODE_SEND;
  1208. }
  1209. /**
  1210. * Construct MLX send work queue entry
  1211. *
  1212. * @v ibdev Infiniband device
  1213. * @v qp Queue pair
  1214. * @v av Address vector
  1215. * @v iobuf I/O buffer
  1216. * @v wqe Send work queue entry
  1217. * @ret opcode Control opcode
  1218. */
  1219. static unsigned int
  1220. hermon_fill_mlx_send_wqe ( struct ib_device *ibdev,
  1221. struct ib_queue_pair *qp,
  1222. struct ib_address_vector *av,
  1223. struct io_buffer *iobuf,
  1224. union hermon_send_wqe *wqe ) {
  1225. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1226. struct io_buffer headers;
  1227. /* Construct IB headers */
  1228. iob_populate ( &headers, &wqe->mlx.headers, 0,
  1229. sizeof ( wqe->mlx.headers ) );
  1230. iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
  1231. ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
  1232. /* Fill work queue entry */
  1233. MLX_FILL_1 ( &wqe->mlx.ctrl, 1, ds,
  1234. ( ( offsetof ( typeof ( wqe->mlx ), data[2] ) / 16 ) ) );
  1235. MLX_FILL_5 ( &wqe->mlx.ctrl, 2,
  1236. c, 0x03 /* generate completion */,
  1237. icrc, 0 /* generate ICRC */,
  1238. max_statrate, hermon_rate ( av ),
  1239. slr, 0,
  1240. v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
  1241. MLX_FILL_1 ( &wqe->mlx.ctrl, 3, rlid, av->lid );
  1242. MLX_FILL_1 ( &wqe->mlx.data[0], 0,
  1243. byte_count, iob_len ( &headers ) );
  1244. MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, hermon->lkey );
  1245. MLX_FILL_1 ( &wqe->mlx.data[0], 3,
  1246. local_address_l, virt_to_bus ( headers.data ) );
  1247. MLX_FILL_1 ( &wqe->mlx.data[1], 0,
  1248. byte_count, ( iob_len ( iobuf ) + 4 /* ICRC */ ) );
  1249. MLX_FILL_1 ( &wqe->mlx.data[1], 1, l_key, hermon->lkey );
  1250. MLX_FILL_1 ( &wqe->mlx.data[1], 3,
  1251. local_address_l, virt_to_bus ( iobuf->data ) );
  1252. return HERMON_OPCODE_SEND;
  1253. }
  1254. /**
  1255. * Construct RC send work queue entry
  1256. *
  1257. * @v ibdev Infiniband device
  1258. * @v qp Queue pair
  1259. * @v av Address vector
  1260. * @v iobuf I/O buffer
  1261. * @v wqe Send work queue entry
  1262. * @ret opcode Control opcode
  1263. */
  1264. static unsigned int
  1265. hermon_fill_rc_send_wqe ( struct ib_device *ibdev,
  1266. struct ib_queue_pair *qp __unused,
  1267. struct ib_address_vector *av __unused,
  1268. struct io_buffer *iobuf,
  1269. union hermon_send_wqe *wqe ) {
  1270. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1271. MLX_FILL_1 ( &wqe->rc.ctrl, 1, ds,
  1272. ( ( offsetof ( typeof ( wqe->rc ), data[1] ) / 16 ) ) );
  1273. MLX_FILL_1 ( &wqe->rc.ctrl, 2, c, 0x03 /* generate completion */ );
  1274. MLX_FILL_1 ( &wqe->rc.data[0], 0, byte_count, iob_len ( iobuf ) );
  1275. MLX_FILL_1 ( &wqe->rc.data[0], 1, l_key, hermon->lkey );
  1276. MLX_FILL_1 ( &wqe->rc.data[0], 3,
  1277. local_address_l, virt_to_bus ( iobuf->data ) );
  1278. return HERMON_OPCODE_SEND;
  1279. }
  1280. /**
  1281. * Construct Ethernet send work queue entry
  1282. *
  1283. * @v ibdev Infiniband device
  1284. * @v qp Queue pair
  1285. * @v av Address vector
  1286. * @v iobuf I/O buffer
  1287. * @v wqe Send work queue entry
  1288. * @ret opcode Control opcode
  1289. */
  1290. static unsigned int
  1291. hermon_fill_eth_send_wqe ( struct ib_device *ibdev,
  1292. struct ib_queue_pair *qp __unused,
  1293. struct ib_address_vector *av __unused,
  1294. struct io_buffer *iobuf,
  1295. union hermon_send_wqe *wqe ) {
  1296. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1297. /* Fill work queue entry */
  1298. MLX_FILL_1 ( &wqe->eth.ctrl, 1, ds,
  1299. ( ( offsetof ( typeof ( wqe->mlx ), data[1] ) / 16 ) ) );
  1300. MLX_FILL_2 ( &wqe->eth.ctrl, 2,
  1301. c, 0x03 /* generate completion */,
  1302. s, 1 /* inhibit ICRC */ );
  1303. MLX_FILL_1 ( &wqe->eth.data[0], 0,
  1304. byte_count, iob_len ( iobuf ) );
  1305. MLX_FILL_1 ( &wqe->eth.data[0], 1, l_key, hermon->lkey );
  1306. MLX_FILL_1 ( &wqe->eth.data[0], 3,
  1307. local_address_l, virt_to_bus ( iobuf->data ) );
  1308. return HERMON_OPCODE_SEND;
  1309. }
  1310. /** Work queue entry constructors */
  1311. static unsigned int
  1312. ( * hermon_fill_send_wqe[] ) ( struct ib_device *ibdev,
  1313. struct ib_queue_pair *qp,
  1314. struct ib_address_vector *av,
  1315. struct io_buffer *iobuf,
  1316. union hermon_send_wqe *wqe ) = {
  1317. [IB_QPT_SMI] = hermon_fill_mlx_send_wqe,
  1318. [IB_QPT_GSI] = hermon_fill_mlx_send_wqe,
  1319. [IB_QPT_UD] = hermon_fill_ud_send_wqe,
  1320. [IB_QPT_RC] = hermon_fill_rc_send_wqe,
  1321. [IB_QPT_ETH] = hermon_fill_eth_send_wqe,
  1322. };
  1323. /**
  1324. * Post send work queue entry
  1325. *
  1326. * @v ibdev Infiniband device
  1327. * @v qp Queue pair
  1328. * @v av Address vector
  1329. * @v iobuf I/O buffer
  1330. * @ret rc Return status code
  1331. */
  1332. static int hermon_post_send ( struct ib_device *ibdev,
  1333. struct ib_queue_pair *qp,
  1334. struct ib_address_vector *av,
  1335. struct io_buffer *iobuf ) {
  1336. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1337. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1338. struct ib_work_queue *wq = &qp->send;
  1339. struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
  1340. union hermon_send_wqe *wqe;
  1341. union hermonprm_doorbell_register db_reg;
  1342. unsigned long wqe_idx_mask;
  1343. unsigned long wqe_idx;
  1344. unsigned int owner;
  1345. unsigned int opcode;
  1346. /* Allocate work queue entry */
  1347. wqe_idx = ( wq->next_idx & ( hermon_send_wq->num_wqes - 1 ) );
  1348. owner = ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 );
  1349. wqe_idx_mask = ( wq->num_wqes - 1 );
  1350. if ( wq->iobufs[ wqe_idx & wqe_idx_mask ] ) {
  1351. DBGC ( hermon, "Hermon %p QPN %#lx send queue full",
  1352. hermon, qp->qpn );
  1353. return -ENOBUFS;
  1354. }
  1355. wq->iobufs[ wqe_idx & wqe_idx_mask ] = iobuf;
  1356. wqe = &hermon_send_wq->wqe[wqe_idx];
  1357. /* Construct work queue entry */
  1358. memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
  1359. ( sizeof ( *wqe ) - 4 ) );
  1360. assert ( qp->type < ( sizeof ( hermon_fill_send_wqe ) /
  1361. sizeof ( hermon_fill_send_wqe[0] ) ) );
  1362. assert ( hermon_fill_send_wqe[qp->type] != NULL );
  1363. opcode = hermon_fill_send_wqe[qp->type] ( ibdev, qp, av, iobuf, wqe );
  1364. barrier();
  1365. MLX_FILL_2 ( &wqe->ctrl, 0,
  1366. opcode, opcode,
  1367. owner, owner );
  1368. DBGCP ( hermon, "Hermon %p QPN %#lx posting send WQE %#lx:\n",
  1369. hermon, qp->qpn, wqe_idx );
  1370. DBGCP_HDA ( hermon, virt_to_phys ( wqe ), wqe, sizeof ( *wqe ) );
  1371. /* Ring doorbell register */
  1372. MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
  1373. barrier();
  1374. writel ( db_reg.dword[0], hermon_send_wq->doorbell );
  1375. /* Update work queue's index */
  1376. wq->next_idx++;
  1377. return 0;
  1378. }
  1379. /**
  1380. * Post receive work queue entry
  1381. *
  1382. * @v ibdev Infiniband device
  1383. * @v qp Queue pair
  1384. * @v iobuf I/O buffer
  1385. * @ret rc Return status code
  1386. */
  1387. static int hermon_post_recv ( struct ib_device *ibdev,
  1388. struct ib_queue_pair *qp,
  1389. struct io_buffer *iobuf ) {
  1390. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1391. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1392. struct ib_work_queue *wq = &qp->recv;
  1393. struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
  1394. struct hermonprm_recv_wqe *wqe;
  1395. unsigned int wqe_idx_mask;
  1396. /* Allocate work queue entry */
  1397. wqe_idx_mask = ( wq->num_wqes - 1 );
  1398. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1399. DBGC ( hermon, "Hermon %p QPN %#lx receive queue full",
  1400. hermon, qp->qpn );
  1401. return -ENOBUFS;
  1402. }
  1403. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1404. wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  1405. /* Construct work queue entry */
  1406. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
  1407. MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->lkey );
  1408. MLX_FILL_1 ( &wqe->data[0], 3,
  1409. local_address_l, virt_to_bus ( iobuf->data ) );
  1410. /* Update work queue's index */
  1411. wq->next_idx++;
  1412. /* Update doorbell record */
  1413. barrier();
  1414. MLX_FILL_1 ( hermon_recv_wq->doorbell, 0, receive_wqe_counter,
  1415. ( wq->next_idx & 0xffff ) );
  1416. return 0;
  1417. }
  1418. /**
  1419. * Handle completion
  1420. *
  1421. * @v ibdev Infiniband device
  1422. * @v cq Completion queue
  1423. * @v cqe Hardware completion queue entry
  1424. * @ret rc Return status code
  1425. */
  1426. static int hermon_complete ( struct ib_device *ibdev,
  1427. struct ib_completion_queue *cq,
  1428. union hermonprm_completion_entry *cqe ) {
  1429. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1430. struct ib_work_queue *wq;
  1431. struct ib_queue_pair *qp;
  1432. struct hermon_queue_pair *hermon_qp;
  1433. struct io_buffer *iobuf;
  1434. struct ib_address_vector recv_av;
  1435. struct ib_global_route_header *grh;
  1436. struct ib_address_vector *av;
  1437. unsigned int opcode;
  1438. unsigned long qpn;
  1439. int is_send;
  1440. unsigned long wqe_idx;
  1441. unsigned long wqe_idx_mask;
  1442. size_t len;
  1443. int rc = 0;
  1444. /* Parse completion */
  1445. qpn = MLX_GET ( &cqe->normal, qpn );
  1446. is_send = MLX_GET ( &cqe->normal, s_r );
  1447. opcode = MLX_GET ( &cqe->normal, opcode );
  1448. if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
  1449. /* "s" field is not valid for error opcodes */
  1450. is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
  1451. DBGC ( hermon, "Hermon %p CQN %#lx syndrome %x vendor %x\n",
  1452. hermon, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
  1453. MLX_GET ( &cqe->error, vendor_error_syndrome ) );
  1454. rc = -EIO;
  1455. /* Don't return immediately; propagate error to completer */
  1456. }
  1457. /* Identify work queue */
  1458. wq = ib_find_wq ( cq, qpn, is_send );
  1459. if ( ! wq ) {
  1460. DBGC ( hermon, "Hermon %p CQN %#lx unknown %s QPN %#lx\n",
  1461. hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1462. return -EIO;
  1463. }
  1464. qp = wq->qp;
  1465. hermon_qp = ib_qp_get_drvdata ( qp );
  1466. /* Identify work queue entry */
  1467. wqe_idx = MLX_GET ( &cqe->normal, wqe_counter );
  1468. wqe_idx_mask = ( wq->num_wqes - 1 );
  1469. DBGCP ( hermon, "Hermon %p CQN %#lx QPN %#lx %s WQE %#lx completed:\n",
  1470. hermon, cq->cqn, qp->qpn, ( is_send ? "send" : "recv" ),
  1471. wqe_idx );
  1472. DBGCP_HDA ( hermon, virt_to_phys ( cqe ), cqe, sizeof ( *cqe ) );
  1473. /* Identify I/O buffer */
  1474. iobuf = wq->iobufs[ wqe_idx & wqe_idx_mask ];
  1475. if ( ! iobuf ) {
  1476. DBGC ( hermon, "Hermon %p CQN %#lx QPN %#lx empty %s WQE "
  1477. "%#lx\n", hermon, cq->cqn, qp->qpn,
  1478. ( is_send ? "send" : "recv" ), wqe_idx );
  1479. return -EIO;
  1480. }
  1481. wq->iobufs[ wqe_idx & wqe_idx_mask ] = NULL;
  1482. if ( is_send ) {
  1483. /* Hand off to completion handler */
  1484. ib_complete_send ( ibdev, qp, iobuf, rc );
  1485. } else {
  1486. /* Set received length */
  1487. len = MLX_GET ( &cqe->normal, byte_cnt );
  1488. assert ( len <= iob_tailroom ( iobuf ) );
  1489. iob_put ( iobuf, len );
  1490. switch ( qp->type ) {
  1491. case IB_QPT_SMI:
  1492. case IB_QPT_GSI:
  1493. case IB_QPT_UD:
  1494. assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
  1495. grh = iobuf->data;
  1496. iob_pull ( iobuf, sizeof ( *grh ) );
  1497. /* Construct address vector */
  1498. av = &recv_av;
  1499. memset ( av, 0, sizeof ( *av ) );
  1500. av->qpn = MLX_GET ( &cqe->normal, srq_rqpn );
  1501. av->lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
  1502. av->sl = MLX_GET ( &cqe->normal, sl );
  1503. av->gid_present = MLX_GET ( &cqe->normal, g );
  1504. memcpy ( &av->gid, &grh->sgid, sizeof ( av->gid ) );
  1505. break;
  1506. case IB_QPT_RC:
  1507. av = &qp->av;
  1508. break;
  1509. case IB_QPT_ETH:
  1510. av = NULL;
  1511. break;
  1512. default:
  1513. assert ( 0 );
  1514. return -EINVAL;
  1515. }
  1516. /* Hand off to completion handler */
  1517. ib_complete_recv ( ibdev, qp, av, iobuf, rc );
  1518. }
  1519. return rc;
  1520. }
  1521. /**
  1522. * Poll completion queue
  1523. *
  1524. * @v ibdev Infiniband device
  1525. * @v cq Completion queue
  1526. */
  1527. static void hermon_poll_cq ( struct ib_device *ibdev,
  1528. struct ib_completion_queue *cq ) {
  1529. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1530. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  1531. union hermonprm_completion_entry *cqe;
  1532. unsigned int cqe_idx_mask;
  1533. int rc;
  1534. while ( 1 ) {
  1535. /* Look for completion entry */
  1536. cqe_idx_mask = ( cq->num_cqes - 1 );
  1537. cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
  1538. if ( MLX_GET ( &cqe->normal, owner ) ^
  1539. ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
  1540. /* Entry still owned by hardware; end of poll */
  1541. break;
  1542. }
  1543. /* Handle completion */
  1544. if ( ( rc = hermon_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1545. DBGC ( hermon, "Hermon %p CQN %#lx failed to complete:"
  1546. " %s\n", hermon, cq->cqn, strerror ( rc ) );
  1547. DBGC_HDA ( hermon, virt_to_phys ( cqe ),
  1548. cqe, sizeof ( *cqe ) );
  1549. }
  1550. /* Update completion queue's index */
  1551. cq->next_idx++;
  1552. /* Update doorbell record */
  1553. MLX_FILL_1 ( hermon_cq->doorbell, 0, update_ci,
  1554. ( cq->next_idx & 0x00ffffffUL ) );
  1555. }
  1556. }
  1557. /***************************************************************************
  1558. *
  1559. * Event queues
  1560. *
  1561. ***************************************************************************
  1562. */
  1563. /**
  1564. * Create event queue
  1565. *
  1566. * @v hermon Hermon device
  1567. * @ret rc Return status code
  1568. */
  1569. static int hermon_create_eq ( struct hermon *hermon ) {
  1570. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1571. struct hermonprm_eqc eqctx;
  1572. struct hermonprm_event_mask mask;
  1573. unsigned int i;
  1574. int rc;
  1575. /* Select event queue number */
  1576. hermon_eq->eqn = ( 4 * hermon->cap.reserved_uars );
  1577. if ( hermon_eq->eqn < hermon->cap.reserved_eqs )
  1578. hermon_eq->eqn = hermon->cap.reserved_eqs;
  1579. /* Calculate doorbell address */
  1580. hermon_eq->doorbell =
  1581. ( hermon->uar + HERMON_DB_EQ_OFFSET ( hermon_eq->eqn ) );
  1582. /* Allocate event queue itself */
  1583. hermon_eq->eqe_size =
  1584. ( HERMON_NUM_EQES * sizeof ( hermon_eq->eqe[0] ) );
  1585. hermon_eq->eqe = malloc_dma ( hermon_eq->eqe_size,
  1586. sizeof ( hermon_eq->eqe[0] ) );
  1587. if ( ! hermon_eq->eqe ) {
  1588. rc = -ENOMEM;
  1589. goto err_eqe;
  1590. }
  1591. memset ( hermon_eq->eqe, 0, hermon_eq->eqe_size );
  1592. for ( i = 0 ; i < HERMON_NUM_EQES ; i++ ) {
  1593. MLX_FILL_1 ( &hermon_eq->eqe[i].generic, 7, owner, 1 );
  1594. }
  1595. barrier();
  1596. /* Allocate MTT entries */
  1597. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_eq->eqe,
  1598. hermon_eq->eqe_size,
  1599. &hermon_eq->mtt ) ) != 0 )
  1600. goto err_alloc_mtt;
  1601. /* Hand queue over to hardware */
  1602. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1603. MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
  1604. MLX_FILL_1 ( &eqctx, 2,
  1605. page_offset, ( hermon_eq->mtt.page_offset >> 5 ) );
  1606. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( HERMON_NUM_EQES - 1 ) );
  1607. MLX_FILL_1 ( &eqctx, 7, mtt_base_addr_l,
  1608. ( hermon_eq->mtt.mtt_base_addr >> 3 ) );
  1609. if ( ( rc = hermon_cmd_sw2hw_eq ( hermon, hermon_eq->eqn,
  1610. &eqctx ) ) != 0 ) {
  1611. DBGC ( hermon, "Hermon %p EQN %#lx SW2HW_EQ failed: %s\n",
  1612. hermon, hermon_eq->eqn, strerror ( rc ) );
  1613. goto err_sw2hw_eq;
  1614. }
  1615. /* Map all events to this event queue */
  1616. memset ( &mask, 0xff, sizeof ( mask ) );
  1617. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1618. ( HERMON_MAP_EQ | hermon_eq->eqn ),
  1619. &mask ) ) != 0 ) {
  1620. DBGC ( hermon, "Hermon %p EQN %#lx MAP_EQ failed: %s\n",
  1621. hermon, hermon_eq->eqn, strerror ( rc ) );
  1622. goto err_map_eq;
  1623. }
  1624. DBGC ( hermon, "Hermon %p EQN %#lx ring [%08lx,%08lx), doorbell "
  1625. "%08lx\n", hermon, hermon_eq->eqn,
  1626. virt_to_phys ( hermon_eq->eqe ),
  1627. ( virt_to_phys ( hermon_eq->eqe ) + hermon_eq->eqe_size ),
  1628. virt_to_phys ( hermon_eq->doorbell ) );
  1629. return 0;
  1630. err_map_eq:
  1631. hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn, &eqctx );
  1632. err_sw2hw_eq:
  1633. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1634. err_alloc_mtt:
  1635. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1636. err_eqe:
  1637. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1638. return rc;
  1639. }
  1640. /**
  1641. * Destroy event queue
  1642. *
  1643. * @v hermon Hermon device
  1644. */
  1645. static void hermon_destroy_eq ( struct hermon *hermon ) {
  1646. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1647. struct hermonprm_eqc eqctx;
  1648. struct hermonprm_event_mask mask;
  1649. int rc;
  1650. /* Unmap events from event queue */
  1651. memset ( &mask, 0, sizeof ( mask ) );
  1652. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1653. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1654. ( HERMON_UNMAP_EQ | hermon_eq->eqn ),
  1655. &mask ) ) != 0 ) {
  1656. DBGC ( hermon, "Hermon %p EQN %#lx FATAL MAP_EQ failed to "
  1657. "unmap: %s\n", hermon, hermon_eq->eqn, strerror ( rc ) );
  1658. /* Continue; HCA may die but system should survive */
  1659. }
  1660. /* Take ownership back from hardware */
  1661. if ( ( rc = hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn,
  1662. &eqctx ) ) != 0 ) {
  1663. DBGC ( hermon, "Hermon %p EQN %#lx FATAL HW2SW_EQ failed: %s\n",
  1664. hermon, hermon_eq->eqn, strerror ( rc ) );
  1665. /* Leak memory and return; at least we avoid corruption */
  1666. return;
  1667. }
  1668. /* Free MTT entries */
  1669. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1670. /* Free memory */
  1671. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1672. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1673. }
  1674. /**
  1675. * Handle port state event
  1676. *
  1677. * @v hermon Hermon device
  1678. * @v eqe Port state change event queue entry
  1679. */
  1680. static void hermon_event_port_state_change ( struct hermon *hermon,
  1681. union hermonprm_event_entry *eqe){
  1682. unsigned int port;
  1683. int link_up;
  1684. /* Get port and link status */
  1685. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1686. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1687. DBGC ( hermon, "Hermon %p port %d link %s\n", hermon, ( port + 1 ),
  1688. ( link_up ? "up" : "down" ) );
  1689. /* Sanity check */
  1690. if ( port >= hermon->cap.num_ports ) {
  1691. DBGC ( hermon, "Hermon %p port %d does not exist!\n",
  1692. hermon, ( port + 1 ) );
  1693. return;
  1694. }
  1695. /* Notify device of port state change */
  1696. hermon->port[port].type->state_change ( hermon, &hermon->port[port],
  1697. link_up );
  1698. }
  1699. /**
  1700. * Poll event queue
  1701. *
  1702. * @v ibdev Infiniband device
  1703. */
  1704. static void hermon_poll_eq ( struct ib_device *ibdev ) {
  1705. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1706. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1707. union hermonprm_event_entry *eqe;
  1708. union hermonprm_doorbell_register db_reg;
  1709. unsigned int eqe_idx_mask;
  1710. unsigned int event_type;
  1711. /* No event is generated upon reaching INIT, so we must poll
  1712. * separately for link state changes while we remain DOWN.
  1713. */
  1714. if ( ib_is_open ( ibdev ) &&
  1715. ( ibdev->port_state == IB_PORT_STATE_DOWN ) ) {
  1716. ib_smc_update ( ibdev, hermon_mad );
  1717. }
  1718. /* Poll event queue */
  1719. while ( 1 ) {
  1720. /* Look for event entry */
  1721. eqe_idx_mask = ( HERMON_NUM_EQES - 1 );
  1722. eqe = &hermon_eq->eqe[hermon_eq->next_idx & eqe_idx_mask];
  1723. if ( MLX_GET ( &eqe->generic, owner ) ^
  1724. ( ( hermon_eq->next_idx & HERMON_NUM_EQES ) ? 1 : 0 ) ) {
  1725. /* Entry still owned by hardware; end of poll */
  1726. break;
  1727. }
  1728. DBGCP ( hermon, "Hermon %p EQN %#lx event:\n",
  1729. hermon, hermon_eq->eqn );
  1730. DBGCP_HDA ( hermon, virt_to_phys ( eqe ),
  1731. eqe, sizeof ( *eqe ) );
  1732. /* Handle event */
  1733. event_type = MLX_GET ( &eqe->generic, event_type );
  1734. switch ( event_type ) {
  1735. case HERMON_EV_PORT_STATE_CHANGE:
  1736. hermon_event_port_state_change ( hermon, eqe );
  1737. break;
  1738. default:
  1739. DBGC ( hermon, "Hermon %p EQN %#lx unrecognised event "
  1740. "type %#x:\n",
  1741. hermon, hermon_eq->eqn, event_type );
  1742. DBGC_HDA ( hermon, virt_to_phys ( eqe ),
  1743. eqe, sizeof ( *eqe ) );
  1744. break;
  1745. }
  1746. /* Update event queue's index */
  1747. hermon_eq->next_idx++;
  1748. /* Ring doorbell */
  1749. MLX_FILL_1 ( &db_reg.event, 0,
  1750. ci, ( hermon_eq->next_idx & 0x00ffffffUL ) );
  1751. writel ( db_reg.dword[0], hermon_eq->doorbell );
  1752. }
  1753. }
  1754. /***************************************************************************
  1755. *
  1756. * Infiniband link-layer operations
  1757. *
  1758. ***************************************************************************
  1759. */
  1760. /**
  1761. * Initialise Infiniband link
  1762. *
  1763. * @v ibdev Infiniband device
  1764. * @ret rc Return status code
  1765. */
  1766. static int hermon_open ( struct ib_device *ibdev ) {
  1767. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1768. union hermonprm_set_port set_port;
  1769. int rc;
  1770. /* Set port parameters */
  1771. memset ( &set_port, 0, sizeof ( set_port ) );
  1772. MLX_FILL_7 ( &set_port.ib, 0,
  1773. mmc, 1,
  1774. mvc, 1,
  1775. mp, 1,
  1776. mg, 1,
  1777. mtu_cap, IB_MTU_2048,
  1778. vl_cap, IB_VL_0,
  1779. rcm, 1 );
  1780. MLX_FILL_2 ( &set_port.ib, 10,
  1781. max_pkey, 1,
  1782. max_gid, 1 );
  1783. if ( ( rc = hermon_cmd_set_port ( hermon, 0, ibdev->port,
  1784. &set_port ) ) != 0 ) {
  1785. DBGC ( hermon, "Hermon %p port %d could not set port: %s\n",
  1786. hermon, ibdev->port, strerror ( rc ) );
  1787. return rc;
  1788. }
  1789. /* Initialise port */
  1790. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port ) ) != 0 ) {
  1791. DBGC ( hermon, "Hermon %p port %d could not initialise port: "
  1792. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  1793. return rc;
  1794. }
  1795. /* Update MAD parameters */
  1796. ib_smc_update ( ibdev, hermon_mad );
  1797. return 0;
  1798. }
  1799. /**
  1800. * Close Infiniband link
  1801. *
  1802. * @v ibdev Infiniband device
  1803. */
  1804. static void hermon_close ( struct ib_device *ibdev ) {
  1805. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1806. int rc;
  1807. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  1808. DBGC ( hermon, "Hermon %p port %d could not close port: %s\n",
  1809. hermon, ibdev->port, strerror ( rc ) );
  1810. /* Nothing we can do about this */
  1811. }
  1812. }
  1813. /**
  1814. * Inform embedded subnet management agent of a received MAD
  1815. *
  1816. * @v ibdev Infiniband device
  1817. * @v mad MAD
  1818. * @ret rc Return status code
  1819. */
  1820. static int hermon_inform_sma ( struct ib_device *ibdev,
  1821. union ib_mad *mad ) {
  1822. int rc;
  1823. /* Send the MAD to the embedded SMA */
  1824. if ( ( rc = hermon_mad ( ibdev, mad ) ) != 0 )
  1825. return rc;
  1826. /* Update parameters held in software */
  1827. ib_smc_update ( ibdev, hermon_mad );
  1828. return 0;
  1829. }
  1830. /***************************************************************************
  1831. *
  1832. * Multicast group operations
  1833. *
  1834. ***************************************************************************
  1835. */
  1836. /**
  1837. * Attach to multicast group
  1838. *
  1839. * @v ibdev Infiniband device
  1840. * @v qp Queue pair
  1841. * @v gid Multicast GID
  1842. * @ret rc Return status code
  1843. */
  1844. static int hermon_mcast_attach ( struct ib_device *ibdev,
  1845. struct ib_queue_pair *qp,
  1846. union ib_gid *gid ) {
  1847. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1848. struct hermonprm_mgm_hash hash;
  1849. struct hermonprm_mcg_entry mcg;
  1850. unsigned int index;
  1851. int rc;
  1852. /* Generate hash table index */
  1853. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  1854. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  1855. hermon, strerror ( rc ) );
  1856. return rc;
  1857. }
  1858. index = MLX_GET ( &hash, hash );
  1859. /* Check for existing hash table entry */
  1860. if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1861. DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
  1862. hermon, index, strerror ( rc ) );
  1863. return rc;
  1864. }
  1865. if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
  1866. /* FIXME: this implementation allows only a single QP
  1867. * per multicast group, and doesn't handle hash
  1868. * collisions. Sufficient for IPoIB but may need to
  1869. * be extended in future.
  1870. */
  1871. DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
  1872. hermon, index );
  1873. return -EBUSY;
  1874. }
  1875. /* Update hash table entry */
  1876. MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
  1877. MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
  1878. memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
  1879. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1880. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  1881. hermon, index, strerror ( rc ) );
  1882. return rc;
  1883. }
  1884. return 0;
  1885. }
  1886. /**
  1887. * Detach from multicast group
  1888. *
  1889. * @v ibdev Infiniband device
  1890. * @v qp Queue pair
  1891. * @v gid Multicast GID
  1892. */
  1893. static void hermon_mcast_detach ( struct ib_device *ibdev,
  1894. struct ib_queue_pair *qp __unused,
  1895. union ib_gid *gid ) {
  1896. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1897. struct hermonprm_mgm_hash hash;
  1898. struct hermonprm_mcg_entry mcg;
  1899. unsigned int index;
  1900. int rc;
  1901. /* Generate hash table index */
  1902. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  1903. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  1904. hermon, strerror ( rc ) );
  1905. return;
  1906. }
  1907. index = MLX_GET ( &hash, hash );
  1908. /* Clear hash table entry */
  1909. memset ( &mcg, 0, sizeof ( mcg ) );
  1910. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1911. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  1912. hermon, index, strerror ( rc ) );
  1913. return;
  1914. }
  1915. }
  1916. /** Hermon Infiniband operations */
  1917. static struct ib_device_operations hermon_ib_operations = {
  1918. .create_cq = hermon_create_cq,
  1919. .destroy_cq = hermon_destroy_cq,
  1920. .create_qp = hermon_create_qp,
  1921. .modify_qp = hermon_modify_qp,
  1922. .destroy_qp = hermon_destroy_qp,
  1923. .post_send = hermon_post_send,
  1924. .post_recv = hermon_post_recv,
  1925. .poll_cq = hermon_poll_cq,
  1926. .poll_eq = hermon_poll_eq,
  1927. .open = hermon_open,
  1928. .close = hermon_close,
  1929. .mcast_attach = hermon_mcast_attach,
  1930. .mcast_detach = hermon_mcast_detach,
  1931. .set_port_info = hermon_inform_sma,
  1932. .set_pkey_table = hermon_inform_sma,
  1933. };
  1934. /**
  1935. * Register Hermon Infiniband device
  1936. *
  1937. * @v hermon Hermon device
  1938. * @v port Hermon port
  1939. * @ret rc Return status code
  1940. */
  1941. static int hermon_register_ibdev ( struct hermon *hermon,
  1942. struct hermon_port *port ) {
  1943. struct ib_device *ibdev = port->ibdev;
  1944. int rc;
  1945. /* Initialise parameters using SMC */
  1946. ib_smc_init ( ibdev, hermon_mad );
  1947. /* Register Infiniband device */
  1948. if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
  1949. DBGC ( hermon, "Hermon %p port %d could not register IB "
  1950. "device: %s\n", hermon, ibdev->port, strerror ( rc ) );
  1951. return rc;
  1952. }
  1953. return 0;
  1954. }
  1955. /**
  1956. * Handle Hermon Infiniband device port state change
  1957. *
  1958. * @v hermon Hermon device
  1959. * @v port Hermon port
  1960. * @v link_up Link is up
  1961. */
  1962. static void hermon_state_change_ibdev ( struct hermon *hermon __unused,
  1963. struct hermon_port *port,
  1964. int link_up __unused ) {
  1965. struct ib_device *ibdev = port->ibdev;
  1966. /* Update MAD parameters */
  1967. ib_smc_update ( ibdev, hermon_mad );
  1968. }
  1969. /**
  1970. * Unregister Hermon Infiniband device
  1971. *
  1972. * @v hermon Hermon device
  1973. * @v port Hermon port
  1974. */
  1975. static void hermon_unregister_ibdev ( struct hermon *hermon __unused,
  1976. struct hermon_port *port ) {
  1977. struct ib_device *ibdev = port->ibdev;
  1978. unregister_ibdev ( ibdev );
  1979. }
  1980. /** Hermon Infiniband port type */
  1981. static struct hermon_port_type hermon_port_type_ib = {
  1982. .register_dev = hermon_register_ibdev,
  1983. .state_change = hermon_state_change_ibdev,
  1984. .unregister_dev = hermon_unregister_ibdev,
  1985. };
  1986. /***************************************************************************
  1987. *
  1988. * Ethernet operation
  1989. *
  1990. ***************************************************************************
  1991. */
  1992. /** Number of Hermon Ethernet send work queue entries */
  1993. #define HERMON_ETH_NUM_SEND_WQES 2
  1994. /** Number of Hermon Ethernet receive work queue entries */
  1995. #define HERMON_ETH_NUM_RECV_WQES 4
  1996. /** Number of Hermon Ethernet completion entries */
  1997. #define HERMON_ETH_NUM_CQES 8
  1998. /**
  1999. * Transmit packet via Hermon Ethernet device
  2000. *
  2001. * @v netdev Network device
  2002. * @v iobuf I/O buffer
  2003. * @ret rc Return status code
  2004. */
  2005. static int hermon_eth_transmit ( struct net_device *netdev,
  2006. struct io_buffer *iobuf ) {
  2007. struct hermon_port *port = netdev->priv;
  2008. struct ib_device *ibdev = port->ibdev;
  2009. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2010. int rc;
  2011. /* Transmit packet */
  2012. if ( ( rc = ib_post_send ( ibdev, port->eth_qp, NULL,
  2013. iobuf ) ) != 0 ) {
  2014. DBGC ( hermon, "Hermon %p port %d could not transmit: %s\n",
  2015. hermon, ibdev->port, strerror ( rc ) );
  2016. return rc;
  2017. }
  2018. return 0;
  2019. }
  2020. /**
  2021. * Handle Hermon Ethernet device send completion
  2022. *
  2023. * @v ibdev Infiniband device
  2024. * @v qp Queue pair
  2025. * @v iobuf I/O buffer
  2026. * @v rc Completion status code
  2027. */
  2028. static void hermon_eth_complete_send ( struct ib_device *ibdev __unused,
  2029. struct ib_queue_pair *qp,
  2030. struct io_buffer *iobuf, int rc ) {
  2031. struct net_device *netdev = ib_qp_get_ownerdata ( qp );
  2032. netdev_tx_complete_err ( netdev, iobuf, rc );
  2033. }
  2034. /**
  2035. * Handle Hermon Ethernet device receive completion
  2036. *
  2037. * @v ibdev Infiniband device
  2038. * @v qp Queue pair
  2039. * @v av Address vector, or NULL
  2040. * @v iobuf I/O buffer
  2041. * @v rc Completion status code
  2042. */
  2043. static void hermon_eth_complete_recv ( struct ib_device *ibdev __unused,
  2044. struct ib_queue_pair *qp,
  2045. struct ib_address_vector *av __unused,
  2046. struct io_buffer *iobuf, int rc ) {
  2047. struct net_device *netdev = ib_qp_get_ownerdata ( qp );
  2048. /* Hand off to network layer */
  2049. if ( rc == 0 ) {
  2050. netdev_rx ( netdev, iobuf );
  2051. } else {
  2052. netdev_rx_err ( netdev, iobuf, rc );
  2053. }
  2054. }
  2055. /** Hermon Ethernet device completion operations */
  2056. static struct ib_completion_queue_operations hermon_eth_cq_op = {
  2057. .complete_send = hermon_eth_complete_send,
  2058. .complete_recv = hermon_eth_complete_recv,
  2059. };
  2060. /**
  2061. * Poll Hermon Ethernet device
  2062. *
  2063. * @v netdev Network device
  2064. */
  2065. static void hermon_eth_poll ( struct net_device *netdev ) {
  2066. struct hermon_port *port = netdev->priv;
  2067. struct ib_device *ibdev = port->ibdev;
  2068. ib_poll_eq ( ibdev );
  2069. }
  2070. /**
  2071. * Enable/disable interrupts on Hermon Ethernet device
  2072. *
  2073. * @v netdev Network device
  2074. * @v enable Interrupts should be enabled
  2075. */
  2076. static void hermon_eth_irq ( struct net_device *netdev __unused,
  2077. int enable __unused ) {
  2078. /* No implementation */
  2079. }
  2080. /**
  2081. * Open Hermon Ethernet device
  2082. *
  2083. * @v netdev Network device
  2084. * @ret rc Return status code
  2085. */
  2086. static int hermon_eth_open ( struct net_device *netdev ) {
  2087. struct hermon_port *port = netdev->priv;
  2088. struct ib_device *ibdev = port->ibdev;
  2089. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2090. union hermonprm_set_port set_port;
  2091. int rc;
  2092. /* Allocate completion queue */
  2093. port->eth_cq = ib_create_cq ( ibdev, HERMON_ETH_NUM_CQES,
  2094. &hermon_eth_cq_op );
  2095. if ( ! port->eth_cq ) {
  2096. DBGC ( hermon, "Hermon %p port %d could not create completion "
  2097. "queue\n", hermon, ibdev->port );
  2098. rc = -ENOMEM;
  2099. goto err_create_cq;
  2100. }
  2101. /* Allocate queue pair */
  2102. port->eth_qp = ib_create_qp ( ibdev, IB_QPT_ETH,
  2103. HERMON_ETH_NUM_SEND_WQES, port->eth_cq,
  2104. HERMON_ETH_NUM_RECV_WQES, port->eth_cq );
  2105. if ( ! port->eth_qp ) {
  2106. DBGC ( hermon, "Hermon %p port %d could not create queue "
  2107. "pair\n", hermon, ibdev->port );
  2108. rc = -ENOMEM;
  2109. goto err_create_qp;
  2110. }
  2111. ib_qp_set_ownerdata ( port->eth_qp, netdev );
  2112. /* Activate queue pair */
  2113. if ( ( rc = ib_modify_qp ( ibdev, port->eth_qp ) ) != 0 ) {
  2114. DBGC ( hermon, "Hermon %p port %d could not modify queue "
  2115. "pair: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2116. goto err_modify_qp;
  2117. }
  2118. /* Fill receive rings */
  2119. ib_refill_recv ( ibdev, port->eth_qp );
  2120. /* Set port general parameters */
  2121. memset ( &set_port, 0, sizeof ( set_port ) );
  2122. MLX_FILL_3 ( &set_port.general, 0,
  2123. v_mtu, 1,
  2124. v_pprx, 1,
  2125. v_pptx, 1 );
  2126. MLX_FILL_1 ( &set_port.general, 1,
  2127. mtu, ( ETH_FRAME_LEN + 40 /* Used by card */ ) );
  2128. MLX_FILL_1 ( &set_port.general, 2, pptx, 1 );
  2129. MLX_FILL_1 ( &set_port.general, 3, pprx, 1 );
  2130. if ( ( rc = hermon_cmd_set_port ( hermon, 1,
  2131. ( HERMON_SET_PORT_GENERAL_PARAM |
  2132. ibdev->port ),
  2133. &set_port ) ) != 0 ) {
  2134. DBGC ( hermon, "Hermon %p port %d could not set port general "
  2135. "parameters: %s\n",
  2136. hermon, ibdev->port, strerror ( rc ) );
  2137. goto err_set_port_general_params;
  2138. }
  2139. /* Set port receive QP */
  2140. memset ( &set_port, 0, sizeof ( set_port ) );
  2141. MLX_FILL_1 ( &set_port.rqp_calc, 0, base_qpn, port->eth_qp->qpn );
  2142. MLX_FILL_1 ( &set_port.rqp_calc, 2,
  2143. mac_miss_index, 128 /* MAC misses go to promisc QP */ );
  2144. MLX_FILL_2 ( &set_port.rqp_calc, 3,
  2145. vlan_miss_index, 127 /* VLAN misses go to promisc QP */,
  2146. no_vlan_index, 126 /* VLAN-free go to promisc QP */ );
  2147. MLX_FILL_2 ( &set_port.rqp_calc, 5,
  2148. promisc_qpn, port->eth_qp->qpn,
  2149. en_uc_promisc, 1 );
  2150. MLX_FILL_2 ( &set_port.rqp_calc, 6,
  2151. def_mcast_qpn, port->eth_qp->qpn,
  2152. mc_promisc_mode, 2 /* Receive all multicasts */ );
  2153. if ( ( rc = hermon_cmd_set_port ( hermon, 1,
  2154. ( HERMON_SET_PORT_RECEIVE_QP |
  2155. ibdev->port ),
  2156. &set_port ) ) != 0 ) {
  2157. DBGC ( hermon, "Hermon %p port %d could not set port receive "
  2158. "QP: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2159. goto err_set_port_receive_qp;
  2160. }
  2161. /* Initialise port */
  2162. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port ) ) != 0 ) {
  2163. DBGC ( hermon, "Hermon %p port %d could not initialise port: "
  2164. "%s\n", hermon, ibdev->port, strerror ( rc ) );
  2165. goto err_init_port;
  2166. }
  2167. return 0;
  2168. err_init_port:
  2169. err_set_port_receive_qp:
  2170. err_set_port_general_params:
  2171. err_modify_qp:
  2172. ib_destroy_qp ( ibdev, port->eth_qp );
  2173. err_create_qp:
  2174. ib_destroy_cq ( ibdev, port->eth_cq );
  2175. err_create_cq:
  2176. return rc;
  2177. }
  2178. /**
  2179. * Close Hermon Ethernet device
  2180. *
  2181. * @v netdev Network device
  2182. */
  2183. static void hermon_eth_close ( struct net_device *netdev ) {
  2184. struct hermon_port *port = netdev->priv;
  2185. struct ib_device *ibdev = port->ibdev;
  2186. struct hermon *hermon = ib_get_drvdata ( ibdev );
  2187. int rc;
  2188. /* Close port */
  2189. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  2190. DBGC ( hermon, "Hermon %p port %d could not close port: %s\n",
  2191. hermon, ibdev->port, strerror ( rc ) );
  2192. /* Nothing we can do about this */
  2193. }
  2194. /* Tear down the queues */
  2195. ib_destroy_qp ( ibdev, port->eth_qp );
  2196. ib_destroy_cq ( ibdev, port->eth_cq );
  2197. }
  2198. /** Hermon Ethernet network device operations */
  2199. static struct net_device_operations hermon_eth_operations = {
  2200. .open = hermon_eth_open,
  2201. .close = hermon_eth_close,
  2202. .transmit = hermon_eth_transmit,
  2203. .poll = hermon_eth_poll,
  2204. .irq = hermon_eth_irq,
  2205. };
  2206. /**
  2207. * Register Hermon Ethernet device
  2208. *
  2209. * @v hermon Hermon device
  2210. * @v port Hermon port
  2211. * @ret rc Return status code
  2212. */
  2213. static int hermon_register_netdev ( struct hermon *hermon,
  2214. struct hermon_port *port ) {
  2215. struct net_device *netdev = port->netdev;
  2216. struct ib_device *ibdev = port->ibdev;
  2217. struct hermonprm_query_port_cap query_port;
  2218. union {
  2219. uint8_t bytes[8];
  2220. uint32_t dwords[2];
  2221. } mac;
  2222. int rc;
  2223. /* Retrieve MAC address */
  2224. if ( ( rc = hermon_cmd_query_port ( hermon, ibdev->port,
  2225. &query_port ) ) != 0 ) {
  2226. DBGC ( hermon, "Hermon %p port %d could not query port: %s\n",
  2227. hermon, ibdev->port, strerror ( rc ) );
  2228. return rc;
  2229. }
  2230. mac.dwords[0] = htonl ( MLX_GET ( &query_port, mac_47_32 ) );
  2231. mac.dwords[1] = htonl ( MLX_GET ( &query_port, mac_31_0 ) );
  2232. memcpy ( netdev->hw_addr,
  2233. &mac.bytes[ sizeof ( mac.bytes ) - ETH_ALEN ], ETH_ALEN );
  2234. /* Register network device */
  2235. if ( ( rc = register_netdev ( netdev ) ) != 0 ) {
  2236. DBGC ( hermon, "Hermon %p port %d could not register network "
  2237. "device: %s\n", hermon, ibdev->port, strerror ( rc ) );
  2238. return rc;
  2239. }
  2240. return 0;
  2241. }
  2242. /**
  2243. * Handle Hermon Ethernet device port state change
  2244. *
  2245. * @v hermon Hermon device
  2246. * @v port Hermon port
  2247. * @v link_up Link is up
  2248. */
  2249. static void hermon_state_change_netdev ( struct hermon *hermon __unused,
  2250. struct hermon_port *port,
  2251. int link_up ) {
  2252. struct net_device *netdev = port->netdev;
  2253. if ( link_up ) {
  2254. netdev_link_up ( netdev );
  2255. } else {
  2256. netdev_link_down ( netdev );
  2257. }
  2258. }
  2259. /**
  2260. * Unregister Hermon Ethernet device
  2261. *
  2262. * @v hermon Hermon device
  2263. * @v port Hermon port
  2264. */
  2265. static void hermon_unregister_netdev ( struct hermon *hermon __unused,
  2266. struct hermon_port *port ) {
  2267. struct net_device *netdev = port->netdev;
  2268. unregister_netdev ( netdev );
  2269. }
  2270. /** Hermon Ethernet port type */
  2271. static struct hermon_port_type hermon_port_type_eth = {
  2272. .register_dev = hermon_register_netdev,
  2273. .state_change = hermon_state_change_netdev,
  2274. .unregister_dev = hermon_unregister_netdev,
  2275. };
  2276. /***************************************************************************
  2277. *
  2278. * Port type detection
  2279. *
  2280. ***************************************************************************
  2281. */
  2282. /** Timeout for port sensing */
  2283. #define HERMON_SENSE_PORT_TIMEOUT ( TICKS_PER_SEC / 2 )
  2284. /**
  2285. * Name port type
  2286. *
  2287. * @v port_type Port type
  2288. * @v port_type_name Port type name
  2289. */
  2290. static inline const char * hermon_name_port_type ( unsigned int port_type ) {
  2291. switch ( port_type ) {
  2292. case HERMON_PORT_TYPE_UNKNOWN: return "unknown";
  2293. case HERMON_PORT_TYPE_IB: return "Infiniband";
  2294. case HERMON_PORT_TYPE_ETH: return "Ethernet";
  2295. default: return "INVALID";
  2296. }
  2297. }
  2298. /**
  2299. * Sense port type
  2300. *
  2301. * @v hermon Hermon device
  2302. * @v port Hermon port
  2303. * @ret port_type Port type, or negative error
  2304. */
  2305. static int hermon_sense_port_type ( struct hermon *hermon,
  2306. struct hermon_port *port ) {
  2307. struct ib_device *ibdev = port->ibdev;
  2308. struct hermonprm_sense_port sense_port;
  2309. int port_type;
  2310. int rc;
  2311. /* If DPDP is not supported, always assume Infiniband */
  2312. if ( ! hermon->cap.dpdp ) {
  2313. port_type = HERMON_PORT_TYPE_IB;
  2314. DBGC ( hermon, "Hermon %p port %d does not support DPDP; "
  2315. "assuming an %s network\n", hermon, ibdev->port,
  2316. hermon_name_port_type ( port_type ) );
  2317. return port_type;
  2318. }
  2319. /* Sense the port type */
  2320. if ( ( rc = hermon_cmd_sense_port ( hermon, ibdev->port,
  2321. &sense_port ) ) != 0 ) {
  2322. DBGC ( hermon, "Hermon %p port %d sense failed: %s\n",
  2323. hermon, ibdev->port, strerror ( rc ) );
  2324. return rc;
  2325. }
  2326. port_type = MLX_GET ( &sense_port, port_type );
  2327. DBGC ( hermon, "Hermon %p port %d sensed an %s network\n",
  2328. hermon, ibdev->port, hermon_name_port_type ( port_type ) );
  2329. return port_type;
  2330. }
  2331. /**
  2332. * Set port type
  2333. *
  2334. * @v hermon Hermon device
  2335. * @v port Hermon port
  2336. * @ret rc Return status code
  2337. */
  2338. static int hermon_set_port_type ( struct hermon *hermon,
  2339. struct hermon_port *port ) {
  2340. struct ib_device *ibdev = port->ibdev;
  2341. struct hermonprm_query_port_cap query_port;
  2342. int ib_supported;
  2343. int eth_supported;
  2344. int port_type;
  2345. unsigned long start;
  2346. unsigned long elapsed;
  2347. int rc;
  2348. /* Check to see which types are supported */
  2349. if ( ( rc = hermon_cmd_query_port ( hermon, ibdev->port,
  2350. &query_port ) ) != 0 ) {
  2351. DBGC ( hermon, "Hermon %p port %d could not query port: %s\n",
  2352. hermon, ibdev->port, strerror ( rc ) );
  2353. return rc;
  2354. }
  2355. ib_supported = MLX_GET ( &query_port, ib );
  2356. eth_supported = MLX_GET ( &query_port, eth );
  2357. DBGC ( hermon, "Hermon %p port %d supports%s%s%s\n",
  2358. hermon, ibdev->port, ( ib_supported ? " Infiniband" : "" ),
  2359. ( ( ib_supported && eth_supported ) ? " and" : "" ),
  2360. ( eth_supported ? " Ethernet" : "" ) );
  2361. /* Sense network, if applicable */
  2362. if ( ib_supported && eth_supported ) {
  2363. /* Both types are supported; try sensing network */
  2364. start = currticks();
  2365. do {
  2366. /* Try sensing port */
  2367. port_type = hermon_sense_port_type ( hermon, port );
  2368. if ( port_type < 0 ) {
  2369. rc = port_type;
  2370. return rc;
  2371. }
  2372. } while ( ( port_type == HERMON_PORT_TYPE_UNKNOWN ) &&
  2373. ( ( elapsed = ( currticks() - start ) ) <
  2374. HERMON_SENSE_PORT_TIMEOUT ) );
  2375. /* Set port type based on sensed network, defaulting
  2376. * to Infiniband if nothing was sensed.
  2377. */
  2378. switch ( port_type ) {
  2379. case HERMON_PORT_TYPE_ETH:
  2380. port->type = &hermon_port_type_eth;
  2381. break;
  2382. case HERMON_PORT_TYPE_IB:
  2383. case HERMON_PORT_TYPE_UNKNOWN:
  2384. port->type = &hermon_port_type_ib;
  2385. break;
  2386. default:
  2387. return -EINVAL;
  2388. }
  2389. } else if ( eth_supported ) {
  2390. port->type = &hermon_port_type_eth;
  2391. } else {
  2392. port->type = &hermon_port_type_ib;
  2393. }
  2394. assert ( port->type != NULL );
  2395. return 0;
  2396. }
  2397. /***************************************************************************
  2398. *
  2399. * Firmware control
  2400. *
  2401. ***************************************************************************
  2402. */
  2403. /**
  2404. * Map virtual to physical address for firmware usage
  2405. *
  2406. * @v hermon Hermon device
  2407. * @v map Mapping function
  2408. * @v va Virtual address
  2409. * @v pa Physical address
  2410. * @v len Length of region
  2411. * @ret rc Return status code
  2412. */
  2413. static int hermon_map_vpm ( struct hermon *hermon,
  2414. int ( *map ) ( struct hermon *hermon,
  2415. const struct hermonprm_virtual_physical_mapping* ),
  2416. uint64_t va, physaddr_t pa, size_t len ) {
  2417. struct hermonprm_virtual_physical_mapping mapping;
  2418. physaddr_t start;
  2419. physaddr_t low;
  2420. physaddr_t high;
  2421. physaddr_t end;
  2422. size_t size;
  2423. int rc;
  2424. /* Sanity checks */
  2425. assert ( ( va & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  2426. assert ( ( pa & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  2427. assert ( ( len & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  2428. /* Calculate starting points */
  2429. start = pa;
  2430. end = ( start + len );
  2431. size = ( 1UL << ( fls ( start ^ end ) - 1 ) );
  2432. low = high = ( end & ~( size - 1 ) );
  2433. assert ( start < low );
  2434. assert ( high <= end );
  2435. /* These mappings tend to generate huge volumes of
  2436. * uninteresting debug data, which basically makes it
  2437. * impossible to use debugging otherwise.
  2438. */
  2439. DBG_DISABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  2440. /* Map blocks in descending order of size */
  2441. while ( size >= HERMON_PAGE_SIZE ) {
  2442. /* Find the next candidate block */
  2443. if ( ( low - size ) >= start ) {
  2444. low -= size;
  2445. pa = low;
  2446. } else if ( ( high + size ) <= end ) {
  2447. pa = high;
  2448. high += size;
  2449. } else {
  2450. size >>= 1;
  2451. continue;
  2452. }
  2453. assert ( ( va & ( size - 1 ) ) == 0 );
  2454. assert ( ( pa & ( size - 1 ) ) == 0 );
  2455. /* Map this block */
  2456. memset ( &mapping, 0, sizeof ( mapping ) );
  2457. MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
  2458. MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
  2459. MLX_FILL_2 ( &mapping, 3,
  2460. log2size, ( ( fls ( size ) - 1 ) - 12 ),
  2461. pa_l, ( pa >> 12 ) );
  2462. if ( ( rc = map ( hermon, &mapping ) ) != 0 ) {
  2463. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  2464. DBGC ( hermon, "Hermon %p could not map %08llx+%zx to "
  2465. "%08lx: %s\n",
  2466. hermon, va, size, pa, strerror ( rc ) );
  2467. return rc;
  2468. }
  2469. va += size;
  2470. }
  2471. assert ( low == start );
  2472. assert ( high == end );
  2473. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  2474. return 0;
  2475. }
  2476. /**
  2477. * Start firmware running
  2478. *
  2479. * @v hermon Hermon device
  2480. * @ret rc Return status code
  2481. */
  2482. static int hermon_start_firmware ( struct hermon *hermon ) {
  2483. struct hermonprm_query_fw fw;
  2484. unsigned int fw_pages;
  2485. size_t fw_size;
  2486. physaddr_t fw_base;
  2487. int rc;
  2488. /* Get firmware parameters */
  2489. if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
  2490. DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
  2491. hermon, strerror ( rc ) );
  2492. goto err_query_fw;
  2493. }
  2494. DBGC ( hermon, "Hermon %p firmware version %d.%d.%d\n", hermon,
  2495. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  2496. MLX_GET ( &fw, fw_rev_subminor ) );
  2497. fw_pages = MLX_GET ( &fw, fw_pages );
  2498. DBGC ( hermon, "Hermon %p requires %d pages (%d kB) for firmware\n",
  2499. hermon, fw_pages, ( fw_pages * 4 ) );
  2500. /* Allocate firmware pages and map firmware area */
  2501. fw_size = ( fw_pages * HERMON_PAGE_SIZE );
  2502. hermon->firmware_area = umalloc ( fw_size );
  2503. if ( ! hermon->firmware_area ) {
  2504. rc = -ENOMEM;
  2505. goto err_alloc_fa;
  2506. }
  2507. fw_base = user_to_phys ( hermon->firmware_area, 0 );
  2508. DBGC ( hermon, "Hermon %p firmware area at physical [%08lx,%08lx)\n",
  2509. hermon, fw_base, ( fw_base + fw_size ) );
  2510. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_fa,
  2511. 0, fw_base, fw_size ) ) != 0 ) {
  2512. DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
  2513. hermon, strerror ( rc ) );
  2514. goto err_map_fa;
  2515. }
  2516. /* Start firmware */
  2517. if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
  2518. DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
  2519. hermon, strerror ( rc ) );
  2520. goto err_run_fw;
  2521. }
  2522. DBGC ( hermon, "Hermon %p firmware started\n", hermon );
  2523. return 0;
  2524. err_run_fw:
  2525. err_map_fa:
  2526. hermon_cmd_unmap_fa ( hermon );
  2527. ufree ( hermon->firmware_area );
  2528. hermon->firmware_area = UNULL;
  2529. err_alloc_fa:
  2530. err_query_fw:
  2531. return rc;
  2532. }
  2533. /**
  2534. * Stop firmware running
  2535. *
  2536. * @v hermon Hermon device
  2537. */
  2538. static void hermon_stop_firmware ( struct hermon *hermon ) {
  2539. int rc;
  2540. if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
  2541. DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
  2542. hermon, strerror ( rc ) );
  2543. /* Leak memory and return; at least we avoid corruption */
  2544. return;
  2545. }
  2546. ufree ( hermon->firmware_area );
  2547. hermon->firmware_area = UNULL;
  2548. }
  2549. /***************************************************************************
  2550. *
  2551. * Infinihost Context Memory management
  2552. *
  2553. ***************************************************************************
  2554. */
  2555. /**
  2556. * Get device limits
  2557. *
  2558. * @v hermon Hermon device
  2559. * @ret rc Return status code
  2560. */
  2561. static int hermon_get_cap ( struct hermon *hermon ) {
  2562. struct hermonprm_query_dev_cap dev_cap;
  2563. int rc;
  2564. if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
  2565. DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
  2566. hermon, strerror ( rc ) );
  2567. return rc;
  2568. }
  2569. hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
  2570. hermon->cap.reserved_qps =
  2571. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
  2572. hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
  2573. hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
  2574. hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
  2575. hermon->cap.reserved_srqs =
  2576. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
  2577. hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
  2578. hermon->cap.reserved_cqs =
  2579. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
  2580. hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
  2581. hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
  2582. hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
  2583. hermon->cap.reserved_mtts =
  2584. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
  2585. hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
  2586. hermon->cap.reserved_mrws =
  2587. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
  2588. hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
  2589. hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
  2590. hermon->cap.num_ports = MLX_GET ( &dev_cap, num_ports );
  2591. hermon->cap.dpdp = MLX_GET ( &dev_cap, dpdp );
  2592. /* Sanity check */
  2593. if ( hermon->cap.num_ports > HERMON_MAX_PORTS ) {
  2594. DBGC ( hermon, "Hermon %p has %d ports (only %d supported)\n",
  2595. hermon, hermon->cap.num_ports, HERMON_MAX_PORTS );
  2596. hermon->cap.num_ports = HERMON_MAX_PORTS;
  2597. }
  2598. return 0;
  2599. }
  2600. /**
  2601. * Align ICM table
  2602. *
  2603. * @v icm_offset Current ICM offset
  2604. * @v len ICM table length
  2605. * @ret icm_offset ICM offset
  2606. */
  2607. static uint64_t icm_align ( uint64_t icm_offset, size_t len ) {
  2608. /* Round up to a multiple of the table size */
  2609. assert ( len == ( 1UL << ( fls ( len ) - 1 ) ) );
  2610. return ( ( icm_offset + len - 1 ) & ~( ( ( uint64_t ) len ) - 1 ) );
  2611. }
  2612. /**
  2613. * Allocate ICM
  2614. *
  2615. * @v hermon Hermon device
  2616. * @v init_hca INIT_HCA structure to fill in
  2617. * @ret rc Return status code
  2618. */
  2619. static int hermon_alloc_icm ( struct hermon *hermon,
  2620. struct hermonprm_init_hca *init_hca ) {
  2621. struct hermonprm_scalar_parameter icm_size;
  2622. struct hermonprm_scalar_parameter icm_aux_size;
  2623. uint64_t icm_offset = 0;
  2624. unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
  2625. unsigned int log_num_mtts, log_num_mpts, log_num_mcs;
  2626. size_t cmpt_max_len;
  2627. size_t icm_len, icm_aux_len;
  2628. size_t len;
  2629. physaddr_t icm_phys;
  2630. int i;
  2631. int rc;
  2632. /*
  2633. * Start by carving up the ICM virtual address space
  2634. *
  2635. */
  2636. /* Calculate number of each object type within ICM */
  2637. log_num_qps = fls ( hermon->cap.reserved_qps +
  2638. HERMON_RSVD_SPECIAL_QPS + HERMON_MAX_QPS - 1 );
  2639. log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
  2640. log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
  2641. log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
  2642. log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
  2643. log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
  2644. log_num_mcs = HERMON_LOG_MULTICAST_HASH_SIZE;
  2645. /* ICM starts with the cMPT tables, which are sparse */
  2646. cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
  2647. ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
  2648. len = ( ( ( ( 1 << log_num_qps ) * hermon->cap.cmpt_entry_size ) +
  2649. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2650. hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
  2651. hermon->icm_map[HERMON_ICM_QP_CMPT].len = len;
  2652. icm_offset += cmpt_max_len;
  2653. len = ( ( ( ( 1 << log_num_srqs ) * hermon->cap.cmpt_entry_size ) +
  2654. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2655. hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
  2656. hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = len;
  2657. icm_offset += cmpt_max_len;
  2658. len = ( ( ( ( 1 << log_num_cqs ) * hermon->cap.cmpt_entry_size ) +
  2659. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2660. hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
  2661. hermon->icm_map[HERMON_ICM_CQ_CMPT].len = len;
  2662. icm_offset += cmpt_max_len;
  2663. len = ( ( ( ( 1 << log_num_eqs ) * hermon->cap.cmpt_entry_size ) +
  2664. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2665. hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
  2666. hermon->icm_map[HERMON_ICM_EQ_CMPT].len = len;
  2667. icm_offset += cmpt_max_len;
  2668. hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
  2669. /* Queue pair contexts */
  2670. len = ( ( 1 << log_num_qps ) * hermon->cap.qpc_entry_size );
  2671. icm_offset = icm_align ( icm_offset, len );
  2672. MLX_FILL_1 ( init_hca, 12,
  2673. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
  2674. ( icm_offset >> 32 ) );
  2675. MLX_FILL_2 ( init_hca, 13,
  2676. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  2677. ( icm_offset >> 5 ),
  2678. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  2679. log_num_qps );
  2680. DBGC ( hermon, "Hermon %p ICM QPC is %d x %#zx at [%08llx,%08llx)\n",
  2681. hermon, ( 1 << log_num_qps ), hermon->cap.qpc_entry_size,
  2682. icm_offset, ( icm_offset + len ) );
  2683. icm_offset += len;
  2684. /* Extended alternate path contexts */
  2685. len = ( ( 1 << log_num_qps ) * hermon->cap.altc_entry_size );
  2686. icm_offset = icm_align ( icm_offset, len );
  2687. MLX_FILL_1 ( init_hca, 24,
  2688. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
  2689. ( icm_offset >> 32 ) );
  2690. MLX_FILL_1 ( init_hca, 25,
  2691. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
  2692. icm_offset );
  2693. DBGC ( hermon, "Hermon %p ICM ALTC is %d x %#zx at [%08llx,%08llx)\n",
  2694. hermon, ( 1 << log_num_qps ), hermon->cap.altc_entry_size,
  2695. icm_offset, ( icm_offset + len ) );
  2696. icm_offset += len;
  2697. /* Extended auxiliary contexts */
  2698. len = ( ( 1 << log_num_qps ) * hermon->cap.auxc_entry_size );
  2699. icm_offset = icm_align ( icm_offset, len );
  2700. MLX_FILL_1 ( init_hca, 28,
  2701. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
  2702. ( icm_offset >> 32 ) );
  2703. MLX_FILL_1 ( init_hca, 29,
  2704. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
  2705. icm_offset );
  2706. DBGC ( hermon, "Hermon %p ICM AUXC is %d x %#zx at [%08llx,%08llx)\n",
  2707. hermon, ( 1 << log_num_qps ), hermon->cap.auxc_entry_size,
  2708. icm_offset, ( icm_offset + len ) );
  2709. icm_offset += len;
  2710. /* Shared receive queue contexts */
  2711. len = ( ( 1 << log_num_srqs ) * hermon->cap.srqc_entry_size );
  2712. icm_offset = icm_align ( icm_offset, len );
  2713. MLX_FILL_1 ( init_hca, 18,
  2714. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
  2715. ( icm_offset >> 32 ) );
  2716. MLX_FILL_2 ( init_hca, 19,
  2717. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  2718. ( icm_offset >> 5 ),
  2719. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  2720. log_num_srqs );
  2721. DBGC ( hermon, "Hermon %p ICM SRQC is %d x %#zx at [%08llx,%08llx)\n",
  2722. hermon, ( 1 << log_num_srqs ), hermon->cap.srqc_entry_size,
  2723. icm_offset, ( icm_offset + len ) );
  2724. icm_offset += len;
  2725. /* Completion queue contexts */
  2726. len = ( ( 1 << log_num_cqs ) * hermon->cap.cqc_entry_size );
  2727. icm_offset = icm_align ( icm_offset, len );
  2728. MLX_FILL_1 ( init_hca, 20,
  2729. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
  2730. ( icm_offset >> 32 ) );
  2731. MLX_FILL_2 ( init_hca, 21,
  2732. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  2733. ( icm_offset >> 5 ),
  2734. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  2735. log_num_cqs );
  2736. DBGC ( hermon, "Hermon %p ICM CQC is %d x %#zx at [%08llx,%08llx)\n",
  2737. hermon, ( 1 << log_num_cqs ), hermon->cap.cqc_entry_size,
  2738. icm_offset, ( icm_offset + len ) );
  2739. icm_offset += len;
  2740. /* Event queue contexts */
  2741. len = ( ( 1 << log_num_eqs ) * hermon->cap.eqc_entry_size );
  2742. icm_offset = icm_align ( icm_offset, len );
  2743. MLX_FILL_1 ( init_hca, 32,
  2744. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
  2745. ( icm_offset >> 32 ) );
  2746. MLX_FILL_2 ( init_hca, 33,
  2747. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  2748. ( icm_offset >> 5 ),
  2749. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
  2750. log_num_eqs );
  2751. DBGC ( hermon, "Hermon %p ICM EQC is %d x %#zx at [%08llx,%08llx)\n",
  2752. hermon, ( 1 << log_num_eqs ), hermon->cap.eqc_entry_size,
  2753. icm_offset, ( icm_offset + len ) );
  2754. icm_offset += len;
  2755. /* Memory translation table */
  2756. len = ( ( 1 << log_num_mtts ) * hermon->cap.mtt_entry_size );
  2757. icm_offset = icm_align ( icm_offset, len );
  2758. MLX_FILL_1 ( init_hca, 64,
  2759. tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
  2760. MLX_FILL_1 ( init_hca, 65,
  2761. tpt_parameters.mtt_base_addr_l, icm_offset );
  2762. DBGC ( hermon, "Hermon %p ICM MTT is %d x %#zx at [%08llx,%08llx)\n",
  2763. hermon, ( 1 << log_num_mtts ), hermon->cap.mtt_entry_size,
  2764. icm_offset, ( icm_offset + len ) );
  2765. icm_offset += len;
  2766. /* Memory protection table */
  2767. len = ( ( 1 << log_num_mpts ) * hermon->cap.dmpt_entry_size );
  2768. icm_offset = icm_align ( icm_offset, len );
  2769. MLX_FILL_1 ( init_hca, 60,
  2770. tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
  2771. MLX_FILL_1 ( init_hca, 61,
  2772. tpt_parameters.dmpt_base_adr_l, icm_offset );
  2773. MLX_FILL_1 ( init_hca, 62,
  2774. tpt_parameters.log_dmpt_sz, log_num_mpts );
  2775. DBGC ( hermon, "Hermon %p ICM DMPT is %d x %#zx at [%08llx,%08llx)\n",
  2776. hermon, ( 1 << log_num_mpts ), hermon->cap.dmpt_entry_size,
  2777. icm_offset, ( icm_offset + len ) );
  2778. icm_offset += len;
  2779. /* Multicast table */
  2780. len = ( ( 1 << log_num_mcs ) * sizeof ( struct hermonprm_mcg_entry ) );
  2781. icm_offset = icm_align ( icm_offset, len );
  2782. MLX_FILL_1 ( init_hca, 48,
  2783. multicast_parameters.mc_base_addr_h,
  2784. ( icm_offset >> 32 ) );
  2785. MLX_FILL_1 ( init_hca, 49,
  2786. multicast_parameters.mc_base_addr_l, icm_offset );
  2787. MLX_FILL_1 ( init_hca, 52,
  2788. multicast_parameters.log_mc_table_entry_sz,
  2789. fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
  2790. MLX_FILL_1 ( init_hca, 53,
  2791. multicast_parameters.log_mc_table_hash_sz, log_num_mcs );
  2792. MLX_FILL_1 ( init_hca, 54,
  2793. multicast_parameters.log_mc_table_sz, log_num_mcs );
  2794. DBGC ( hermon, "Hermon %p ICM MC is %d x %#zx at [%08llx,%08llx)\n",
  2795. hermon, ( 1 << log_num_mcs ),
  2796. sizeof ( struct hermonprm_mcg_entry ),
  2797. icm_offset, ( icm_offset + len ) );
  2798. icm_offset += len;
  2799. hermon->icm_map[HERMON_ICM_OTHER].len =
  2800. ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
  2801. /*
  2802. * Allocate and map physical memory for (portions of) ICM
  2803. *
  2804. * Map is:
  2805. * ICM AUX area (aligned to its own size)
  2806. * cMPT areas
  2807. * Other areas
  2808. */
  2809. /* Calculate physical memory required for ICM */
  2810. icm_len = 0;
  2811. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2812. icm_len += hermon->icm_map[i].len;
  2813. }
  2814. /* Get ICM auxiliary area size */
  2815. memset ( &icm_size, 0, sizeof ( icm_size ) );
  2816. MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
  2817. MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
  2818. if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
  2819. &icm_aux_size ) ) != 0 ) {
  2820. DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
  2821. hermon, strerror ( rc ) );
  2822. goto err_set_icm_size;
  2823. }
  2824. icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
  2825. /* Allocate ICM data and auxiliary area */
  2826. DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
  2827. hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
  2828. hermon->icm = umalloc ( icm_aux_len + icm_len );
  2829. if ( ! hermon->icm ) {
  2830. rc = -ENOMEM;
  2831. goto err_alloc;
  2832. }
  2833. icm_phys = user_to_phys ( hermon->icm, 0 );
  2834. /* Map ICM auxiliary area */
  2835. DBGC ( hermon, "Hermon %p mapping ICM AUX => %08lx\n",
  2836. hermon, icm_phys );
  2837. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm_aux,
  2838. 0, icm_phys, icm_aux_len ) ) != 0 ) {
  2839. DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
  2840. hermon, strerror ( rc ) );
  2841. goto err_map_icm_aux;
  2842. }
  2843. icm_phys += icm_aux_len;
  2844. /* MAP ICM area */
  2845. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2846. DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx => %08lx\n",
  2847. hermon, hermon->icm_map[i].offset,
  2848. hermon->icm_map[i].len, icm_phys );
  2849. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm,
  2850. hermon->icm_map[i].offset,
  2851. icm_phys,
  2852. hermon->icm_map[i].len ) ) != 0 ){
  2853. DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
  2854. hermon, strerror ( rc ) );
  2855. goto err_map_icm;
  2856. }
  2857. icm_phys += hermon->icm_map[i].len;
  2858. }
  2859. return 0;
  2860. err_map_icm:
  2861. assert ( i == 0 ); /* We don't handle partial failure at present */
  2862. err_map_icm_aux:
  2863. hermon_cmd_unmap_icm_aux ( hermon );
  2864. ufree ( hermon->icm );
  2865. hermon->icm = UNULL;
  2866. err_alloc:
  2867. err_set_icm_size:
  2868. return rc;
  2869. }
  2870. /**
  2871. * Free ICM
  2872. *
  2873. * @v hermon Hermon device
  2874. */
  2875. static void hermon_free_icm ( struct hermon *hermon ) {
  2876. struct hermonprm_scalar_parameter unmap_icm;
  2877. int i;
  2878. for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
  2879. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2880. MLX_FILL_1 ( &unmap_icm, 0, value_hi,
  2881. ( hermon->icm_map[i].offset >> 32 ) );
  2882. MLX_FILL_1 ( &unmap_icm, 1, value,
  2883. hermon->icm_map[i].offset );
  2884. hermon_cmd_unmap_icm ( hermon,
  2885. ( 1 << fls ( ( hermon->icm_map[i].len /
  2886. HERMON_PAGE_SIZE ) - 1)),
  2887. &unmap_icm );
  2888. }
  2889. hermon_cmd_unmap_icm_aux ( hermon );
  2890. ufree ( hermon->icm );
  2891. hermon->icm = UNULL;
  2892. }
  2893. /***************************************************************************
  2894. *
  2895. * PCI interface
  2896. *
  2897. ***************************************************************************
  2898. */
  2899. /**
  2900. * Set up memory protection table
  2901. *
  2902. * @v hermon Hermon device
  2903. * @ret rc Return status code
  2904. */
  2905. static int hermon_setup_mpt ( struct hermon *hermon ) {
  2906. struct hermonprm_mpt mpt;
  2907. uint32_t key;
  2908. int rc;
  2909. /* Derive key */
  2910. key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
  2911. hermon->lkey = ( ( key << 8 ) | ( key >> 24 ) );
  2912. /* Initialise memory protection table */
  2913. memset ( &mpt, 0, sizeof ( mpt ) );
  2914. MLX_FILL_7 ( &mpt, 0,
  2915. atomic, 1,
  2916. rw, 1,
  2917. rr, 1,
  2918. lw, 1,
  2919. lr, 1,
  2920. pa, 1,
  2921. r_w, 1 );
  2922. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  2923. MLX_FILL_1 ( &mpt, 3,
  2924. pd, HERMON_GLOBAL_PD );
  2925. MLX_FILL_1 ( &mpt, 10, len64, 1 );
  2926. if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
  2927. hermon->cap.reserved_mrws,
  2928. &mpt ) ) != 0 ) {
  2929. DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
  2930. hermon, strerror ( rc ) );
  2931. return rc;
  2932. }
  2933. return 0;
  2934. }
  2935. /**
  2936. * Configure special queue pairs
  2937. *
  2938. * @v hermon Hermon device
  2939. * @ret rc Return status code
  2940. */
  2941. static int hermon_configure_special_qps ( struct hermon *hermon ) {
  2942. int rc;
  2943. /* Special QP block must be aligned on its own size */
  2944. hermon->special_qpn_base = ( ( hermon->cap.reserved_qps +
  2945. HERMON_NUM_SPECIAL_QPS - 1 )
  2946. & ~( HERMON_NUM_SPECIAL_QPS - 1 ) );
  2947. hermon->qpn_base = ( hermon->special_qpn_base +
  2948. HERMON_NUM_SPECIAL_QPS );
  2949. DBGC ( hermon, "Hermon %p special QPs at [%lx,%lx]\n", hermon,
  2950. hermon->special_qpn_base, ( hermon->qpn_base - 1 ) );
  2951. /* Issue command to configure special QPs */
  2952. if ( ( rc = hermon_cmd_conf_special_qp ( hermon, 0x00,
  2953. hermon->special_qpn_base ) ) != 0 ) {
  2954. DBGC ( hermon, "Hermon %p could not configure special QPs: "
  2955. "%s\n", hermon, strerror ( rc ) );
  2956. return rc;
  2957. }
  2958. return 0;
  2959. }
  2960. /**
  2961. * Reset device
  2962. *
  2963. * @v hermon Hermon device
  2964. * @v pci PCI device
  2965. */
  2966. static void hermon_reset ( struct hermon *hermon,
  2967. struct pci_device *pci ) {
  2968. struct pci_config_backup backup;
  2969. static const uint8_t backup_exclude[] =
  2970. PCI_CONFIG_BACKUP_EXCLUDE ( 0x58, 0x5c );
  2971. pci_backup ( pci, &backup, backup_exclude );
  2972. writel ( HERMON_RESET_MAGIC,
  2973. ( hermon->config + HERMON_RESET_OFFSET ) );
  2974. mdelay ( HERMON_RESET_WAIT_TIME_MS );
  2975. pci_restore ( pci, &backup, backup_exclude );
  2976. }
  2977. /**
  2978. * Probe PCI device
  2979. *
  2980. * @v pci PCI device
  2981. * @v id PCI ID
  2982. * @ret rc Return status code
  2983. */
  2984. static int hermon_probe ( struct pci_device *pci,
  2985. const struct pci_device_id *id __unused ) {
  2986. struct hermon *hermon;
  2987. struct ib_device *ibdev;
  2988. struct net_device *netdev;
  2989. struct hermon_port *port;
  2990. struct hermonprm_init_hca init_hca;
  2991. unsigned int i;
  2992. int rc;
  2993. /* Allocate Hermon device */
  2994. hermon = zalloc ( sizeof ( *hermon ) );
  2995. if ( ! hermon ) {
  2996. rc = -ENOMEM;
  2997. goto err_alloc_hermon;
  2998. }
  2999. pci_set_drvdata ( pci, hermon );
  3000. /* Fix up PCI device */
  3001. adjust_pci_device ( pci );
  3002. /* Get PCI BARs */
  3003. hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR),
  3004. HERMON_PCI_CONFIG_BAR_SIZE );
  3005. hermon->uar = ioremap ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ),
  3006. HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE );
  3007. /* Reset device */
  3008. hermon_reset ( hermon, pci );
  3009. /* Allocate space for mailboxes */
  3010. hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
  3011. HERMON_MBOX_ALIGN );
  3012. if ( ! hermon->mailbox_in ) {
  3013. rc = -ENOMEM;
  3014. goto err_mailbox_in;
  3015. }
  3016. hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
  3017. HERMON_MBOX_ALIGN );
  3018. if ( ! hermon->mailbox_out ) {
  3019. rc = -ENOMEM;
  3020. goto err_mailbox_out;
  3021. }
  3022. /* Start firmware */
  3023. if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
  3024. goto err_start_firmware;
  3025. /* Get device limits */
  3026. if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
  3027. goto err_get_cap;
  3028. /* Allocate Infiniband devices */
  3029. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3030. ibdev = alloc_ibdev ( 0 );
  3031. if ( ! ibdev ) {
  3032. rc = -ENOMEM;
  3033. goto err_alloc_ibdev;
  3034. }
  3035. hermon->port[i].ibdev = ibdev;
  3036. ibdev->op = &hermon_ib_operations;
  3037. ibdev->dev = &pci->dev;
  3038. ibdev->port = ( HERMON_PORT_BASE + i );
  3039. ib_set_drvdata ( ibdev, hermon );
  3040. }
  3041. /* Allocate network devices */
  3042. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3043. netdev = alloc_etherdev ( 0 );
  3044. if ( ! netdev ) {
  3045. rc = -ENOMEM;
  3046. goto err_alloc_netdev;
  3047. }
  3048. hermon->port[i].netdev = netdev;
  3049. netdev_init ( netdev, &hermon_eth_operations );
  3050. netdev->dev = &pci->dev;
  3051. netdev->priv = &hermon->port[i];
  3052. }
  3053. /* Allocate ICM */
  3054. memset ( &init_hca, 0, sizeof ( init_hca ) );
  3055. if ( ( rc = hermon_alloc_icm ( hermon, &init_hca ) ) != 0 )
  3056. goto err_alloc_icm;
  3057. /* Initialise HCA */
  3058. MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
  3059. MLX_FILL_1 ( &init_hca, 5, udp, 1 );
  3060. MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
  3061. if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
  3062. DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
  3063. hermon, strerror ( rc ) );
  3064. goto err_init_hca;
  3065. }
  3066. /* Set up memory protection */
  3067. if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
  3068. goto err_setup_mpt;
  3069. for ( i = 0 ; i < hermon->cap.num_ports ; i++ )
  3070. hermon->port[i].ibdev->rdma_key = hermon->lkey;
  3071. /* Set up event queue */
  3072. if ( ( rc = hermon_create_eq ( hermon ) ) != 0 )
  3073. goto err_create_eq;
  3074. /* Configure special QPs */
  3075. if ( ( rc = hermon_configure_special_qps ( hermon ) ) != 0 )
  3076. goto err_conf_special_qps;
  3077. /* Determine port types */
  3078. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3079. port = &hermon->port[i];
  3080. if ( ( rc = hermon_set_port_type ( hermon, port ) ) != 0 )
  3081. goto err_set_port_type;
  3082. }
  3083. /* Register devices */
  3084. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  3085. port = &hermon->port[i];
  3086. if ( ( rc = port->type->register_dev ( hermon, port ) ) != 0 )
  3087. goto err_register;
  3088. }
  3089. return 0;
  3090. i = hermon->cap.num_ports;
  3091. err_register:
  3092. for ( i-- ; ( signed int ) i >= 0 ; i-- ) {
  3093. port = &hermon->port[i];
  3094. port->type->unregister_dev ( hermon, port );
  3095. }
  3096. err_set_port_type:
  3097. err_conf_special_qps:
  3098. hermon_destroy_eq ( hermon );
  3099. err_create_eq:
  3100. err_setup_mpt:
  3101. hermon_cmd_close_hca ( hermon );
  3102. err_init_hca:
  3103. hermon_free_icm ( hermon );
  3104. err_alloc_icm:
  3105. i = hermon->cap.num_ports;
  3106. err_alloc_netdev:
  3107. for ( i-- ; ( signed int ) i >= 0 ; i-- ) {
  3108. netdev_nullify ( hermon->port[i].netdev );
  3109. netdev_put ( hermon->port[i].netdev );
  3110. }
  3111. i = hermon->cap.num_ports;
  3112. err_alloc_ibdev:
  3113. for ( i-- ; ( signed int ) i >= 0 ; i-- )
  3114. ibdev_put ( hermon->port[i].ibdev );
  3115. err_get_cap:
  3116. hermon_stop_firmware ( hermon );
  3117. err_start_firmware:
  3118. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  3119. err_mailbox_out:
  3120. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  3121. err_mailbox_in:
  3122. free ( hermon );
  3123. err_alloc_hermon:
  3124. return rc;
  3125. }
  3126. /**
  3127. * Remove PCI device
  3128. *
  3129. * @v pci PCI device
  3130. */
  3131. static void hermon_remove ( struct pci_device *pci ) {
  3132. struct hermon *hermon = pci_get_drvdata ( pci );
  3133. struct hermon_port *port;
  3134. int i;
  3135. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- ) {
  3136. port = &hermon->port[i];
  3137. port->type->unregister_dev ( hermon, port );
  3138. }
  3139. hermon_destroy_eq ( hermon );
  3140. hermon_cmd_close_hca ( hermon );
  3141. hermon_free_icm ( hermon );
  3142. hermon_stop_firmware ( hermon );
  3143. hermon_stop_firmware ( hermon );
  3144. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  3145. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  3146. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- ) {
  3147. netdev_nullify ( hermon->port[i].netdev );
  3148. netdev_put ( hermon->port[i].netdev );
  3149. }
  3150. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
  3151. ibdev_put ( hermon->port[i].ibdev );
  3152. free ( hermon );
  3153. }
  3154. static struct pci_device_id hermon_nics[] = {
  3155. PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver", 0 ),
  3156. PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver", 0 ),
  3157. PCI_ROM ( 0x15b3, 0x6732, "mt26418", "MT26418 HCA driver", 0 ),
  3158. PCI_ROM ( 0x15b3, 0x673c, "mt26428", "MT26428 HCA driver", 0 ),
  3159. PCI_ROM ( 0x15b3, 0x6746, "mt26438", "MT26438 HCA driver", 0 ),
  3160. PCI_ROM ( 0x15b3, 0x6778, "mt26488", "MT26488 HCA driver", 0 ),
  3161. PCI_ROM ( 0x15b3, 0x6368, "mt25448", "MT25448 HCA driver", 0 ),
  3162. PCI_ROM ( 0x15b3, 0x6750, "mt26448", "MT26448 HCA driver", 0 ),
  3163. PCI_ROM ( 0x15b3, 0x6372, "mt25458", "MT25458 HCA driver", 0 ),
  3164. PCI_ROM ( 0x15b3, 0x675a, "mt26458", "MT26458 HCA driver", 0 ),
  3165. PCI_ROM ( 0x15b3, 0x6764, "mt26468", "MT26468 HCA driver", 0 ),
  3166. PCI_ROM ( 0x15b3, 0x676e, "mt26478", "MT26478 HCA driver", 0 ),
  3167. };
  3168. struct pci_driver hermon_driver __pci_driver = {
  3169. .ids = hermon_nics,
  3170. .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
  3171. .probe = hermon_probe,
  3172. .remove = hermon_remove,
  3173. };