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ehci.c 50KB

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  1. /*
  2. * Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of the
  7. * License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17. * 02110-1301, USA.
  18. *
  19. * You can also choose to distribute this program under the terms of
  20. * the Unmodified Binary Distribution Licence (as given in the file
  21. * COPYING.UBDL), provided that you have satisfied its requirements.
  22. */
  23. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  24. #include <stdlib.h>
  25. #include <unistd.h>
  26. #include <string.h>
  27. #include <strings.h>
  28. #include <errno.h>
  29. #include <byteswap.h>
  30. #include <ipxe/malloc.h>
  31. #include <ipxe/pci.h>
  32. #include <ipxe/usb.h>
  33. #include <ipxe/init.h>
  34. #include "ehci.h"
  35. /** @file
  36. *
  37. * USB Enhanced Host Controller Interface (EHCI) driver
  38. *
  39. */
  40. /**
  41. * Construct error code from transfer descriptor status
  42. *
  43. * @v status Transfer descriptor status
  44. * @ret rc Error code
  45. *
  46. * Bits 2-5 of the status code provide some indication as to the root
  47. * cause of the error. We incorporate these into the error code as
  48. * reported to usb_complete_err().
  49. */
  50. #define EIO_STATUS( status ) EUNIQ ( EINFO_EIO, ( ( (status) >> 2 ) & 0xf ) )
  51. /******************************************************************************
  52. *
  53. * Register access
  54. *
  55. ******************************************************************************
  56. */
  57. /**
  58. * Initialise device
  59. *
  60. * @v ehci EHCI device
  61. * @v regs MMIO registers
  62. */
  63. static void ehci_init ( struct ehci_device *ehci, void *regs ) {
  64. uint32_t hcsparams;
  65. uint32_t hccparams;
  66. size_t caplength;
  67. /* Locate capability and operational registers */
  68. ehci->cap = regs;
  69. caplength = readb ( ehci->cap + EHCI_CAP_CAPLENGTH );
  70. ehci->op = ( ehci->cap + caplength );
  71. DBGC2 ( ehci, "EHCI %s cap %08lx op %08lx\n", ehci->name,
  72. virt_to_phys ( ehci->cap ), virt_to_phys ( ehci->op ) );
  73. /* Read structural parameters */
  74. hcsparams = readl ( ehci->cap + EHCI_CAP_HCSPARAMS );
  75. ehci->ports = EHCI_HCSPARAMS_PORTS ( hcsparams );
  76. DBGC ( ehci, "EHCI %s has %d ports\n", ehci->name, ehci->ports );
  77. /* Read capability parameters 1 */
  78. hccparams = readl ( ehci->cap + EHCI_CAP_HCCPARAMS );
  79. ehci->addr64 = EHCI_HCCPARAMS_ADDR64 ( hccparams );
  80. ehci->flsize = ( EHCI_HCCPARAMS_FLSIZE ( hccparams ) ?
  81. EHCI_FLSIZE_SMALL : EHCI_FLSIZE_DEFAULT );
  82. ehci->eecp = EHCI_HCCPARAMS_EECP ( hccparams );
  83. DBGC2 ( ehci, "EHCI %s %d-bit flsize %d\n", ehci->name,
  84. ( ehci->addr64 ? 64 : 32 ), ehci->flsize );
  85. }
  86. /**
  87. * Find extended capability
  88. *
  89. * @v ehci EHCI device
  90. * @v pci PCI device
  91. * @v id Capability ID
  92. * @v offset Offset to previous extended capability instance, or zero
  93. * @ret offset Offset to extended capability, or zero if not found
  94. */
  95. static unsigned int ehci_extended_capability ( struct ehci_device *ehci,
  96. struct pci_device *pci,
  97. unsigned int id,
  98. unsigned int offset ) {
  99. uint32_t eecp;
  100. /* Locate the extended capability */
  101. while ( 1 ) {
  102. /* Locate first or next capability as applicable */
  103. if ( offset ) {
  104. pci_read_config_dword ( pci, offset, &eecp );
  105. offset = EHCI_EECP_NEXT ( eecp );
  106. } else {
  107. offset = ehci->eecp;
  108. }
  109. if ( ! offset )
  110. return 0;
  111. /* Check if this is the requested capability */
  112. pci_read_config_dword ( pci, offset, &eecp );
  113. if ( EHCI_EECP_ID ( eecp ) == id )
  114. return offset;
  115. }
  116. }
  117. /**
  118. * Calculate buffer alignment
  119. *
  120. * @v len Length
  121. * @ret align Buffer alignment
  122. *
  123. * Determine alignment required for a buffer which must be aligned to
  124. * at least EHCI_MIN_ALIGN and which must not cross a page boundary.
  125. */
  126. static inline size_t ehci_align ( size_t len ) {
  127. size_t align;
  128. /* Align to own length (rounded up to a power of two) */
  129. align = ( 1 << fls ( len - 1 ) );
  130. /* Round up to EHCI_MIN_ALIGN if needed */
  131. if ( align < EHCI_MIN_ALIGN )
  132. align = EHCI_MIN_ALIGN;
  133. return align;
  134. }
  135. /**
  136. * Check control data structure reachability
  137. *
  138. * @v ehci EHCI device
  139. * @v ptr Data structure pointer
  140. * @ret rc Return status code
  141. */
  142. static int ehci_ctrl_reachable ( struct ehci_device *ehci, void *ptr ) {
  143. physaddr_t phys = virt_to_phys ( ptr );
  144. uint32_t segment;
  145. /* Always reachable in a 32-bit build */
  146. if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
  147. return 0;
  148. /* Reachable only if control segment matches in a 64-bit build */
  149. segment = ( ( ( uint64_t ) phys ) >> 32 );
  150. if ( segment == ehci->ctrldssegment )
  151. return 0;
  152. return -ENOTSUP;
  153. }
  154. /******************************************************************************
  155. *
  156. * USB legacy support
  157. *
  158. ******************************************************************************
  159. */
  160. /** Prevent the release of ownership back to BIOS */
  161. static int ehci_legacy_prevent_release;
  162. /**
  163. * Initialise USB legacy support
  164. *
  165. * @v ehci EHCI device
  166. * @v pci PCI device
  167. */
  168. static void ehci_legacy_init ( struct ehci_device *ehci,
  169. struct pci_device *pci ) {
  170. unsigned int legacy;
  171. uint8_t bios;
  172. /* Locate USB legacy support capability (if present) */
  173. legacy = ehci_extended_capability ( ehci, pci, EHCI_EECP_ID_LEGACY, 0 );
  174. if ( ! legacy ) {
  175. /* Not an error; capability may not be present */
  176. DBGC ( ehci, "EHCI %s has no USB legacy support capability\n",
  177. ehci->name );
  178. return;
  179. }
  180. /* Check if legacy USB support is enabled */
  181. pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ), &bios );
  182. if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
  183. /* Not an error; already owned by OS */
  184. DBGC ( ehci, "EHCI %s USB legacy support already disabled\n",
  185. ehci->name );
  186. return;
  187. }
  188. /* Record presence of USB legacy support capability */
  189. ehci->legacy = legacy;
  190. }
  191. /**
  192. * Claim ownership from BIOS
  193. *
  194. * @v ehci EHCI device
  195. * @v pci PCI device
  196. */
  197. static void ehci_legacy_claim ( struct ehci_device *ehci,
  198. struct pci_device *pci ) {
  199. unsigned int legacy = ehci->legacy;
  200. uint32_t ctlsts;
  201. uint8_t bios;
  202. unsigned int i;
  203. /* Do nothing unless legacy support capability is present */
  204. if ( ! legacy )
  205. return;
  206. /* Claim ownership */
  207. pci_write_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_OS ),
  208. EHCI_USBLEGSUP_OS_OWNED );
  209. /* Wait for BIOS to release ownership */
  210. for ( i = 0 ; i < EHCI_USBLEGSUP_MAX_WAIT_MS ; i++ ) {
  211. /* Check if BIOS has released ownership */
  212. pci_read_config_byte ( pci, ( legacy + EHCI_USBLEGSUP_BIOS ),
  213. &bios );
  214. if ( ! ( bios & EHCI_USBLEGSUP_BIOS_OWNED ) ) {
  215. DBGC ( ehci, "EHCI %s claimed ownership from BIOS\n",
  216. ehci->name );
  217. pci_read_config_dword ( pci, ( legacy +
  218. EHCI_USBLEGSUP_CTLSTS ),
  219. &ctlsts );
  220. if ( ctlsts ) {
  221. DBGC ( ehci, "EHCI %s warning: BIOS retained "
  222. "SMIs: %08x\n", ehci->name, ctlsts );
  223. }
  224. return;
  225. }
  226. /* Delay */
  227. mdelay ( 1 );
  228. }
  229. /* BIOS did not release ownership. Claim it forcibly by
  230. * disabling all SMIs.
  231. */
  232. DBGC ( ehci, "EHCI %s could not claim ownership from BIOS: forcibly "
  233. "disabling SMIs\n", ehci->name );
  234. pci_write_config_dword ( pci, ( legacy + EHCI_USBLEGSUP_CTLSTS ), 0 );
  235. }
  236. /**
  237. * Release ownership back to BIOS
  238. *
  239. * @v ehci EHCI device
  240. * @v pci PCI device
  241. */
  242. static void ehci_legacy_release ( struct ehci_device *ehci,
  243. struct pci_device *pci ) {
  244. /* Do nothing unless legacy support capability is present */
  245. if ( ! ehci->legacy )
  246. return;
  247. /* Do nothing if releasing ownership is prevented */
  248. if ( ehci_legacy_prevent_release ) {
  249. DBGC ( ehci, "EHCI %s not releasing ownership to BIOS\n",
  250. ehci->name );
  251. return;
  252. }
  253. /* Release ownership */
  254. pci_write_config_byte ( pci, ( ehci->legacy + EHCI_USBLEGSUP_OS ), 0 );
  255. DBGC ( ehci, "EHCI %s released ownership to BIOS\n", ehci->name );
  256. }
  257. /******************************************************************************
  258. *
  259. * Companion controllers
  260. *
  261. ******************************************************************************
  262. */
  263. /**
  264. * Poll child companion controllers
  265. *
  266. * @v ehci EHCI device
  267. */
  268. static void ehci_poll_companions ( struct ehci_device *ehci ) {
  269. struct usb_bus *bus;
  270. struct device_description *desc;
  271. /* Poll any USB buses belonging to child companion controllers */
  272. for_each_usb_bus ( bus ) {
  273. /* Get underlying devices description */
  274. desc = &bus->dev->desc;
  275. /* Skip buses that are not PCI devices */
  276. if ( desc->bus_type != BUS_TYPE_PCI )
  277. continue;
  278. /* Skip buses that are not part of the same PCI device */
  279. if ( PCI_FIRST_FUNC ( desc->location ) !=
  280. PCI_FIRST_FUNC ( ehci->bus->dev->desc.location ) )
  281. continue;
  282. /* Skip buses that are not UHCI or OHCI PCI devices */
  283. if ( ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
  284. PCI_CLASS_SERIAL_USB,
  285. PCI_CLASS_SERIAL_USB_UHCI ))&&
  286. ( desc->class != PCI_CLASS ( PCI_CLASS_SERIAL,
  287. PCI_CLASS_SERIAL_USB,
  288. PCI_CLASS_SERIAL_USB_OHCI ) ))
  289. continue;
  290. /* Poll child companion controller bus */
  291. DBGC2 ( ehci, "EHCI %s polling companion %s\n",
  292. ehci->name, bus->name );
  293. usb_poll ( bus );
  294. }
  295. }
  296. /**
  297. * Locate EHCI companion controller
  298. *
  299. * @v pci PCI device
  300. * @ret busdevfn EHCI companion controller bus:dev.fn (if any)
  301. */
  302. unsigned int ehci_companion ( struct pci_device *pci ) {
  303. struct pci_device tmp;
  304. unsigned int busdevfn;
  305. int rc;
  306. /* Look for an EHCI function on the same PCI device */
  307. busdevfn = pci->busdevfn;
  308. while ( ++busdevfn <= PCI_LAST_FUNC ( pci->busdevfn ) ) {
  309. pci_init ( &tmp, busdevfn );
  310. if ( ( rc = pci_read_config ( &tmp ) ) != 0 )
  311. continue;
  312. if ( tmp.class == PCI_CLASS ( PCI_CLASS_SERIAL,
  313. PCI_CLASS_SERIAL_USB,
  314. PCI_CLASS_SERIAL_USB_EHCI ) )
  315. return busdevfn;
  316. }
  317. return 0;
  318. }
  319. /******************************************************************************
  320. *
  321. * Run / stop / reset
  322. *
  323. ******************************************************************************
  324. */
  325. /**
  326. * Start EHCI device
  327. *
  328. * @v ehci EHCI device
  329. */
  330. static void ehci_run ( struct ehci_device *ehci ) {
  331. uint32_t usbcmd;
  332. /* Set run/stop bit */
  333. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  334. usbcmd &= ~EHCI_USBCMD_FLSIZE_MASK;
  335. usbcmd |= ( EHCI_USBCMD_RUN | EHCI_USBCMD_FLSIZE ( ehci->flsize ) |
  336. EHCI_USBCMD_PERIODIC | EHCI_USBCMD_ASYNC );
  337. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  338. }
  339. /**
  340. * Stop EHCI device
  341. *
  342. * @v ehci EHCI device
  343. * @ret rc Return status code
  344. */
  345. static int ehci_stop ( struct ehci_device *ehci ) {
  346. uint32_t usbcmd;
  347. uint32_t usbsts;
  348. unsigned int i;
  349. /* Clear run/stop bit */
  350. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  351. usbcmd &= ~( EHCI_USBCMD_RUN | EHCI_USBCMD_PERIODIC |
  352. EHCI_USBCMD_ASYNC );
  353. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  354. /* Wait for device to stop */
  355. for ( i = 0 ; i < EHCI_STOP_MAX_WAIT_MS ; i++ ) {
  356. /* Check if device is stopped */
  357. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  358. if ( usbsts & EHCI_USBSTS_HCH )
  359. return 0;
  360. /* Delay */
  361. mdelay ( 1 );
  362. }
  363. DBGC ( ehci, "EHCI %s timed out waiting for stop\n", ehci->name );
  364. return -ETIMEDOUT;
  365. }
  366. /**
  367. * Reset EHCI device
  368. *
  369. * @v ehci EHCI device
  370. * @ret rc Return status code
  371. */
  372. static int ehci_reset ( struct ehci_device *ehci ) {
  373. uint32_t usbcmd;
  374. unsigned int i;
  375. int rc;
  376. /* The EHCI specification states that resetting a running
  377. * device may result in undefined behaviour, so try stopping
  378. * it first.
  379. */
  380. if ( ( rc = ehci_stop ( ehci ) ) != 0 ) {
  381. /* Ignore errors and attempt to reset the device anyway */
  382. }
  383. /* Reset device */
  384. writel ( EHCI_USBCMD_HCRST, ehci->op + EHCI_OP_USBCMD );
  385. /* Wait for reset to complete */
  386. for ( i = 0 ; i < EHCI_RESET_MAX_WAIT_MS ; i++ ) {
  387. /* Check if reset is complete */
  388. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  389. if ( ! ( usbcmd & EHCI_USBCMD_HCRST ) )
  390. return 0;
  391. /* Delay */
  392. mdelay ( 1 );
  393. }
  394. DBGC ( ehci, "EHCI %s timed out waiting for reset\n", ehci->name );
  395. return -ETIMEDOUT;
  396. }
  397. /******************************************************************************
  398. *
  399. * Transfer descriptor rings
  400. *
  401. ******************************************************************************
  402. */
  403. /**
  404. * Allocate transfer descriptor ring
  405. *
  406. * @v ehci EHCI device
  407. * @v ring Transfer descriptor ring
  408. * @ret rc Return status code
  409. */
  410. static int ehci_ring_alloc ( struct ehci_device *ehci,
  411. struct ehci_ring *ring ) {
  412. struct ehci_transfer_descriptor *desc;
  413. struct ehci_transfer_descriptor *next;
  414. unsigned int i;
  415. size_t len;
  416. uint32_t link;
  417. int rc;
  418. /* Initialise structure */
  419. memset ( ring, 0, sizeof ( *ring ) );
  420. /* Allocate I/O buffers */
  421. ring->iobuf = zalloc ( EHCI_RING_COUNT * sizeof ( ring->iobuf[0] ) );
  422. if ( ! ring->iobuf ) {
  423. rc = -ENOMEM;
  424. goto err_alloc_iobuf;
  425. }
  426. /* Allocate queue head */
  427. ring->head = malloc_dma ( sizeof ( *ring->head ),
  428. ehci_align ( sizeof ( *ring->head ) ) );
  429. if ( ! ring->head ) {
  430. rc = -ENOMEM;
  431. goto err_alloc_queue;
  432. }
  433. if ( ( rc = ehci_ctrl_reachable ( ehci, ring->head ) ) != 0 ) {
  434. DBGC ( ehci, "EHCI %s queue head unreachable\n", ehci->name );
  435. goto err_unreachable_queue;
  436. }
  437. memset ( ring->head, 0, sizeof ( *ring->head ) );
  438. /* Allocate transfer descriptors */
  439. len = ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) );
  440. ring->desc = malloc_dma ( len, sizeof ( ring->desc[0] ) );
  441. if ( ! ring->desc ) {
  442. rc = -ENOMEM;
  443. goto err_alloc_desc;
  444. }
  445. memset ( ring->desc, 0, len );
  446. /* Initialise transfer descriptors */
  447. for ( i = 0 ; i < EHCI_RING_COUNT ; i++ ) {
  448. desc = &ring->desc[i];
  449. if ( ( rc = ehci_ctrl_reachable ( ehci, desc ) ) != 0 ) {
  450. DBGC ( ehci, "EHCI %s descriptor unreachable\n",
  451. ehci->name );
  452. goto err_unreachable_desc;
  453. }
  454. next = &ring->desc[ ( i + 1 ) % EHCI_RING_COUNT ];
  455. link = virt_to_phys ( next );
  456. desc->next = cpu_to_le32 ( link );
  457. desc->alt = cpu_to_le32 ( link );
  458. }
  459. /* Initialise queue head */
  460. link = virt_to_phys ( &ring->desc[0] );
  461. ring->head->cache.next = cpu_to_le32 ( link );
  462. return 0;
  463. err_unreachable_desc:
  464. free_dma ( ring->desc, len );
  465. err_alloc_desc:
  466. err_unreachable_queue:
  467. free_dma ( ring->head, sizeof ( *ring->head ) );
  468. err_alloc_queue:
  469. free ( ring->iobuf );
  470. err_alloc_iobuf:
  471. return rc;
  472. }
  473. /**
  474. * Free transfer descriptor ring
  475. *
  476. * @v ring Transfer descriptor ring
  477. */
  478. static void ehci_ring_free ( struct ehci_ring *ring ) {
  479. unsigned int i;
  480. /* Sanity checks */
  481. assert ( ehci_ring_fill ( ring ) == 0 );
  482. for ( i = 0 ; i < EHCI_RING_COUNT ; i++ )
  483. assert ( ring->iobuf[i] == NULL );
  484. /* Free transfer descriptors */
  485. free_dma ( ring->desc, ( EHCI_RING_COUNT * sizeof ( ring->desc[0] ) ) );
  486. /* Free queue head */
  487. free_dma ( ring->head, sizeof ( *ring->head ) );
  488. /* Free I/O buffers */
  489. free ( ring->iobuf );
  490. }
  491. /**
  492. * Enqueue transfer descriptors
  493. *
  494. * @v ehci EHCI device
  495. * @v ring Transfer descriptor ring
  496. * @v iobuf I/O buffer
  497. * @v xfers Transfers
  498. * @v count Number of transfers
  499. * @ret rc Return status code
  500. */
  501. static int ehci_enqueue ( struct ehci_device *ehci, struct ehci_ring *ring,
  502. struct io_buffer *iobuf,
  503. const struct ehci_transfer *xfer,
  504. unsigned int count ) {
  505. struct ehci_transfer_descriptor *desc;
  506. physaddr_t phys;
  507. void *data;
  508. size_t len;
  509. size_t offset;
  510. size_t frag_len;
  511. unsigned int toggle;
  512. unsigned int index;
  513. unsigned int i;
  514. /* Sanity check */
  515. assert ( iobuf != NULL );
  516. assert ( count > 0 );
  517. /* Fail if ring does not have sufficient space */
  518. if ( ehci_ring_remaining ( ring ) < count )
  519. return -ENOBUFS;
  520. /* Fail if any portion is unreachable */
  521. for ( i = 0 ; i < count ; i++ ) {
  522. phys = ( virt_to_phys ( xfer[i].data ) + xfer[i].len - 1 );
  523. if ( ( phys > 0xffffffffUL ) && ( ! ehci->addr64 ) )
  524. return -ENOTSUP;
  525. }
  526. /* Enqueue each transfer, recording the I/O buffer with the last */
  527. for ( ; count ; ring->prod++, xfer++ ) {
  528. /* Populate descriptor header */
  529. index = ( ring->prod % EHCI_RING_COUNT );
  530. desc = &ring->desc[index];
  531. toggle = ( xfer->flags & EHCI_FL_TOGGLE );
  532. assert ( xfer->len <= EHCI_LEN_MASK );
  533. assert ( EHCI_FL_TOGGLE == EHCI_LEN_TOGGLE );
  534. desc->len = cpu_to_le16 ( xfer->len | toggle );
  535. desc->flags = ( xfer->flags | EHCI_FL_CERR_MAX );
  536. /* Populate buffer pointers */
  537. data = xfer->data;
  538. len = xfer->len;
  539. for ( i = 0 ; len ; i++ ) {
  540. /* Calculate length of this fragment */
  541. phys = virt_to_phys ( data );
  542. offset = ( phys & ( EHCI_PAGE_ALIGN - 1 ) );
  543. frag_len = ( EHCI_PAGE_ALIGN - offset );
  544. if ( frag_len > len )
  545. frag_len = len;
  546. /* Sanity checks */
  547. assert ( ( i == 0 ) || ( offset == 0 ) );
  548. assert ( i < ( sizeof ( desc->low ) /
  549. sizeof ( desc->low[0] ) ) );
  550. /* Populate buffer pointer */
  551. desc->low[i] = cpu_to_le32 ( phys );
  552. if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
  553. desc->high[i] =
  554. cpu_to_le32 ( ((uint64_t) phys) >> 32 );
  555. }
  556. /* Move to next fragment */
  557. data += frag_len;
  558. len -= frag_len;
  559. }
  560. /* Ensure everything is valid before activating descriptor */
  561. wmb();
  562. desc->status = EHCI_STATUS_ACTIVE;
  563. /* Record I/O buffer against last ring index */
  564. if ( --count == 0 )
  565. ring->iobuf[index] = iobuf;
  566. }
  567. return 0;
  568. }
  569. /**
  570. * Dequeue a transfer descriptor
  571. *
  572. * @v ring Transfer descriptor ring
  573. * @ret iobuf I/O buffer (or NULL)
  574. */
  575. static struct io_buffer * ehci_dequeue ( struct ehci_ring *ring ) {
  576. struct ehci_transfer_descriptor *desc;
  577. struct io_buffer *iobuf;
  578. unsigned int index = ( ring->cons % EHCI_RING_COUNT );
  579. /* Sanity check */
  580. assert ( ehci_ring_fill ( ring ) > 0 );
  581. /* Mark descriptor as inactive (and not halted) */
  582. desc = &ring->desc[index];
  583. desc->status = 0;
  584. /* Retrieve I/O buffer */
  585. iobuf = ring->iobuf[index];
  586. ring->iobuf[index] = NULL;
  587. /* Update consumer counter */
  588. ring->cons++;
  589. return iobuf;
  590. }
  591. /******************************************************************************
  592. *
  593. * Schedule management
  594. *
  595. ******************************************************************************
  596. */
  597. /**
  598. * Get link value for a queue head
  599. *
  600. * @v queue Queue head
  601. * @ret link Link value
  602. */
  603. static inline uint32_t ehci_link_qh ( struct ehci_queue_head *queue ) {
  604. return ( virt_to_phys ( queue ) | EHCI_LINK_TYPE_QH );
  605. }
  606. /**
  607. * (Re)build asynchronous schedule
  608. *
  609. * @v ehci EHCI device
  610. */
  611. static void ehci_async_schedule ( struct ehci_device *ehci ) {
  612. struct ehci_endpoint *endpoint;
  613. struct ehci_queue_head *queue;
  614. uint32_t link;
  615. /* Build schedule in reverse order of execution. Provided
  616. * that we only ever add or remove single endpoints, this can
  617. * safely run concurrently with hardware execution of the
  618. * schedule.
  619. */
  620. link = ehci_link_qh ( ehci->head );
  621. list_for_each_entry_reverse ( endpoint, &ehci->async, schedule ) {
  622. queue = endpoint->ring.head;
  623. queue->link = cpu_to_le32 ( link );
  624. wmb();
  625. link = ehci_link_qh ( queue );
  626. }
  627. ehci->head->link = cpu_to_le32 ( link );
  628. wmb();
  629. }
  630. /**
  631. * Add endpoint to asynchronous schedule
  632. *
  633. * @v endpoint Endpoint
  634. */
  635. static void ehci_async_add ( struct ehci_endpoint *endpoint ) {
  636. struct ehci_device *ehci = endpoint->ehci;
  637. /* Add to end of schedule */
  638. list_add_tail ( &endpoint->schedule, &ehci->async );
  639. /* Rebuild schedule */
  640. ehci_async_schedule ( ehci );
  641. }
  642. /**
  643. * Remove endpoint from asynchronous schedule
  644. *
  645. * @v endpoint Endpoint
  646. * @ret rc Return status code
  647. */
  648. static int ehci_async_del ( struct ehci_endpoint *endpoint ) {
  649. struct ehci_device *ehci = endpoint->ehci;
  650. uint32_t usbcmd;
  651. uint32_t usbsts;
  652. unsigned int i;
  653. /* Remove from schedule */
  654. list_check_contains_entry ( endpoint, &ehci->async, schedule );
  655. list_del ( &endpoint->schedule );
  656. /* Rebuild schedule */
  657. ehci_async_schedule ( ehci );
  658. /* Request notification when asynchronous schedule advances */
  659. usbcmd = readl ( ehci->op + EHCI_OP_USBCMD );
  660. usbcmd |= EHCI_USBCMD_ASYNC_ADVANCE;
  661. writel ( usbcmd, ehci->op + EHCI_OP_USBCMD );
  662. /* Wait for asynchronous schedule to advance */
  663. for ( i = 0 ; i < EHCI_ASYNC_ADVANCE_MAX_WAIT_MS ; i++ ) {
  664. /* Check for asynchronous schedule advancing */
  665. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  666. if ( usbsts & EHCI_USBSTS_ASYNC_ADVANCE ) {
  667. usbsts &= ~EHCI_USBSTS_CHANGE;
  668. usbsts |= EHCI_USBSTS_ASYNC_ADVANCE;
  669. writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
  670. return 0;
  671. }
  672. /* Delay */
  673. mdelay ( 1 );
  674. }
  675. /* Bad things will probably happen now */
  676. DBGC ( ehci, "EHCI %s timed out waiting for asynchronous schedule "
  677. "to advance\n", ehci->name );
  678. return -ETIMEDOUT;
  679. }
  680. /**
  681. * (Re)build periodic schedule
  682. *
  683. * @v ehci EHCI device
  684. */
  685. static void ehci_periodic_schedule ( struct ehci_device *ehci ) {
  686. struct ehci_endpoint *endpoint;
  687. struct ehci_queue_head *queue;
  688. uint32_t link;
  689. unsigned int frames;
  690. unsigned int max_interval;
  691. unsigned int i;
  692. /* Build schedule in reverse order of execution. Provided
  693. * that we only ever add or remove single endpoints, this can
  694. * safely run concurrently with hardware execution of the
  695. * schedule.
  696. */
  697. DBGCP ( ehci, "EHCI %s periodic schedule: ", ehci->name );
  698. link = EHCI_LINK_TERMINATE;
  699. list_for_each_entry_reverse ( endpoint, &ehci->periodic, schedule ) {
  700. queue = endpoint->ring.head;
  701. queue->link = cpu_to_le32 ( link );
  702. wmb();
  703. DBGCP ( ehci, "%s%d",
  704. ( ( link == EHCI_LINK_TERMINATE ) ? "" : "<-" ),
  705. endpoint->ep->interval );
  706. link = ehci_link_qh ( queue );
  707. }
  708. DBGCP ( ehci, "\n" );
  709. /* Populate periodic frame list */
  710. DBGCP ( ehci, "EHCI %s periodic frame list:", ehci->name );
  711. frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  712. for ( i = 0 ; i < frames ; i++ ) {
  713. /* Calculate maximum interval (in microframes) which
  714. * may appear as part of this frame list.
  715. */
  716. if ( i == 0 ) {
  717. /* Start of list: include all endpoints */
  718. max_interval = -1U;
  719. } else {
  720. /* Calculate highest power-of-two frame interval */
  721. max_interval = ( 1 << ( ffs ( i ) - 1 ) );
  722. /* Convert to microframes */
  723. max_interval <<= 3;
  724. /* Round up to nearest 2^n-1 */
  725. max_interval = ( ( max_interval << 1 ) - 1 );
  726. }
  727. /* Find first endpoint in schedule satisfying this
  728. * maximum interval constraint.
  729. */
  730. link = EHCI_LINK_TERMINATE;
  731. list_for_each_entry ( endpoint, &ehci->periodic, schedule ) {
  732. if ( endpoint->ep->interval <= max_interval ) {
  733. queue = endpoint->ring.head;
  734. link = ehci_link_qh ( queue );
  735. DBGCP ( ehci, " %d:%d",
  736. i, endpoint->ep->interval );
  737. break;
  738. }
  739. }
  740. ehci->frame[i].link = cpu_to_le32 ( link );
  741. }
  742. wmb();
  743. DBGCP ( ehci, "\n" );
  744. }
  745. /**
  746. * Add endpoint to periodic schedule
  747. *
  748. * @v endpoint Endpoint
  749. */
  750. static void ehci_periodic_add ( struct ehci_endpoint *endpoint ) {
  751. struct ehci_device *ehci = endpoint->ehci;
  752. struct ehci_endpoint *before;
  753. unsigned int interval = endpoint->ep->interval;
  754. /* Find first endpoint with a smaller interval */
  755. list_for_each_entry ( before, &ehci->periodic, schedule ) {
  756. if ( before->ep->interval < interval )
  757. break;
  758. }
  759. list_add_tail ( &endpoint->schedule, &before->schedule );
  760. /* Rebuild schedule */
  761. ehci_periodic_schedule ( ehci );
  762. }
  763. /**
  764. * Remove endpoint from periodic schedule
  765. *
  766. * @v endpoint Endpoint
  767. * @ret rc Return status code
  768. */
  769. static int ehci_periodic_del ( struct ehci_endpoint *endpoint ) {
  770. struct ehci_device *ehci = endpoint->ehci;
  771. /* Remove from schedule */
  772. list_check_contains_entry ( endpoint, &ehci->periodic, schedule );
  773. list_del ( &endpoint->schedule );
  774. /* Rebuild schedule */
  775. ehci_periodic_schedule ( ehci );
  776. /* Delay for a whole USB frame (with a 100% safety margin) */
  777. mdelay ( 2 );
  778. return 0;
  779. }
  780. /**
  781. * Add endpoint to appropriate schedule
  782. *
  783. * @v endpoint Endpoint
  784. */
  785. static void ehci_schedule_add ( struct ehci_endpoint *endpoint ) {
  786. struct usb_endpoint *ep = endpoint->ep;
  787. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  788. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  789. ehci_periodic_add ( endpoint );
  790. } else {
  791. ehci_async_add ( endpoint );
  792. }
  793. }
  794. /**
  795. * Remove endpoint from appropriate schedule
  796. *
  797. * @v endpoint Endpoint
  798. * @ret rc Return status code
  799. */
  800. static int ehci_schedule_del ( struct ehci_endpoint *endpoint ) {
  801. struct usb_endpoint *ep = endpoint->ep;
  802. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  803. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) {
  804. return ehci_periodic_del ( endpoint );
  805. } else {
  806. return ehci_async_del ( endpoint );
  807. }
  808. }
  809. /******************************************************************************
  810. *
  811. * Endpoint operations
  812. *
  813. ******************************************************************************
  814. */
  815. /**
  816. * Determine endpoint characteristics
  817. *
  818. * @v ep USB endpoint
  819. * @ret chr Endpoint characteristics
  820. */
  821. static uint32_t ehci_endpoint_characteristics ( struct usb_endpoint *ep ) {
  822. struct usb_device *usb = ep->usb;
  823. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  824. uint32_t chr;
  825. /* Determine basic characteristics */
  826. chr = ( EHCI_CHR_ADDRESS ( usb->address ) |
  827. EHCI_CHR_ENDPOINT ( ep->address ) |
  828. EHCI_CHR_MAX_LEN ( ep->mtu ) );
  829. /* Control endpoints require manual control of the data toggle */
  830. if ( attr == USB_ENDPOINT_ATTR_CONTROL )
  831. chr |= EHCI_CHR_TOGGLE;
  832. /* Determine endpoint speed */
  833. if ( usb->port->speed == USB_SPEED_HIGH ) {
  834. chr |= EHCI_CHR_EPS_HIGH;
  835. } else {
  836. if ( usb->port->speed == USB_SPEED_FULL ) {
  837. chr |= EHCI_CHR_EPS_FULL;
  838. } else {
  839. chr |= EHCI_CHR_EPS_LOW;
  840. }
  841. if ( attr == USB_ENDPOINT_ATTR_CONTROL )
  842. chr |= EHCI_CHR_CONTROL;
  843. }
  844. return chr;
  845. }
  846. /**
  847. * Determine endpoint capabilities
  848. *
  849. * @v ep USB endpoint
  850. * @ret cap Endpoint capabilities
  851. */
  852. static uint32_t ehci_endpoint_capabilities ( struct usb_endpoint *ep ) {
  853. struct usb_device *usb = ep->usb;
  854. struct usb_port *tt = usb_transaction_translator ( usb );
  855. unsigned int attr = ( ep->attributes & USB_ENDPOINT_ATTR_TYPE_MASK );
  856. uint32_t cap;
  857. unsigned int i;
  858. /* Determine basic capabilities */
  859. cap = EHCI_CAP_MULT ( ep->burst + 1 );
  860. /* Determine interrupt schedule mask, if applicable */
  861. if ( ( attr == USB_ENDPOINT_ATTR_INTERRUPT ) &&
  862. ( ( ep->interval != 0 ) /* avoid infinite loop */ ) ) {
  863. for ( i = 0 ; i < 8 /* microframes per frame */ ;
  864. i += ep->interval ) {
  865. cap |= EHCI_CAP_INTR_SCHED ( i );
  866. }
  867. }
  868. /* Set transaction translator hub address and port, if applicable */
  869. if ( tt ) {
  870. assert ( tt->hub->usb );
  871. cap |= ( EHCI_CAP_TT_HUB ( tt->hub->usb->address ) |
  872. EHCI_CAP_TT_PORT ( tt->address ) );
  873. if ( attr == USB_ENDPOINT_ATTR_INTERRUPT )
  874. cap |= EHCI_CAP_SPLIT_SCHED_DEFAULT;
  875. }
  876. return cap;
  877. }
  878. /**
  879. * Update endpoint characteristics and capabilities
  880. *
  881. * @v ep USB endpoint
  882. */
  883. static void ehci_endpoint_update ( struct usb_endpoint *ep ) {
  884. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  885. struct ehci_queue_head *head;
  886. /* Update queue characteristics and capabilities */
  887. head = endpoint->ring.head;
  888. head->chr = cpu_to_le32 ( ehci_endpoint_characteristics ( ep ) );
  889. head->cap = cpu_to_le32 ( ehci_endpoint_capabilities ( ep ) );
  890. }
  891. /**
  892. * Open endpoint
  893. *
  894. * @v ep USB endpoint
  895. * @ret rc Return status code
  896. */
  897. static int ehci_endpoint_open ( struct usb_endpoint *ep ) {
  898. struct usb_device *usb = ep->usb;
  899. struct ehci_device *ehci = usb_get_hostdata ( usb );
  900. struct ehci_endpoint *endpoint;
  901. int rc;
  902. /* Allocate and initialise structure */
  903. endpoint = zalloc ( sizeof ( *endpoint ) );
  904. if ( ! endpoint ) {
  905. rc = -ENOMEM;
  906. goto err_alloc;
  907. }
  908. endpoint->ehci = ehci;
  909. endpoint->ep = ep;
  910. usb_endpoint_set_hostdata ( ep, endpoint );
  911. /* Initialise descriptor ring */
  912. if ( ( rc = ehci_ring_alloc ( ehci, &endpoint->ring ) ) != 0 )
  913. goto err_ring_alloc;
  914. /* Update queue characteristics and capabilities */
  915. ehci_endpoint_update ( ep );
  916. /* Add to list of endpoints */
  917. list_add_tail ( &endpoint->list, &ehci->endpoints );
  918. /* Add to schedule */
  919. ehci_schedule_add ( endpoint );
  920. return 0;
  921. ehci_ring_free ( &endpoint->ring );
  922. err_ring_alloc:
  923. free ( endpoint );
  924. err_alloc:
  925. return rc;
  926. }
  927. /**
  928. * Close endpoint
  929. *
  930. * @v ep USB endpoint
  931. */
  932. static void ehci_endpoint_close ( struct usb_endpoint *ep ) {
  933. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  934. struct ehci_device *ehci = endpoint->ehci;
  935. struct usb_device *usb = ep->usb;
  936. struct io_buffer *iobuf;
  937. int rc;
  938. /* Remove from schedule */
  939. if ( ( rc = ehci_schedule_del ( endpoint ) ) != 0 ) {
  940. /* No way to prevent hardware from continuing to
  941. * access the memory, so leak it.
  942. */
  943. DBGC ( ehci, "EHCI %s %s could not unschedule: %s\n",
  944. usb->name, usb_endpoint_name ( ep ), strerror ( rc ) );
  945. return;
  946. }
  947. /* Cancel any incomplete transfers */
  948. while ( ehci_ring_fill ( &endpoint->ring ) ) {
  949. iobuf = ehci_dequeue ( &endpoint->ring );
  950. if ( iobuf )
  951. usb_complete_err ( ep, iobuf, -ECANCELED );
  952. }
  953. /* Remove from list of endpoints */
  954. list_del ( &endpoint->list );
  955. /* Free descriptor ring */
  956. ehci_ring_free ( &endpoint->ring );
  957. /* Free endpoint */
  958. free ( endpoint );
  959. }
  960. /**
  961. * Reset endpoint
  962. *
  963. * @v ep USB endpoint
  964. * @ret rc Return status code
  965. */
  966. static int ehci_endpoint_reset ( struct usb_endpoint *ep ) {
  967. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  968. struct ehci_ring *ring = &endpoint->ring;
  969. struct ehci_transfer_descriptor *cache = &ring->head->cache;
  970. uint32_t link;
  971. /* Sanity checks */
  972. assert ( ! ( cache->status & EHCI_STATUS_ACTIVE ) );
  973. assert ( cache->status & EHCI_STATUS_HALTED );
  974. /* Reset residual count */
  975. ring->residual = 0;
  976. /* Reset data toggle */
  977. cache->len = 0;
  978. /* Prepare to restart at next unconsumed descriptor */
  979. link = virt_to_phys ( &ring->desc[ ring->cons % EHCI_RING_COUNT ] );
  980. cache->next = cpu_to_le32 ( link );
  981. /* Restart ring */
  982. wmb();
  983. cache->status = 0;
  984. return 0;
  985. }
  986. /**
  987. * Update MTU
  988. *
  989. * @v ep USB endpoint
  990. * @ret rc Return status code
  991. */
  992. static int ehci_endpoint_mtu ( struct usb_endpoint *ep ) {
  993. /* Update endpoint characteristics and capabilities */
  994. ehci_endpoint_update ( ep );
  995. return 0;
  996. }
  997. /**
  998. * Enqueue message transfer
  999. *
  1000. * @v ep USB endpoint
  1001. * @v iobuf I/O buffer
  1002. * @ret rc Return status code
  1003. */
  1004. static int ehci_endpoint_message ( struct usb_endpoint *ep,
  1005. struct io_buffer *iobuf ) {
  1006. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  1007. struct ehci_device *ehci = endpoint->ehci;
  1008. struct usb_setup_packet *packet;
  1009. unsigned int input;
  1010. struct ehci_transfer xfers[3];
  1011. struct ehci_transfer *xfer = xfers;
  1012. size_t len;
  1013. int rc;
  1014. /* Construct setup stage */
  1015. assert ( iob_len ( iobuf ) >= sizeof ( *packet ) );
  1016. packet = iobuf->data;
  1017. iob_pull ( iobuf, sizeof ( *packet ) );
  1018. xfer->data = packet;
  1019. xfer->len = sizeof ( *packet );
  1020. xfer->flags = EHCI_FL_PID_SETUP;
  1021. xfer++;
  1022. /* Construct data stage, if applicable */
  1023. len = iob_len ( iobuf );
  1024. input = ( packet->request & cpu_to_le16 ( USB_DIR_IN ) );
  1025. if ( len ) {
  1026. xfer->data = iobuf->data;
  1027. xfer->len = len;
  1028. xfer->flags = ( EHCI_FL_TOGGLE |
  1029. ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
  1030. xfer++;
  1031. }
  1032. /* Construct status stage */
  1033. xfer->data = NULL;
  1034. xfer->len = 0;
  1035. xfer->flags = ( EHCI_FL_TOGGLE | EHCI_FL_IOC |
  1036. ( ( len && input ) ? EHCI_FL_PID_OUT : EHCI_FL_PID_IN));
  1037. xfer++;
  1038. /* Enqueue transfer */
  1039. if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
  1040. ( xfer - xfers ) ) ) != 0 )
  1041. return rc;
  1042. return 0;
  1043. }
  1044. /**
  1045. * Enqueue stream transfer
  1046. *
  1047. * @v ep USB endpoint
  1048. * @v iobuf I/O buffer
  1049. * @v terminate Terminate using a short packet
  1050. * @ret rc Return status code
  1051. */
  1052. static int ehci_endpoint_stream ( struct usb_endpoint *ep,
  1053. struct io_buffer *iobuf, int terminate ) {
  1054. struct ehci_endpoint *endpoint = usb_endpoint_get_hostdata ( ep );
  1055. struct ehci_device *ehci = endpoint->ehci;
  1056. unsigned int input = ( ep->address & USB_DIR_IN );
  1057. struct ehci_transfer xfers[2];
  1058. struct ehci_transfer *xfer = xfers;
  1059. size_t len = iob_len ( iobuf );
  1060. int rc;
  1061. /* Create transfer */
  1062. xfer->data = iobuf->data;
  1063. xfer->len = len;
  1064. xfer->flags = ( EHCI_FL_IOC |
  1065. ( input ? EHCI_FL_PID_IN : EHCI_FL_PID_OUT ) );
  1066. xfer++;
  1067. if ( terminate && ( ( len & ( ep->mtu - 1 ) ) == 0 ) ) {
  1068. xfer->data = NULL;
  1069. xfer->len = 0;
  1070. assert ( ! input );
  1071. xfer->flags = ( EHCI_FL_IOC | EHCI_FL_PID_OUT );
  1072. xfer++;
  1073. }
  1074. /* Enqueue transfer */
  1075. if ( ( rc = ehci_enqueue ( ehci, &endpoint->ring, iobuf, xfers,
  1076. ( xfer - xfers ) ) ) != 0 )
  1077. return rc;
  1078. return 0;
  1079. }
  1080. /**
  1081. * Poll for completions
  1082. *
  1083. * @v endpoint Endpoint
  1084. */
  1085. static void ehci_endpoint_poll ( struct ehci_endpoint *endpoint ) {
  1086. struct ehci_device *ehci = endpoint->ehci;
  1087. struct ehci_ring *ring = &endpoint->ring;
  1088. struct ehci_transfer_descriptor *desc;
  1089. struct usb_endpoint *ep = endpoint->ep;
  1090. struct usb_device *usb = ep->usb;
  1091. struct io_buffer *iobuf;
  1092. unsigned int index;
  1093. unsigned int status;
  1094. int rc;
  1095. /* Consume all completed descriptors */
  1096. while ( ehci_ring_fill ( &endpoint->ring ) ) {
  1097. /* Stop if we reach an uncompleted descriptor */
  1098. rmb();
  1099. index = ( ring->cons % EHCI_RING_COUNT );
  1100. desc = &ring->desc[index];
  1101. status = desc->status;
  1102. if ( status & EHCI_STATUS_ACTIVE )
  1103. break;
  1104. /* Consume this descriptor */
  1105. iobuf = ehci_dequeue ( ring );
  1106. /* If we have encountered an error, then consume all
  1107. * remaining descriptors in this transaction, report
  1108. * the error to the USB core, and stop further
  1109. * processing.
  1110. */
  1111. if ( status & EHCI_STATUS_HALTED ) {
  1112. rc = -EIO_STATUS ( status );
  1113. DBGC ( ehci, "EHCI %s %s completion %d failed (status "
  1114. "%02x): %s\n", usb->name,
  1115. usb_endpoint_name ( ep ), index, status,
  1116. strerror ( rc ) );
  1117. while ( ! iobuf )
  1118. iobuf = ehci_dequeue ( ring );
  1119. usb_complete_err ( endpoint->ep, iobuf, rc );
  1120. return;
  1121. }
  1122. /* Accumulate residual data count */
  1123. ring->residual += ( le16_to_cpu ( desc->len ) & EHCI_LEN_MASK );
  1124. /* If this is not the end of a transaction (i.e. has
  1125. * no I/O buffer), then continue to next descriptor.
  1126. */
  1127. if ( ! iobuf )
  1128. continue;
  1129. /* Update I/O buffer length */
  1130. iob_unput ( iobuf, ring->residual );
  1131. ring->residual = 0;
  1132. /* Report completion to USB core */
  1133. usb_complete ( endpoint->ep, iobuf );
  1134. }
  1135. }
  1136. /******************************************************************************
  1137. *
  1138. * Device operations
  1139. *
  1140. ******************************************************************************
  1141. */
  1142. /**
  1143. * Open device
  1144. *
  1145. * @v usb USB device
  1146. * @ret rc Return status code
  1147. */
  1148. static int ehci_device_open ( struct usb_device *usb ) {
  1149. struct ehci_device *ehci = usb_bus_get_hostdata ( usb->port->hub->bus );
  1150. usb_set_hostdata ( usb, ehci );
  1151. return 0;
  1152. }
  1153. /**
  1154. * Close device
  1155. *
  1156. * @v usb USB device
  1157. */
  1158. static void ehci_device_close ( struct usb_device *usb ) {
  1159. struct ehci_device *ehci = usb_get_hostdata ( usb );
  1160. struct usb_bus *bus = ehci->bus;
  1161. /* Free device address, if assigned */
  1162. if ( usb->address )
  1163. usb_free_address ( bus, usb->address );
  1164. }
  1165. /**
  1166. * Assign device address
  1167. *
  1168. * @v usb USB device
  1169. * @ret rc Return status code
  1170. */
  1171. static int ehci_device_address ( struct usb_device *usb ) {
  1172. struct ehci_device *ehci = usb_get_hostdata ( usb );
  1173. struct usb_bus *bus = ehci->bus;
  1174. struct usb_endpoint *ep0 = usb_endpoint ( usb, USB_EP0_ADDRESS );
  1175. int address;
  1176. int rc;
  1177. /* Sanity checks */
  1178. assert ( usb->address == 0 );
  1179. assert ( ep0 != NULL );
  1180. /* Allocate device address */
  1181. address = usb_alloc_address ( bus );
  1182. if ( address < 0 ) {
  1183. rc = address;
  1184. DBGC ( ehci, "EHCI %s could not allocate address: %s\n",
  1185. usb->name, strerror ( rc ) );
  1186. goto err_alloc_address;
  1187. }
  1188. /* Set address */
  1189. if ( ( rc = usb_set_address ( usb, address ) ) != 0 )
  1190. goto err_set_address;
  1191. /* Update device address */
  1192. usb->address = address;
  1193. /* Update control endpoint characteristics and capabilities */
  1194. ehci_endpoint_update ( ep0 );
  1195. return 0;
  1196. err_set_address:
  1197. usb_free_address ( bus, address );
  1198. err_alloc_address:
  1199. return rc;
  1200. }
  1201. /******************************************************************************
  1202. *
  1203. * Hub operations
  1204. *
  1205. ******************************************************************************
  1206. */
  1207. /**
  1208. * Open hub
  1209. *
  1210. * @v hub USB hub
  1211. * @ret rc Return status code
  1212. */
  1213. static int ehci_hub_open ( struct usb_hub *hub __unused ) {
  1214. /* Nothing to do */
  1215. return 0;
  1216. }
  1217. /**
  1218. * Close hub
  1219. *
  1220. * @v hub USB hub
  1221. */
  1222. static void ehci_hub_close ( struct usb_hub *hub __unused ) {
  1223. /* Nothing to do */
  1224. }
  1225. /******************************************************************************
  1226. *
  1227. * Root hub operations
  1228. *
  1229. ******************************************************************************
  1230. */
  1231. /**
  1232. * Open root hub
  1233. *
  1234. * @v hub USB hub
  1235. * @ret rc Return status code
  1236. */
  1237. static int ehci_root_open ( struct usb_hub *hub ) {
  1238. struct usb_bus *bus = hub->bus;
  1239. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1240. uint32_t portsc;
  1241. unsigned int i;
  1242. /* Route all ports to EHCI controller */
  1243. writel ( EHCI_CONFIGFLAG_CF, ehci->op + EHCI_OP_CONFIGFLAG );
  1244. /* Enable power to all ports */
  1245. for ( i = 1 ; i <= ehci->ports ; i++ ) {
  1246. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( i ) );
  1247. portsc &= ~EHCI_PORTSC_CHANGE;
  1248. portsc |= EHCI_PORTSC_PP;
  1249. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( i ) );
  1250. }
  1251. /* Wait 20ms after potentially enabling power to a port */
  1252. mdelay ( EHCI_PORT_POWER_DELAY_MS );
  1253. /* Record hub driver private data */
  1254. usb_hub_set_drvdata ( hub, ehci );
  1255. return 0;
  1256. }
  1257. /**
  1258. * Close root hub
  1259. *
  1260. * @v hub USB hub
  1261. */
  1262. static void ehci_root_close ( struct usb_hub *hub ) {
  1263. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1264. /* Route all ports back to companion controllers */
  1265. writel ( 0, ehci->op + EHCI_OP_CONFIGFLAG );
  1266. /* Clear hub driver private data */
  1267. usb_hub_set_drvdata ( hub, NULL );
  1268. }
  1269. /**
  1270. * Enable port
  1271. *
  1272. * @v hub USB hub
  1273. * @v port USB port
  1274. * @ret rc Return status code
  1275. */
  1276. static int ehci_root_enable ( struct usb_hub *hub, struct usb_port *port ) {
  1277. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1278. uint32_t portsc;
  1279. unsigned int line;
  1280. unsigned int i;
  1281. /* Check for a low-speed device */
  1282. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1283. line = EHCI_PORTSC_LINE_STATUS ( portsc );
  1284. if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
  1285. DBGC ( ehci, "EHCI %s-%d detected low-speed device: "
  1286. "disowning\n", ehci->name, port->address );
  1287. goto disown;
  1288. }
  1289. /* Reset port */
  1290. portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
  1291. portsc |= EHCI_PORTSC_PR;
  1292. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1293. mdelay ( USB_RESET_DELAY_MS );
  1294. portsc &= ~EHCI_PORTSC_PR;
  1295. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1296. /* Wait for reset to complete */
  1297. for ( i = 0 ; i < EHCI_PORT_RESET_MAX_WAIT_MS ; i++ ) {
  1298. /* Check port status */
  1299. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1300. if ( ! ( portsc & EHCI_PORTSC_PR ) ) {
  1301. if ( portsc & EHCI_PORTSC_PED )
  1302. return 0;
  1303. DBGC ( ehci, "EHCI %s-%d not enabled after reset: "
  1304. "disowning\n", ehci->name, port->address );
  1305. goto disown;
  1306. }
  1307. /* Delay */
  1308. mdelay ( 1 );
  1309. }
  1310. DBGC ( ehci, "EHCI %s-%d timed out waiting for port to reset\n",
  1311. ehci->name, port->address );
  1312. return -ETIMEDOUT;
  1313. disown:
  1314. /* Disown port */
  1315. portsc &= ~EHCI_PORTSC_CHANGE;
  1316. portsc |= EHCI_PORTSC_OWNER;
  1317. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1318. /* Delay to allow child companion controllers to settle */
  1319. mdelay ( EHCI_DISOWN_DELAY_MS );
  1320. /* Poll child companion controllers */
  1321. ehci_poll_companions ( ehci );
  1322. return -ENODEV;
  1323. }
  1324. /**
  1325. * Disable port
  1326. *
  1327. * @v hub USB hub
  1328. * @v port USB port
  1329. * @ret rc Return status code
  1330. */
  1331. static int ehci_root_disable ( struct usb_hub *hub, struct usb_port *port ) {
  1332. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1333. uint32_t portsc;
  1334. /* Disable port */
  1335. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1336. portsc &= ~( EHCI_PORTSC_PED | EHCI_PORTSC_CHANGE );
  1337. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1338. return 0;
  1339. }
  1340. /**
  1341. * Update root hub port speed
  1342. *
  1343. * @v hub USB hub
  1344. * @v port USB port
  1345. * @ret rc Return status code
  1346. */
  1347. static int ehci_root_speed ( struct usb_hub *hub, struct usb_port *port ) {
  1348. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1349. uint32_t portsc;
  1350. unsigned int speed;
  1351. unsigned int line;
  1352. int ccs;
  1353. int csc;
  1354. int ped;
  1355. /* Read port status */
  1356. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1357. DBGC2 ( ehci, "EHCI %s-%d status is %08x\n",
  1358. ehci->name, port->address, portsc );
  1359. ccs = ( portsc & EHCI_PORTSC_CCS );
  1360. csc = ( portsc & EHCI_PORTSC_CSC );
  1361. ped = ( portsc & EHCI_PORTSC_PED );
  1362. line = EHCI_PORTSC_LINE_STATUS ( portsc );
  1363. /* Record disconnections and clear changes */
  1364. port->disconnected |= csc;
  1365. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1366. /* Determine port speed */
  1367. if ( ! ccs ) {
  1368. /* Port not connected */
  1369. speed = USB_SPEED_NONE;
  1370. } else if ( line == EHCI_PORTSC_LINE_STATUS_LOW ) {
  1371. /* Detected as low-speed */
  1372. speed = USB_SPEED_LOW;
  1373. } else if ( ped ) {
  1374. /* Port already enabled: must be high-speed */
  1375. speed = USB_SPEED_HIGH;
  1376. } else {
  1377. /* Not low-speed and not yet enabled. Could be either
  1378. * full-speed or high-speed; we can't yet tell.
  1379. */
  1380. speed = USB_SPEED_FULL;
  1381. }
  1382. port->speed = speed;
  1383. return 0;
  1384. }
  1385. /**
  1386. * Clear transaction translator buffer
  1387. *
  1388. * @v hub USB hub
  1389. * @v port USB port
  1390. * @v ep USB endpoint
  1391. * @ret rc Return status code
  1392. */
  1393. static int ehci_root_clear_tt ( struct usb_hub *hub, struct usb_port *port,
  1394. struct usb_endpoint *ep ) {
  1395. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1396. /* Should never be called; this is a root hub */
  1397. DBGC ( ehci, "EHCI %s-%d nonsensical CLEAR_TT for %s %s\n", ehci->name,
  1398. port->address, ep->usb->name, usb_endpoint_name ( ep ) );
  1399. return -ENOTSUP;
  1400. }
  1401. /**
  1402. * Poll for port status changes
  1403. *
  1404. * @v hub USB hub
  1405. * @v port USB port
  1406. */
  1407. static void ehci_root_poll ( struct usb_hub *hub, struct usb_port *port ) {
  1408. struct ehci_device *ehci = usb_hub_get_drvdata ( hub );
  1409. uint32_t portsc;
  1410. uint32_t change;
  1411. /* Do nothing unless something has changed */
  1412. portsc = readl ( ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1413. change = ( portsc & EHCI_PORTSC_CHANGE );
  1414. if ( ! change )
  1415. return;
  1416. /* Record disconnections and clear changes */
  1417. port->disconnected |= ( portsc & EHCI_PORTSC_CSC );
  1418. writel ( portsc, ehci->op + EHCI_OP_PORTSC ( port->address ) );
  1419. /* Report port status change */
  1420. usb_port_changed ( port );
  1421. }
  1422. /******************************************************************************
  1423. *
  1424. * Bus operations
  1425. *
  1426. ******************************************************************************
  1427. */
  1428. /**
  1429. * Open USB bus
  1430. *
  1431. * @v bus USB bus
  1432. * @ret rc Return status code
  1433. */
  1434. static int ehci_bus_open ( struct usb_bus *bus ) {
  1435. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1436. unsigned int frames;
  1437. size_t len;
  1438. int rc;
  1439. /* Sanity checks */
  1440. assert ( list_empty ( &ehci->async ) );
  1441. assert ( list_empty ( &ehci->periodic ) );
  1442. /* Allocate and initialise asynchronous queue head */
  1443. ehci->head = malloc_dma ( sizeof ( *ehci->head ),
  1444. ehci_align ( sizeof ( *ehci->head ) ) );
  1445. if ( ! ehci->head ) {
  1446. rc = -ENOMEM;
  1447. goto err_alloc_head;
  1448. }
  1449. memset ( ehci->head, 0, sizeof ( *ehci->head ) );
  1450. ehci->head->chr = cpu_to_le32 ( EHCI_CHR_HEAD );
  1451. ehci->head->cache.next = cpu_to_le32 ( EHCI_LINK_TERMINATE );
  1452. ehci->head->cache.status = EHCI_STATUS_HALTED;
  1453. ehci_async_schedule ( ehci );
  1454. writel ( virt_to_phys ( ehci->head ),
  1455. ehci->op + EHCI_OP_ASYNCLISTADDR );
  1456. /* Use async queue head to determine control data structure segment */
  1457. ehci->ctrldssegment =
  1458. ( ( ( uint64_t ) virt_to_phys ( ehci->head ) ) >> 32 );
  1459. if ( ehci->addr64 ) {
  1460. writel ( ehci->ctrldssegment, ehci->op + EHCI_OP_CTRLDSSEGMENT);
  1461. } else if ( ehci->ctrldssegment ) {
  1462. DBGC ( ehci, "EHCI %s CTRLDSSEGMENT not supported\n",
  1463. ehci->name );
  1464. rc = -ENOTSUP;
  1465. goto err_ctrldssegment;
  1466. }
  1467. /* Allocate periodic frame list */
  1468. frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  1469. len = ( frames * sizeof ( ehci->frame[0] ) );
  1470. ehci->frame = malloc_dma ( len, EHCI_PAGE_ALIGN );
  1471. if ( ! ehci->frame ) {
  1472. rc = -ENOMEM;
  1473. goto err_alloc_frame;
  1474. }
  1475. if ( ( rc = ehci_ctrl_reachable ( ehci, ehci->frame ) ) != 0 ) {
  1476. DBGC ( ehci, "EHCI %s frame list unreachable\n", ehci->name );
  1477. goto err_unreachable_frame;
  1478. }
  1479. ehci_periodic_schedule ( ehci );
  1480. writel ( virt_to_phys ( ehci->frame ),
  1481. ehci->op + EHCI_OP_PERIODICLISTBASE );
  1482. /* Start controller */
  1483. ehci_run ( ehci );
  1484. return 0;
  1485. ehci_stop ( ehci );
  1486. err_unreachable_frame:
  1487. free_dma ( ehci->frame, len );
  1488. err_alloc_frame:
  1489. err_ctrldssegment:
  1490. free_dma ( ehci->head, sizeof ( *ehci->head ) );
  1491. err_alloc_head:
  1492. return rc;
  1493. }
  1494. /**
  1495. * Close USB bus
  1496. *
  1497. * @v bus USB bus
  1498. */
  1499. static void ehci_bus_close ( struct usb_bus *bus ) {
  1500. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1501. unsigned int frames = EHCI_PERIODIC_FRAMES ( ehci->flsize );
  1502. /* Sanity checks */
  1503. assert ( list_empty ( &ehci->async ) );
  1504. assert ( list_empty ( &ehci->periodic ) );
  1505. /* Stop controller */
  1506. ehci_stop ( ehci );
  1507. /* Free periodic frame list */
  1508. free_dma ( ehci->frame, ( frames * sizeof ( ehci->frame[0] ) ) );
  1509. /* Free asynchronous schedule */
  1510. free_dma ( ehci->head, sizeof ( *ehci->head ) );
  1511. }
  1512. /**
  1513. * Poll USB bus
  1514. *
  1515. * @v bus USB bus
  1516. */
  1517. static void ehci_bus_poll ( struct usb_bus *bus ) {
  1518. struct ehci_device *ehci = usb_bus_get_hostdata ( bus );
  1519. struct usb_hub *hub = bus->hub;
  1520. struct ehci_endpoint *endpoint;
  1521. unsigned int i;
  1522. uint32_t usbsts;
  1523. uint32_t change;
  1524. /* Do nothing unless something has changed */
  1525. usbsts = readl ( ehci->op + EHCI_OP_USBSTS );
  1526. assert ( usbsts & EHCI_USBSTS_ASYNC );
  1527. assert ( usbsts & EHCI_USBSTS_PERIODIC );
  1528. assert ( ! ( usbsts & EHCI_USBSTS_HCH ) );
  1529. change = ( usbsts & EHCI_USBSTS_CHANGE );
  1530. if ( ! change )
  1531. return;
  1532. /* Acknowledge changes */
  1533. writel ( usbsts, ehci->op + EHCI_OP_USBSTS );
  1534. /* Process completions, if applicable */
  1535. if ( change & ( EHCI_USBSTS_USBINT | EHCI_USBSTS_USBERRINT ) ) {
  1536. /* Iterate over all endpoints looking for completed
  1537. * descriptors. We trust that completion handlers are
  1538. * minimal and will not do anything that could
  1539. * plausibly affect the endpoint list itself.
  1540. */
  1541. list_for_each_entry ( endpoint, &ehci->endpoints, list )
  1542. ehci_endpoint_poll ( endpoint );
  1543. }
  1544. /* Process port status changes, if applicable */
  1545. if ( change & EHCI_USBSTS_PORT ) {
  1546. /* Iterate over all ports looking for status changes */
  1547. for ( i = 1 ; i <= ehci->ports ; i++ )
  1548. ehci_root_poll ( hub, usb_port ( hub, i ) );
  1549. }
  1550. /* Report fatal errors */
  1551. if ( change & EHCI_USBSTS_SYSERR )
  1552. DBGC ( ehci, "EHCI %s host system error\n", ehci->name );
  1553. }
  1554. /******************************************************************************
  1555. *
  1556. * PCI interface
  1557. *
  1558. ******************************************************************************
  1559. */
  1560. /** USB host controller operations */
  1561. static struct usb_host_operations ehci_operations = {
  1562. .endpoint = {
  1563. .open = ehci_endpoint_open,
  1564. .close = ehci_endpoint_close,
  1565. .reset = ehci_endpoint_reset,
  1566. .mtu = ehci_endpoint_mtu,
  1567. .message = ehci_endpoint_message,
  1568. .stream = ehci_endpoint_stream,
  1569. },
  1570. .device = {
  1571. .open = ehci_device_open,
  1572. .close = ehci_device_close,
  1573. .address = ehci_device_address,
  1574. },
  1575. .bus = {
  1576. .open = ehci_bus_open,
  1577. .close = ehci_bus_close,
  1578. .poll = ehci_bus_poll,
  1579. },
  1580. .hub = {
  1581. .open = ehci_hub_open,
  1582. .close = ehci_hub_close,
  1583. },
  1584. .root = {
  1585. .open = ehci_root_open,
  1586. .close = ehci_root_close,
  1587. .enable = ehci_root_enable,
  1588. .disable = ehci_root_disable,
  1589. .speed = ehci_root_speed,
  1590. .clear_tt = ehci_root_clear_tt,
  1591. },
  1592. };
  1593. /**
  1594. * Probe PCI device
  1595. *
  1596. * @v pci PCI device
  1597. * @ret rc Return status code
  1598. */
  1599. static int ehci_probe ( struct pci_device *pci ) {
  1600. struct ehci_device *ehci;
  1601. struct usb_port *port;
  1602. unsigned long bar_start;
  1603. size_t bar_size;
  1604. unsigned int i;
  1605. int rc;
  1606. /* Allocate and initialise structure */
  1607. ehci = zalloc ( sizeof ( *ehci ) );
  1608. if ( ! ehci ) {
  1609. rc = -ENOMEM;
  1610. goto err_alloc;
  1611. }
  1612. ehci->name = pci->dev.name;
  1613. INIT_LIST_HEAD ( &ehci->endpoints );
  1614. INIT_LIST_HEAD ( &ehci->async );
  1615. INIT_LIST_HEAD ( &ehci->periodic );
  1616. /* Fix up PCI device */
  1617. adjust_pci_device ( pci );
  1618. /* Map registers */
  1619. bar_start = pci_bar_start ( pci, EHCI_BAR );
  1620. bar_size = pci_bar_size ( pci, EHCI_BAR );
  1621. ehci->regs = ioremap ( bar_start, bar_size );
  1622. if ( ! ehci->regs ) {
  1623. rc = -ENODEV;
  1624. goto err_ioremap;
  1625. }
  1626. /* Initialise EHCI device */
  1627. ehci_init ( ehci, ehci->regs );
  1628. /* Initialise USB legacy support and claim ownership */
  1629. ehci_legacy_init ( ehci, pci );
  1630. ehci_legacy_claim ( ehci, pci );
  1631. /* Reset device */
  1632. if ( ( rc = ehci_reset ( ehci ) ) != 0 )
  1633. goto err_reset;
  1634. /* Allocate USB bus */
  1635. ehci->bus = alloc_usb_bus ( &pci->dev, ehci->ports, EHCI_MTU,
  1636. &ehci_operations );
  1637. if ( ! ehci->bus ) {
  1638. rc = -ENOMEM;
  1639. goto err_alloc_bus;
  1640. }
  1641. usb_bus_set_hostdata ( ehci->bus, ehci );
  1642. usb_hub_set_drvdata ( ehci->bus->hub, ehci );
  1643. /* Set port protocols */
  1644. for ( i = 1 ; i <= ehci->ports ; i++ ) {
  1645. port = usb_port ( ehci->bus->hub, i );
  1646. port->protocol = USB_PROTO_2_0;
  1647. }
  1648. /* Register USB bus */
  1649. if ( ( rc = register_usb_bus ( ehci->bus ) ) != 0 )
  1650. goto err_register;
  1651. pci_set_drvdata ( pci, ehci );
  1652. return 0;
  1653. unregister_usb_bus ( ehci->bus );
  1654. err_register:
  1655. free_usb_bus ( ehci->bus );
  1656. err_alloc_bus:
  1657. ehci_reset ( ehci );
  1658. err_reset:
  1659. ehci_legacy_release ( ehci, pci );
  1660. iounmap ( ehci->regs );
  1661. err_ioremap:
  1662. free ( ehci );
  1663. err_alloc:
  1664. return rc;
  1665. }
  1666. /**
  1667. * Remove PCI device
  1668. *
  1669. * @v pci PCI device
  1670. */
  1671. static void ehci_remove ( struct pci_device *pci ) {
  1672. struct ehci_device *ehci = pci_get_drvdata ( pci );
  1673. struct usb_bus *bus = ehci->bus;
  1674. unregister_usb_bus ( bus );
  1675. assert ( list_empty ( &ehci->async ) );
  1676. assert ( list_empty ( &ehci->periodic ) );
  1677. free_usb_bus ( bus );
  1678. ehci_reset ( ehci );
  1679. ehci_legacy_release ( ehci, pci );
  1680. iounmap ( ehci->regs );
  1681. free ( ehci );
  1682. }
  1683. /** EHCI PCI device IDs */
  1684. static struct pci_device_id ehci_ids[] = {
  1685. PCI_ROM ( 0xffff, 0xffff, "ehci", "EHCI", 0 ),
  1686. };
  1687. /** EHCI PCI driver */
  1688. struct pci_driver ehci_driver __pci_driver = {
  1689. .ids = ehci_ids,
  1690. .id_count = ( sizeof ( ehci_ids ) / sizeof ( ehci_ids[0] ) ),
  1691. .class = PCI_CLASS_ID ( PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB,
  1692. PCI_CLASS_SERIAL_USB_EHCI ),
  1693. .probe = ehci_probe,
  1694. .remove = ehci_remove,
  1695. };
  1696. /**
  1697. * Prepare for exit
  1698. *
  1699. * @v booting System is shutting down for OS boot
  1700. */
  1701. static void ehci_shutdown ( int booting ) {
  1702. /* If we are shutting down to boot an OS, then prevent the
  1703. * release of ownership back to BIOS.
  1704. */
  1705. ehci_legacy_prevent_release = booting;
  1706. }
  1707. /** Startup/shutdown function */
  1708. struct startup_fn ehci_startup __startup_fn ( STARTUP_LATE ) = {
  1709. .shutdown = ehci_shutdown,
  1710. };