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  1. #ifndef _LINDA_H
  2. #define _LINDA_H
  3. /*
  4. * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation; either version 2 of the
  9. * License, or any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  19. * 02110-1301, USA.
  20. *
  21. * You can also choose to distribute this program under the terms of
  22. * the Unmodified Binary Distribution Licence (as given in the file
  23. * COPYING.UBDL), provided that you have satisfied its requirements.
  24. */
  25. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  26. /**
  27. * @file
  28. *
  29. * QLogic Linda Infiniband HCA
  30. *
  31. */
  32. #define BITOPS_LITTLE_ENDIAN
  33. #include <ipxe/bitops.h>
  34. #include "qib_7220_regs.h"
  35. struct ib_device;
  36. /** A Linda GPIO register */
  37. struct QIB_7220_GPIO_pb {
  38. pseudo_bit_t GPIO[16];
  39. pseudo_bit_t Reserved[48];
  40. };
  41. struct QIB_7220_GPIO {
  42. PSEUDO_BIT_STRUCT ( struct QIB_7220_GPIO_pb );
  43. };
  44. /** A Linda general scalar register */
  45. struct QIB_7220_scalar_pb {
  46. pseudo_bit_t Value[64];
  47. };
  48. struct QIB_7220_scalar {
  49. PSEUDO_BIT_STRUCT ( struct QIB_7220_scalar_pb );
  50. };
  51. /** Linda send per-buffer control word */
  52. struct QIB_7220_SendPbc_pb {
  53. pseudo_bit_t LengthP1_toibc[11];
  54. pseudo_bit_t Reserved1[4];
  55. pseudo_bit_t LengthP1_trigger[11];
  56. pseudo_bit_t Reserved2[3];
  57. pseudo_bit_t TestEbp[1];
  58. pseudo_bit_t Test[1];
  59. pseudo_bit_t Intr[1];
  60. pseudo_bit_t Reserved3[31];
  61. pseudo_bit_t VL15[1];
  62. };
  63. struct QIB_7220_SendPbc {
  64. PSEUDO_BIT_STRUCT ( struct QIB_7220_SendPbc_pb );
  65. };
  66. /** Linda send buffer availability */
  67. struct QIB_7220_SendBufAvail_pb {
  68. pseudo_bit_t InUseCheck[144][2];
  69. pseudo_bit_t Reserved[32];
  70. };
  71. struct QIB_7220_SendBufAvail {
  72. PSEUDO_BIT_STRUCT ( struct QIB_7220_SendBufAvail_pb );
  73. };
  74. /** DMA alignment for send buffer availability */
  75. #define LINDA_SENDBUFAVAIL_ALIGN 64
  76. /** A Linda eager receive descriptor */
  77. struct QIB_7220_RcvEgr_pb {
  78. pseudo_bit_t Addr[37];
  79. pseudo_bit_t BufSize[3];
  80. pseudo_bit_t Reserved[24];
  81. };
  82. struct QIB_7220_RcvEgr {
  83. PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvEgr_pb );
  84. };
  85. /** Linda receive header flags */
  86. struct QIB_7220_RcvHdrFlags_pb {
  87. pseudo_bit_t PktLen[11];
  88. pseudo_bit_t RcvType[3];
  89. pseudo_bit_t SoftB[1];
  90. pseudo_bit_t SoftA[1];
  91. pseudo_bit_t EgrIndex[12];
  92. pseudo_bit_t Reserved1[3];
  93. pseudo_bit_t UseEgrBfr[1];
  94. pseudo_bit_t RcvSeq[4];
  95. pseudo_bit_t HdrqOffset[11];
  96. pseudo_bit_t Reserved2[8];
  97. pseudo_bit_t IBErr[1];
  98. pseudo_bit_t MKErr[1];
  99. pseudo_bit_t TIDErr[1];
  100. pseudo_bit_t KHdrErr[1];
  101. pseudo_bit_t MTUErr[1];
  102. pseudo_bit_t LenErr[1];
  103. pseudo_bit_t ParityErr[1];
  104. pseudo_bit_t VCRCErr[1];
  105. pseudo_bit_t ICRCErr[1];
  106. };
  107. struct QIB_7220_RcvHdrFlags {
  108. PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvHdrFlags_pb );
  109. };
  110. /** Linda memory BAR size */
  111. #define LINDA_BAR0_SIZE 0x400000
  112. /** Linda I2C SCL line GPIO number */
  113. #define LINDA_GPIO_SCL 0
  114. /** Linda I2C SDA line GPIO number */
  115. #define LINDA_GPIO_SDA 1
  116. /** GUID offset within EEPROM */
  117. #define LINDA_EEPROM_GUID_OFFSET 3
  118. /** GUID size within EEPROM */
  119. #define LINDA_EEPROM_GUID_SIZE 8
  120. /** Board serial number offset within EEPROM */
  121. #define LINDA_EEPROM_SERIAL_OFFSET 12
  122. /** Board serial number size within EEPROM */
  123. #define LINDA_EEPROM_SERIAL_SIZE 12
  124. /** Maximum number of send buffers used
  125. *
  126. * This is a policy decision. Must be less than or equal to the total
  127. * number of send buffers supported by the hardware (128).
  128. */
  129. #define LINDA_MAX_SEND_BUFS 32
  130. /** Linda send buffer size */
  131. #define LINDA_SEND_BUF_SIZE 4096
  132. /** Number of contexts (including kernel context)
  133. *
  134. * This is a policy decision. Must be 5, 9 or 17.
  135. */
  136. #define LINDA_NUM_CONTEXTS 5
  137. /** PortCfg values for different numbers of contexts */
  138. enum linda_portcfg {
  139. LINDA_PORTCFG_5CTX = 0,
  140. LINDA_PORTCFG_9CTX = 1,
  141. LINDA_PORTCFG_17CTX = 2,
  142. };
  143. /** PortCfg values for different numbers of contexts */
  144. #define LINDA_EAGER_ARRAY_SIZE_5CTX_0 2048
  145. #define LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER 4096
  146. #define LINDA_EAGER_ARRAY_SIZE_9CTX_0 2048
  147. #define LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER 2048
  148. #define LINDA_EAGER_ARRAY_SIZE_17CTX_0 2048
  149. #define LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER 1024
  150. /** Eager buffer required alignment */
  151. #define LINDA_EAGER_BUFFER_ALIGN 2048
  152. /** Eager buffer size encodings */
  153. enum linda_eager_buffer_size {
  154. LINDA_EAGER_BUFFER_NONE = 0,
  155. LINDA_EAGER_BUFFER_2K = 1,
  156. LINDA_EAGER_BUFFER_4K = 2,
  157. LINDA_EAGER_BUFFER_8K = 3,
  158. LINDA_EAGER_BUFFER_16K = 4,
  159. LINDA_EAGER_BUFFER_32K = 5,
  160. LINDA_EAGER_BUFFER_64K = 6,
  161. };
  162. /** Number of RX headers per context
  163. *
  164. * This is a policy decision.
  165. */
  166. #define LINDA_RECV_HEADER_COUNT 8
  167. /** Maximum size of each RX header
  168. *
  169. * This is a policy decision. Must be divisible by 4.
  170. */
  171. #define LINDA_RECV_HEADER_SIZE 96
  172. /** Total size of an RX header ring */
  173. #define LINDA_RECV_HEADERS_SIZE \
  174. ( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT )
  175. /** RX header alignment */
  176. #define LINDA_RECV_HEADERS_ALIGN 64
  177. /** RX payload size
  178. *
  179. * This is a policy decision. Must be a valid eager buffer size.
  180. */
  181. #define LINDA_RECV_PAYLOAD_SIZE 2048
  182. /** QPN used for Infinipath Packets
  183. *
  184. * This is a policy decision. Must have bit 0 clear. Must not be a
  185. * QPN that we will use.
  186. */
  187. #define LINDA_QP_IDETH 0xdead0
  188. /** Maximum time for wait for external parallel bus request, in us */
  189. #define LINDA_EPB_REQUEST_MAX_WAIT_US 500
  190. /** Maximum time for wait for external parallel bus transaction, in us */
  191. #define LINDA_EPB_XACT_MAX_WAIT_US 500
  192. /** Linda external parallel bus chip selects */
  193. #define LINDA_EPB_CS_SERDES 1
  194. #define LINDA_EPB_CS_UC 2
  195. /** Linda external parallel bus read/write operations */
  196. #define LINDA_EPB_WRITE 0
  197. #define LINDA_EPB_READ 1
  198. /** Linda external parallel bus register addresses */
  199. #define LINDA_EPB_ADDRESS( _channel, _element, _reg ) \
  200. ( (_element) | ( (_channel) << 4 ) | ( (_reg) << 9 ) )
  201. #define LINDA_EPB_ADDRESS_CHANNEL( _address ) ( ( (_address) >> 4 ) & 0x1f )
  202. #define LINDA_EPB_ADDRESS_ELEMENT( _address ) ( ( (_address) >> 0 ) & 0x0f )
  203. #define LINDA_EPB_ADDRESS_REG( _address ) ( ( (_address) >> 9 ) & 0x3f )
  204. /** Linda external parallel bus locations
  205. *
  206. * The location is used by the driver to encode both the chip select
  207. * and the EPB address.
  208. */
  209. #define LINDA_EPB_LOC( _cs, _channel, _element, _reg) \
  210. ( ( (_cs) << 16 ) | LINDA_EPB_ADDRESS ( _channel, _element, _reg ) )
  211. #define LINDA_EPB_LOC_ADDRESS( _loc ) ( (_loc) & 0xffff )
  212. #define LINDA_EPB_LOC_CS( _loc ) ( (_loc) >> 16 )
  213. /** Linda external parallel bus microcontroller register addresses */
  214. #define LINDA_EPB_UC_CHANNEL 6
  215. #define LINDA_EPB_UC_LOC( _reg ) \
  216. LINDA_EPB_LOC ( LINDA_EPB_CS_UC, LINDA_EPB_UC_CHANNEL, 0, (_reg) )
  217. #define LINDA_EPB_UC_CTL LINDA_EPB_UC_LOC ( 0 )
  218. #define LINDA_EPB_UC_CTL_WRITE 1
  219. #define LINDA_EPB_UC_CTL_READ 2
  220. #define LINDA_EPB_UC_ADDR_LO LINDA_EPB_UC_LOC ( 2 )
  221. #define LINDA_EPB_UC_ADDR_HI LINDA_EPB_UC_LOC ( 3 )
  222. #define LINDA_EPB_UC_DATA LINDA_EPB_UC_LOC ( 4 )
  223. #define LINDA_EPB_UC_CHUNK_SIZE 64
  224. extern uint8_t linda_ib_fw[8192];
  225. /** Maximum time to wait for "trim done" signal, in ms */
  226. #define LINDA_TRIM_DONE_MAX_WAIT_MS 1000
  227. /** Linda link states */
  228. enum linda_link_state {
  229. LINDA_LINK_STATE_DOWN = 0,
  230. LINDA_LINK_STATE_INIT = 1,
  231. LINDA_LINK_STATE_ARM = 2,
  232. LINDA_LINK_STATE_ACTIVE = 3,
  233. LINDA_LINK_STATE_ACT_DEFER = 4,
  234. };
  235. /** Maximum time to wait for link state changes, in us */
  236. #define LINDA_LINK_STATE_MAX_WAIT_US 20
  237. #endif /* _LINDA_H */