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linda.c 69KB

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  1. /*
  2. * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of the
  7. * License, or any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  17. * 02110-1301, USA.
  18. *
  19. * You can also choose to distribute this program under the terms of
  20. * the Unmodified Binary Distribution Licence (as given in the file
  21. * COPYING.UBDL), provided that you have satisfied its requirements.
  22. */
  23. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  24. #include <stdint.h>
  25. #include <stdlib.h>
  26. #include <errno.h>
  27. #include <unistd.h>
  28. #include <assert.h>
  29. #include <ipxe/io.h>
  30. #include <ipxe/pci.h>
  31. #include <ipxe/infiniband.h>
  32. #include <ipxe/i2c.h>
  33. #include <ipxe/bitbash.h>
  34. #include <ipxe/malloc.h>
  35. #include <ipxe/iobuf.h>
  36. #include "linda.h"
  37. /**
  38. * @file
  39. *
  40. * QLogic Linda Infiniband HCA
  41. *
  42. */
  43. /** A Linda send work queue */
  44. struct linda_send_work_queue {
  45. /** Send buffer usage */
  46. uint8_t *send_buf;
  47. /** Producer index */
  48. unsigned int prod;
  49. /** Consumer index */
  50. unsigned int cons;
  51. };
  52. /** A Linda receive work queue */
  53. struct linda_recv_work_queue {
  54. /** Receive header ring */
  55. void *header;
  56. /** Receive header producer offset (written by hardware) */
  57. struct QIB_7220_scalar header_prod;
  58. /** Receive header consumer offset */
  59. unsigned int header_cons;
  60. /** Offset within register space of the eager array */
  61. unsigned long eager_array;
  62. /** Number of entries in eager array */
  63. unsigned int eager_entries;
  64. /** Eager array producer index */
  65. unsigned int eager_prod;
  66. /** Eager array consumer index */
  67. unsigned int eager_cons;
  68. };
  69. /** A Linda HCA */
  70. struct linda {
  71. /** Registers */
  72. void *regs;
  73. /** In-use contexts */
  74. uint8_t used_ctx[LINDA_NUM_CONTEXTS];
  75. /** Send work queues */
  76. struct linda_send_work_queue send_wq[LINDA_NUM_CONTEXTS];
  77. /** Receive work queues */
  78. struct linda_recv_work_queue recv_wq[LINDA_NUM_CONTEXTS];
  79. /** Offset within register space of the first send buffer */
  80. unsigned long send_buffer_base;
  81. /** Send buffer availability (reported by hardware) */
  82. struct QIB_7220_SendBufAvail *sendbufavail;
  83. /** Send buffer availability (maintained by software) */
  84. uint8_t send_buf[LINDA_MAX_SEND_BUFS];
  85. /** Send buffer availability producer counter */
  86. unsigned int send_buf_prod;
  87. /** Send buffer availability consumer counter */
  88. unsigned int send_buf_cons;
  89. /** Number of reserved send buffers (across all QPs) */
  90. unsigned int reserved_send_bufs;
  91. /** I2C bit-bashing interface */
  92. struct i2c_bit_basher i2c;
  93. /** I2C serial EEPROM */
  94. struct i2c_device eeprom;
  95. };
  96. /***************************************************************************
  97. *
  98. * Linda register access
  99. *
  100. ***************************************************************************
  101. *
  102. * This card requires atomic 64-bit accesses. Strange things happen
  103. * if you try to use 32-bit accesses; sometimes they work, sometimes
  104. * they don't, sometimes you get random data.
  105. *
  106. * These accessors use the "movq" MMX instruction, and so won't work
  107. * on really old Pentiums (which won't have PCIe anyway, so this is
  108. * something of a moot point).
  109. */
  110. /**
  111. * Read Linda qword register
  112. *
  113. * @v linda Linda device
  114. * @v dwords Register buffer to read into
  115. * @v offset Register offset
  116. */
  117. static void linda_readq ( struct linda *linda, uint32_t *dwords,
  118. unsigned long offset ) {
  119. void *addr = ( linda->regs + offset );
  120. __asm__ __volatile__ ( "movq (%1), %%mm0\n\t"
  121. "movq %%mm0, (%0)\n\t"
  122. : : "r" ( dwords ), "r" ( addr ) : "memory" );
  123. DBGIO ( "[%08lx] => %08x%08x\n",
  124. virt_to_phys ( addr ), dwords[1], dwords[0] );
  125. }
  126. #define linda_readq( _linda, _ptr, _offset ) \
  127. linda_readq ( (_linda), (_ptr)->u.dwords, (_offset) )
  128. #define linda_readq_array8b( _linda, _ptr, _offset, _idx ) \
  129. linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
  130. #define linda_readq_array64k( _linda, _ptr, _offset, _idx ) \
  131. linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
  132. /**
  133. * Write Linda qword register
  134. *
  135. * @v linda Linda device
  136. * @v dwords Register buffer to write
  137. * @v offset Register offset
  138. */
  139. static void linda_writeq ( struct linda *linda, const uint32_t *dwords,
  140. unsigned long offset ) {
  141. void *addr = ( linda->regs + offset );
  142. DBGIO ( "[%08lx] <= %08x%08x\n",
  143. virt_to_phys ( addr ), dwords[1], dwords[0] );
  144. __asm__ __volatile__ ( "movq (%0), %%mm0\n\t"
  145. "movq %%mm0, (%1)\n\t"
  146. : : "r" ( dwords ), "r" ( addr ) : "memory" );
  147. }
  148. #define linda_writeq( _linda, _ptr, _offset ) \
  149. linda_writeq ( (_linda), (_ptr)->u.dwords, (_offset) )
  150. #define linda_writeq_array8b( _linda, _ptr, _offset, _idx ) \
  151. linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
  152. #define linda_writeq_array64k( _linda, _ptr, _offset, _idx ) \
  153. linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
  154. /**
  155. * Write Linda dword register
  156. *
  157. * @v linda Linda device
  158. * @v dword Value to write
  159. * @v offset Register offset
  160. */
  161. static void linda_writel ( struct linda *linda, uint32_t dword,
  162. unsigned long offset ) {
  163. writel ( dword, ( linda->regs + offset ) );
  164. }
  165. /***************************************************************************
  166. *
  167. * Link state management
  168. *
  169. ***************************************************************************
  170. */
  171. /**
  172. * Textual representation of link state
  173. *
  174. * @v link_state Link state
  175. * @ret link_text Link state text
  176. */
  177. static const char * linda_link_state_text ( unsigned int link_state ) {
  178. switch ( link_state ) {
  179. case LINDA_LINK_STATE_DOWN: return "DOWN";
  180. case LINDA_LINK_STATE_INIT: return "INIT";
  181. case LINDA_LINK_STATE_ARM: return "ARM";
  182. case LINDA_LINK_STATE_ACTIVE: return "ACTIVE";
  183. case LINDA_LINK_STATE_ACT_DEFER:return "ACT_DEFER";
  184. default: return "UNKNOWN";
  185. }
  186. }
  187. /**
  188. * Handle link state change
  189. *
  190. * @v linda Linda device
  191. */
  192. static void linda_link_state_changed ( struct ib_device *ibdev ) {
  193. struct linda *linda = ib_get_drvdata ( ibdev );
  194. struct QIB_7220_IBCStatus ibcstatus;
  195. struct QIB_7220_EXTCtrl extctrl;
  196. unsigned int link_state;
  197. unsigned int link_width;
  198. unsigned int link_speed;
  199. /* Read link state */
  200. linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
  201. link_state = BIT_GET ( &ibcstatus, LinkState );
  202. link_width = BIT_GET ( &ibcstatus, LinkWidthActive );
  203. link_speed = BIT_GET ( &ibcstatus, LinkSpeedActive );
  204. DBGC ( linda, "Linda %p link state %s (%s %s)\n", linda,
  205. linda_link_state_text ( link_state ),
  206. ( link_speed ? "DDR" : "SDR" ), ( link_width ? "x4" : "x1" ) );
  207. /* Set LEDs according to link state */
  208. linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
  209. BIT_SET ( &extctrl, LEDPriPortGreenOn,
  210. ( ( link_state >= LINDA_LINK_STATE_INIT ) ? 1 : 0 ) );
  211. BIT_SET ( &extctrl, LEDPriPortYellowOn,
  212. ( ( link_state >= LINDA_LINK_STATE_ACTIVE ) ? 1 : 0 ) );
  213. linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
  214. /* Notify Infiniband core of link state change */
  215. ibdev->port_state = ( link_state + 1 );
  216. ibdev->link_width_active =
  217. ( link_width ? IB_LINK_WIDTH_4X : IB_LINK_WIDTH_1X );
  218. ibdev->link_speed_active =
  219. ( link_speed ? IB_LINK_SPEED_DDR : IB_LINK_SPEED_SDR );
  220. ib_link_state_changed ( ibdev );
  221. }
  222. /**
  223. * Wait for link state change to take effect
  224. *
  225. * @v linda Linda device
  226. * @v new_link_state Expected link state
  227. * @ret rc Return status code
  228. */
  229. static int linda_link_state_check ( struct linda *linda,
  230. unsigned int new_link_state ) {
  231. struct QIB_7220_IBCStatus ibcstatus;
  232. unsigned int link_state;
  233. unsigned int i;
  234. for ( i = 0 ; i < LINDA_LINK_STATE_MAX_WAIT_US ; i++ ) {
  235. linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
  236. link_state = BIT_GET ( &ibcstatus, LinkState );
  237. if ( link_state == new_link_state )
  238. return 0;
  239. udelay ( 1 );
  240. }
  241. DBGC ( linda, "Linda %p timed out waiting for link state %s\n",
  242. linda, linda_link_state_text ( link_state ) );
  243. return -ETIMEDOUT;
  244. }
  245. /**
  246. * Set port information
  247. *
  248. * @v ibdev Infiniband device
  249. * @v mad Set port information MAD
  250. */
  251. static int linda_set_port_info ( struct ib_device *ibdev, union ib_mad *mad ) {
  252. struct linda *linda = ib_get_drvdata ( ibdev );
  253. struct ib_port_info *port_info = &mad->smp.smp_data.port_info;
  254. struct QIB_7220_IBCCtrl ibcctrl;
  255. unsigned int port_state;
  256. unsigned int link_state;
  257. /* Set new link state */
  258. port_state = ( port_info->link_speed_supported__port_state & 0xf );
  259. if ( port_state ) {
  260. link_state = ( port_state - 1 );
  261. DBGC ( linda, "Linda %p set link state to %s (%x)\n", linda,
  262. linda_link_state_text ( link_state ), link_state );
  263. linda_readq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
  264. BIT_SET ( &ibcctrl, LinkCmd, link_state );
  265. linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
  266. /* Wait for link state change to take effect. Ignore
  267. * errors; the current link state will be returned via
  268. * the GetResponse MAD.
  269. */
  270. linda_link_state_check ( linda, link_state );
  271. }
  272. /* Detect and report link state change */
  273. linda_link_state_changed ( ibdev );
  274. return 0;
  275. }
  276. /**
  277. * Set partition key table
  278. *
  279. * @v ibdev Infiniband device
  280. * @v mad Set partition key table MAD
  281. */
  282. static int linda_set_pkey_table ( struct ib_device *ibdev __unused,
  283. union ib_mad *mad __unused ) {
  284. /* Nothing to do */
  285. return 0;
  286. }
  287. /***************************************************************************
  288. *
  289. * Context allocation
  290. *
  291. ***************************************************************************
  292. */
  293. /**
  294. * Map context number to QPN
  295. *
  296. * @v ctx Context index
  297. * @ret qpn Queue pair number
  298. */
  299. static int linda_ctx_to_qpn ( unsigned int ctx ) {
  300. /* This mapping is fixed by hardware */
  301. return ( ctx * 2 );
  302. }
  303. /**
  304. * Map QPN to context number
  305. *
  306. * @v qpn Queue pair number
  307. * @ret ctx Context index
  308. */
  309. static int linda_qpn_to_ctx ( unsigned int qpn ) {
  310. /* This mapping is fixed by hardware */
  311. return ( qpn / 2 );
  312. }
  313. /**
  314. * Allocate a context
  315. *
  316. * @v linda Linda device
  317. * @ret ctx Context index, or negative error
  318. */
  319. static int linda_alloc_ctx ( struct linda *linda ) {
  320. unsigned int ctx;
  321. for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
  322. if ( ! linda->used_ctx[ctx] ) {
  323. linda->used_ctx[ctx ] = 1;
  324. DBGC2 ( linda, "Linda %p CTX %d allocated\n",
  325. linda, ctx );
  326. return ctx;
  327. }
  328. }
  329. DBGC ( linda, "Linda %p out of available contexts\n", linda );
  330. return -ENOENT;
  331. }
  332. /**
  333. * Free a context
  334. *
  335. * @v linda Linda device
  336. * @v ctx Context index
  337. */
  338. static void linda_free_ctx ( struct linda *linda, unsigned int ctx ) {
  339. linda->used_ctx[ctx] = 0;
  340. DBGC2 ( linda, "Linda %p CTX %d freed\n", linda, ctx );
  341. }
  342. /***************************************************************************
  343. *
  344. * Send datapath
  345. *
  346. ***************************************************************************
  347. */
  348. /** Send buffer toggle bit
  349. *
  350. * We encode send buffers as 7 bits of send buffer index plus a single
  351. * bit which should match the "check" bit in the SendBufAvail array.
  352. */
  353. #define LINDA_SEND_BUF_TOGGLE 0x80
  354. /**
  355. * Allocate a send buffer
  356. *
  357. * @v linda Linda device
  358. * @ret send_buf Send buffer
  359. *
  360. * You must guarantee that a send buffer is available. This is done
  361. * by refusing to allocate more TX WQEs in total than the number of
  362. * available send buffers.
  363. */
  364. static unsigned int linda_alloc_send_buf ( struct linda *linda ) {
  365. unsigned int send_buf;
  366. send_buf = linda->send_buf[linda->send_buf_cons];
  367. send_buf ^= LINDA_SEND_BUF_TOGGLE;
  368. linda->send_buf_cons = ( ( linda->send_buf_cons + 1 ) %
  369. LINDA_MAX_SEND_BUFS );
  370. return send_buf;
  371. }
  372. /**
  373. * Free a send buffer
  374. *
  375. * @v linda Linda device
  376. * @v send_buf Send buffer
  377. */
  378. static void linda_free_send_buf ( struct linda *linda,
  379. unsigned int send_buf ) {
  380. linda->send_buf[linda->send_buf_prod] = send_buf;
  381. linda->send_buf_prod = ( ( linda->send_buf_prod + 1 ) %
  382. LINDA_MAX_SEND_BUFS );
  383. }
  384. /**
  385. * Check to see if send buffer is in use
  386. *
  387. * @v linda Linda device
  388. * @v send_buf Send buffer
  389. * @ret in_use Send buffer is in use
  390. */
  391. static int linda_send_buf_in_use ( struct linda *linda,
  392. unsigned int send_buf ) {
  393. unsigned int send_idx;
  394. unsigned int send_check;
  395. unsigned int inusecheck;
  396. unsigned int inuse;
  397. unsigned int check;
  398. send_idx = ( send_buf & ~LINDA_SEND_BUF_TOGGLE );
  399. send_check = ( !! ( send_buf & LINDA_SEND_BUF_TOGGLE ) );
  400. inusecheck = BIT_GET ( linda->sendbufavail, InUseCheck[send_idx] );
  401. inuse = ( !! ( inusecheck & 0x02 ) );
  402. check = ( !! ( inusecheck & 0x01 ) );
  403. return ( inuse || ( check != send_check ) );
  404. }
  405. /**
  406. * Calculate starting offset for send buffer
  407. *
  408. * @v linda Linda device
  409. * @v send_buf Send buffer
  410. * @ret offset Starting offset
  411. */
  412. static unsigned long linda_send_buffer_offset ( struct linda *linda,
  413. unsigned int send_buf ) {
  414. return ( linda->send_buffer_base +
  415. ( ( send_buf & ~LINDA_SEND_BUF_TOGGLE ) *
  416. LINDA_SEND_BUF_SIZE ) );
  417. }
  418. /**
  419. * Create send work queue
  420. *
  421. * @v linda Linda device
  422. * @v qp Queue pair
  423. */
  424. static int linda_create_send_wq ( struct linda *linda,
  425. struct ib_queue_pair *qp ) {
  426. struct ib_work_queue *wq = &qp->send;
  427. struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  428. int rc;
  429. /* Reserve send buffers */
  430. if ( ( linda->reserved_send_bufs + qp->send.num_wqes ) >
  431. LINDA_MAX_SEND_BUFS ) {
  432. DBGC ( linda, "Linda %p out of send buffers (have %d, used "
  433. "%d, need %d)\n", linda, LINDA_MAX_SEND_BUFS,
  434. linda->reserved_send_bufs, qp->send.num_wqes );
  435. rc = -ENOBUFS;
  436. goto err_reserve_bufs;
  437. }
  438. linda->reserved_send_bufs += qp->send.num_wqes;
  439. /* Reset work queue */
  440. linda_wq->prod = 0;
  441. linda_wq->cons = 0;
  442. /* Allocate space for send buffer uasge list */
  443. linda_wq->send_buf = zalloc ( qp->send.num_wqes *
  444. sizeof ( linda_wq->send_buf[0] ) );
  445. if ( ! linda_wq->send_buf ) {
  446. rc = -ENOBUFS;
  447. goto err_alloc_send_buf;
  448. }
  449. return 0;
  450. free ( linda_wq->send_buf );
  451. err_alloc_send_buf:
  452. linda->reserved_send_bufs -= qp->send.num_wqes;
  453. err_reserve_bufs:
  454. return rc;
  455. }
  456. /**
  457. * Destroy send work queue
  458. *
  459. * @v linda Linda device
  460. * @v qp Queue pair
  461. */
  462. static void linda_destroy_send_wq ( struct linda *linda,
  463. struct ib_queue_pair *qp ) {
  464. struct ib_work_queue *wq = &qp->send;
  465. struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  466. free ( linda_wq->send_buf );
  467. linda->reserved_send_bufs -= qp->send.num_wqes;
  468. }
  469. /**
  470. * Initialise send datapath
  471. *
  472. * @v linda Linda device
  473. * @ret rc Return status code
  474. */
  475. static int linda_init_send ( struct linda *linda ) {
  476. struct QIB_7220_SendBufBase sendbufbase;
  477. struct QIB_7220_SendBufAvailAddr sendbufavailaddr;
  478. struct QIB_7220_SendCtrl sendctrl;
  479. unsigned int i;
  480. int rc;
  481. /* Retrieve SendBufBase */
  482. linda_readq ( linda, &sendbufbase, QIB_7220_SendBufBase_offset );
  483. linda->send_buffer_base = BIT_GET ( &sendbufbase,
  484. BaseAddr_SmallPIO );
  485. DBGC ( linda, "Linda %p send buffers at %lx\n",
  486. linda, linda->send_buffer_base );
  487. /* Initialise the send_buf[] array */
  488. for ( i = 0 ; i < LINDA_MAX_SEND_BUFS ; i++ )
  489. linda->send_buf[i] = i;
  490. /* Allocate space for the SendBufAvail array */
  491. linda->sendbufavail = malloc_dma ( sizeof ( *linda->sendbufavail ),
  492. LINDA_SENDBUFAVAIL_ALIGN );
  493. if ( ! linda->sendbufavail ) {
  494. rc = -ENOMEM;
  495. goto err_alloc_sendbufavail;
  496. }
  497. memset ( linda->sendbufavail, 0, sizeof ( linda->sendbufavail ) );
  498. /* Program SendBufAvailAddr into the hardware */
  499. memset ( &sendbufavailaddr, 0, sizeof ( sendbufavailaddr ) );
  500. BIT_FILL_1 ( &sendbufavailaddr, SendBufAvailAddr,
  501. ( virt_to_bus ( linda->sendbufavail ) >> 6 ) );
  502. linda_writeq ( linda, &sendbufavailaddr,
  503. QIB_7220_SendBufAvailAddr_offset );
  504. /* Enable sending and DMA of SendBufAvail */
  505. memset ( &sendctrl, 0, sizeof ( sendctrl ) );
  506. BIT_FILL_2 ( &sendctrl,
  507. SendBufAvailUpd, 1,
  508. SPioEnable, 1 );
  509. linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
  510. return 0;
  511. free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
  512. err_alloc_sendbufavail:
  513. return rc;
  514. }
  515. /**
  516. * Shut down send datapath
  517. *
  518. * @v linda Linda device
  519. */
  520. static void linda_fini_send ( struct linda *linda ) {
  521. struct QIB_7220_SendCtrl sendctrl;
  522. /* Disable sending and DMA of SendBufAvail */
  523. memset ( &sendctrl, 0, sizeof ( sendctrl ) );
  524. linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
  525. mb();
  526. /* Ensure hardware has seen this disable */
  527. linda_readq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
  528. free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
  529. }
  530. /***************************************************************************
  531. *
  532. * Receive datapath
  533. *
  534. ***************************************************************************
  535. */
  536. /**
  537. * Create receive work queue
  538. *
  539. * @v linda Linda device
  540. * @v qp Queue pair
  541. * @ret rc Return status code
  542. */
  543. static int linda_create_recv_wq ( struct linda *linda,
  544. struct ib_queue_pair *qp ) {
  545. struct ib_work_queue *wq = &qp->recv;
  546. struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  547. struct QIB_7220_RcvHdrAddr0 rcvhdraddr;
  548. struct QIB_7220_RcvHdrTailAddr0 rcvhdrtailaddr;
  549. struct QIB_7220_RcvHdrHead0 rcvhdrhead;
  550. struct QIB_7220_scalar rcvegrindexhead;
  551. struct QIB_7220_RcvCtrl rcvctrl;
  552. unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
  553. int rc;
  554. /* Reset context information */
  555. memset ( &linda_wq->header_prod, 0,
  556. sizeof ( linda_wq->header_prod ) );
  557. linda_wq->header_cons = 0;
  558. linda_wq->eager_prod = 0;
  559. linda_wq->eager_cons = 0;
  560. /* Allocate receive header buffer */
  561. linda_wq->header = malloc_dma ( LINDA_RECV_HEADERS_SIZE,
  562. LINDA_RECV_HEADERS_ALIGN );
  563. if ( ! linda_wq->header ) {
  564. rc = -ENOMEM;
  565. goto err_alloc_header;
  566. }
  567. /* Enable context in hardware */
  568. memset ( &rcvhdraddr, 0, sizeof ( rcvhdraddr ) );
  569. BIT_FILL_1 ( &rcvhdraddr, RcvHdrAddr0,
  570. ( virt_to_bus ( linda_wq->header ) >> 2 ) );
  571. linda_writeq_array8b ( linda, &rcvhdraddr,
  572. QIB_7220_RcvHdrAddr0_offset, ctx );
  573. memset ( &rcvhdrtailaddr, 0, sizeof ( rcvhdrtailaddr ) );
  574. BIT_FILL_1 ( &rcvhdrtailaddr, RcvHdrTailAddr0,
  575. ( virt_to_bus ( &linda_wq->header_prod ) >> 2 ) );
  576. linda_writeq_array8b ( linda, &rcvhdrtailaddr,
  577. QIB_7220_RcvHdrTailAddr0_offset, ctx );
  578. memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
  579. BIT_FILL_1 ( &rcvhdrhead, counter, 1 );
  580. linda_writeq_array64k ( linda, &rcvhdrhead,
  581. QIB_7220_RcvHdrHead0_offset, ctx );
  582. memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
  583. BIT_FILL_1 ( &rcvegrindexhead, Value, 1 );
  584. linda_writeq_array64k ( linda, &rcvegrindexhead,
  585. QIB_7220_RcvEgrIndexHead0_offset, ctx );
  586. linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
  587. BIT_SET ( &rcvctrl, PortEnable[ctx], 1 );
  588. BIT_SET ( &rcvctrl, IntrAvail[ctx], 1 );
  589. linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
  590. DBGC ( linda, "Linda %p QPN %ld CTX %d hdrs [%lx,%lx) prod %lx\n",
  591. linda, qp->qpn, ctx, virt_to_bus ( linda_wq->header ),
  592. ( virt_to_bus ( linda_wq->header ) + LINDA_RECV_HEADERS_SIZE ),
  593. virt_to_bus ( &linda_wq->header_prod ) );
  594. return 0;
  595. free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
  596. err_alloc_header:
  597. return rc;
  598. }
  599. /**
  600. * Destroy receive work queue
  601. *
  602. * @v linda Linda device
  603. * @v qp Queue pair
  604. */
  605. static void linda_destroy_recv_wq ( struct linda *linda,
  606. struct ib_queue_pair *qp ) {
  607. struct ib_work_queue *wq = &qp->recv;
  608. struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  609. struct QIB_7220_RcvCtrl rcvctrl;
  610. unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
  611. /* Disable context in hardware */
  612. linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
  613. BIT_SET ( &rcvctrl, PortEnable[ctx], 0 );
  614. BIT_SET ( &rcvctrl, IntrAvail[ctx], 0 );
  615. linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
  616. /* Make sure the hardware has seen that the context is disabled */
  617. linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
  618. mb();
  619. /* Free headers ring */
  620. free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
  621. /* Free context */
  622. linda_free_ctx ( linda, ctx );
  623. }
  624. /**
  625. * Initialise receive datapath
  626. *
  627. * @v linda Linda device
  628. * @ret rc Return status code
  629. */
  630. static int linda_init_recv ( struct linda *linda ) {
  631. struct QIB_7220_RcvCtrl rcvctrl;
  632. struct QIB_7220_scalar rcvegrbase;
  633. struct QIB_7220_scalar rcvhdrentsize;
  634. struct QIB_7220_scalar rcvhdrcnt;
  635. struct QIB_7220_RcvBTHQP rcvbthqp;
  636. unsigned int portcfg;
  637. unsigned long egrbase;
  638. unsigned int eager_array_size_0;
  639. unsigned int eager_array_size_other;
  640. unsigned int ctx;
  641. /* Select configuration based on number of contexts */
  642. switch ( LINDA_NUM_CONTEXTS ) {
  643. case 5:
  644. portcfg = LINDA_PORTCFG_5CTX;
  645. eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_5CTX_0;
  646. eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER;
  647. break;
  648. case 9:
  649. portcfg = LINDA_PORTCFG_9CTX;
  650. eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_9CTX_0;
  651. eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER;
  652. break;
  653. case 17:
  654. portcfg = LINDA_PORTCFG_17CTX;
  655. eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_17CTX_0;
  656. eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER;
  657. break;
  658. default:
  659. linker_assert ( 0, invalid_LINDA_NUM_CONTEXTS );
  660. return -EINVAL;
  661. }
  662. /* Configure number of contexts */
  663. memset ( &rcvctrl, 0, sizeof ( rcvctrl ) );
  664. BIT_FILL_3 ( &rcvctrl,
  665. TailUpd, 1,
  666. PortCfg, portcfg,
  667. RcvQPMapEnable, 1 );
  668. linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
  669. /* Configure receive header buffer sizes */
  670. memset ( &rcvhdrcnt, 0, sizeof ( rcvhdrcnt ) );
  671. BIT_FILL_1 ( &rcvhdrcnt, Value, LINDA_RECV_HEADER_COUNT );
  672. linda_writeq ( linda, &rcvhdrcnt, QIB_7220_RcvHdrCnt_offset );
  673. memset ( &rcvhdrentsize, 0, sizeof ( rcvhdrentsize ) );
  674. BIT_FILL_1 ( &rcvhdrentsize, Value, ( LINDA_RECV_HEADER_SIZE >> 2 ) );
  675. linda_writeq ( linda, &rcvhdrentsize, QIB_7220_RcvHdrEntSize_offset );
  676. /* Calculate eager array start addresses for each context */
  677. linda_readq ( linda, &rcvegrbase, QIB_7220_RcvEgrBase_offset );
  678. egrbase = BIT_GET ( &rcvegrbase, Value );
  679. linda->recv_wq[0].eager_array = egrbase;
  680. linda->recv_wq[0].eager_entries = eager_array_size_0;
  681. egrbase += ( eager_array_size_0 * sizeof ( struct QIB_7220_RcvEgr ) );
  682. for ( ctx = 1 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
  683. linda->recv_wq[ctx].eager_array = egrbase;
  684. linda->recv_wq[ctx].eager_entries = eager_array_size_other;
  685. egrbase += ( eager_array_size_other *
  686. sizeof ( struct QIB_7220_RcvEgr ) );
  687. }
  688. for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
  689. DBGC ( linda, "Linda %p CTX %d eager array at %lx (%d "
  690. "entries)\n", linda, ctx,
  691. linda->recv_wq[ctx].eager_array,
  692. linda->recv_wq[ctx].eager_entries );
  693. }
  694. /* Set the BTH QP for Infinipath packets to an unused value */
  695. memset ( &rcvbthqp, 0, sizeof ( rcvbthqp ) );
  696. BIT_FILL_1 ( &rcvbthqp, RcvBTHQP, LINDA_QP_IDETH );
  697. linda_writeq ( linda, &rcvbthqp, QIB_7220_RcvBTHQP_offset );
  698. return 0;
  699. }
  700. /**
  701. * Shut down receive datapath
  702. *
  703. * @v linda Linda device
  704. */
  705. static void linda_fini_recv ( struct linda *linda __unused ) {
  706. /* Nothing to do; all contexts were already disabled when the
  707. * queue pairs were destroyed
  708. */
  709. }
  710. /***************************************************************************
  711. *
  712. * Completion queue operations
  713. *
  714. ***************************************************************************
  715. */
  716. /**
  717. * Create completion queue
  718. *
  719. * @v ibdev Infiniband device
  720. * @v cq Completion queue
  721. * @ret rc Return status code
  722. */
  723. static int linda_create_cq ( struct ib_device *ibdev,
  724. struct ib_completion_queue *cq ) {
  725. struct linda *linda = ib_get_drvdata ( ibdev );
  726. static int cqn;
  727. /* The hardware has no concept of completion queues. We
  728. * simply use the association between CQs and WQs (already
  729. * handled by the IB core) to decide which WQs to poll.
  730. *
  731. * We do set a CQN, just to avoid confusing debug messages
  732. * from the IB core.
  733. */
  734. cq->cqn = ++cqn;
  735. DBGC ( linda, "Linda %p CQN %ld created\n", linda, cq->cqn );
  736. return 0;
  737. }
  738. /**
  739. * Destroy completion queue
  740. *
  741. * @v ibdev Infiniband device
  742. * @v cq Completion queue
  743. */
  744. static void linda_destroy_cq ( struct ib_device *ibdev,
  745. struct ib_completion_queue *cq ) {
  746. struct linda *linda = ib_get_drvdata ( ibdev );
  747. /* Nothing to do */
  748. DBGC ( linda, "Linda %p CQN %ld destroyed\n", linda, cq->cqn );
  749. }
  750. /***************************************************************************
  751. *
  752. * Queue pair operations
  753. *
  754. ***************************************************************************
  755. */
  756. /**
  757. * Create queue pair
  758. *
  759. * @v ibdev Infiniband device
  760. * @v qp Queue pair
  761. * @ret rc Return status code
  762. */
  763. static int linda_create_qp ( struct ib_device *ibdev,
  764. struct ib_queue_pair *qp ) {
  765. struct linda *linda = ib_get_drvdata ( ibdev );
  766. int ctx;
  767. int rc;
  768. /* Locate an available context */
  769. ctx = linda_alloc_ctx ( linda );
  770. if ( ctx < 0 ) {
  771. rc = ctx;
  772. goto err_alloc_ctx;
  773. }
  774. /* Set queue pair number based on context index */
  775. qp->qpn = linda_ctx_to_qpn ( ctx );
  776. /* Set work-queue private data pointers */
  777. ib_wq_set_drvdata ( &qp->send, &linda->send_wq[ctx] );
  778. ib_wq_set_drvdata ( &qp->recv, &linda->recv_wq[ctx] );
  779. /* Create receive work queue */
  780. if ( ( rc = linda_create_recv_wq ( linda, qp ) ) != 0 )
  781. goto err_create_recv_wq;
  782. /* Create send work queue */
  783. if ( ( rc = linda_create_send_wq ( linda, qp ) ) != 0 )
  784. goto err_create_send_wq;
  785. return 0;
  786. linda_destroy_send_wq ( linda, qp );
  787. err_create_send_wq:
  788. linda_destroy_recv_wq ( linda, qp );
  789. err_create_recv_wq:
  790. linda_free_ctx ( linda, ctx );
  791. err_alloc_ctx:
  792. return rc;
  793. }
  794. /**
  795. * Modify queue pair
  796. *
  797. * @v ibdev Infiniband device
  798. * @v qp Queue pair
  799. * @ret rc Return status code
  800. */
  801. static int linda_modify_qp ( struct ib_device *ibdev,
  802. struct ib_queue_pair *qp ) {
  803. struct linda *linda = ib_get_drvdata ( ibdev );
  804. /* Nothing to do; the hardware doesn't have a notion of queue
  805. * keys
  806. */
  807. DBGC ( linda, "Linda %p QPN %ld modified\n", linda, qp->qpn );
  808. return 0;
  809. }
  810. /**
  811. * Destroy queue pair
  812. *
  813. * @v ibdev Infiniband device
  814. * @v qp Queue pair
  815. */
  816. static void linda_destroy_qp ( struct ib_device *ibdev,
  817. struct ib_queue_pair *qp ) {
  818. struct linda *linda = ib_get_drvdata ( ibdev );
  819. linda_destroy_send_wq ( linda, qp );
  820. linda_destroy_recv_wq ( linda, qp );
  821. }
  822. /***************************************************************************
  823. *
  824. * Work request operations
  825. *
  826. ***************************************************************************
  827. */
  828. /**
  829. * Post send work queue entry
  830. *
  831. * @v ibdev Infiniband device
  832. * @v qp Queue pair
  833. * @v dest Destination address vector
  834. * @v iobuf I/O buffer
  835. * @ret rc Return status code
  836. */
  837. static int linda_post_send ( struct ib_device *ibdev,
  838. struct ib_queue_pair *qp,
  839. struct ib_address_vector *dest,
  840. struct io_buffer *iobuf ) {
  841. struct linda *linda = ib_get_drvdata ( ibdev );
  842. struct ib_work_queue *wq = &qp->send;
  843. struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  844. struct QIB_7220_SendPbc sendpbc;
  845. uint8_t header_buf[IB_MAX_HEADER_SIZE];
  846. struct io_buffer headers;
  847. unsigned int send_buf;
  848. unsigned long start_offset;
  849. unsigned long offset;
  850. size_t len;
  851. ssize_t frag_len;
  852. uint32_t *data;
  853. /* Allocate send buffer and calculate offset */
  854. send_buf = linda_alloc_send_buf ( linda );
  855. start_offset = offset = linda_send_buffer_offset ( linda, send_buf );
  856. /* Store I/O buffer and send buffer index */
  857. assert ( wq->iobufs[linda_wq->prod] == NULL );
  858. wq->iobufs[linda_wq->prod] = iobuf;
  859. linda_wq->send_buf[linda_wq->prod] = send_buf;
  860. /* Construct headers */
  861. iob_populate ( &headers, header_buf, 0, sizeof ( header_buf ) );
  862. iob_reserve ( &headers, sizeof ( header_buf ) );
  863. ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), dest );
  864. /* Calculate packet length */
  865. len = ( ( sizeof ( sendpbc ) + iob_len ( &headers ) +
  866. iob_len ( iobuf ) + 3 ) & ~3 );
  867. /* Construct send per-buffer control word */
  868. memset ( &sendpbc, 0, sizeof ( sendpbc ) );
  869. BIT_FILL_2 ( &sendpbc,
  870. LengthP1_toibc, ( ( len >> 2 ) - 1 ),
  871. VL15, 1 );
  872. /* Write SendPbc */
  873. DBG_DISABLE ( DBGLVL_IO );
  874. linda_writeq ( linda, &sendpbc, offset );
  875. offset += sizeof ( sendpbc );
  876. /* Write headers */
  877. for ( data = headers.data, frag_len = iob_len ( &headers ) ;
  878. frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
  879. linda_writel ( linda, *data, offset );
  880. }
  881. /* Write data */
  882. for ( data = iobuf->data, frag_len = iob_len ( iobuf ) ;
  883. frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
  884. linda_writel ( linda, *data, offset );
  885. }
  886. DBG_ENABLE ( DBGLVL_IO );
  887. assert ( ( start_offset + len ) == offset );
  888. DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) posted [%lx,%lx)\n",
  889. linda, qp->qpn, send_buf, linda_wq->prod,
  890. start_offset, offset );
  891. /* Increment producer counter */
  892. linda_wq->prod = ( ( linda_wq->prod + 1 ) & ( wq->num_wqes - 1 ) );
  893. return 0;
  894. }
  895. /**
  896. * Complete send work queue entry
  897. *
  898. * @v ibdev Infiniband device
  899. * @v qp Queue pair
  900. * @v wqe_idx Work queue entry index
  901. */
  902. static void linda_complete_send ( struct ib_device *ibdev,
  903. struct ib_queue_pair *qp,
  904. unsigned int wqe_idx ) {
  905. struct linda *linda = ib_get_drvdata ( ibdev );
  906. struct ib_work_queue *wq = &qp->send;
  907. struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  908. struct io_buffer *iobuf;
  909. unsigned int send_buf;
  910. /* Parse completion */
  911. send_buf = linda_wq->send_buf[wqe_idx];
  912. DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) complete\n",
  913. linda, qp->qpn, send_buf, wqe_idx );
  914. /* Complete work queue entry */
  915. iobuf = wq->iobufs[wqe_idx];
  916. assert ( iobuf != NULL );
  917. ib_complete_send ( ibdev, qp, iobuf, 0 );
  918. wq->iobufs[wqe_idx] = NULL;
  919. /* Free send buffer */
  920. linda_free_send_buf ( linda, send_buf );
  921. }
  922. /**
  923. * Poll send work queue
  924. *
  925. * @v ibdev Infiniband device
  926. * @v qp Queue pair
  927. */
  928. static void linda_poll_send_wq ( struct ib_device *ibdev,
  929. struct ib_queue_pair *qp ) {
  930. struct linda *linda = ib_get_drvdata ( ibdev );
  931. struct ib_work_queue *wq = &qp->send;
  932. struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  933. unsigned int send_buf;
  934. /* Look for completions */
  935. while ( wq->fill ) {
  936. /* Check to see if send buffer has completed */
  937. send_buf = linda_wq->send_buf[linda_wq->cons];
  938. if ( linda_send_buf_in_use ( linda, send_buf ) )
  939. break;
  940. /* Complete this buffer */
  941. linda_complete_send ( ibdev, qp, linda_wq->cons );
  942. /* Increment consumer counter */
  943. linda_wq->cons = ( ( linda_wq->cons + 1 ) &
  944. ( wq->num_wqes - 1 ) );
  945. }
  946. }
  947. /**
  948. * Post receive work queue entry
  949. *
  950. * @v ibdev Infiniband device
  951. * @v qp Queue pair
  952. * @v iobuf I/O buffer
  953. * @ret rc Return status code
  954. */
  955. static int linda_post_recv ( struct ib_device *ibdev,
  956. struct ib_queue_pair *qp,
  957. struct io_buffer *iobuf ) {
  958. struct linda *linda = ib_get_drvdata ( ibdev );
  959. struct ib_work_queue *wq = &qp->recv;
  960. struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  961. struct QIB_7220_RcvEgr rcvegr;
  962. struct QIB_7220_scalar rcvegrindexhead;
  963. unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
  964. physaddr_t addr;
  965. size_t len;
  966. unsigned int wqe_idx;
  967. unsigned int bufsize;
  968. /* Sanity checks */
  969. addr = virt_to_bus ( iobuf->data );
  970. len = iob_tailroom ( iobuf );
  971. if ( addr & ( LINDA_EAGER_BUFFER_ALIGN - 1 ) ) {
  972. DBGC ( linda, "Linda %p QPN %ld misaligned RX buffer "
  973. "(%08lx)\n", linda, qp->qpn, addr );
  974. return -EINVAL;
  975. }
  976. if ( len != LINDA_RECV_PAYLOAD_SIZE ) {
  977. DBGC ( linda, "Linda %p QPN %ld wrong RX buffer size (%zd)\n",
  978. linda, qp->qpn, len );
  979. return -EINVAL;
  980. }
  981. /* Calculate eager producer index and WQE index */
  982. wqe_idx = ( linda_wq->eager_prod & ( wq->num_wqes - 1 ) );
  983. assert ( wq->iobufs[wqe_idx] == NULL );
  984. /* Store I/O buffer */
  985. wq->iobufs[wqe_idx] = iobuf;
  986. /* Calculate buffer size */
  987. switch ( LINDA_RECV_PAYLOAD_SIZE ) {
  988. case 2048: bufsize = LINDA_EAGER_BUFFER_2K; break;
  989. case 4096: bufsize = LINDA_EAGER_BUFFER_4K; break;
  990. case 8192: bufsize = LINDA_EAGER_BUFFER_8K; break;
  991. case 16384: bufsize = LINDA_EAGER_BUFFER_16K; break;
  992. case 32768: bufsize = LINDA_EAGER_BUFFER_32K; break;
  993. case 65536: bufsize = LINDA_EAGER_BUFFER_64K; break;
  994. default: linker_assert ( 0, invalid_rx_payload_size );
  995. bufsize = LINDA_EAGER_BUFFER_NONE;
  996. }
  997. /* Post eager buffer */
  998. memset ( &rcvegr, 0, sizeof ( rcvegr ) );
  999. BIT_FILL_2 ( &rcvegr,
  1000. Addr, ( addr >> 11 ),
  1001. BufSize, bufsize );
  1002. linda_writeq_array8b ( linda, &rcvegr,
  1003. linda_wq->eager_array, linda_wq->eager_prod );
  1004. DBGC2 ( linda, "Linda %p QPN %ld RX egr %d(%d) posted [%lx,%lx)\n",
  1005. linda, qp->qpn, linda_wq->eager_prod, wqe_idx,
  1006. addr, ( addr + len ) );
  1007. /* Increment producer index */
  1008. linda_wq->eager_prod = ( ( linda_wq->eager_prod + 1 ) &
  1009. ( linda_wq->eager_entries - 1 ) );
  1010. /* Update head index */
  1011. memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
  1012. BIT_FILL_1 ( &rcvegrindexhead,
  1013. Value, ( ( linda_wq->eager_prod + 1 ) &
  1014. ( linda_wq->eager_entries - 1 ) ) );
  1015. linda_writeq_array64k ( linda, &rcvegrindexhead,
  1016. QIB_7220_RcvEgrIndexHead0_offset, ctx );
  1017. return 0;
  1018. }
  1019. /**
  1020. * Complete receive work queue entry
  1021. *
  1022. * @v ibdev Infiniband device
  1023. * @v qp Queue pair
  1024. * @v header_offs Header offset
  1025. */
  1026. static void linda_complete_recv ( struct ib_device *ibdev,
  1027. struct ib_queue_pair *qp,
  1028. unsigned int header_offs ) {
  1029. struct linda *linda = ib_get_drvdata ( ibdev );
  1030. struct ib_work_queue *wq = &qp->recv;
  1031. struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  1032. struct QIB_7220_RcvHdrFlags *rcvhdrflags;
  1033. struct QIB_7220_RcvEgr rcvegr;
  1034. struct io_buffer headers;
  1035. struct io_buffer *iobuf;
  1036. struct ib_queue_pair *intended_qp;
  1037. struct ib_address_vector dest;
  1038. struct ib_address_vector source;
  1039. unsigned int rcvtype;
  1040. unsigned int pktlen;
  1041. unsigned int egrindex;
  1042. unsigned int useegrbfr;
  1043. unsigned int iberr, mkerr, tiderr, khdrerr, mtuerr;
  1044. unsigned int lenerr, parityerr, vcrcerr, icrcerr;
  1045. unsigned int err;
  1046. unsigned int hdrqoffset;
  1047. unsigned int header_len;
  1048. unsigned int padded_payload_len;
  1049. unsigned int wqe_idx;
  1050. size_t payload_len;
  1051. int qp0;
  1052. int rc;
  1053. /* RcvHdrFlags are at the end of the header entry */
  1054. rcvhdrflags = ( linda_wq->header + header_offs +
  1055. LINDA_RECV_HEADER_SIZE - sizeof ( *rcvhdrflags ) );
  1056. rcvtype = BIT_GET ( rcvhdrflags, RcvType );
  1057. pktlen = ( BIT_GET ( rcvhdrflags, PktLen ) << 2 );
  1058. egrindex = BIT_GET ( rcvhdrflags, EgrIndex );
  1059. useegrbfr = BIT_GET ( rcvhdrflags, UseEgrBfr );
  1060. hdrqoffset = ( BIT_GET ( rcvhdrflags, HdrqOffset ) << 2 );
  1061. iberr = BIT_GET ( rcvhdrflags, IBErr );
  1062. mkerr = BIT_GET ( rcvhdrflags, MKErr );
  1063. tiderr = BIT_GET ( rcvhdrflags, TIDErr );
  1064. khdrerr = BIT_GET ( rcvhdrflags, KHdrErr );
  1065. mtuerr = BIT_GET ( rcvhdrflags, MTUErr );
  1066. lenerr = BIT_GET ( rcvhdrflags, LenErr );
  1067. parityerr = BIT_GET ( rcvhdrflags, ParityErr );
  1068. vcrcerr = BIT_GET ( rcvhdrflags, VCRCErr );
  1069. icrcerr = BIT_GET ( rcvhdrflags, ICRCErr );
  1070. header_len = ( LINDA_RECV_HEADER_SIZE - hdrqoffset -
  1071. sizeof ( *rcvhdrflags ) );
  1072. padded_payload_len = ( pktlen - header_len - 4 /* ICRC */ );
  1073. err = ( iberr | mkerr | tiderr | khdrerr | mtuerr |
  1074. lenerr | parityerr | vcrcerr | icrcerr );
  1075. /* IB header is placed immediately before RcvHdrFlags */
  1076. iob_populate ( &headers, ( ( ( void * ) rcvhdrflags ) - header_len ),
  1077. header_len, header_len );
  1078. /* Dump diagnostic information */
  1079. if ( err || ( ! useegrbfr ) ) {
  1080. DBGC ( linda, "Linda %p QPN %ld RX egr %d%s hdr %d type %d "
  1081. "len %d(%d+%d+4)%s%s%s%s%s%s%s%s%s%s%s\n", linda,
  1082. qp->qpn, egrindex, ( useegrbfr ? "" : "(unused)" ),
  1083. ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
  1084. pktlen, header_len, padded_payload_len,
  1085. ( err ? " [Err" : "" ), ( iberr ? " IB" : "" ),
  1086. ( mkerr ? " MK" : "" ), ( tiderr ? " TID" : "" ),
  1087. ( khdrerr ? " KHdr" : "" ), ( mtuerr ? " MTU" : "" ),
  1088. ( lenerr ? " Len" : "" ), ( parityerr ? " Parity" : ""),
  1089. ( vcrcerr ? " VCRC" : "" ), ( icrcerr ? " ICRC" : "" ),
  1090. ( err ? "]" : "" ) );
  1091. } else {
  1092. DBGC2 ( linda, "Linda %p QPN %ld RX egr %d hdr %d type %d "
  1093. "len %d(%d+%d+4)\n", linda, qp->qpn, egrindex,
  1094. ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
  1095. pktlen, header_len, padded_payload_len );
  1096. }
  1097. DBGCP_HDA ( linda, hdrqoffset, headers.data,
  1098. ( header_len + sizeof ( *rcvhdrflags ) ) );
  1099. /* Parse header to generate address vector */
  1100. qp0 = ( qp->qpn == 0 );
  1101. intended_qp = NULL;
  1102. if ( ( rc = ib_pull ( ibdev, &headers, ( qp0 ? &intended_qp : NULL ),
  1103. &payload_len, &dest, &source ) ) != 0 ) {
  1104. DBGC ( linda, "Linda %p could not parse headers: %s\n",
  1105. linda, strerror ( rc ) );
  1106. err = 1;
  1107. }
  1108. if ( ! intended_qp )
  1109. intended_qp = qp;
  1110. /* Complete this buffer and any skipped buffers. Note that
  1111. * when the hardware runs out of buffers, it will repeatedly
  1112. * report the same buffer (the tail) as a TID error, and that
  1113. * it also has a habit of sometimes skipping over several
  1114. * buffers at once.
  1115. */
  1116. while ( 1 ) {
  1117. /* If we have caught up to the producer counter, stop.
  1118. * This will happen when the hardware first runs out
  1119. * of buffers and starts reporting TID errors against
  1120. * the eager buffer it wants to use next.
  1121. */
  1122. if ( linda_wq->eager_cons == linda_wq->eager_prod )
  1123. break;
  1124. /* If we have caught up to where we should be after
  1125. * completing this egrindex, stop. We phrase the test
  1126. * this way to avoid completing the entire ring when
  1127. * we receive the same egrindex twice in a row.
  1128. */
  1129. if ( ( linda_wq->eager_cons ==
  1130. ( ( egrindex + 1 ) & ( linda_wq->eager_entries - 1 ) )))
  1131. break;
  1132. /* Identify work queue entry and corresponding I/O
  1133. * buffer.
  1134. */
  1135. wqe_idx = ( linda_wq->eager_cons & ( wq->num_wqes - 1 ) );
  1136. iobuf = wq->iobufs[wqe_idx];
  1137. assert ( iobuf != NULL );
  1138. wq->iobufs[wqe_idx] = NULL;
  1139. /* Complete the eager buffer */
  1140. if ( linda_wq->eager_cons == egrindex ) {
  1141. /* Completing the eager buffer described in
  1142. * this header entry.
  1143. */
  1144. iob_put ( iobuf, payload_len );
  1145. rc = ( err ? -EIO : ( useegrbfr ? 0 : -ECANCELED ) );
  1146. /* Redirect to target QP if necessary */
  1147. if ( qp != intended_qp ) {
  1148. DBGC ( linda, "Linda %p redirecting QPN %ld "
  1149. "=> %ld\n",
  1150. linda, qp->qpn, intended_qp->qpn );
  1151. /* Compensate for incorrect fill levels */
  1152. qp->recv.fill--;
  1153. intended_qp->recv.fill++;
  1154. }
  1155. ib_complete_recv ( ibdev, intended_qp, &dest, &source,
  1156. iobuf, rc);
  1157. } else {
  1158. /* Completing on a skipped-over eager buffer */
  1159. ib_complete_recv ( ibdev, qp, &dest, &source, iobuf,
  1160. -ECANCELED );
  1161. }
  1162. /* Clear eager buffer */
  1163. memset ( &rcvegr, 0, sizeof ( rcvegr ) );
  1164. linda_writeq_array8b ( linda, &rcvegr, linda_wq->eager_array,
  1165. linda_wq->eager_cons );
  1166. /* Increment consumer index */
  1167. linda_wq->eager_cons = ( ( linda_wq->eager_cons + 1 ) &
  1168. ( linda_wq->eager_entries - 1 ) );
  1169. }
  1170. }
  1171. /**
  1172. * Poll receive work queue
  1173. *
  1174. * @v ibdev Infiniband device
  1175. * @v qp Queue pair
  1176. */
  1177. static void linda_poll_recv_wq ( struct ib_device *ibdev,
  1178. struct ib_queue_pair *qp ) {
  1179. struct linda *linda = ib_get_drvdata ( ibdev );
  1180. struct ib_work_queue *wq = &qp->recv;
  1181. struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
  1182. struct QIB_7220_RcvHdrHead0 rcvhdrhead;
  1183. unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
  1184. unsigned int header_prod;
  1185. /* Check for received packets */
  1186. header_prod = ( BIT_GET ( &linda_wq->header_prod, Value ) << 2 );
  1187. if ( header_prod == linda_wq->header_cons )
  1188. return;
  1189. /* Process all received packets */
  1190. while ( linda_wq->header_cons != header_prod ) {
  1191. /* Complete the receive */
  1192. linda_complete_recv ( ibdev, qp, linda_wq->header_cons );
  1193. /* Increment the consumer offset */
  1194. linda_wq->header_cons += LINDA_RECV_HEADER_SIZE;
  1195. linda_wq->header_cons %= LINDA_RECV_HEADERS_SIZE;
  1196. }
  1197. /* Update consumer offset */
  1198. memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
  1199. BIT_FILL_2 ( &rcvhdrhead,
  1200. RcvHeadPointer, ( linda_wq->header_cons >> 2 ),
  1201. counter, 1 );
  1202. linda_writeq_array64k ( linda, &rcvhdrhead,
  1203. QIB_7220_RcvHdrHead0_offset, ctx );
  1204. }
  1205. /**
  1206. * Poll completion queue
  1207. *
  1208. * @v ibdev Infiniband device
  1209. * @v cq Completion queue
  1210. */
  1211. static void linda_poll_cq ( struct ib_device *ibdev,
  1212. struct ib_completion_queue *cq ) {
  1213. struct ib_work_queue *wq;
  1214. /* Poll associated send and receive queues */
  1215. list_for_each_entry ( wq, &cq->work_queues, list ) {
  1216. if ( wq->is_send ) {
  1217. linda_poll_send_wq ( ibdev, wq->qp );
  1218. } else {
  1219. linda_poll_recv_wq ( ibdev, wq->qp );
  1220. }
  1221. }
  1222. }
  1223. /***************************************************************************
  1224. *
  1225. * Event queues
  1226. *
  1227. ***************************************************************************
  1228. */
  1229. /**
  1230. * Poll event queue
  1231. *
  1232. * @v ibdev Infiniband device
  1233. */
  1234. static void linda_poll_eq ( struct ib_device *ibdev ) {
  1235. struct linda *linda = ib_get_drvdata ( ibdev );
  1236. struct QIB_7220_ErrStatus errstatus;
  1237. struct QIB_7220_ErrClear errclear;
  1238. /* Check for link status changes */
  1239. DBG_DISABLE ( DBGLVL_IO );
  1240. linda_readq ( linda, &errstatus, QIB_7220_ErrStatus_offset );
  1241. DBG_ENABLE ( DBGLVL_IO );
  1242. if ( BIT_GET ( &errstatus, IBStatusChanged ) ) {
  1243. linda_link_state_changed ( ibdev );
  1244. memset ( &errclear, 0, sizeof ( errclear ) );
  1245. BIT_FILL_1 ( &errclear, IBStatusChangedClear, 1 );
  1246. linda_writeq ( linda, &errclear, QIB_7220_ErrClear_offset );
  1247. }
  1248. }
  1249. /***************************************************************************
  1250. *
  1251. * Infiniband link-layer operations
  1252. *
  1253. ***************************************************************************
  1254. */
  1255. /**
  1256. * Initialise Infiniband link
  1257. *
  1258. * @v ibdev Infiniband device
  1259. * @ret rc Return status code
  1260. */
  1261. static int linda_open ( struct ib_device *ibdev ) {
  1262. struct linda *linda = ib_get_drvdata ( ibdev );
  1263. struct QIB_7220_Control control;
  1264. /* Disable link */
  1265. linda_readq ( linda, &control, QIB_7220_Control_offset );
  1266. BIT_SET ( &control, LinkEn, 1 );
  1267. linda_writeq ( linda, &control, QIB_7220_Control_offset );
  1268. return 0;
  1269. }
  1270. /**
  1271. * Close Infiniband link
  1272. *
  1273. * @v ibdev Infiniband device
  1274. */
  1275. static void linda_close ( struct ib_device *ibdev ) {
  1276. struct linda *linda = ib_get_drvdata ( ibdev );
  1277. struct QIB_7220_Control control;
  1278. /* Disable link */
  1279. linda_readq ( linda, &control, QIB_7220_Control_offset );
  1280. BIT_SET ( &control, LinkEn, 0 );
  1281. linda_writeq ( linda, &control, QIB_7220_Control_offset );
  1282. }
  1283. /***************************************************************************
  1284. *
  1285. * Multicast group operations
  1286. *
  1287. ***************************************************************************
  1288. */
  1289. /**
  1290. * Attach to multicast group
  1291. *
  1292. * @v ibdev Infiniband device
  1293. * @v qp Queue pair
  1294. * @v gid Multicast GID
  1295. * @ret rc Return status code
  1296. */
  1297. static int linda_mcast_attach ( struct ib_device *ibdev,
  1298. struct ib_queue_pair *qp,
  1299. union ib_gid *gid ) {
  1300. struct linda *linda = ib_get_drvdata ( ibdev );
  1301. ( void ) linda;
  1302. ( void ) qp;
  1303. ( void ) gid;
  1304. return 0;
  1305. }
  1306. /**
  1307. * Detach from multicast group
  1308. *
  1309. * @v ibdev Infiniband device
  1310. * @v qp Queue pair
  1311. * @v gid Multicast GID
  1312. */
  1313. static void linda_mcast_detach ( struct ib_device *ibdev,
  1314. struct ib_queue_pair *qp,
  1315. union ib_gid *gid ) {
  1316. struct linda *linda = ib_get_drvdata ( ibdev );
  1317. ( void ) linda;
  1318. ( void ) qp;
  1319. ( void ) gid;
  1320. }
  1321. /** Linda Infiniband operations */
  1322. static struct ib_device_operations linda_ib_operations = {
  1323. .create_cq = linda_create_cq,
  1324. .destroy_cq = linda_destroy_cq,
  1325. .create_qp = linda_create_qp,
  1326. .modify_qp = linda_modify_qp,
  1327. .destroy_qp = linda_destroy_qp,
  1328. .post_send = linda_post_send,
  1329. .post_recv = linda_post_recv,
  1330. .poll_cq = linda_poll_cq,
  1331. .poll_eq = linda_poll_eq,
  1332. .open = linda_open,
  1333. .close = linda_close,
  1334. .mcast_attach = linda_mcast_attach,
  1335. .mcast_detach = linda_mcast_detach,
  1336. .set_port_info = linda_set_port_info,
  1337. .set_pkey_table = linda_set_pkey_table,
  1338. };
  1339. /***************************************************************************
  1340. *
  1341. * I2C bus operations
  1342. *
  1343. ***************************************************************************
  1344. */
  1345. /** Linda I2C bit to GPIO mappings */
  1346. static unsigned int linda_i2c_bits[] = {
  1347. [I2C_BIT_SCL] = ( 1 << LINDA_GPIO_SCL ),
  1348. [I2C_BIT_SDA] = ( 1 << LINDA_GPIO_SDA ),
  1349. };
  1350. /**
  1351. * Read Linda I2C line status
  1352. *
  1353. * @v basher Bit-bashing interface
  1354. * @v bit_id Bit number
  1355. * @ret zero Input is a logic 0
  1356. * @ret non-zero Input is a logic 1
  1357. */
  1358. static int linda_i2c_read_bit ( struct bit_basher *basher,
  1359. unsigned int bit_id ) {
  1360. struct linda *linda =
  1361. container_of ( basher, struct linda, i2c.basher );
  1362. struct QIB_7220_EXTStatus extstatus;
  1363. unsigned int status;
  1364. DBG_DISABLE ( DBGLVL_IO );
  1365. linda_readq ( linda, &extstatus, QIB_7220_EXTStatus_offset );
  1366. status = ( BIT_GET ( &extstatus, GPIOIn ) & linda_i2c_bits[bit_id] );
  1367. DBG_ENABLE ( DBGLVL_IO );
  1368. return status;
  1369. }
  1370. /**
  1371. * Write Linda I2C line status
  1372. *
  1373. * @v basher Bit-bashing interface
  1374. * @v bit_id Bit number
  1375. * @v data Value to write
  1376. */
  1377. static void linda_i2c_write_bit ( struct bit_basher *basher,
  1378. unsigned int bit_id, unsigned long data ) {
  1379. struct linda *linda =
  1380. container_of ( basher, struct linda, i2c.basher );
  1381. struct QIB_7220_EXTCtrl extctrl;
  1382. struct QIB_7220_GPIO gpioout;
  1383. unsigned int bit = linda_i2c_bits[bit_id];
  1384. unsigned int outputs = 0;
  1385. unsigned int output_enables = 0;
  1386. DBG_DISABLE ( DBGLVL_IO );
  1387. /* Read current GPIO mask and outputs */
  1388. linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
  1389. linda_readq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
  1390. /* Update outputs and output enables. I2C lines are tied
  1391. * high, so we always set the output to 0 and use the output
  1392. * enable to control the line.
  1393. */
  1394. output_enables = BIT_GET ( &extctrl, GPIOOe );
  1395. output_enables = ( ( output_enables & ~bit ) | ( ~data & bit ) );
  1396. outputs = BIT_GET ( &gpioout, GPIO );
  1397. outputs = ( outputs & ~bit );
  1398. BIT_SET ( &extctrl, GPIOOe, output_enables );
  1399. BIT_SET ( &gpioout, GPIO, outputs );
  1400. /* Write the output enable first; that way we avoid logic
  1401. * hazards.
  1402. */
  1403. linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
  1404. linda_writeq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
  1405. mb();
  1406. DBG_ENABLE ( DBGLVL_IO );
  1407. }
  1408. /** Linda I2C bit-bashing interface operations */
  1409. static struct bit_basher_operations linda_i2c_basher_ops = {
  1410. .read = linda_i2c_read_bit,
  1411. .write = linda_i2c_write_bit,
  1412. };
  1413. /**
  1414. * Initialise Linda I2C subsystem
  1415. *
  1416. * @v linda Linda device
  1417. * @ret rc Return status code
  1418. */
  1419. static int linda_init_i2c ( struct linda *linda ) {
  1420. static int try_eeprom_address[] = { 0x51, 0x50 };
  1421. unsigned int i;
  1422. int rc;
  1423. /* Initialise bus */
  1424. if ( ( rc = init_i2c_bit_basher ( &linda->i2c,
  1425. &linda_i2c_basher_ops ) ) != 0 ) {
  1426. DBGC ( linda, "Linda %p could not initialise I2C bus: %s\n",
  1427. linda, strerror ( rc ) );
  1428. return rc;
  1429. }
  1430. /* Probe for devices */
  1431. for ( i = 0 ; i < ( sizeof ( try_eeprom_address ) /
  1432. sizeof ( try_eeprom_address[0] ) ) ; i++ ) {
  1433. init_i2c_eeprom ( &linda->eeprom, try_eeprom_address[i] );
  1434. if ( ( rc = i2c_check_presence ( &linda->i2c.i2c,
  1435. &linda->eeprom ) ) == 0 ) {
  1436. DBGC2 ( linda, "Linda %p found EEPROM at %02x\n",
  1437. linda, try_eeprom_address[i] );
  1438. return 0;
  1439. }
  1440. }
  1441. DBGC ( linda, "Linda %p could not find EEPROM\n", linda );
  1442. return -ENODEV;
  1443. }
  1444. /**
  1445. * Read EEPROM parameters
  1446. *
  1447. * @v linda Linda device
  1448. * @v guid GUID to fill in
  1449. * @ret rc Return status code
  1450. */
  1451. static int linda_read_eeprom ( struct linda *linda, union ib_guid *guid ) {
  1452. struct i2c_interface *i2c = &linda->i2c.i2c;
  1453. int rc;
  1454. /* Read GUID */
  1455. if ( ( rc = i2c->read ( i2c, &linda->eeprom, LINDA_EEPROM_GUID_OFFSET,
  1456. guid->bytes, sizeof ( *guid ) ) ) != 0 ) {
  1457. DBGC ( linda, "Linda %p could not read GUID: %s\n",
  1458. linda, strerror ( rc ) );
  1459. return rc;
  1460. }
  1461. DBGC2 ( linda, "Linda %p has GUID " IB_GUID_FMT "\n",
  1462. linda, IB_GUID_ARGS ( guid ) );
  1463. /* Read serial number (debug only) */
  1464. if ( DBG_LOG ) {
  1465. uint8_t serial[LINDA_EEPROM_SERIAL_SIZE + 1];
  1466. serial[ sizeof ( serial ) - 1 ] = '\0';
  1467. if ( ( rc = i2c->read ( i2c, &linda->eeprom,
  1468. LINDA_EEPROM_SERIAL_OFFSET, serial,
  1469. ( sizeof ( serial ) - 1 ) ) ) != 0 ) {
  1470. DBGC ( linda, "Linda %p could not read serial: %s\n",
  1471. linda, strerror ( rc ) );
  1472. return rc;
  1473. }
  1474. DBGC2 ( linda, "Linda %p has serial number \"%s\"\n",
  1475. linda, serial );
  1476. }
  1477. return 0;
  1478. }
  1479. /***************************************************************************
  1480. *
  1481. * External parallel bus access
  1482. *
  1483. ***************************************************************************
  1484. */
  1485. /**
  1486. * Request ownership of the IB external parallel bus
  1487. *
  1488. * @v linda Linda device
  1489. * @ret rc Return status code
  1490. */
  1491. static int linda_ib_epb_request ( struct linda *linda ) {
  1492. struct QIB_7220_ibsd_epb_access_ctrl access;
  1493. unsigned int i;
  1494. /* Request ownership */
  1495. memset ( &access, 0, sizeof ( access ) );
  1496. BIT_FILL_1 ( &access, sw_ib_epb_req, 1 );
  1497. linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
  1498. /* Wait for ownership to be granted */
  1499. for ( i = 0 ; i < LINDA_EPB_REQUEST_MAX_WAIT_US ; i++ ) {
  1500. linda_readq ( linda, &access,
  1501. QIB_7220_ibsd_epb_access_ctrl_offset );
  1502. if ( BIT_GET ( &access, sw_ib_epb_req_granted ) )
  1503. return 0;
  1504. udelay ( 1 );
  1505. }
  1506. DBGC ( linda, "Linda %p timed out waiting for IB EPB request\n",
  1507. linda );
  1508. return -ETIMEDOUT;
  1509. }
  1510. /**
  1511. * Wait for IB external parallel bus transaction to complete
  1512. *
  1513. * @v linda Linda device
  1514. * @v xact Buffer to hold transaction result
  1515. * @ret rc Return status code
  1516. */
  1517. static int linda_ib_epb_wait ( struct linda *linda,
  1518. struct QIB_7220_ibsd_epb_transaction_reg *xact ) {
  1519. unsigned int i;
  1520. /* Discard first read to allow for signals crossing clock domains */
  1521. linda_readq ( linda, xact, QIB_7220_ibsd_epb_transaction_reg_offset );
  1522. for ( i = 0 ; i < LINDA_EPB_XACT_MAX_WAIT_US ; i++ ) {
  1523. linda_readq ( linda, xact,
  1524. QIB_7220_ibsd_epb_transaction_reg_offset );
  1525. if ( BIT_GET ( xact, ib_epb_rdy ) ) {
  1526. if ( BIT_GET ( xact, ib_epb_req_error ) ) {
  1527. DBGC ( linda, "Linda %p EPB transaction "
  1528. "failed\n", linda );
  1529. return -EIO;
  1530. } else {
  1531. return 0;
  1532. }
  1533. }
  1534. udelay ( 1 );
  1535. }
  1536. DBGC ( linda, "Linda %p timed out waiting for IB EPB transaction\n",
  1537. linda );
  1538. return -ETIMEDOUT;
  1539. }
  1540. /**
  1541. * Release ownership of the IB external parallel bus
  1542. *
  1543. * @v linda Linda device
  1544. */
  1545. static void linda_ib_epb_release ( struct linda *linda ) {
  1546. struct QIB_7220_ibsd_epb_access_ctrl access;
  1547. memset ( &access, 0, sizeof ( access ) );
  1548. BIT_FILL_1 ( &access, sw_ib_epb_req, 0 );
  1549. linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
  1550. }
  1551. /**
  1552. * Read data via IB external parallel bus
  1553. *
  1554. * @v linda Linda device
  1555. * @v location EPB location
  1556. * @ret data Data read, or negative error
  1557. *
  1558. * You must have already acquired ownership of the IB external
  1559. * parallel bus.
  1560. */
  1561. static int linda_ib_epb_read ( struct linda *linda, unsigned int location ) {
  1562. struct QIB_7220_ibsd_epb_transaction_reg xact;
  1563. unsigned int data;
  1564. int rc;
  1565. /* Ensure no transaction is currently in progress */
  1566. if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
  1567. return rc;
  1568. /* Process data */
  1569. memset ( &xact, 0, sizeof ( xact ) );
  1570. BIT_FILL_3 ( &xact,
  1571. ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
  1572. ib_epb_read_write, LINDA_EPB_READ,
  1573. ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
  1574. linda_writeq ( linda, &xact,
  1575. QIB_7220_ibsd_epb_transaction_reg_offset );
  1576. /* Wait for transaction to complete */
  1577. if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
  1578. return rc;
  1579. data = BIT_GET ( &xact, ib_epb_data );
  1580. return data;
  1581. }
  1582. /**
  1583. * Write data via IB external parallel bus
  1584. *
  1585. * @v linda Linda device
  1586. * @v location EPB location
  1587. * @v data Data to write
  1588. * @ret rc Return status code
  1589. *
  1590. * You must have already acquired ownership of the IB external
  1591. * parallel bus.
  1592. */
  1593. static int linda_ib_epb_write ( struct linda *linda, unsigned int location,
  1594. unsigned int data ) {
  1595. struct QIB_7220_ibsd_epb_transaction_reg xact;
  1596. int rc;
  1597. /* Ensure no transaction is currently in progress */
  1598. if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
  1599. return rc;
  1600. /* Process data */
  1601. memset ( &xact, 0, sizeof ( xact ) );
  1602. BIT_FILL_4 ( &xact,
  1603. ib_epb_data, data,
  1604. ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
  1605. ib_epb_read_write, LINDA_EPB_WRITE,
  1606. ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
  1607. linda_writeq ( linda, &xact,
  1608. QIB_7220_ibsd_epb_transaction_reg_offset );
  1609. /* Wait for transaction to complete */
  1610. if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
  1611. return rc;
  1612. return 0;
  1613. }
  1614. /**
  1615. * Read/modify/write EPB register
  1616. *
  1617. * @v linda Linda device
  1618. * @v cs Chip select
  1619. * @v channel Channel
  1620. * @v element Element
  1621. * @v reg Register
  1622. * @v value Value to set
  1623. * @v mask Mask to apply to old value
  1624. * @ret rc Return status code
  1625. */
  1626. static int linda_ib_epb_mod_reg ( struct linda *linda, unsigned int cs,
  1627. unsigned int channel, unsigned int element,
  1628. unsigned int reg, unsigned int value,
  1629. unsigned int mask ) {
  1630. unsigned int location;
  1631. int old_value;
  1632. int rc;
  1633. DBG_DISABLE ( DBGLVL_IO );
  1634. /* Sanity check */
  1635. assert ( ( value & mask ) == value );
  1636. /* Acquire bus ownership */
  1637. if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
  1638. goto out;
  1639. /* Read existing value, if necessary */
  1640. location = LINDA_EPB_LOC ( cs, channel, element, reg );
  1641. if ( (~mask) & 0xff ) {
  1642. old_value = linda_ib_epb_read ( linda, location );
  1643. if ( old_value < 0 ) {
  1644. rc = old_value;
  1645. goto out_release;
  1646. }
  1647. } else {
  1648. old_value = 0;
  1649. }
  1650. /* Update value */
  1651. value = ( ( old_value & ~mask ) | value );
  1652. DBGCP ( linda, "Linda %p CS %d EPB(%d,%d,%#02x) %#02x => %#02x\n",
  1653. linda, cs, channel, element, reg, old_value, value );
  1654. if ( ( rc = linda_ib_epb_write ( linda, location, value ) ) != 0 )
  1655. goto out_release;
  1656. out_release:
  1657. /* Release bus */
  1658. linda_ib_epb_release ( linda );
  1659. out:
  1660. DBG_ENABLE ( DBGLVL_IO );
  1661. return rc;
  1662. }
  1663. /**
  1664. * Transfer data to/from microcontroller RAM
  1665. *
  1666. * @v linda Linda device
  1667. * @v address Starting address
  1668. * @v write Data to write, or NULL
  1669. * @v read Data to read, or NULL
  1670. * @v len Length of data
  1671. * @ret rc Return status code
  1672. */
  1673. static int linda_ib_epb_ram_xfer ( struct linda *linda, unsigned int address,
  1674. const void *write, void *read,
  1675. size_t len ) {
  1676. unsigned int control;
  1677. unsigned int address_hi;
  1678. unsigned int address_lo;
  1679. int data;
  1680. int rc;
  1681. DBG_DISABLE ( DBGLVL_IO );
  1682. assert ( ! ( write && read ) );
  1683. assert ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
  1684. assert ( ( len % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
  1685. /* Acquire bus ownership */
  1686. if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
  1687. goto out;
  1688. /* Process data */
  1689. while ( len ) {
  1690. /* Reset the address for each new chunk */
  1691. if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
  1692. /* Write the control register */
  1693. control = ( read ? LINDA_EPB_UC_CTL_READ :
  1694. LINDA_EPB_UC_CTL_WRITE );
  1695. if ( ( rc = linda_ib_epb_write ( linda,
  1696. LINDA_EPB_UC_CTL,
  1697. control ) ) != 0 )
  1698. break;
  1699. /* Write the address registers */
  1700. address_hi = ( address >> 8 );
  1701. if ( ( rc = linda_ib_epb_write ( linda,
  1702. LINDA_EPB_UC_ADDR_HI,
  1703. address_hi ) ) != 0 )
  1704. break;
  1705. address_lo = ( address & 0xff );
  1706. if ( ( rc = linda_ib_epb_write ( linda,
  1707. LINDA_EPB_UC_ADDR_LO,
  1708. address_lo ) ) != 0 )
  1709. break;
  1710. }
  1711. /* Read or write the data */
  1712. if ( read ) {
  1713. data = linda_ib_epb_read ( linda, LINDA_EPB_UC_DATA );
  1714. if ( data < 0 ) {
  1715. rc = data;
  1716. break;
  1717. }
  1718. *( ( uint8_t * ) read++ ) = data;
  1719. } else {
  1720. data = *( ( uint8_t * ) write++ );
  1721. if ( ( rc = linda_ib_epb_write ( linda,
  1722. LINDA_EPB_UC_DATA,
  1723. data ) ) != 0 )
  1724. break;
  1725. }
  1726. address++;
  1727. len--;
  1728. /* Reset the control byte after each chunk */
  1729. if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
  1730. if ( ( rc = linda_ib_epb_write ( linda,
  1731. LINDA_EPB_UC_CTL,
  1732. 0 ) ) != 0 )
  1733. break;
  1734. }
  1735. }
  1736. /* Release bus */
  1737. linda_ib_epb_release ( linda );
  1738. out:
  1739. DBG_ENABLE ( DBGLVL_IO );
  1740. return rc;
  1741. }
  1742. /***************************************************************************
  1743. *
  1744. * Infiniband SerDes initialisation
  1745. *
  1746. ***************************************************************************
  1747. */
  1748. /** A Linda SerDes parameter */
  1749. struct linda_serdes_param {
  1750. /** EPB address as constructed by LINDA_EPB_ADDRESS() */
  1751. uint16_t address;
  1752. /** Value to set */
  1753. uint8_t value;
  1754. /** Mask to apply to old value */
  1755. uint8_t mask;
  1756. } __packed;
  1757. /** Magic "all channels" channel number */
  1758. #define LINDA_EPB_ALL_CHANNELS 31
  1759. /** End of SerDes parameter list marker */
  1760. #define LINDA_SERDES_PARAM_END { 0, 0, 0 }
  1761. /**
  1762. * Program IB SerDes register(s)
  1763. *
  1764. * @v linda Linda device
  1765. * @v param SerDes parameter
  1766. * @ret rc Return status code
  1767. */
  1768. static int linda_set_serdes_param ( struct linda *linda,
  1769. struct linda_serdes_param *param ) {
  1770. unsigned int channel;
  1771. unsigned int channel_start;
  1772. unsigned int channel_end;
  1773. unsigned int element;
  1774. unsigned int reg;
  1775. int rc;
  1776. /* Break down the EPB address and determine channels */
  1777. channel = LINDA_EPB_ADDRESS_CHANNEL ( param->address );
  1778. element = LINDA_EPB_ADDRESS_ELEMENT ( param->address );
  1779. reg = LINDA_EPB_ADDRESS_REG ( param->address );
  1780. if ( channel == LINDA_EPB_ALL_CHANNELS ) {
  1781. channel_start = 0;
  1782. channel_end = 3;
  1783. } else {
  1784. channel_start = channel_end = channel;
  1785. }
  1786. /* Modify register for each specified channel */
  1787. for ( channel = channel_start ; channel <= channel_end ; channel++ ) {
  1788. if ( ( rc = linda_ib_epb_mod_reg ( linda, LINDA_EPB_CS_SERDES,
  1789. channel, element, reg,
  1790. param->value,
  1791. param->mask ) ) != 0 )
  1792. return rc;
  1793. }
  1794. return 0;
  1795. }
  1796. /**
  1797. * Program IB SerDes registers
  1798. *
  1799. * @v linda Linda device
  1800. * @v param SerDes parameters
  1801. * @v count Number of parameters
  1802. * @ret rc Return status code
  1803. */
  1804. static int linda_set_serdes_params ( struct linda *linda,
  1805. struct linda_serdes_param *params ) {
  1806. int rc;
  1807. for ( ; params->mask != 0 ; params++ ){
  1808. if ( ( rc = linda_set_serdes_param ( linda,
  1809. params ) ) != 0 )
  1810. return rc;
  1811. }
  1812. return 0;
  1813. }
  1814. #define LINDA_DDS_VAL( amp_d, main_d, ipst_d, ipre_d, \
  1815. amp_s, main_s, ipst_s, ipre_s ) \
  1816. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x00 ), \
  1817. ( ( ( amp_d & 0x1f ) << 1 ) | 1 ), 0xff }, \
  1818. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x01 ), \
  1819. ( ( ( amp_s & 0x1f ) << 1 ) | 1 ), 0xff }, \
  1820. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x09 ), \
  1821. ( ( main_d << 3 ) | 4 | ( ipre_d >> 2 ) ), 0xff }, \
  1822. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x0a ), \
  1823. ( ( main_s << 3 ) | 4 | ( ipre_s >> 2 ) ), 0xff }, \
  1824. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x06 ), \
  1825. ( ( ( ipst_d & 0xf ) << 1 ) | \
  1826. ( ( ipre_d & 3 ) << 6 ) | 0x21 ), 0xff }, \
  1827. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x07 ), \
  1828. ( ( ( ipst_s & 0xf ) << 1 ) | \
  1829. ( ( ipre_s & 3 ) << 6) | 0x21 ), 0xff }
  1830. /**
  1831. * Linda SerDes default parameters
  1832. *
  1833. * These magic start-of-day values are taken from the Linux driver.
  1834. */
  1835. static struct linda_serdes_param linda_serdes_defaults1[] = {
  1836. /* RXHSCTRL0 */
  1837. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x00 ), 0xd4, 0xff },
  1838. /* VCDL_DAC2 */
  1839. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x05 ), 0x2d, 0xff },
  1840. /* VCDL_CTRL2 */
  1841. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x08 ), 0x03, 0x0f },
  1842. /* START_EQ1 */
  1843. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
  1844. /* START_EQ2 */
  1845. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x28 ), 0x30, 0xff },
  1846. /* BACTRL */
  1847. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0e ), 0x40, 0xff },
  1848. /* LDOUTCTRL1 */
  1849. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x04, 0xff },
  1850. /* RXHSSTATUS */
  1851. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0f ), 0x04, 0xff },
  1852. /* End of this block */
  1853. LINDA_SERDES_PARAM_END
  1854. };
  1855. static struct linda_serdes_param linda_serdes_defaults2[] = {
  1856. /* LDOUTCTRL1 */
  1857. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x00, 0xff },
  1858. /* DDS values */
  1859. LINDA_DDS_VAL ( 31, 19, 12, 0, 29, 22, 9, 0 ),
  1860. /* Set Rcv Eq. to Preset node */
  1861. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
  1862. /* DFELTHFDR */
  1863. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x08 ), 0x00, 0xff },
  1864. /* DFELTHHDR */
  1865. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x21 ), 0x00, 0xff },
  1866. /* TLTHFDR */
  1867. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x09 ), 0x02, 0xff },
  1868. /* TLTHHDR */
  1869. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x23 ), 0x02, 0xff },
  1870. /* ZFR */
  1871. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1b ), 0x0c, 0xff },
  1872. /* ZCNT) */
  1873. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1c ), 0x0c, 0xff },
  1874. /* GFR */
  1875. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1e ), 0x10, 0xff },
  1876. /* GHR */
  1877. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1f ), 0x10, 0xff },
  1878. /* VCDL_CTRL0 toggle */
  1879. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x20, 0xff },
  1880. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x00, 0xff },
  1881. /* CMUCTRL5 */
  1882. { LINDA_EPB_ADDRESS ( 7, 0, 0x15 ), 0x80, 0xff },
  1883. /* End of this block */
  1884. LINDA_SERDES_PARAM_END
  1885. };
  1886. static struct linda_serdes_param linda_serdes_defaults3[] = {
  1887. /* START_EQ1 */
  1888. { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x00, 0x38 },
  1889. /* End of this block */
  1890. LINDA_SERDES_PARAM_END
  1891. };
  1892. /**
  1893. * Program the microcontroller RAM
  1894. *
  1895. * @v linda Linda device
  1896. * @ret rc Return status code
  1897. */
  1898. static int linda_program_uc_ram ( struct linda *linda ) {
  1899. int rc;
  1900. if ( ( rc = linda_ib_epb_ram_xfer ( linda, 0, linda_ib_fw, NULL,
  1901. sizeof ( linda_ib_fw ) ) ) != 0 ){
  1902. DBGC ( linda, "Linda %p could not load IB firmware: %s\n",
  1903. linda, strerror ( rc ) );
  1904. return rc;
  1905. }
  1906. return 0;
  1907. }
  1908. /**
  1909. * Verify the microcontroller RAM
  1910. *
  1911. * @v linda Linda device
  1912. * @ret rc Return status code
  1913. */
  1914. static int linda_verify_uc_ram ( struct linda *linda ) {
  1915. uint8_t verify[LINDA_EPB_UC_CHUNK_SIZE];
  1916. unsigned int offset;
  1917. int rc;
  1918. for ( offset = 0 ; offset < sizeof ( linda_ib_fw );
  1919. offset += sizeof ( verify ) ) {
  1920. if ( ( rc = linda_ib_epb_ram_xfer ( linda, offset,
  1921. NULL, verify,
  1922. sizeof (verify) )) != 0 ){
  1923. DBGC ( linda, "Linda %p could not read back IB "
  1924. "firmware: %s\n", linda, strerror ( rc ) );
  1925. return rc;
  1926. }
  1927. if ( memcmp ( ( linda_ib_fw + offset ), verify,
  1928. sizeof ( verify ) ) != 0 ) {
  1929. DBGC ( linda, "Linda %p firmware verification failed "
  1930. "at offset %#x\n", linda, offset );
  1931. DBGC_HDA ( linda, offset, ( linda_ib_fw + offset ),
  1932. sizeof ( verify ) );
  1933. DBGC_HDA ( linda, offset, verify, sizeof ( verify ) );
  1934. return -EIO;
  1935. }
  1936. }
  1937. DBGC2 ( linda, "Linda %p firmware verified ok\n", linda );
  1938. return 0;
  1939. }
  1940. /**
  1941. * Use the microcontroller to trim the IB link
  1942. *
  1943. * @v linda Linda device
  1944. * @ret rc Return status code
  1945. */
  1946. static int linda_trim_ib ( struct linda *linda ) {
  1947. struct QIB_7220_IBSerDesCtrl ctrl;
  1948. struct QIB_7220_IntStatus intstatus;
  1949. unsigned int i;
  1950. int rc;
  1951. /* Bring the microcontroller out of reset */
  1952. linda_readq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
  1953. BIT_SET ( &ctrl, ResetIB_uC_Core, 0 );
  1954. linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
  1955. /* Wait for the "trim done" signal */
  1956. for ( i = 0 ; i < LINDA_TRIM_DONE_MAX_WAIT_MS ; i++ ) {
  1957. linda_readq ( linda, &intstatus, QIB_7220_IntStatus_offset );
  1958. if ( BIT_GET ( &intstatus, IBSerdesTrimDone ) ) {
  1959. rc = 0;
  1960. goto out_reset;
  1961. }
  1962. mdelay ( 1 );
  1963. }
  1964. DBGC ( linda, "Linda %p timed out waiting for trim done\n", linda );
  1965. rc = -ETIMEDOUT;
  1966. out_reset:
  1967. /* Put the microcontroller back into reset */
  1968. BIT_SET ( &ctrl, ResetIB_uC_Core, 1 );
  1969. linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
  1970. return rc;
  1971. }
  1972. /**
  1973. * Initialise the IB SerDes
  1974. *
  1975. * @v linda Linda device
  1976. * @ret rc Return status code
  1977. */
  1978. static int linda_init_ib_serdes ( struct linda *linda ) {
  1979. struct QIB_7220_Control control;
  1980. struct QIB_7220_IBCCtrl ibcctrl;
  1981. struct QIB_7220_IBCDDRCtrl ibcddrctrl;
  1982. struct QIB_7220_XGXSCfg xgxscfg;
  1983. int rc;
  1984. /* Disable link */
  1985. linda_readq ( linda, &control, QIB_7220_Control_offset );
  1986. BIT_SET ( &control, LinkEn, 0 );
  1987. linda_writeq ( linda, &control, QIB_7220_Control_offset );
  1988. /* Configure sensible defaults for IBC */
  1989. memset ( &ibcctrl, 0, sizeof ( ibcctrl ) );
  1990. BIT_FILL_6 ( &ibcctrl, /* Tuning values taken from Linux driver */
  1991. FlowCtrlPeriod, 0x03,
  1992. FlowCtrlWaterMark, 0x05,
  1993. MaxPktLen, ( ( LINDA_RECV_HEADER_SIZE +
  1994. LINDA_RECV_PAYLOAD_SIZE +
  1995. 4 /* ICRC */ ) >> 2 ),
  1996. PhyerrThreshold, 0xf,
  1997. OverrunThreshold, 0xf,
  1998. CreditScale, 0x4 );
  1999. linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
  2000. /* Force SDR only to avoid needing all the DDR tuning,
  2001. * Mellanox compatibility hacks etc. SDR is plenty for
  2002. * boot-time operation.
  2003. */
  2004. linda_readq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
  2005. BIT_SET ( &ibcddrctrl, IB_ENHANCED_MODE, 0 );
  2006. BIT_SET ( &ibcddrctrl, SD_SPEED_SDR, 1 );
  2007. BIT_SET ( &ibcddrctrl, SD_SPEED_DDR, 0 );
  2008. BIT_SET ( &ibcddrctrl, SD_SPEED_QDR, 0 );
  2009. BIT_SET ( &ibcddrctrl, HRTBT_ENB, 0 );
  2010. BIT_SET ( &ibcddrctrl, HRTBT_AUTO, 0 );
  2011. linda_writeq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
  2012. /* Set default SerDes parameters */
  2013. if ( ( rc = linda_set_serdes_params ( linda,
  2014. linda_serdes_defaults1 ) ) != 0 )
  2015. return rc;
  2016. udelay ( 415 ); /* Magic delay while SerDes sorts itself out */
  2017. if ( ( rc = linda_set_serdes_params ( linda,
  2018. linda_serdes_defaults2 ) ) != 0 )
  2019. return rc;
  2020. /* Program the microcontroller RAM */
  2021. if ( ( rc = linda_program_uc_ram ( linda ) ) != 0 )
  2022. return rc;
  2023. /* Verify the microcontroller RAM contents */
  2024. if ( DBGLVL_LOG ) {
  2025. if ( ( rc = linda_verify_uc_ram ( linda ) ) != 0 )
  2026. return rc;
  2027. }
  2028. /* More SerDes tuning */
  2029. if ( ( rc = linda_set_serdes_params ( linda,
  2030. linda_serdes_defaults3 ) ) != 0 )
  2031. return rc;
  2032. /* Use the microcontroller to trim the IB link */
  2033. if ( ( rc = linda_trim_ib ( linda ) ) != 0 )
  2034. return rc;
  2035. /* Bring XGXS out of reset */
  2036. linda_readq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
  2037. BIT_SET ( &xgxscfg, tx_rx_reset, 0 );
  2038. BIT_SET ( &xgxscfg, xcv_reset, 0 );
  2039. linda_writeq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
  2040. return rc;
  2041. }
  2042. /***************************************************************************
  2043. *
  2044. * PCI layer interface
  2045. *
  2046. ***************************************************************************
  2047. */
  2048. /**
  2049. * Probe PCI device
  2050. *
  2051. * @v pci PCI device
  2052. * @v id PCI ID
  2053. * @ret rc Return status code
  2054. */
  2055. static int linda_probe ( struct pci_device *pci ) {
  2056. struct ib_device *ibdev;
  2057. struct linda *linda;
  2058. struct QIB_7220_Revision revision;
  2059. int rc;
  2060. /* Allocate Infiniband device */
  2061. ibdev = alloc_ibdev ( sizeof ( *linda ) );
  2062. if ( ! ibdev ) {
  2063. rc = -ENOMEM;
  2064. goto err_alloc_ibdev;
  2065. }
  2066. pci_set_drvdata ( pci, ibdev );
  2067. linda = ib_get_drvdata ( ibdev );
  2068. ibdev->op = &linda_ib_operations;
  2069. ibdev->dev = &pci->dev;
  2070. ibdev->port = 1;
  2071. /* Fix up PCI device */
  2072. adjust_pci_device ( pci );
  2073. /* Get PCI BARs */
  2074. linda->regs = ioremap ( pci->membase, LINDA_BAR0_SIZE );
  2075. DBGC2 ( linda, "Linda %p has BAR at %08lx\n", linda, pci->membase );
  2076. /* Print some general data */
  2077. linda_readq ( linda, &revision, QIB_7220_Revision_offset );
  2078. DBGC2 ( linda, "Linda %p board %02lx v%ld.%ld.%ld.%ld\n", linda,
  2079. BIT_GET ( &revision, BoardID ),
  2080. BIT_GET ( &revision, R_SW ),
  2081. BIT_GET ( &revision, R_Arch ),
  2082. BIT_GET ( &revision, R_ChipRevMajor ),
  2083. BIT_GET ( &revision, R_ChipRevMinor ) );
  2084. /* Record link capabilities. Note that we force SDR only to
  2085. * avoid having to carry extra code for DDR tuning etc.
  2086. */
  2087. ibdev->link_width_enabled = ibdev->link_width_supported =
  2088. ( IB_LINK_WIDTH_4X | IB_LINK_WIDTH_1X );
  2089. ibdev->link_speed_enabled = ibdev->link_speed_supported =
  2090. IB_LINK_SPEED_SDR;
  2091. /* Initialise I2C subsystem */
  2092. if ( ( rc = linda_init_i2c ( linda ) ) != 0 )
  2093. goto err_init_i2c;
  2094. /* Read EEPROM parameters */
  2095. if ( ( rc = linda_read_eeprom ( linda, &ibdev->node_guid ) ) != 0 )
  2096. goto err_read_eeprom;
  2097. memcpy ( &ibdev->gid.s.guid, &ibdev->node_guid,
  2098. sizeof ( ibdev->gid.s.guid ) );
  2099. /* Initialise send datapath */
  2100. if ( ( rc = linda_init_send ( linda ) ) != 0 )
  2101. goto err_init_send;
  2102. /* Initialise receive datapath */
  2103. if ( ( rc = linda_init_recv ( linda ) ) != 0 )
  2104. goto err_init_recv;
  2105. /* Initialise the IB SerDes */
  2106. if ( ( rc = linda_init_ib_serdes ( linda ) ) != 0 )
  2107. goto err_init_ib_serdes;
  2108. /* Register Infiniband device */
  2109. if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
  2110. DBGC ( linda, "Linda %p could not register IB "
  2111. "device: %s\n", linda, strerror ( rc ) );
  2112. goto err_register_ibdev;
  2113. }
  2114. return 0;
  2115. unregister_ibdev ( ibdev );
  2116. err_register_ibdev:
  2117. linda_fini_recv ( linda );
  2118. err_init_recv:
  2119. linda_fini_send ( linda );
  2120. err_init_send:
  2121. err_init_ib_serdes:
  2122. err_read_eeprom:
  2123. err_init_i2c:
  2124. ibdev_put ( ibdev );
  2125. err_alloc_ibdev:
  2126. return rc;
  2127. }
  2128. /**
  2129. * Remove PCI device
  2130. *
  2131. * @v pci PCI device
  2132. */
  2133. static void linda_remove ( struct pci_device *pci ) {
  2134. struct ib_device *ibdev = pci_get_drvdata ( pci );
  2135. struct linda *linda = ib_get_drvdata ( ibdev );
  2136. unregister_ibdev ( ibdev );
  2137. linda_fini_recv ( linda );
  2138. linda_fini_send ( linda );
  2139. ibdev_put ( ibdev );
  2140. }
  2141. static struct pci_device_id linda_nics[] = {
  2142. PCI_ROM ( 0x1077, 0x7220, "iba7220", "QLE7240/7280 HCA driver", 0 ),
  2143. };
  2144. struct pci_driver linda_driver __pci_driver = {
  2145. .ids = linda_nics,
  2146. .id_count = ( sizeof ( linda_nics ) / sizeof ( linda_nics[0] ) ),
  2147. .probe = linda_probe,
  2148. .remove = linda_remove,
  2149. };