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  1. #ifndef _ARBEL_H
  2. #define _ARBEL_H
  3. /** @file
  4. *
  5. * Mellanox Arbel Infiniband HCA driver
  6. *
  7. */
  8. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  9. #include <stdint.h>
  10. #include <ipxe/uaccess.h>
  11. #include <ipxe/ib_packet.h>
  12. #include "mlx_bitops.h"
  13. #include "MT25218_PRM.h"
  14. /*
  15. * Hardware constants
  16. *
  17. */
  18. /* Ports in existence */
  19. #define ARBEL_NUM_PORTS 2
  20. #define ARBEL_PORT_BASE 1
  21. /* PCI BARs */
  22. #define ARBEL_PCI_CONFIG_BAR PCI_BASE_ADDRESS_0
  23. #define ARBEL_PCI_CONFIG_BAR_SIZE 0x100000
  24. #define ARBEL_PCI_UAR_BAR PCI_BASE_ADDRESS_2
  25. #define ARBEL_PCI_UAR_IDX 1
  26. #define ARBEL_PCI_UAR_SIZE 0x1000
  27. /* Device reset */
  28. #define ARBEL_RESET_OFFSET 0x0f0010
  29. #define ARBEL_RESET_MAGIC 0x01000000UL
  30. #define ARBEL_RESET_WAIT_TIME_MS 1000
  31. /* UAR context table (UCE) resource types */
  32. #define ARBEL_UAR_RES_NONE 0x00
  33. #define ARBEL_UAR_RES_CQ_CI 0x01
  34. #define ARBEL_UAR_RES_CQ_ARM 0x02
  35. #define ARBEL_UAR_RES_SQ 0x03
  36. #define ARBEL_UAR_RES_RQ 0x04
  37. #define ARBEL_UAR_RES_GROUP_SEP 0x07
  38. /* Work queue entry and completion queue entry opcodes */
  39. #define ARBEL_OPCODE_SEND 0x0a
  40. #define ARBEL_OPCODE_RECV_ERROR 0xfe
  41. #define ARBEL_OPCODE_SEND_ERROR 0xff
  42. /* HCA command register opcodes */
  43. #define ARBEL_HCR_QUERY_DEV_LIM 0x0003
  44. #define ARBEL_HCR_QUERY_FW 0x0004
  45. #define ARBEL_HCR_INIT_HCA 0x0007
  46. #define ARBEL_HCR_CLOSE_HCA 0x0008
  47. #define ARBEL_HCR_INIT_IB 0x0009
  48. #define ARBEL_HCR_CLOSE_IB 0x000a
  49. #define ARBEL_HCR_SW2HW_MPT 0x000d
  50. #define ARBEL_HCR_MAP_EQ 0x0012
  51. #define ARBEL_HCR_SW2HW_EQ 0x0013
  52. #define ARBEL_HCR_HW2SW_EQ 0x0014
  53. #define ARBEL_HCR_SW2HW_CQ 0x0016
  54. #define ARBEL_HCR_HW2SW_CQ 0x0017
  55. #define ARBEL_HCR_QUERY_CQ 0x0018
  56. #define ARBEL_HCR_RST2INIT_QPEE 0x0019
  57. #define ARBEL_HCR_INIT2RTR_QPEE 0x001a
  58. #define ARBEL_HCR_RTR2RTS_QPEE 0x001b
  59. #define ARBEL_HCR_RTS2RTS_QPEE 0x001c
  60. #define ARBEL_HCR_2RST_QPEE 0x0021
  61. #define ARBEL_HCR_QUERY_QPEE 0x0022
  62. #define ARBEL_HCR_CONF_SPECIAL_QP 0x0023
  63. #define ARBEL_HCR_MAD_IFC 0x0024
  64. #define ARBEL_HCR_READ_MGM 0x0025
  65. #define ARBEL_HCR_WRITE_MGM 0x0026
  66. #define ARBEL_HCR_MGID_HASH 0x0027
  67. #define ARBEL_HCR_RUN_FW 0x0ff6
  68. #define ARBEL_HCR_DISABLE_LAM 0x0ff7
  69. #define ARBEL_HCR_ENABLE_LAM 0x0ff8
  70. #define ARBEL_HCR_UNMAP_ICM 0x0ff9
  71. #define ARBEL_HCR_MAP_ICM 0x0ffa
  72. #define ARBEL_HCR_UNMAP_ICM_AUX 0x0ffb
  73. #define ARBEL_HCR_MAP_ICM_AUX 0x0ffc
  74. #define ARBEL_HCR_SET_ICM_SIZE 0x0ffd
  75. #define ARBEL_HCR_UNMAP_FA 0x0ffe
  76. #define ARBEL_HCR_MAP_FA 0x0fff
  77. /* Service types */
  78. #define ARBEL_ST_RC 0x00
  79. #define ARBEL_ST_UD 0x03
  80. #define ARBEL_ST_MLX 0x07
  81. /* MTUs */
  82. #define ARBEL_MTU_2048 0x04
  83. #define ARBEL_NO_EQ 64
  84. #define ARBEL_INVALID_LKEY 0x00000100UL
  85. #define ARBEL_PAGE_SIZE ( ( size_t ) 4096 )
  86. #define ARBEL_RDB_ENTRY_SIZE ( ( size_t ) 32 )
  87. #define ARBEL_DB_POST_SND_OFFSET 0x10
  88. #define ARBEL_DB_EQ_OFFSET(_eqn) ( 0x08 * (_eqn) )
  89. #define ARBEL_QPEE_OPT_PARAM_QKEY 0x00000020UL
  90. #define ARBEL_MAP_EQ ( 0UL << 31 )
  91. #define ARBEL_UNMAP_EQ ( 1UL << 31 )
  92. #define ARBEL_EV_PORT_STATE_CHANGE 0x09
  93. #define ARBEL_LOG_MULTICAST_HASH_SIZE 3
  94. #define ARBEL_PM_STATE_ARMED 0x00
  95. #define ARBEL_PM_STATE_REARM 0x01
  96. #define ARBEL_PM_STATE_MIGRATED 0x03
  97. #define ARBEL_RETRY_MAX 0x07
  98. /*
  99. * Datatypes that seem to be missing from the autogenerated documentation
  100. *
  101. */
  102. struct arbelprm_mgm_hash_st {
  103. pseudo_bit_t reserved0[0x00020];
  104. /* -------------- */
  105. pseudo_bit_t hash[0x00010];
  106. pseudo_bit_t reserved1[0x00010];
  107. } __attribute__ (( packed ));
  108. struct arbelprm_scalar_parameter_st {
  109. pseudo_bit_t reserved0[0x00020];
  110. /* -------------- */
  111. pseudo_bit_t value[0x00020];
  112. } __attribute__ (( packed ));
  113. struct arbelprm_event_mask_st {
  114. pseudo_bit_t reserved0[0x00020];
  115. /* -------------- */
  116. pseudo_bit_t completion[0x00001];
  117. pseudo_bit_t path_migration_succeeded[0x00001];
  118. pseudo_bit_t communication_established[0x00001];
  119. pseudo_bit_t send_queue_drained[0x00001];
  120. pseudo_bit_t cq_error[0x00001];
  121. pseudo_bit_t wq_catastrophe[0x00001];
  122. pseudo_bit_t qpc_catastrophe[0x00001];
  123. pseudo_bit_t path_migration_failed[0x00001];
  124. pseudo_bit_t reserved1[0x00001];
  125. pseudo_bit_t port_state_change[0x00001];
  126. pseudo_bit_t command_done[0x00001];
  127. pseudo_bit_t reserved2[0x00005];
  128. pseudo_bit_t wq_invalid_request[0x00001];
  129. pseudo_bit_t wq_access_violation[0x00001];
  130. pseudo_bit_t srq_catastrophe[0x00001];
  131. pseudo_bit_t srq_last_wqe[0x00001];
  132. pseudo_bit_t srq_rq_limit[0x00001];
  133. pseudo_bit_t gpio[0x00001];
  134. pseudo_bit_t clientreregister[0x00001];
  135. pseudo_bit_t path_migration_armed[0x00001];
  136. pseudo_bit_t reserved3[0x00008];
  137. } __attribute__ (( packed ));
  138. struct arbelprm_eq_set_ci_st {
  139. pseudo_bit_t ci[0x00020];
  140. } __attribute__ (( packed ));
  141. struct arbelprm_port_state_change_event_st {
  142. pseudo_bit_t reserved[0x00020];
  143. struct arbelprm_port_state_change_st data;
  144. } __attribute__ (( packed ));
  145. /*
  146. * Wrapper structures for hardware datatypes
  147. *
  148. */
  149. struct MLX_DECLARE_STRUCT ( arbelprm_access_lam );
  150. struct MLX_DECLARE_STRUCT ( arbelprm_completion_queue_context );
  151. struct MLX_DECLARE_STRUCT ( arbelprm_completion_queue_entry );
  152. struct MLX_DECLARE_STRUCT ( arbelprm_completion_with_error );
  153. struct MLX_DECLARE_STRUCT ( arbelprm_cq_arm_db_record );
  154. struct MLX_DECLARE_STRUCT ( arbelprm_cq_ci_db_record );
  155. struct MLX_DECLARE_STRUCT ( arbelprm_event_mask );
  156. struct MLX_DECLARE_STRUCT ( arbelprm_event_queue_entry );
  157. struct MLX_DECLARE_STRUCT ( arbelprm_eq_set_ci );
  158. struct MLX_DECLARE_STRUCT ( arbelprm_eqc );
  159. struct MLX_DECLARE_STRUCT ( arbelprm_hca_command_register );
  160. struct MLX_DECLARE_STRUCT ( arbelprm_init_hca );
  161. struct MLX_DECLARE_STRUCT ( arbelprm_init_ib );
  162. struct MLX_DECLARE_STRUCT ( arbelprm_mad_ifc );
  163. struct MLX_DECLARE_STRUCT ( arbelprm_mgm_entry );
  164. struct MLX_DECLARE_STRUCT ( arbelprm_mgm_hash );
  165. struct MLX_DECLARE_STRUCT ( arbelprm_mpt );
  166. struct MLX_DECLARE_STRUCT ( arbelprm_port_state_change_event );
  167. struct MLX_DECLARE_STRUCT ( arbelprm_qp_db_record );
  168. struct MLX_DECLARE_STRUCT ( arbelprm_qp_ee_state_transitions );
  169. struct MLX_DECLARE_STRUCT ( arbelprm_query_dev_lim );
  170. struct MLX_DECLARE_STRUCT ( arbelprm_query_fw );
  171. struct MLX_DECLARE_STRUCT ( arbelprm_queue_pair_ee_context_entry );
  172. struct MLX_DECLARE_STRUCT ( arbelprm_recv_wqe_segment_next );
  173. struct MLX_DECLARE_STRUCT ( arbelprm_scalar_parameter );
  174. struct MLX_DECLARE_STRUCT ( arbelprm_send_doorbell );
  175. struct MLX_DECLARE_STRUCT ( arbelprm_ud_address_vector );
  176. struct MLX_DECLARE_STRUCT ( arbelprm_virtual_physical_mapping );
  177. struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_ctrl_mlx );
  178. struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_ctrl_send );
  179. struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_data_ptr );
  180. struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_next );
  181. struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_ud );
  182. /*
  183. * Composite hardware datatypes
  184. *
  185. */
  186. #define ARBEL_MAX_GATHER 2
  187. struct arbelprm_ud_send_wqe {
  188. struct arbelprm_wqe_segment_next next;
  189. struct arbelprm_wqe_segment_ctrl_send ctrl;
  190. struct arbelprm_wqe_segment_ud ud;
  191. struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_GATHER];
  192. } __attribute__ (( packed ));
  193. struct arbelprm_mlx_send_wqe {
  194. struct arbelprm_wqe_segment_next next;
  195. struct arbelprm_wqe_segment_ctrl_mlx ctrl;
  196. struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_GATHER];
  197. uint8_t headers[IB_MAX_HEADER_SIZE];
  198. } __attribute__ (( packed ));
  199. struct arbelprm_rc_send_wqe {
  200. struct arbelprm_wqe_segment_next next;
  201. struct arbelprm_wqe_segment_ctrl_send ctrl;
  202. struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_GATHER];
  203. } __attribute__ (( packed ));
  204. #define ARBEL_MAX_SCATTER 1
  205. struct arbelprm_recv_wqe {
  206. /* The autogenerated header is inconsistent between send and
  207. * receive WQEs. The "ctrl" structure for receive WQEs is
  208. * defined to include the "next" structure. Since the "ctrl"
  209. * part of the "ctrl" structure contains only "reserved, must
  210. * be zero" bits, we ignore its definition and provide
  211. * something more usable.
  212. */
  213. struct arbelprm_recv_wqe_segment_next next;
  214. uint32_t ctrl[2]; /* All "reserved, must be zero" */
  215. struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_SCATTER];
  216. } __attribute__ (( packed ));
  217. union arbelprm_completion_entry {
  218. struct arbelprm_completion_queue_entry normal;
  219. struct arbelprm_completion_with_error error;
  220. } __attribute__ (( packed ));
  221. union arbelprm_event_entry {
  222. struct arbelprm_event_queue_entry generic;
  223. struct arbelprm_port_state_change_event port_state_change;
  224. } __attribute__ (( packed ));
  225. union arbelprm_doorbell_record {
  226. struct arbelprm_cq_arm_db_record cq_arm;
  227. struct arbelprm_cq_ci_db_record cq_ci;
  228. struct arbelprm_qp_db_record qp;
  229. } __attribute__ (( packed ));
  230. union arbelprm_doorbell_register {
  231. struct arbelprm_send_doorbell send;
  232. uint32_t dword[2];
  233. } __attribute__ (( packed ));
  234. union arbelprm_eq_doorbell_register {
  235. struct arbelprm_eq_set_ci ci;
  236. uint32_t dword[1];
  237. } __attribute__ (( packed ));
  238. union arbelprm_mad {
  239. struct arbelprm_mad_ifc ifc;
  240. union ib_mad mad;
  241. } __attribute__ (( packed ));
  242. /*
  243. * iPXE-specific definitions
  244. *
  245. */
  246. /** Arbel device limits */
  247. struct arbel_dev_limits {
  248. /** Number of reserved QPs */
  249. unsigned int reserved_qps;
  250. /** QP context entry size */
  251. size_t qpc_entry_size;
  252. /** Extended QP context entry size */
  253. size_t eqpc_entry_size;
  254. /** Number of reserved SRQs */
  255. unsigned int reserved_srqs;
  256. /** SRQ context entry size */
  257. size_t srqc_entry_size;
  258. /** Number of reserved EEs */
  259. unsigned int reserved_ees;
  260. /** EE context entry size */
  261. size_t eec_entry_size;
  262. /** Extended EE context entry size */
  263. size_t eeec_entry_size;
  264. /** Number of reserved CQs */
  265. unsigned int reserved_cqs;
  266. /** CQ context entry size */
  267. size_t cqc_entry_size;
  268. /** Number of reserved EQs */
  269. unsigned int reserved_eqs;
  270. /** Number of reserved MTTs */
  271. unsigned int reserved_mtts;
  272. /** MTT entry size */
  273. size_t mtt_entry_size;
  274. /** Number of reserved MRWs */
  275. unsigned int reserved_mrws;
  276. /** MPT entry size */
  277. size_t mpt_entry_size;
  278. /** Number of reserved RDBs */
  279. unsigned int reserved_rdbs;
  280. /** EQ context entry size */
  281. size_t eqc_entry_size;
  282. /** Number of reserved UARs */
  283. unsigned int reserved_uars;
  284. /** UAR scratchpad entry size */
  285. size_t uar_scratch_entry_size;
  286. };
  287. /** Alignment of Arbel send work queue entries */
  288. #define ARBEL_SEND_WQE_ALIGN 128
  289. /** An Arbel send work queue entry */
  290. union arbel_send_wqe {
  291. struct arbelprm_wqe_segment_next next;
  292. struct arbelprm_ud_send_wqe ud;
  293. struct arbelprm_mlx_send_wqe mlx;
  294. struct arbelprm_rc_send_wqe rc;
  295. uint8_t force_align[ARBEL_SEND_WQE_ALIGN];
  296. } __attribute__ (( packed ));
  297. /** An Arbel send work queue */
  298. struct arbel_send_work_queue {
  299. /** Doorbell record number */
  300. unsigned int doorbell_idx;
  301. /** Work queue entries */
  302. union arbel_send_wqe *wqe;
  303. /** Size of work queue */
  304. size_t wqe_size;
  305. };
  306. /** Alignment of Arbel receive work queue entries */
  307. #define ARBEL_RECV_WQE_ALIGN 64
  308. /** An Arbel receive work queue entry */
  309. union arbel_recv_wqe {
  310. struct arbelprm_recv_wqe recv;
  311. uint8_t force_align[ARBEL_RECV_WQE_ALIGN];
  312. } __attribute__ (( packed ));
  313. /** An Arbel receive work queue */
  314. struct arbel_recv_work_queue {
  315. /** Doorbell record number */
  316. unsigned int doorbell_idx;
  317. /** Work queue entries */
  318. union arbel_recv_wqe *wqe;
  319. /** Size of work queue */
  320. size_t wqe_size;
  321. };
  322. /** Number of special queue pairs */
  323. #define ARBEL_NUM_SPECIAL_QPS 4
  324. /** Number of queue pairs reserved for the "special QP" block
  325. *
  326. * The special QPs must be in (2n,2n+1) pairs, hence we need to
  327. * reserve one extra QP to allow for alignment.
  328. */
  329. #define ARBEL_RSVD_SPECIAL_QPS ( ARBEL_NUM_SPECIAL_QPS + 1 )
  330. /** Maximum number of allocatable queue pairs
  331. *
  332. * This is a policy decision, not a device limit.
  333. */
  334. #define ARBEL_MAX_QPS 8
  335. /** Queue pair number randomisation mask */
  336. #define ARBEL_QPN_RANDOM_MASK 0xfff000
  337. /** Arbel queue pair state */
  338. enum arbel_queue_pair_state {
  339. ARBEL_QP_ST_RST = 0,
  340. ARBEL_QP_ST_INIT,
  341. ARBEL_QP_ST_RTR,
  342. ARBEL_QP_ST_RTS,
  343. };
  344. /** An Arbel queue pair */
  345. struct arbel_queue_pair {
  346. /** Send work queue */
  347. struct arbel_send_work_queue send;
  348. /** Receive work queue */
  349. struct arbel_recv_work_queue recv;
  350. /** Queue state */
  351. enum arbel_queue_pair_state state;
  352. };
  353. /** Maximum number of allocatable completion queues
  354. *
  355. * This is a policy decision, not a device limit.
  356. */
  357. #define ARBEL_MAX_CQS 8
  358. /** An Arbel completion queue */
  359. struct arbel_completion_queue {
  360. /** Consumer counter doorbell record number */
  361. unsigned int ci_doorbell_idx;
  362. /** Arm queue doorbell record number */
  363. unsigned int arm_doorbell_idx;
  364. /** Completion queue entries */
  365. union arbelprm_completion_entry *cqe;
  366. /** Size of completion queue */
  367. size_t cqe_size;
  368. };
  369. /** Maximum number of allocatable event queues
  370. *
  371. * This is a policy decision, not a device limit.
  372. */
  373. #define ARBEL_MAX_EQS 64
  374. /** A Arbel event queue */
  375. struct arbel_event_queue {
  376. /** Event queue entries */
  377. union arbelprm_event_entry *eqe;
  378. /** Size of event queue */
  379. size_t eqe_size;
  380. /** Event queue number */
  381. unsigned long eqn;
  382. /** Next event queue entry index */
  383. unsigned long next_idx;
  384. /** Doorbell register */
  385. void *doorbell;
  386. };
  387. /** Number of event queue entries
  388. *
  389. * This is a policy decision.
  390. */
  391. #define ARBEL_NUM_EQES 4
  392. /** An Arbel resource bitmask */
  393. typedef uint32_t arbel_bitmask_t;
  394. /** Size of an Arbel resource bitmask */
  395. #define ARBEL_BITMASK_SIZE(max_entries) \
  396. ( ( (max_entries) + ( 8 * sizeof ( arbel_bitmask_t ) ) - 1 ) / \
  397. ( 8 * sizeof ( arbel_bitmask_t ) ) )
  398. /** An Arbel device */
  399. struct arbel {
  400. /** PCI device */
  401. struct pci_device *pci;
  402. /** PCI configuration registers */
  403. void *config;
  404. /** PCI user Access Region */
  405. void *uar;
  406. /** Event queue consumer index doorbells */
  407. void *eq_ci_doorbells;
  408. /** Command input mailbox */
  409. void *mailbox_in;
  410. /** Command output mailbox */
  411. void *mailbox_out;
  412. /** Device open request counter */
  413. unsigned int open_count;
  414. /** Firmware size */
  415. size_t firmware_len;
  416. /** Firmware area in external memory
  417. *
  418. * This is allocated when first needed, and freed only on
  419. * final teardown, in order to avoid memory map changes at
  420. * runtime.
  421. */
  422. userptr_t firmware_area;
  423. /** ICM size */
  424. size_t icm_len;
  425. /** ICM AUX size */
  426. size_t icm_aux_len;
  427. /** ICM area
  428. *
  429. * This is allocated when first needed, and freed only on
  430. * final teardown, in order to avoid memory map changes at
  431. * runtime.
  432. */
  433. userptr_t icm;
  434. /** Offset within ICM of doorbell records */
  435. size_t db_rec_offset;
  436. /** Doorbell records */
  437. union arbelprm_doorbell_record *db_rec;
  438. /** Event queue */
  439. struct arbel_event_queue eq;
  440. /** Unrestricted LKey
  441. *
  442. * Used to get unrestricted memory access.
  443. */
  444. unsigned long lkey;
  445. /** Completion queue in-use bitmask */
  446. arbel_bitmask_t cq_inuse[ ARBEL_BITMASK_SIZE ( ARBEL_MAX_CQS ) ];
  447. /** Queue pair in-use bitmask */
  448. arbel_bitmask_t qp_inuse[ ARBEL_BITMASK_SIZE ( ARBEL_MAX_QPS ) ];
  449. /** Device limits */
  450. struct arbel_dev_limits limits;
  451. /** Special QPN base */
  452. unsigned long special_qpn_base;
  453. /** QPN base */
  454. unsigned long qpn_base;
  455. /** Infiniband devices */
  456. struct ib_device *ibdev[ARBEL_NUM_PORTS];
  457. };
  458. /** Global protection domain */
  459. #define ARBEL_GLOBAL_PD 0x123456
  460. /** Memory key prefix */
  461. #define ARBEL_MKEY_PREFIX 0x77000000UL
  462. /*
  463. * HCA commands
  464. *
  465. */
  466. #define ARBEL_HCR_BASE 0x80680
  467. #define ARBEL_HCR_REG(x) ( ARBEL_HCR_BASE + 4 * (x) )
  468. #define ARBEL_HCR_MAX_WAIT_MS 2000
  469. #define ARBEL_MBOX_ALIGN 4096
  470. #define ARBEL_MBOX_SIZE 512
  471. /* HCA command is split into
  472. *
  473. * bits 11:0 Opcode
  474. * bit 12 Input uses mailbox
  475. * bit 13 Output uses mailbox
  476. * bits 22:14 Input parameter length (in dwords)
  477. * bits 31:23 Output parameter length (in dwords)
  478. *
  479. * Encoding the information in this way allows us to cut out several
  480. * parameters to the arbel_command() call.
  481. */
  482. #define ARBEL_HCR_IN_MBOX 0x00001000UL
  483. #define ARBEL_HCR_OUT_MBOX 0x00002000UL
  484. #define ARBEL_HCR_OPCODE( _command ) ( (_command) & 0xfff )
  485. #define ARBEL_HCR_IN_LEN( _command ) ( ( (_command) >> 12 ) & 0x7fc )
  486. #define ARBEL_HCR_OUT_LEN( _command ) ( ( (_command) >> 21 ) & 0x7fc )
  487. /** Build HCR command from component parts */
  488. #define ARBEL_HCR_INOUT_CMD( _opcode, _in_mbox, _in_len, \
  489. _out_mbox, _out_len ) \
  490. ( (_opcode) | \
  491. ( (_in_mbox) ? ARBEL_HCR_IN_MBOX : 0 ) | \
  492. ( ( (_in_len) / 4 ) << 14 ) | \
  493. ( (_out_mbox) ? ARBEL_HCR_OUT_MBOX : 0 ) | \
  494. ( ( (_out_len) / 4 ) << 23 ) )
  495. #define ARBEL_HCR_IN_CMD( _opcode, _in_mbox, _in_len ) \
  496. ARBEL_HCR_INOUT_CMD ( _opcode, _in_mbox, _in_len, 0, 0 )
  497. #define ARBEL_HCR_OUT_CMD( _opcode, _out_mbox, _out_len ) \
  498. ARBEL_HCR_INOUT_CMD ( _opcode, 0, 0, _out_mbox, _out_len )
  499. #define ARBEL_HCR_VOID_CMD( _opcode ) \
  500. ARBEL_HCR_INOUT_CMD ( _opcode, 0, 0, 0, 0 )
  501. /*
  502. * Doorbell record allocation
  503. *
  504. * The doorbell record map looks like:
  505. *
  506. * ARBEL_MAX_CQS * Arm completion queue doorbell
  507. * ARBEL_MAX_QPS * Send work request doorbell
  508. * Group separator
  509. * ...(empty space)...
  510. * ARBEL_MAX_QPS * Receive work request doorbell
  511. * ARBEL_MAX_CQS * Completion queue consumer counter update doorbell
  512. */
  513. #define ARBEL_MAX_DOORBELL_RECORDS 512
  514. #define ARBEL_GROUP_SEPARATOR_DOORBELL \
  515. ( ARBEL_MAX_CQS + ARBEL_RSVD_SPECIAL_QPS + ARBEL_MAX_QPS )
  516. /**
  517. * Get arm completion queue doorbell index
  518. *
  519. * @v arbel Arbel device
  520. * @v cq Completion queue
  521. * @ret doorbell_idx Doorbell index
  522. */
  523. static inline unsigned int
  524. arbel_cq_arm_doorbell_idx ( struct arbel *arbel,
  525. struct ib_completion_queue *cq ) {
  526. return ( cq->cqn - arbel->limits.reserved_cqs );
  527. }
  528. /**
  529. * Get send work request doorbell index
  530. *
  531. * @v arbel Arbel device
  532. * @v qp Queue pair
  533. * @ret doorbell_idx Doorbell index
  534. */
  535. static inline unsigned int
  536. arbel_send_doorbell_idx ( struct arbel *arbel, struct ib_queue_pair *qp ) {
  537. return ( ARBEL_MAX_CQS +
  538. ( ( qp->qpn & ~ARBEL_QPN_RANDOM_MASK ) -
  539. arbel->special_qpn_base ) );
  540. }
  541. /**
  542. * Get receive work request doorbell index
  543. *
  544. * @v arbel Arbel device
  545. * @v qp Queue pair
  546. * @ret doorbell_idx Doorbell index
  547. */
  548. static inline unsigned int
  549. arbel_recv_doorbell_idx ( struct arbel *arbel, struct ib_queue_pair *qp ) {
  550. return ( ARBEL_MAX_DOORBELL_RECORDS - ARBEL_MAX_CQS -
  551. ( ( qp->qpn & ~ARBEL_QPN_RANDOM_MASK ) -
  552. arbel->special_qpn_base ) - 1 );
  553. }
  554. /**
  555. * Get completion queue consumer counter doorbell index
  556. *
  557. * @v arbel Arbel device
  558. * @v cq Completion queue
  559. * @ret doorbell_idx Doorbell index
  560. */
  561. static inline unsigned int
  562. arbel_cq_ci_doorbell_idx ( struct arbel *arbel,
  563. struct ib_completion_queue *cq ) {
  564. return ( ARBEL_MAX_DOORBELL_RECORDS -
  565. ( cq->cqn - arbel->limits.reserved_cqs ) - 1 );
  566. }
  567. #endif /* _ARBEL_H */