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arbel.c 92KB

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  1. /*
  2. * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * Based in part upon the original driver by Mellanox Technologies
  5. * Ltd. Portions may be Copyright (c) Mellanox Technologies Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of the
  10. * License, or any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20. * 02110-1301, USA.
  21. *
  22. * You can also choose to distribute this program under the terms of
  23. * the Unmodified Binary Distribution Licence (as given in the file
  24. * COPYING.UBDL), provided that you have satisfied its requirements.
  25. */
  26. FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
  27. #include <stdint.h>
  28. #include <stdlib.h>
  29. #include <stdio.h>
  30. #include <string.h>
  31. #include <strings.h>
  32. #include <unistd.h>
  33. #include <errno.h>
  34. #include <byteswap.h>
  35. #include <ipxe/io.h>
  36. #include <ipxe/pci.h>
  37. #include <ipxe/pcibackup.h>
  38. #include <ipxe/malloc.h>
  39. #include <ipxe/umalloc.h>
  40. #include <ipxe/iobuf.h>
  41. #include <ipxe/netdevice.h>
  42. #include <ipxe/infiniband.h>
  43. #include <ipxe/ib_smc.h>
  44. #include "arbel.h"
  45. /**
  46. * @file
  47. *
  48. * Mellanox Arbel Infiniband HCA
  49. *
  50. */
  51. /***************************************************************************
  52. *
  53. * Queue number allocation
  54. *
  55. ***************************************************************************
  56. */
  57. /**
  58. * Allocate offset within usage bitmask
  59. *
  60. * @v bits Usage bitmask
  61. * @v bits_len Length of usage bitmask
  62. * @ret bit First free bit within bitmask, or negative error
  63. */
  64. static int arbel_bitmask_alloc ( arbel_bitmask_t *bits,
  65. unsigned int bits_len ) {
  66. unsigned int bit = 0;
  67. arbel_bitmask_t mask = 1;
  68. while ( bit < bits_len ) {
  69. if ( ( mask & *bits ) == 0 ) {
  70. *bits |= mask;
  71. return bit;
  72. }
  73. bit++;
  74. mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
  75. if ( mask == 1 )
  76. bits++;
  77. }
  78. return -ENFILE;
  79. }
  80. /**
  81. * Free offset within usage bitmask
  82. *
  83. * @v bits Usage bitmask
  84. * @v bit Bit within bitmask
  85. */
  86. static void arbel_bitmask_free ( arbel_bitmask_t *bits, int bit ) {
  87. arbel_bitmask_t mask;
  88. mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
  89. bits += ( bit / ( 8 * sizeof ( mask ) ) );
  90. *bits &= ~mask;
  91. }
  92. /***************************************************************************
  93. *
  94. * HCA commands
  95. *
  96. ***************************************************************************
  97. */
  98. /**
  99. * Wait for Arbel command completion
  100. *
  101. * @v arbel Arbel device
  102. * @ret rc Return status code
  103. */
  104. static int arbel_cmd_wait ( struct arbel *arbel,
  105. struct arbelprm_hca_command_register *hcr ) {
  106. unsigned int wait;
  107. for ( wait = ARBEL_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  108. hcr->u.dwords[6] =
  109. readl ( arbel->config + ARBEL_HCR_REG ( 6 ) );
  110. if ( MLX_GET ( hcr, go ) == 0 )
  111. return 0;
  112. mdelay ( 1 );
  113. }
  114. return -EBUSY;
  115. }
  116. /**
  117. * Issue HCA command
  118. *
  119. * @v arbel Arbel device
  120. * @v command Command opcode, flags and input/output lengths
  121. * @v op_mod Opcode modifier (0 if no modifier applicable)
  122. * @v in Input parameters
  123. * @v in_mod Input modifier (0 if no modifier applicable)
  124. * @v out Output parameters
  125. * @ret rc Return status code
  126. */
  127. static int arbel_cmd ( struct arbel *arbel, unsigned long command,
  128. unsigned int op_mod, const void *in,
  129. unsigned int in_mod, void *out ) {
  130. struct arbelprm_hca_command_register hcr;
  131. unsigned int opcode = ARBEL_HCR_OPCODE ( command );
  132. size_t in_len = ARBEL_HCR_IN_LEN ( command );
  133. size_t out_len = ARBEL_HCR_OUT_LEN ( command );
  134. void *in_buffer;
  135. void *out_buffer;
  136. unsigned int status;
  137. unsigned int i;
  138. int rc;
  139. assert ( in_len <= ARBEL_MBOX_SIZE );
  140. assert ( out_len <= ARBEL_MBOX_SIZE );
  141. DBGC2 ( arbel, "Arbel %p command %02x in %zx%s out %zx%s\n",
  142. arbel, opcode, in_len,
  143. ( ( command & ARBEL_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  144. ( ( command & ARBEL_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  145. /* Check that HCR is free */
  146. if ( ( rc = arbel_cmd_wait ( arbel, &hcr ) ) != 0 ) {
  147. DBGC ( arbel, "Arbel %p command interface locked\n", arbel );
  148. return rc;
  149. }
  150. /* Prepare HCR */
  151. memset ( &hcr, 0, sizeof ( hcr ) );
  152. in_buffer = &hcr.u.dwords[0];
  153. if ( in_len && ( command & ARBEL_HCR_IN_MBOX ) ) {
  154. in_buffer = arbel->mailbox_in;
  155. MLX_FILL_H ( &hcr, 0, in_param_h, virt_to_bus ( in_buffer ) );
  156. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  157. }
  158. memcpy ( in_buffer, in, in_len );
  159. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  160. out_buffer = &hcr.u.dwords[3];
  161. if ( out_len && ( command & ARBEL_HCR_OUT_MBOX ) ) {
  162. out_buffer = arbel->mailbox_out;
  163. MLX_FILL_H ( &hcr, 3, out_param_h,
  164. virt_to_bus ( out_buffer ) );
  165. MLX_FILL_1 ( &hcr, 4, out_param_l,
  166. virt_to_bus ( out_buffer ) );
  167. }
  168. MLX_FILL_3 ( &hcr, 6,
  169. opcode, opcode,
  170. opcode_modifier, op_mod,
  171. go, 1 );
  172. DBGC ( arbel, "Arbel %p issuing command %04x\n", arbel, opcode );
  173. DBGC2_HDA ( arbel, virt_to_phys ( arbel->config + ARBEL_HCR_BASE ),
  174. &hcr, sizeof ( hcr ) );
  175. if ( in_len && ( command & ARBEL_HCR_IN_MBOX ) ) {
  176. DBGC2 ( arbel, "Input mailbox:\n" );
  177. DBGC2_HDA ( arbel, virt_to_phys ( in_buffer ), in_buffer,
  178. ( ( in_len < 512 ) ? in_len : 512 ) );
  179. }
  180. /* Issue command */
  181. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  182. i++ ) {
  183. writel ( hcr.u.dwords[i],
  184. arbel->config + ARBEL_HCR_REG ( i ) );
  185. barrier();
  186. }
  187. /* Wait for command completion */
  188. if ( ( rc = arbel_cmd_wait ( arbel, &hcr ) ) != 0 ) {
  189. DBGC ( arbel, "Arbel %p timed out waiting for command:\n",
  190. arbel );
  191. DBGC_HD ( arbel, &hcr, sizeof ( hcr ) );
  192. return rc;
  193. }
  194. /* Check command status */
  195. status = MLX_GET ( &hcr, status );
  196. if ( status != 0 ) {
  197. DBGC ( arbel, "Arbel %p command failed with status %02x:\n",
  198. arbel, status );
  199. DBGC_HD ( arbel, &hcr, sizeof ( hcr ) );
  200. return -EIO;
  201. }
  202. /* Read output parameters, if any */
  203. hcr.u.dwords[3] = readl ( arbel->config + ARBEL_HCR_REG ( 3 ) );
  204. hcr.u.dwords[4] = readl ( arbel->config + ARBEL_HCR_REG ( 4 ) );
  205. memcpy ( out, out_buffer, out_len );
  206. if ( out_len ) {
  207. DBGC2 ( arbel, "Output%s:\n",
  208. ( command & ARBEL_HCR_OUT_MBOX ) ? " mailbox" : "" );
  209. DBGC2_HDA ( arbel, virt_to_phys ( out_buffer ), out_buffer,
  210. ( ( out_len < 512 ) ? out_len : 512 ) );
  211. }
  212. return 0;
  213. }
  214. static inline int
  215. arbel_cmd_query_dev_lim ( struct arbel *arbel,
  216. struct arbelprm_query_dev_lim *dev_lim ) {
  217. return arbel_cmd ( arbel,
  218. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_DEV_LIM,
  219. 1, sizeof ( *dev_lim ) ),
  220. 0, NULL, 0, dev_lim );
  221. }
  222. static inline int
  223. arbel_cmd_query_fw ( struct arbel *arbel, struct arbelprm_query_fw *fw ) {
  224. return arbel_cmd ( arbel,
  225. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_FW,
  226. 1, sizeof ( *fw ) ),
  227. 0, NULL, 0, fw );
  228. }
  229. static inline int
  230. arbel_cmd_init_hca ( struct arbel *arbel,
  231. const struct arbelprm_init_hca *init_hca ) {
  232. return arbel_cmd ( arbel,
  233. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT_HCA,
  234. 1, sizeof ( *init_hca ) ),
  235. 0, init_hca, 0, NULL );
  236. }
  237. static inline int
  238. arbel_cmd_close_hca ( struct arbel *arbel ) {
  239. return arbel_cmd ( arbel,
  240. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CLOSE_HCA ),
  241. 0, NULL, 0, NULL );
  242. }
  243. static inline int
  244. arbel_cmd_init_ib ( struct arbel *arbel, unsigned int port,
  245. const struct arbelprm_init_ib *init_ib ) {
  246. return arbel_cmd ( arbel,
  247. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT_IB,
  248. 1, sizeof ( *init_ib ) ),
  249. 0, init_ib, port, NULL );
  250. }
  251. static inline int
  252. arbel_cmd_close_ib ( struct arbel *arbel, unsigned int port ) {
  253. return arbel_cmd ( arbel,
  254. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CLOSE_IB ),
  255. 0, NULL, port, NULL );
  256. }
  257. static inline int
  258. arbel_cmd_sw2hw_mpt ( struct arbel *arbel, unsigned int index,
  259. const struct arbelprm_mpt *mpt ) {
  260. return arbel_cmd ( arbel,
  261. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_MPT,
  262. 1, sizeof ( *mpt ) ),
  263. 0, mpt, index, NULL );
  264. }
  265. static inline int
  266. arbel_cmd_map_eq ( struct arbel *arbel, unsigned long index_map,
  267. const struct arbelprm_event_mask *mask ) {
  268. return arbel_cmd ( arbel,
  269. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_EQ,
  270. 0, sizeof ( *mask ) ),
  271. 0, mask, index_map, NULL );
  272. }
  273. static inline int
  274. arbel_cmd_sw2hw_eq ( struct arbel *arbel, unsigned int index,
  275. const struct arbelprm_eqc *eqctx ) {
  276. return arbel_cmd ( arbel,
  277. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_EQ,
  278. 1, sizeof ( *eqctx ) ),
  279. 0, eqctx, index, NULL );
  280. }
  281. static inline int
  282. arbel_cmd_hw2sw_eq ( struct arbel *arbel, unsigned int index,
  283. struct arbelprm_eqc *eqctx ) {
  284. return arbel_cmd ( arbel,
  285. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_HW2SW_EQ,
  286. 1, sizeof ( *eqctx ) ),
  287. 1, NULL, index, eqctx );
  288. }
  289. static inline int
  290. arbel_cmd_sw2hw_cq ( struct arbel *arbel, unsigned long cqn,
  291. const struct arbelprm_completion_queue_context *cqctx ) {
  292. return arbel_cmd ( arbel,
  293. ARBEL_HCR_IN_CMD ( ARBEL_HCR_SW2HW_CQ,
  294. 1, sizeof ( *cqctx ) ),
  295. 0, cqctx, cqn, NULL );
  296. }
  297. static inline int
  298. arbel_cmd_hw2sw_cq ( struct arbel *arbel, unsigned long cqn,
  299. struct arbelprm_completion_queue_context *cqctx) {
  300. return arbel_cmd ( arbel,
  301. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_HW2SW_CQ,
  302. 1, sizeof ( *cqctx ) ),
  303. 0, NULL, cqn, cqctx );
  304. }
  305. static inline int
  306. arbel_cmd_query_cq ( struct arbel *arbel, unsigned long cqn,
  307. struct arbelprm_completion_queue_context *cqctx ) {
  308. return arbel_cmd ( arbel,
  309. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_CQ,
  310. 1, sizeof ( *cqctx ) ),
  311. 0, NULL, cqn, cqctx );
  312. }
  313. static inline int
  314. arbel_cmd_rst2init_qpee ( struct arbel *arbel, unsigned long qpn,
  315. const struct arbelprm_qp_ee_state_transitions *ctx ){
  316. return arbel_cmd ( arbel,
  317. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RST2INIT_QPEE,
  318. 1, sizeof ( *ctx ) ),
  319. 0, ctx, qpn, NULL );
  320. }
  321. static inline int
  322. arbel_cmd_init2rtr_qpee ( struct arbel *arbel, unsigned long qpn,
  323. const struct arbelprm_qp_ee_state_transitions *ctx ){
  324. return arbel_cmd ( arbel,
  325. ARBEL_HCR_IN_CMD ( ARBEL_HCR_INIT2RTR_QPEE,
  326. 1, sizeof ( *ctx ) ),
  327. 0, ctx, qpn, NULL );
  328. }
  329. static inline int
  330. arbel_cmd_rtr2rts_qpee ( struct arbel *arbel, unsigned long qpn,
  331. const struct arbelprm_qp_ee_state_transitions *ctx ) {
  332. return arbel_cmd ( arbel,
  333. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RTR2RTS_QPEE,
  334. 1, sizeof ( *ctx ) ),
  335. 0, ctx, qpn, NULL );
  336. }
  337. static inline int
  338. arbel_cmd_rts2rts_qpee ( struct arbel *arbel, unsigned long qpn,
  339. const struct arbelprm_qp_ee_state_transitions *ctx ) {
  340. return arbel_cmd ( arbel,
  341. ARBEL_HCR_IN_CMD ( ARBEL_HCR_RTS2RTS_QPEE,
  342. 1, sizeof ( *ctx ) ),
  343. 0, ctx, qpn, NULL );
  344. }
  345. static inline int
  346. arbel_cmd_2rst_qpee ( struct arbel *arbel, unsigned long qpn ) {
  347. return arbel_cmd ( arbel,
  348. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_2RST_QPEE ),
  349. 0x03, NULL, qpn, NULL );
  350. }
  351. static inline int
  352. arbel_cmd_query_qpee ( struct arbel *arbel, unsigned long qpn,
  353. struct arbelprm_qp_ee_state_transitions *ctx ) {
  354. return arbel_cmd ( arbel,
  355. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_QUERY_QPEE,
  356. 1, sizeof ( *ctx ) ),
  357. 0, NULL, qpn, ctx );
  358. }
  359. static inline int
  360. arbel_cmd_conf_special_qp ( struct arbel *arbel, unsigned int qp_type,
  361. unsigned long base_qpn ) {
  362. return arbel_cmd ( arbel,
  363. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_CONF_SPECIAL_QP ),
  364. qp_type, NULL, base_qpn, NULL );
  365. }
  366. static inline int
  367. arbel_cmd_mad_ifc ( struct arbel *arbel, unsigned int port,
  368. union arbelprm_mad *mad ) {
  369. return arbel_cmd ( arbel,
  370. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_MAD_IFC,
  371. 1, sizeof ( *mad ),
  372. 1, sizeof ( *mad ) ),
  373. 0x03, mad, port, mad );
  374. }
  375. static inline int
  376. arbel_cmd_read_mgm ( struct arbel *arbel, unsigned int index,
  377. struct arbelprm_mgm_entry *mgm ) {
  378. return arbel_cmd ( arbel,
  379. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_READ_MGM,
  380. 1, sizeof ( *mgm ) ),
  381. 0, NULL, index, mgm );
  382. }
  383. static inline int
  384. arbel_cmd_write_mgm ( struct arbel *arbel, unsigned int index,
  385. const struct arbelprm_mgm_entry *mgm ) {
  386. return arbel_cmd ( arbel,
  387. ARBEL_HCR_IN_CMD ( ARBEL_HCR_WRITE_MGM,
  388. 1, sizeof ( *mgm ) ),
  389. 0, mgm, index, NULL );
  390. }
  391. static inline int
  392. arbel_cmd_mgid_hash ( struct arbel *arbel, const union ib_gid *gid,
  393. struct arbelprm_mgm_hash *hash ) {
  394. return arbel_cmd ( arbel,
  395. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_MGID_HASH,
  396. 1, sizeof ( *gid ),
  397. 0, sizeof ( *hash ) ),
  398. 0, gid, 0, hash );
  399. }
  400. static inline int
  401. arbel_cmd_run_fw ( struct arbel *arbel ) {
  402. return arbel_cmd ( arbel,
  403. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_RUN_FW ),
  404. 0, NULL, 0, NULL );
  405. }
  406. static inline int
  407. arbel_cmd_disable_lam ( struct arbel *arbel ) {
  408. return arbel_cmd ( arbel,
  409. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_DISABLE_LAM ),
  410. 0, NULL, 0, NULL );
  411. }
  412. static inline int
  413. arbel_cmd_enable_lam ( struct arbel *arbel, struct arbelprm_access_lam *lam ) {
  414. return arbel_cmd ( arbel,
  415. ARBEL_HCR_OUT_CMD ( ARBEL_HCR_ENABLE_LAM,
  416. 1, sizeof ( *lam ) ),
  417. 1, NULL, 0, lam );
  418. }
  419. static inline int
  420. arbel_cmd_unmap_icm ( struct arbel *arbel, unsigned int page_count,
  421. const struct arbelprm_scalar_parameter *offset ) {
  422. return arbel_cmd ( arbel,
  423. ARBEL_HCR_IN_CMD ( ARBEL_HCR_UNMAP_ICM, 0,
  424. sizeof ( *offset ) ),
  425. 0, offset, page_count, NULL );
  426. }
  427. static inline int
  428. arbel_cmd_map_icm ( struct arbel *arbel,
  429. const struct arbelprm_virtual_physical_mapping *map ) {
  430. return arbel_cmd ( arbel,
  431. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_ICM,
  432. 1, sizeof ( *map ) ),
  433. 0, map, 1, NULL );
  434. }
  435. static inline int
  436. arbel_cmd_unmap_icm_aux ( struct arbel *arbel ) {
  437. return arbel_cmd ( arbel,
  438. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_ICM_AUX ),
  439. 0, NULL, 0, NULL );
  440. }
  441. static inline int
  442. arbel_cmd_map_icm_aux ( struct arbel *arbel,
  443. const struct arbelprm_virtual_physical_mapping *map ) {
  444. return arbel_cmd ( arbel,
  445. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_ICM_AUX,
  446. 1, sizeof ( *map ) ),
  447. 0, map, 1, NULL );
  448. }
  449. static inline int
  450. arbel_cmd_set_icm_size ( struct arbel *arbel,
  451. const struct arbelprm_scalar_parameter *icm_size,
  452. struct arbelprm_scalar_parameter *icm_aux_size ) {
  453. return arbel_cmd ( arbel,
  454. ARBEL_HCR_INOUT_CMD ( ARBEL_HCR_SET_ICM_SIZE,
  455. 0, sizeof ( *icm_size ),
  456. 0, sizeof ( *icm_aux_size ) ),
  457. 0, icm_size, 0, icm_aux_size );
  458. }
  459. static inline int
  460. arbel_cmd_unmap_fa ( struct arbel *arbel ) {
  461. return arbel_cmd ( arbel,
  462. ARBEL_HCR_VOID_CMD ( ARBEL_HCR_UNMAP_FA ),
  463. 0, NULL, 0, NULL );
  464. }
  465. static inline int
  466. arbel_cmd_map_fa ( struct arbel *arbel,
  467. const struct arbelprm_virtual_physical_mapping *map ) {
  468. return arbel_cmd ( arbel,
  469. ARBEL_HCR_IN_CMD ( ARBEL_HCR_MAP_FA,
  470. 1, sizeof ( *map ) ),
  471. 0, map, 1, NULL );
  472. }
  473. /***************************************************************************
  474. *
  475. * MAD operations
  476. *
  477. ***************************************************************************
  478. */
  479. /**
  480. * Issue management datagram
  481. *
  482. * @v ibdev Infiniband device
  483. * @v mad Management datagram
  484. * @ret rc Return status code
  485. */
  486. static int arbel_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
  487. struct arbel *arbel = ib_get_drvdata ( ibdev );
  488. union arbelprm_mad mad_ifc;
  489. int rc;
  490. linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
  491. mad_size_mismatch );
  492. /* Copy in request packet */
  493. memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
  494. /* Issue MAD */
  495. if ( ( rc = arbel_cmd_mad_ifc ( arbel, ibdev->port,
  496. &mad_ifc ) ) != 0 ) {
  497. DBGC ( arbel, "Arbel %p port %d could not issue MAD IFC: %s\n",
  498. arbel, ibdev->port, strerror ( rc ) );
  499. return rc;
  500. }
  501. /* Copy out reply packet */
  502. memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
  503. if ( mad->hdr.status != 0 ) {
  504. DBGC ( arbel, "Arbel %p port %d MAD IFC status %04x\n",
  505. arbel, ibdev->port, ntohs ( mad->hdr.status ) );
  506. return -EIO;
  507. }
  508. return 0;
  509. }
  510. /***************************************************************************
  511. *
  512. * Completion queue operations
  513. *
  514. ***************************************************************************
  515. */
  516. /**
  517. * Dump completion queue context (for debugging only)
  518. *
  519. * @v arbel Arbel device
  520. * @v cq Completion queue
  521. * @ret rc Return status code
  522. */
  523. static __attribute__ (( unused )) int
  524. arbel_dump_cqctx ( struct arbel *arbel, struct ib_completion_queue *cq ) {
  525. struct arbelprm_completion_queue_context cqctx;
  526. int rc;
  527. memset ( &cqctx, 0, sizeof ( cqctx ) );
  528. if ( ( rc = arbel_cmd_query_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  529. DBGC ( arbel, "Arbel %p CQN %#lx QUERY_CQ failed: %s\n",
  530. arbel, cq->cqn, strerror ( rc ) );
  531. return rc;
  532. }
  533. DBGC ( arbel, "Arbel %p CQN %#lx context:\n", arbel, cq->cqn );
  534. DBGC_HDA ( arbel, 0, &cqctx, sizeof ( cqctx ) );
  535. return 0;
  536. }
  537. /**
  538. * Create completion queue
  539. *
  540. * @v ibdev Infiniband device
  541. * @v cq Completion queue
  542. * @ret rc Return status code
  543. */
  544. static int arbel_create_cq ( struct ib_device *ibdev,
  545. struct ib_completion_queue *cq ) {
  546. struct arbel *arbel = ib_get_drvdata ( ibdev );
  547. struct arbel_completion_queue *arbel_cq;
  548. struct arbelprm_completion_queue_context cqctx;
  549. struct arbelprm_cq_ci_db_record *ci_db_rec;
  550. struct arbelprm_cq_arm_db_record *arm_db_rec;
  551. int cqn_offset;
  552. unsigned int i;
  553. int rc;
  554. /* Find a free completion queue number */
  555. cqn_offset = arbel_bitmask_alloc ( arbel->cq_inuse, ARBEL_MAX_CQS );
  556. if ( cqn_offset < 0 ) {
  557. DBGC ( arbel, "Arbel %p out of completion queues\n", arbel );
  558. rc = cqn_offset;
  559. goto err_cqn_offset;
  560. }
  561. cq->cqn = ( arbel->limits.reserved_cqs + cqn_offset );
  562. /* Allocate control structures */
  563. arbel_cq = zalloc ( sizeof ( *arbel_cq ) );
  564. if ( ! arbel_cq ) {
  565. rc = -ENOMEM;
  566. goto err_arbel_cq;
  567. }
  568. arbel_cq->ci_doorbell_idx = arbel_cq_ci_doorbell_idx ( arbel, cq );
  569. arbel_cq->arm_doorbell_idx = arbel_cq_arm_doorbell_idx ( arbel, cq );
  570. /* Allocate completion queue itself */
  571. arbel_cq->cqe_size = ( cq->num_cqes * sizeof ( arbel_cq->cqe[0] ) );
  572. arbel_cq->cqe = malloc_dma ( arbel_cq->cqe_size,
  573. sizeof ( arbel_cq->cqe[0] ) );
  574. if ( ! arbel_cq->cqe ) {
  575. rc = -ENOMEM;
  576. goto err_cqe;
  577. }
  578. memset ( arbel_cq->cqe, 0, arbel_cq->cqe_size );
  579. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  580. MLX_FILL_1 ( &arbel_cq->cqe[i].normal, 7, owner, 1 );
  581. }
  582. barrier();
  583. /* Initialise doorbell records */
  584. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  585. MLX_FILL_1 ( ci_db_rec, 0, counter, 0 );
  586. MLX_FILL_2 ( ci_db_rec, 1,
  587. res, ARBEL_UAR_RES_CQ_CI,
  588. cq_number, cq->cqn );
  589. arm_db_rec = &arbel->db_rec[arbel_cq->arm_doorbell_idx].cq_arm;
  590. MLX_FILL_1 ( arm_db_rec, 0, counter, 0 );
  591. MLX_FILL_2 ( arm_db_rec, 1,
  592. res, ARBEL_UAR_RES_CQ_ARM,
  593. cq_number, cq->cqn );
  594. /* Hand queue over to hardware */
  595. memset ( &cqctx, 0, sizeof ( cqctx ) );
  596. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  597. MLX_FILL_H ( &cqctx, 1, start_address_h,
  598. virt_to_bus ( arbel_cq->cqe ) );
  599. MLX_FILL_1 ( &cqctx, 2, start_address_l,
  600. virt_to_bus ( arbel_cq->cqe ) );
  601. MLX_FILL_2 ( &cqctx, 3,
  602. usr_page, arbel->limits.reserved_uars,
  603. log_cq_size, fls ( cq->num_cqes - 1 ) );
  604. MLX_FILL_1 ( &cqctx, 5, c_eqn, arbel->eq.eqn );
  605. MLX_FILL_1 ( &cqctx, 6, pd, ARBEL_GLOBAL_PD );
  606. MLX_FILL_1 ( &cqctx, 7, l_key, arbel->lkey );
  607. MLX_FILL_1 ( &cqctx, 12, cqn, cq->cqn );
  608. MLX_FILL_1 ( &cqctx, 13,
  609. cq_ci_db_record, arbel_cq->ci_doorbell_idx );
  610. MLX_FILL_1 ( &cqctx, 14,
  611. cq_state_db_record, arbel_cq->arm_doorbell_idx );
  612. if ( ( rc = arbel_cmd_sw2hw_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  613. DBGC ( arbel, "Arbel %p CQN %#lx SW2HW_CQ failed: %s\n",
  614. arbel, cq->cqn, strerror ( rc ) );
  615. goto err_sw2hw_cq;
  616. }
  617. DBGC ( arbel, "Arbel %p CQN %#lx ring [%08lx,%08lx), doorbell %08lx\n",
  618. arbel, cq->cqn, virt_to_phys ( arbel_cq->cqe ),
  619. ( virt_to_phys ( arbel_cq->cqe ) + arbel_cq->cqe_size ),
  620. virt_to_phys ( ci_db_rec ) );
  621. ib_cq_set_drvdata ( cq, arbel_cq );
  622. return 0;
  623. err_sw2hw_cq:
  624. MLX_FILL_1 ( ci_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  625. MLX_FILL_1 ( arm_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  626. free_dma ( arbel_cq->cqe, arbel_cq->cqe_size );
  627. err_cqe:
  628. free ( arbel_cq );
  629. err_arbel_cq:
  630. arbel_bitmask_free ( arbel->cq_inuse, cqn_offset );
  631. err_cqn_offset:
  632. return rc;
  633. }
  634. /**
  635. * Destroy completion queue
  636. *
  637. * @v ibdev Infiniband device
  638. * @v cq Completion queue
  639. */
  640. static void arbel_destroy_cq ( struct ib_device *ibdev,
  641. struct ib_completion_queue *cq ) {
  642. struct arbel *arbel = ib_get_drvdata ( ibdev );
  643. struct arbel_completion_queue *arbel_cq = ib_cq_get_drvdata ( cq );
  644. struct arbelprm_completion_queue_context cqctx;
  645. struct arbelprm_cq_ci_db_record *ci_db_rec;
  646. struct arbelprm_cq_arm_db_record *arm_db_rec;
  647. int cqn_offset;
  648. int rc;
  649. /* Take ownership back from hardware */
  650. if ( ( rc = arbel_cmd_hw2sw_cq ( arbel, cq->cqn, &cqctx ) ) != 0 ) {
  651. DBGC ( arbel, "Arbel %p CQN %#lx FATAL HW2SW_CQ failed: "
  652. "%s\n", arbel, cq->cqn, strerror ( rc ) );
  653. /* Leak memory and return; at least we avoid corruption */
  654. return;
  655. }
  656. /* Clear doorbell records */
  657. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  658. arm_db_rec = &arbel->db_rec[arbel_cq->arm_doorbell_idx].cq_arm;
  659. MLX_FILL_1 ( ci_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  660. MLX_FILL_1 ( arm_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  661. /* Free memory */
  662. free_dma ( arbel_cq->cqe, arbel_cq->cqe_size );
  663. free ( arbel_cq );
  664. /* Mark queue number as free */
  665. cqn_offset = ( cq->cqn - arbel->limits.reserved_cqs );
  666. arbel_bitmask_free ( arbel->cq_inuse, cqn_offset );
  667. ib_cq_set_drvdata ( cq, NULL );
  668. }
  669. /***************************************************************************
  670. *
  671. * Queue pair operations
  672. *
  673. ***************************************************************************
  674. */
  675. /**
  676. * Assign queue pair number
  677. *
  678. * @v ibdev Infiniband device
  679. * @v qp Queue pair
  680. * @ret rc Return status code
  681. */
  682. static int arbel_alloc_qpn ( struct ib_device *ibdev,
  683. struct ib_queue_pair *qp ) {
  684. struct arbel *arbel = ib_get_drvdata ( ibdev );
  685. unsigned int port_offset;
  686. int qpn_offset;
  687. /* Calculate queue pair number */
  688. port_offset = ( ibdev->port - ARBEL_PORT_BASE );
  689. switch ( qp->type ) {
  690. case IB_QPT_SMI:
  691. qp->qpn = ( arbel->special_qpn_base + port_offset );
  692. return 0;
  693. case IB_QPT_GSI:
  694. qp->qpn = ( arbel->special_qpn_base + 2 + port_offset );
  695. return 0;
  696. case IB_QPT_UD:
  697. case IB_QPT_RC:
  698. /* Find a free queue pair number */
  699. qpn_offset = arbel_bitmask_alloc ( arbel->qp_inuse,
  700. ARBEL_MAX_QPS );
  701. if ( qpn_offset < 0 ) {
  702. DBGC ( arbel, "Arbel %p out of queue pairs\n",
  703. arbel );
  704. return qpn_offset;
  705. }
  706. qp->qpn = ( ( random() & ARBEL_QPN_RANDOM_MASK ) |
  707. ( arbel->qpn_base + qpn_offset ) );
  708. return 0;
  709. default:
  710. DBGC ( arbel, "Arbel %p unsupported QP type %d\n",
  711. arbel, qp->type );
  712. return -ENOTSUP;
  713. }
  714. }
  715. /**
  716. * Free queue pair number
  717. *
  718. * @v ibdev Infiniband device
  719. * @v qp Queue pair
  720. */
  721. static void arbel_free_qpn ( struct ib_device *ibdev,
  722. struct ib_queue_pair *qp ) {
  723. struct arbel *arbel = ib_get_drvdata ( ibdev );
  724. int qpn_offset;
  725. qpn_offset = ( ( qp->qpn & ~ARBEL_QPN_RANDOM_MASK ) - arbel->qpn_base );
  726. if ( qpn_offset >= 0 )
  727. arbel_bitmask_free ( arbel->qp_inuse, qpn_offset );
  728. }
  729. /**
  730. * Calculate transmission rate
  731. *
  732. * @v av Address vector
  733. * @ret arbel_rate Arbel rate
  734. */
  735. static unsigned int arbel_rate ( struct ib_address_vector *av ) {
  736. return ( ( ( av->rate >= IB_RATE_2_5 ) && ( av->rate <= IB_RATE_120 ) )
  737. ? ( av->rate + 5 ) : 0 );
  738. }
  739. /** Queue pair transport service type map */
  740. static uint8_t arbel_qp_st[] = {
  741. [IB_QPT_SMI] = ARBEL_ST_MLX,
  742. [IB_QPT_GSI] = ARBEL_ST_MLX,
  743. [IB_QPT_UD] = ARBEL_ST_UD,
  744. [IB_QPT_RC] = ARBEL_ST_RC,
  745. };
  746. /**
  747. * Dump queue pair context (for debugging only)
  748. *
  749. * @v arbel Arbel device
  750. * @v qp Queue pair
  751. * @ret rc Return status code
  752. */
  753. static __attribute__ (( unused )) int
  754. arbel_dump_qpctx ( struct arbel *arbel, struct ib_queue_pair *qp ) {
  755. struct arbelprm_qp_ee_state_transitions qpctx;
  756. int rc;
  757. memset ( &qpctx, 0, sizeof ( qpctx ) );
  758. if ( ( rc = arbel_cmd_query_qpee ( arbel, qp->qpn, &qpctx ) ) != 0 ) {
  759. DBGC ( arbel, "Arbel %p QPN %#lx QUERY_QPEE failed: %s\n",
  760. arbel, qp->qpn, strerror ( rc ) );
  761. return rc;
  762. }
  763. DBGC ( arbel, "Arbel %p QPN %#lx context:\n", arbel, qp->qpn );
  764. DBGC_HDA ( arbel, 0, &qpctx.u.dwords[2], ( sizeof ( qpctx ) - 8 ) );
  765. return 0;
  766. }
  767. /**
  768. * Create send work queue
  769. *
  770. * @v arbel_send_wq Send work queue
  771. * @v num_wqes Number of work queue entries
  772. * @ret rc Return status code
  773. */
  774. static int arbel_create_send_wq ( struct arbel_send_work_queue *arbel_send_wq,
  775. unsigned int num_wqes ) {
  776. union arbel_send_wqe *wqe;
  777. union arbel_send_wqe *next_wqe;
  778. unsigned int wqe_idx_mask;
  779. unsigned int i;
  780. /* Allocate work queue */
  781. arbel_send_wq->wqe_size = ( num_wqes *
  782. sizeof ( arbel_send_wq->wqe[0] ) );
  783. arbel_send_wq->wqe = malloc_dma ( arbel_send_wq->wqe_size,
  784. sizeof ( arbel_send_wq->wqe[0] ) );
  785. if ( ! arbel_send_wq->wqe )
  786. return -ENOMEM;
  787. memset ( arbel_send_wq->wqe, 0, arbel_send_wq->wqe_size );
  788. /* Link work queue entries */
  789. wqe_idx_mask = ( num_wqes - 1 );
  790. for ( i = 0 ; i < num_wqes ; i++ ) {
  791. wqe = &arbel_send_wq->wqe[i];
  792. next_wqe = &arbel_send_wq->wqe[ ( i + 1 ) & wqe_idx_mask ];
  793. MLX_FILL_1 ( &wqe->next, 0, nda_31_6,
  794. ( virt_to_bus ( next_wqe ) >> 6 ) );
  795. MLX_FILL_1 ( &wqe->next, 1, always1, 1 );
  796. }
  797. return 0;
  798. }
  799. /**
  800. * Create receive work queue
  801. *
  802. * @v arbel_recv_wq Receive work queue
  803. * @v num_wqes Number of work queue entries
  804. * @ret rc Return status code
  805. */
  806. static int arbel_create_recv_wq ( struct arbel_recv_work_queue *arbel_recv_wq,
  807. unsigned int num_wqes ) {
  808. struct arbelprm_recv_wqe *wqe;
  809. struct arbelprm_recv_wqe *next_wqe;
  810. unsigned int wqe_idx_mask;
  811. size_t nds;
  812. unsigned int i;
  813. unsigned int j;
  814. /* Allocate work queue */
  815. arbel_recv_wq->wqe_size = ( num_wqes *
  816. sizeof ( arbel_recv_wq->wqe[0] ) );
  817. arbel_recv_wq->wqe = malloc_dma ( arbel_recv_wq->wqe_size,
  818. sizeof ( arbel_recv_wq->wqe[0] ) );
  819. if ( ! arbel_recv_wq->wqe )
  820. return -ENOMEM;
  821. memset ( arbel_recv_wq->wqe, 0, arbel_recv_wq->wqe_size );
  822. /* Link work queue entries */
  823. wqe_idx_mask = ( num_wqes - 1 );
  824. nds = ( ( offsetof ( typeof ( *wqe ), data ) +
  825. sizeof ( wqe->data[0] ) ) >> 4 );
  826. for ( i = 0 ; i < num_wqes ; i++ ) {
  827. wqe = &arbel_recv_wq->wqe[i].recv;
  828. next_wqe = &arbel_recv_wq->wqe[( i + 1 ) & wqe_idx_mask].recv;
  829. MLX_FILL_1 ( &wqe->next, 0, nda_31_6,
  830. ( virt_to_bus ( next_wqe ) >> 6 ) );
  831. MLX_FILL_1 ( &wqe->next, 1, nds, nds );
  832. for ( j = 0 ; ( ( ( void * ) &wqe->data[j] ) <
  833. ( ( void * ) ( wqe + 1 ) ) ) ; j++ ) {
  834. MLX_FILL_1 ( &wqe->data[j], 1,
  835. l_key, ARBEL_INVALID_LKEY );
  836. }
  837. }
  838. return 0;
  839. }
  840. /**
  841. * Create queue pair
  842. *
  843. * @v ibdev Infiniband device
  844. * @v qp Queue pair
  845. * @ret rc Return status code
  846. */
  847. static int arbel_create_qp ( struct ib_device *ibdev,
  848. struct ib_queue_pair *qp ) {
  849. struct arbel *arbel = ib_get_drvdata ( ibdev );
  850. struct arbel_queue_pair *arbel_qp;
  851. struct arbelprm_qp_ee_state_transitions qpctx;
  852. struct arbelprm_qp_db_record *send_db_rec;
  853. struct arbelprm_qp_db_record *recv_db_rec;
  854. physaddr_t send_wqe_base_adr;
  855. physaddr_t recv_wqe_base_adr;
  856. physaddr_t wqe_base_adr;
  857. int rc;
  858. /* Warn about dysfunctional code
  859. *
  860. * Arbel seems to crash the system as soon as the first send
  861. * WQE completes on an RC queue pair. (NOPs complete
  862. * successfully, so this is a problem specific to the work
  863. * queue rather than the completion queue.) The cause of this
  864. * problem has remained unknown for over a year. Patches to
  865. * fix this are welcome.
  866. */
  867. if ( qp->type == IB_QPT_RC )
  868. DBG ( "*** WARNING: Arbel RC support is non-functional ***\n" );
  869. /* Calculate queue pair number */
  870. if ( ( rc = arbel_alloc_qpn ( ibdev, qp ) ) != 0 )
  871. goto err_alloc_qpn;
  872. /* Allocate control structures */
  873. arbel_qp = zalloc ( sizeof ( *arbel_qp ) );
  874. if ( ! arbel_qp ) {
  875. rc = -ENOMEM;
  876. goto err_arbel_qp;
  877. }
  878. arbel_qp->send.doorbell_idx = arbel_send_doorbell_idx ( arbel, qp );
  879. arbel_qp->recv.doorbell_idx = arbel_recv_doorbell_idx ( arbel, qp );
  880. /* Create send and receive work queues */
  881. if ( ( rc = arbel_create_send_wq ( &arbel_qp->send,
  882. qp->send.num_wqes ) ) != 0 )
  883. goto err_create_send_wq;
  884. if ( ( rc = arbel_create_recv_wq ( &arbel_qp->recv,
  885. qp->recv.num_wqes ) ) != 0 )
  886. goto err_create_recv_wq;
  887. /* Send and receive work queue entries must be within the same 4GB */
  888. send_wqe_base_adr = virt_to_bus ( arbel_qp->send.wqe );
  889. recv_wqe_base_adr = virt_to_bus ( arbel_qp->recv.wqe );
  890. if ( ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) &&
  891. ( ( ( ( uint64_t ) send_wqe_base_adr ) >> 32 ) !=
  892. ( ( ( uint64_t ) recv_wqe_base_adr ) >> 32 ) ) ) {
  893. DBGC ( arbel, "Arbel %p QPN %#lx cannot support send %08lx "
  894. "recv %08lx\n", arbel, qp->qpn,
  895. send_wqe_base_adr, recv_wqe_base_adr );
  896. rc = -ENOTSUP;
  897. goto err_unsupported_address_split;
  898. }
  899. wqe_base_adr = send_wqe_base_adr;
  900. /* Initialise doorbell records */
  901. send_db_rec = &arbel->db_rec[arbel_qp->send.doorbell_idx].qp;
  902. MLX_FILL_1 ( send_db_rec, 0, counter, 0 );
  903. MLX_FILL_2 ( send_db_rec, 1,
  904. res, ARBEL_UAR_RES_SQ,
  905. qp_number, qp->qpn );
  906. recv_db_rec = &arbel->db_rec[arbel_qp->recv.doorbell_idx].qp;
  907. MLX_FILL_1 ( recv_db_rec, 0, counter, 0 );
  908. MLX_FILL_2 ( recv_db_rec, 1,
  909. res, ARBEL_UAR_RES_RQ,
  910. qp_number, qp->qpn );
  911. /* Transition queue to INIT state */
  912. memset ( &qpctx, 0, sizeof ( qpctx ) );
  913. MLX_FILL_3 ( &qpctx, 2,
  914. qpc_eec_data.de, 1,
  915. qpc_eec_data.pm_state, ARBEL_PM_STATE_MIGRATED,
  916. qpc_eec_data.st, arbel_qp_st[qp->type] );
  917. MLX_FILL_4 ( &qpctx, 4,
  918. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  919. qpc_eec_data.log_rq_stride,
  920. ( fls ( sizeof ( arbel_qp->recv.wqe[0] ) - 1 ) - 4 ),
  921. qpc_eec_data.log_sq_size, fls ( qp->send.num_wqes - 1 ),
  922. qpc_eec_data.log_sq_stride,
  923. ( fls ( sizeof ( arbel_qp->send.wqe[0] ) - 1 ) - 4 ) );
  924. MLX_FILL_1 ( &qpctx, 5,
  925. qpc_eec_data.usr_page, arbel->limits.reserved_uars );
  926. MLX_FILL_1 ( &qpctx, 10, qpc_eec_data.primary_address_path.port_number,
  927. ibdev->port );
  928. MLX_FILL_1 ( &qpctx, 27, qpc_eec_data.pd, ARBEL_GLOBAL_PD );
  929. MLX_FILL_H ( &qpctx, 28, qpc_eec_data.wqe_base_adr_h, wqe_base_adr );
  930. MLX_FILL_1 ( &qpctx, 29, qpc_eec_data.wqe_lkey, arbel->lkey );
  931. MLX_FILL_1 ( &qpctx, 30, qpc_eec_data.ssc, 1 );
  932. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  933. MLX_FILL_1 ( &qpctx, 34, qpc_eec_data.snd_wqe_base_adr_l,
  934. ( send_wqe_base_adr >> 6 ) );
  935. MLX_FILL_1 ( &qpctx, 35, qpc_eec_data.snd_db_record_index,
  936. arbel_qp->send.doorbell_idx );
  937. MLX_FILL_4 ( &qpctx, 38,
  938. qpc_eec_data.rre, 1,
  939. qpc_eec_data.rwe, 1,
  940. qpc_eec_data.rae, 1,
  941. qpc_eec_data.rsc, 1 );
  942. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  943. MLX_FILL_1 ( &qpctx, 42, qpc_eec_data.rcv_wqe_base_adr_l,
  944. ( recv_wqe_base_adr >> 6 ) );
  945. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.rcv_db_record_index,
  946. arbel_qp->recv.doorbell_idx );
  947. if ( ( rc = arbel_cmd_rst2init_qpee ( arbel, qp->qpn, &qpctx )) != 0 ){
  948. DBGC ( arbel, "Arbel %p QPN %#lx RST2INIT_QPEE failed: %s\n",
  949. arbel, qp->qpn, strerror ( rc ) );
  950. goto err_rst2init_qpee;
  951. }
  952. arbel_qp->state = ARBEL_QP_ST_INIT;
  953. DBGC ( arbel, "Arbel %p QPN %#lx send ring [%08lx,%08lx), doorbell "
  954. "%08lx\n", arbel, qp->qpn, virt_to_phys ( arbel_qp->send.wqe ),
  955. ( virt_to_phys ( arbel_qp->send.wqe ) +
  956. arbel_qp->send.wqe_size ),
  957. virt_to_phys ( send_db_rec ) );
  958. DBGC ( arbel, "Arbel %p QPN %#lx receive ring [%08lx,%08lx), doorbell "
  959. "%08lx\n", arbel, qp->qpn, virt_to_phys ( arbel_qp->recv.wqe ),
  960. ( virt_to_phys ( arbel_qp->recv.wqe ) +
  961. arbel_qp->recv.wqe_size ),
  962. virt_to_phys ( recv_db_rec ) );
  963. DBGC ( arbel, "Arbel %p QPN %#lx send CQN %#lx receive CQN %#lx\n",
  964. arbel, qp->qpn, qp->send.cq->cqn, qp->recv.cq->cqn );
  965. ib_qp_set_drvdata ( qp, arbel_qp );
  966. return 0;
  967. arbel_cmd_2rst_qpee ( arbel, qp->qpn );
  968. err_rst2init_qpee:
  969. MLX_FILL_1 ( send_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  970. MLX_FILL_1 ( recv_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  971. err_unsupported_address_split:
  972. free_dma ( arbel_qp->recv.wqe, arbel_qp->recv.wqe_size );
  973. err_create_recv_wq:
  974. free_dma ( arbel_qp->send.wqe, arbel_qp->send.wqe_size );
  975. err_create_send_wq:
  976. free ( arbel_qp );
  977. err_arbel_qp:
  978. arbel_free_qpn ( ibdev, qp );
  979. err_alloc_qpn:
  980. return rc;
  981. }
  982. /**
  983. * Modify queue pair
  984. *
  985. * @v ibdev Infiniband device
  986. * @v qp Queue pair
  987. * @ret rc Return status code
  988. */
  989. static int arbel_modify_qp ( struct ib_device *ibdev,
  990. struct ib_queue_pair *qp ) {
  991. struct arbel *arbel = ib_get_drvdata ( ibdev );
  992. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  993. struct arbelprm_qp_ee_state_transitions qpctx;
  994. int rc;
  995. /* Transition queue to RTR state, if applicable */
  996. if ( arbel_qp->state < ARBEL_QP_ST_RTR ) {
  997. memset ( &qpctx, 0, sizeof ( qpctx ) );
  998. MLX_FILL_2 ( &qpctx, 4,
  999. qpc_eec_data.mtu, ARBEL_MTU_2048,
  1000. qpc_eec_data.msg_max, 31 );
  1001. MLX_FILL_1 ( &qpctx, 7,
  1002. qpc_eec_data.remote_qpn_een, qp->av.qpn );
  1003. MLX_FILL_2 ( &qpctx, 11,
  1004. qpc_eec_data.primary_address_path.rnr_retry,
  1005. ARBEL_RETRY_MAX,
  1006. qpc_eec_data.primary_address_path.rlid,
  1007. qp->av.lid );
  1008. MLX_FILL_2 ( &qpctx, 12,
  1009. qpc_eec_data.primary_address_path.ack_timeout,
  1010. 14 /* 4.096us * 2^(14) = 67ms */,
  1011. qpc_eec_data.primary_address_path.max_stat_rate,
  1012. arbel_rate ( &qp->av ) );
  1013. memcpy ( &qpctx.u.dwords[14], &qp->av.gid,
  1014. sizeof ( qp->av.gid ) );
  1015. MLX_FILL_1 ( &qpctx, 30,
  1016. qpc_eec_data.retry_count, ARBEL_RETRY_MAX );
  1017. MLX_FILL_1 ( &qpctx, 39,
  1018. qpc_eec_data.next_rcv_psn, qp->recv.psn );
  1019. MLX_FILL_1 ( &qpctx, 40,
  1020. qpc_eec_data.ra_buff_indx,
  1021. ( arbel->limits.reserved_rdbs +
  1022. ( ( qp->qpn & ~ARBEL_QPN_RANDOM_MASK ) -
  1023. arbel->special_qpn_base ) ) );
  1024. if ( ( rc = arbel_cmd_init2rtr_qpee ( arbel, qp->qpn,
  1025. &qpctx ) ) != 0 ) {
  1026. DBGC ( arbel, "Arbel %p QPN %#lx INIT2RTR_QPEE failed:"
  1027. " %s\n", arbel, qp->qpn, strerror ( rc ) );
  1028. return rc;
  1029. }
  1030. arbel_qp->state = ARBEL_QP_ST_RTR;
  1031. }
  1032. /* Transition queue to RTS state, if applicable */
  1033. if ( arbel_qp->state < ARBEL_QP_ST_RTS ) {
  1034. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1035. MLX_FILL_1 ( &qpctx, 11,
  1036. qpc_eec_data.primary_address_path.rnr_retry,
  1037. ARBEL_RETRY_MAX );
  1038. MLX_FILL_1 ( &qpctx, 12,
  1039. qpc_eec_data.primary_address_path.ack_timeout,
  1040. 14 /* 4.096us * 2^(14) = 67ms */ );
  1041. MLX_FILL_2 ( &qpctx, 30,
  1042. qpc_eec_data.retry_count, ARBEL_RETRY_MAX,
  1043. qpc_eec_data.sic, 1 );
  1044. MLX_FILL_1 ( &qpctx, 32,
  1045. qpc_eec_data.next_send_psn, qp->send.psn );
  1046. if ( ( rc = arbel_cmd_rtr2rts_qpee ( arbel, qp->qpn,
  1047. &qpctx ) ) != 0 ) {
  1048. DBGC ( arbel, "Arbel %p QPN %#lx RTR2RTS_QPEE failed: "
  1049. "%s\n", arbel, qp->qpn, strerror ( rc ) );
  1050. return rc;
  1051. }
  1052. arbel_qp->state = ARBEL_QP_ST_RTS;
  1053. }
  1054. /* Update parameters in RTS state */
  1055. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1056. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, ARBEL_QPEE_OPT_PARAM_QKEY );
  1057. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  1058. if ( ( rc = arbel_cmd_rts2rts_qpee ( arbel, qp->qpn, &qpctx ) ) != 0 ){
  1059. DBGC ( arbel, "Arbel %p QPN %#lx RTS2RTS_QPEE failed: %s\n",
  1060. arbel, qp->qpn, strerror ( rc ) );
  1061. return rc;
  1062. }
  1063. return 0;
  1064. }
  1065. /**
  1066. * Destroy queue pair
  1067. *
  1068. * @v ibdev Infiniband device
  1069. * @v qp Queue pair
  1070. */
  1071. static void arbel_destroy_qp ( struct ib_device *ibdev,
  1072. struct ib_queue_pair *qp ) {
  1073. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1074. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  1075. struct arbelprm_qp_db_record *send_db_rec;
  1076. struct arbelprm_qp_db_record *recv_db_rec;
  1077. int rc;
  1078. /* Take ownership back from hardware */
  1079. if ( ( rc = arbel_cmd_2rst_qpee ( arbel, qp->qpn ) ) != 0 ) {
  1080. DBGC ( arbel, "Arbel %p QPN %#lx FATAL 2RST_QPEE failed: "
  1081. "%s\n", arbel, qp->qpn, strerror ( rc ) );
  1082. /* Leak memory and return; at least we avoid corruption */
  1083. return;
  1084. }
  1085. /* Clear doorbell records */
  1086. send_db_rec = &arbel->db_rec[arbel_qp->send.doorbell_idx].qp;
  1087. recv_db_rec = &arbel->db_rec[arbel_qp->recv.doorbell_idx].qp;
  1088. MLX_FILL_1 ( send_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  1089. MLX_FILL_1 ( recv_db_rec, 1, res, ARBEL_UAR_RES_NONE );
  1090. /* Free memory */
  1091. free_dma ( arbel_qp->send.wqe, arbel_qp->send.wqe_size );
  1092. free_dma ( arbel_qp->recv.wqe, arbel_qp->recv.wqe_size );
  1093. free ( arbel_qp );
  1094. /* Mark queue number as free */
  1095. arbel_free_qpn ( ibdev, qp );
  1096. ib_qp_set_drvdata ( qp, NULL );
  1097. }
  1098. /***************************************************************************
  1099. *
  1100. * Work request operations
  1101. *
  1102. ***************************************************************************
  1103. */
  1104. /**
  1105. * Ring doorbell register in UAR
  1106. *
  1107. * @v arbel Arbel device
  1108. * @v db_reg Doorbell register structure
  1109. * @v offset Address of doorbell
  1110. */
  1111. static void arbel_ring_doorbell ( struct arbel *arbel,
  1112. union arbelprm_doorbell_register *db_reg,
  1113. unsigned int offset ) {
  1114. DBGC2 ( arbel, "Arbel %p ringing doorbell %08x:%08x at %lx\n",
  1115. arbel, ntohl ( db_reg->dword[0] ), ntohl ( db_reg->dword[1] ),
  1116. virt_to_phys ( arbel->uar + offset ) );
  1117. barrier();
  1118. writel ( db_reg->dword[0], ( arbel->uar + offset + 0 ) );
  1119. barrier();
  1120. writel ( db_reg->dword[1], ( arbel->uar + offset + 4 ) );
  1121. }
  1122. /** GID used for GID-less send work queue entries */
  1123. static const union ib_gid arbel_no_gid = {
  1124. .bytes = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0 },
  1125. };
  1126. /**
  1127. * Construct UD send work queue entry
  1128. *
  1129. * @v ibdev Infiniband device
  1130. * @v qp Queue pair
  1131. * @v dest Destination address vector
  1132. * @v iobuf I/O buffer
  1133. * @v wqe Send work queue entry
  1134. * @ret nds Work queue entry size
  1135. */
  1136. static size_t arbel_fill_ud_send_wqe ( struct ib_device *ibdev,
  1137. struct ib_queue_pair *qp __unused,
  1138. struct ib_address_vector *dest,
  1139. struct io_buffer *iobuf,
  1140. union arbel_send_wqe *wqe ) {
  1141. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1142. const union ib_gid *gid;
  1143. /* Construct this work queue entry */
  1144. MLX_FILL_1 ( &wqe->ud.ctrl, 0, always1, 1 );
  1145. MLX_FILL_2 ( &wqe->ud.ud, 0,
  1146. ud_address_vector.pd, ARBEL_GLOBAL_PD,
  1147. ud_address_vector.port_number, ibdev->port );
  1148. MLX_FILL_2 ( &wqe->ud.ud, 1,
  1149. ud_address_vector.rlid, dest->lid,
  1150. ud_address_vector.g, dest->gid_present );
  1151. MLX_FILL_2 ( &wqe->ud.ud, 2,
  1152. ud_address_vector.max_stat_rate, arbel_rate ( dest ),
  1153. ud_address_vector.msg, 3 );
  1154. MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, dest->sl );
  1155. gid = ( dest->gid_present ? &dest->gid : &arbel_no_gid );
  1156. memcpy ( &wqe->ud.ud.u.dwords[4], gid, sizeof ( *gid ) );
  1157. MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, dest->qpn );
  1158. MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, dest->qkey );
  1159. MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
  1160. MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, arbel->lkey );
  1161. MLX_FILL_H ( &wqe->ud.data[0], 2,
  1162. local_address_h, virt_to_bus ( iobuf->data ) );
  1163. MLX_FILL_1 ( &wqe->ud.data[0], 3,
  1164. local_address_l, virt_to_bus ( iobuf->data ) );
  1165. return ( offsetof ( typeof ( wqe->ud ), data[1] ) >> 4 );
  1166. }
  1167. /**
  1168. * Construct MLX send work queue entry
  1169. *
  1170. * @v ibdev Infiniband device
  1171. * @v qp Queue pair
  1172. * @v dest Destination address vector
  1173. * @v iobuf I/O buffer
  1174. * @v wqe Send work queue entry
  1175. * @ret nds Work queue entry size
  1176. */
  1177. static size_t arbel_fill_mlx_send_wqe ( struct ib_device *ibdev,
  1178. struct ib_queue_pair *qp,
  1179. struct ib_address_vector *dest,
  1180. struct io_buffer *iobuf,
  1181. union arbel_send_wqe *wqe ) {
  1182. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1183. struct io_buffer headers;
  1184. /* Construct IB headers */
  1185. iob_populate ( &headers, &wqe->mlx.headers, 0,
  1186. sizeof ( wqe->mlx.headers ) );
  1187. iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
  1188. ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), dest );
  1189. /* Construct this work queue entry */
  1190. MLX_FILL_5 ( &wqe->mlx.ctrl, 0,
  1191. c, 1 /* generate completion */,
  1192. icrc, 0 /* generate ICRC */,
  1193. max_statrate, arbel_rate ( dest ),
  1194. slr, 0,
  1195. v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
  1196. MLX_FILL_1 ( &wqe->mlx.ctrl, 1, rlid, dest->lid );
  1197. MLX_FILL_1 ( &wqe->mlx.data[0], 0,
  1198. byte_count, iob_len ( &headers ) );
  1199. MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, arbel->lkey );
  1200. MLX_FILL_H ( &wqe->mlx.data[0], 2,
  1201. local_address_h, virt_to_bus ( headers.data ) );
  1202. MLX_FILL_1 ( &wqe->mlx.data[0], 3,
  1203. local_address_l, virt_to_bus ( headers.data ) );
  1204. MLX_FILL_1 ( &wqe->mlx.data[1], 0,
  1205. byte_count, ( iob_len ( iobuf ) + 4 /* ICRC */ ) );
  1206. MLX_FILL_1 ( &wqe->mlx.data[1], 1, l_key, arbel->lkey );
  1207. MLX_FILL_H ( &wqe->mlx.data[1], 2,
  1208. local_address_h, virt_to_bus ( iobuf->data ) );
  1209. MLX_FILL_1 ( &wqe->mlx.data[1], 3,
  1210. local_address_l, virt_to_bus ( iobuf->data ) );
  1211. return ( offsetof ( typeof ( wqe->mlx ), data[2] ) >> 4 );
  1212. }
  1213. /**
  1214. * Construct RC send work queue entry
  1215. *
  1216. * @v ibdev Infiniband device
  1217. * @v qp Queue pair
  1218. * @v dest Destination address vector
  1219. * @v iobuf I/O buffer
  1220. * @v wqe Send work queue entry
  1221. * @ret nds Work queue entry size
  1222. */
  1223. static size_t arbel_fill_rc_send_wqe ( struct ib_device *ibdev,
  1224. struct ib_queue_pair *qp __unused,
  1225. struct ib_address_vector *dest __unused,
  1226. struct io_buffer *iobuf,
  1227. union arbel_send_wqe *wqe ) {
  1228. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1229. /* Construct this work queue entry */
  1230. MLX_FILL_1 ( &wqe->rc.ctrl, 0, always1, 1 );
  1231. MLX_FILL_1 ( &wqe->rc.data[0], 0, byte_count, iob_len ( iobuf ) );
  1232. MLX_FILL_1 ( &wqe->rc.data[0], 1, l_key, arbel->lkey );
  1233. MLX_FILL_H ( &wqe->rc.data[0], 2,
  1234. local_address_h, virt_to_bus ( iobuf->data ) );
  1235. MLX_FILL_1 ( &wqe->rc.data[0], 3,
  1236. local_address_l, virt_to_bus ( iobuf->data ) );
  1237. return ( offsetof ( typeof ( wqe->rc ), data[1] ) >> 4 );
  1238. }
  1239. /** Work queue entry constructors */
  1240. static size_t
  1241. ( * arbel_fill_send_wqe[] ) ( struct ib_device *ibdev,
  1242. struct ib_queue_pair *qp,
  1243. struct ib_address_vector *dest,
  1244. struct io_buffer *iobuf,
  1245. union arbel_send_wqe *wqe ) = {
  1246. [IB_QPT_SMI] = arbel_fill_mlx_send_wqe,
  1247. [IB_QPT_GSI] = arbel_fill_mlx_send_wqe,
  1248. [IB_QPT_UD] = arbel_fill_ud_send_wqe,
  1249. [IB_QPT_RC] = arbel_fill_rc_send_wqe,
  1250. };
  1251. /**
  1252. * Post send work queue entry
  1253. *
  1254. * @v ibdev Infiniband device
  1255. * @v qp Queue pair
  1256. * @v dest Destination address vector
  1257. * @v iobuf I/O buffer
  1258. * @ret rc Return status code
  1259. */
  1260. static int arbel_post_send ( struct ib_device *ibdev,
  1261. struct ib_queue_pair *qp,
  1262. struct ib_address_vector *dest,
  1263. struct io_buffer *iobuf ) {
  1264. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1265. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  1266. struct ib_work_queue *wq = &qp->send;
  1267. struct arbel_send_work_queue *arbel_send_wq = &arbel_qp->send;
  1268. union arbel_send_wqe *prev_wqe;
  1269. union arbel_send_wqe *wqe;
  1270. struct arbelprm_qp_db_record *qp_db_rec;
  1271. union arbelprm_doorbell_register db_reg;
  1272. unsigned long wqe_idx_mask;
  1273. size_t nds;
  1274. /* Allocate work queue entry */
  1275. wqe_idx_mask = ( wq->num_wqes - 1 );
  1276. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1277. DBGC ( arbel, "Arbel %p QPN %#lx send queue full",
  1278. arbel, qp->qpn );
  1279. return -ENOBUFS;
  1280. }
  1281. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1282. prev_wqe = &arbel_send_wq->wqe[(wq->next_idx - 1) & wqe_idx_mask];
  1283. wqe = &arbel_send_wq->wqe[wq->next_idx & wqe_idx_mask];
  1284. /* Construct work queue entry */
  1285. memset ( ( ( ( void * ) wqe ) + sizeof ( wqe->next ) ), 0,
  1286. ( sizeof ( *wqe ) - sizeof ( wqe->next ) ) );
  1287. assert ( qp->type < ( sizeof ( arbel_fill_send_wqe ) /
  1288. sizeof ( arbel_fill_send_wqe[0] ) ) );
  1289. assert ( arbel_fill_send_wqe[qp->type] != NULL );
  1290. nds = arbel_fill_send_wqe[qp->type] ( ibdev, qp, dest, iobuf, wqe );
  1291. DBGCP ( arbel, "Arbel %p QPN %#lx posting send WQE %#lx:\n",
  1292. arbel, qp->qpn, ( wq->next_idx & wqe_idx_mask ) );
  1293. DBGCP_HDA ( arbel, virt_to_phys ( wqe ), wqe, sizeof ( *wqe ) );
  1294. /* Update previous work queue entry's "next" field */
  1295. MLX_SET ( &prev_wqe->next, nopcode, ARBEL_OPCODE_SEND );
  1296. MLX_FILL_3 ( &prev_wqe->next, 1,
  1297. nds, nds,
  1298. f, 0,
  1299. always1, 1 );
  1300. /* Update doorbell record */
  1301. barrier();
  1302. qp_db_rec = &arbel->db_rec[arbel_send_wq->doorbell_idx].qp;
  1303. MLX_FILL_1 ( qp_db_rec, 0,
  1304. counter, ( ( wq->next_idx + 1 ) & 0xffff ) );
  1305. /* Ring doorbell register */
  1306. MLX_FILL_4 ( &db_reg.send, 0,
  1307. nopcode, ARBEL_OPCODE_SEND,
  1308. f, 0,
  1309. wqe_counter, ( wq->next_idx & 0xffff ),
  1310. wqe_cnt, 1 );
  1311. MLX_FILL_2 ( &db_reg.send, 1,
  1312. nds, nds,
  1313. qpn, qp->qpn );
  1314. arbel_ring_doorbell ( arbel, &db_reg, ARBEL_DB_POST_SND_OFFSET );
  1315. /* Update work queue's index */
  1316. wq->next_idx++;
  1317. return 0;
  1318. }
  1319. /**
  1320. * Post receive work queue entry
  1321. *
  1322. * @v ibdev Infiniband device
  1323. * @v qp Queue pair
  1324. * @v iobuf I/O buffer
  1325. * @ret rc Return status code
  1326. */
  1327. static int arbel_post_recv ( struct ib_device *ibdev,
  1328. struct ib_queue_pair *qp,
  1329. struct io_buffer *iobuf ) {
  1330. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1331. struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
  1332. struct ib_work_queue *wq = &qp->recv;
  1333. struct arbel_recv_work_queue *arbel_recv_wq = &arbel_qp->recv;
  1334. struct arbelprm_recv_wqe *wqe;
  1335. union arbelprm_doorbell_record *db_rec;
  1336. unsigned int wqe_idx_mask;
  1337. /* Allocate work queue entry */
  1338. wqe_idx_mask = ( wq->num_wqes - 1 );
  1339. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1340. DBGC ( arbel, "Arbel %p QPN %#lx receive queue full\n",
  1341. arbel, qp->qpn );
  1342. return -ENOBUFS;
  1343. }
  1344. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1345. wqe = &arbel_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  1346. /* Construct work queue entry */
  1347. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
  1348. MLX_FILL_1 ( &wqe->data[0], 1, l_key, arbel->lkey );
  1349. MLX_FILL_H ( &wqe->data[0], 2,
  1350. local_address_h, virt_to_bus ( iobuf->data ) );
  1351. MLX_FILL_1 ( &wqe->data[0], 3,
  1352. local_address_l, virt_to_bus ( iobuf->data ) );
  1353. /* Update doorbell record */
  1354. barrier();
  1355. db_rec = &arbel->db_rec[arbel_recv_wq->doorbell_idx];
  1356. MLX_FILL_1 ( &db_rec->qp, 0,
  1357. counter, ( ( wq->next_idx + 1 ) & 0xffff ) );
  1358. /* Update work queue's index */
  1359. wq->next_idx++;
  1360. return 0;
  1361. }
  1362. /**
  1363. * Handle completion
  1364. *
  1365. * @v ibdev Infiniband device
  1366. * @v cq Completion queue
  1367. * @v cqe Hardware completion queue entry
  1368. * @ret rc Return status code
  1369. */
  1370. static int arbel_complete ( struct ib_device *ibdev,
  1371. struct ib_completion_queue *cq,
  1372. union arbelprm_completion_entry *cqe ) {
  1373. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1374. struct ib_work_queue *wq;
  1375. struct ib_queue_pair *qp;
  1376. struct arbel_queue_pair *arbel_qp;
  1377. struct arbel_send_work_queue *arbel_send_wq;
  1378. struct arbel_recv_work_queue *arbel_recv_wq;
  1379. struct arbelprm_recv_wqe *recv_wqe;
  1380. struct io_buffer *iobuf;
  1381. struct ib_address_vector recv_dest;
  1382. struct ib_address_vector recv_source;
  1383. struct ib_global_route_header *grh;
  1384. struct ib_address_vector *source;
  1385. unsigned int opcode;
  1386. unsigned long qpn;
  1387. int is_send;
  1388. unsigned long wqe_adr;
  1389. unsigned long wqe_idx;
  1390. size_t len;
  1391. int rc = 0;
  1392. /* Parse completion */
  1393. qpn = MLX_GET ( &cqe->normal, my_qpn );
  1394. is_send = MLX_GET ( &cqe->normal, s );
  1395. wqe_adr = ( MLX_GET ( &cqe->normal, wqe_adr ) << 6 );
  1396. opcode = MLX_GET ( &cqe->normal, opcode );
  1397. if ( opcode >= ARBEL_OPCODE_RECV_ERROR ) {
  1398. /* "s" field is not valid for error opcodes */
  1399. is_send = ( opcode == ARBEL_OPCODE_SEND_ERROR );
  1400. DBGC ( arbel, "Arbel %p CQN %#lx %s QPN %#lx syndrome %#x "
  1401. "vendor %#x\n", arbel, cq->cqn,
  1402. ( is_send ? "send" : "recv" ), qpn,
  1403. MLX_GET ( &cqe->error, syndrome ),
  1404. MLX_GET ( &cqe->error, vendor_code ) );
  1405. DBGC_HDA ( arbel, virt_to_phys ( cqe ), cqe, sizeof ( *cqe ) );
  1406. rc = -EIO;
  1407. /* Don't return immediately; propagate error to completer */
  1408. }
  1409. /* Identify work queue */
  1410. wq = ib_find_wq ( cq, qpn, is_send );
  1411. if ( ! wq ) {
  1412. DBGC ( arbel, "Arbel %p CQN %#lx unknown %s QPN %#lx\n",
  1413. arbel, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1414. return -EIO;
  1415. }
  1416. qp = wq->qp;
  1417. arbel_qp = ib_qp_get_drvdata ( qp );
  1418. arbel_send_wq = &arbel_qp->send;
  1419. arbel_recv_wq = &arbel_qp->recv;
  1420. /* Identify work queue entry index */
  1421. if ( is_send ) {
  1422. wqe_idx = ( ( wqe_adr - virt_to_bus ( arbel_send_wq->wqe ) ) /
  1423. sizeof ( arbel_send_wq->wqe[0] ) );
  1424. assert ( wqe_idx < qp->send.num_wqes );
  1425. } else {
  1426. wqe_idx = ( ( wqe_adr - virt_to_bus ( arbel_recv_wq->wqe ) ) /
  1427. sizeof ( arbel_recv_wq->wqe[0] ) );
  1428. assert ( wqe_idx < qp->recv.num_wqes );
  1429. }
  1430. DBGCP ( arbel, "Arbel %p CQN %#lx QPN %#lx %s WQE %#lx completed:\n",
  1431. arbel, cq->cqn, qp->qpn, ( is_send ? "send" : "recv" ),
  1432. wqe_idx );
  1433. DBGCP_HDA ( arbel, virt_to_phys ( cqe ), cqe, sizeof ( *cqe ) );
  1434. /* Identify I/O buffer */
  1435. iobuf = wq->iobufs[wqe_idx];
  1436. if ( ! iobuf ) {
  1437. DBGC ( arbel, "Arbel %p CQN %#lx QPN %#lx empty %s WQE %#lx\n",
  1438. arbel, cq->cqn, qp->qpn, ( is_send ? "send" : "recv" ),
  1439. wqe_idx );
  1440. return -EIO;
  1441. }
  1442. wq->iobufs[wqe_idx] = NULL;
  1443. if ( is_send ) {
  1444. /* Hand off to completion handler */
  1445. ib_complete_send ( ibdev, qp, iobuf, rc );
  1446. } else {
  1447. /* Set received length */
  1448. len = MLX_GET ( &cqe->normal, byte_cnt );
  1449. recv_wqe = &arbel_recv_wq->wqe[wqe_idx].recv;
  1450. assert ( MLX_GET ( &recv_wqe->data[0], local_address_l ) ==
  1451. virt_to_bus ( iobuf->data ) );
  1452. assert ( MLX_GET ( &recv_wqe->data[0], byte_count ) ==
  1453. iob_tailroom ( iobuf ) );
  1454. MLX_FILL_1 ( &recv_wqe->data[0], 0, byte_count, 0 );
  1455. MLX_FILL_1 ( &recv_wqe->data[0], 1,
  1456. l_key, ARBEL_INVALID_LKEY );
  1457. assert ( len <= iob_tailroom ( iobuf ) );
  1458. iob_put ( iobuf, len );
  1459. memset ( &recv_dest, 0, sizeof ( recv_dest ) );
  1460. recv_dest.qpn = qpn;
  1461. switch ( qp->type ) {
  1462. case IB_QPT_SMI:
  1463. case IB_QPT_GSI:
  1464. case IB_QPT_UD:
  1465. assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
  1466. grh = iobuf->data;
  1467. iob_pull ( iobuf, sizeof ( *grh ) );
  1468. /* Construct address vector */
  1469. source = &recv_source;
  1470. memset ( source, 0, sizeof ( *source ) );
  1471. source->qpn = MLX_GET ( &cqe->normal, rqpn );
  1472. source->lid = MLX_GET ( &cqe->normal, rlid );
  1473. source->sl = MLX_GET ( &cqe->normal, sl );
  1474. recv_dest.gid_present = source->gid_present =
  1475. MLX_GET ( &cqe->normal, g );
  1476. memcpy ( &recv_dest.gid, &grh->dgid,
  1477. sizeof ( recv_dest.gid ) );
  1478. memcpy ( &source->gid, &grh->sgid,
  1479. sizeof ( source->gid ) );
  1480. break;
  1481. case IB_QPT_RC:
  1482. source = &qp->av;
  1483. break;
  1484. default:
  1485. assert ( 0 );
  1486. return -EINVAL;
  1487. }
  1488. /* Hand off to completion handler */
  1489. ib_complete_recv ( ibdev, qp, &recv_dest, source, iobuf, rc );
  1490. }
  1491. return rc;
  1492. }
  1493. /**
  1494. * Poll completion queue
  1495. *
  1496. * @v ibdev Infiniband device
  1497. * @v cq Completion queue
  1498. */
  1499. static void arbel_poll_cq ( struct ib_device *ibdev,
  1500. struct ib_completion_queue *cq ) {
  1501. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1502. struct arbel_completion_queue *arbel_cq = ib_cq_get_drvdata ( cq );
  1503. struct arbelprm_cq_ci_db_record *ci_db_rec;
  1504. union arbelprm_completion_entry *cqe;
  1505. unsigned int cqe_idx_mask;
  1506. int rc;
  1507. while ( 1 ) {
  1508. /* Look for completion entry */
  1509. cqe_idx_mask = ( cq->num_cqes - 1 );
  1510. cqe = &arbel_cq->cqe[cq->next_idx & cqe_idx_mask];
  1511. if ( MLX_GET ( &cqe->normal, owner ) != 0 ) {
  1512. /* Entry still owned by hardware; end of poll */
  1513. break;
  1514. }
  1515. /* Handle completion */
  1516. if ( ( rc = arbel_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1517. DBGC ( arbel, "Arbel %p CQN %#lx failed to complete: "
  1518. "%s\n", arbel, cq->cqn, strerror ( rc ) );
  1519. DBGC_HD ( arbel, cqe, sizeof ( *cqe ) );
  1520. }
  1521. /* Return ownership to hardware */
  1522. MLX_FILL_1 ( &cqe->normal, 7, owner, 1 );
  1523. barrier();
  1524. /* Update completion queue's index */
  1525. cq->next_idx++;
  1526. /* Update doorbell record */
  1527. ci_db_rec = &arbel->db_rec[arbel_cq->ci_doorbell_idx].cq_ci;
  1528. MLX_FILL_1 ( ci_db_rec, 0,
  1529. counter, ( cq->next_idx & 0xffffffffUL ) );
  1530. }
  1531. }
  1532. /***************************************************************************
  1533. *
  1534. * Event queues
  1535. *
  1536. ***************************************************************************
  1537. */
  1538. /**
  1539. * Create event queue
  1540. *
  1541. * @v arbel Arbel device
  1542. * @ret rc Return status code
  1543. */
  1544. static int arbel_create_eq ( struct arbel *arbel ) {
  1545. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1546. struct arbelprm_eqc eqctx;
  1547. struct arbelprm_event_mask mask;
  1548. unsigned int i;
  1549. int rc;
  1550. /* Select event queue number */
  1551. arbel_eq->eqn = arbel->limits.reserved_eqs;
  1552. /* Calculate doorbell address */
  1553. arbel_eq->doorbell = ( arbel->eq_ci_doorbells +
  1554. ARBEL_DB_EQ_OFFSET ( arbel_eq->eqn ) );
  1555. /* Allocate event queue itself */
  1556. arbel_eq->eqe_size =
  1557. ( ARBEL_NUM_EQES * sizeof ( arbel_eq->eqe[0] ) );
  1558. arbel_eq->eqe = malloc_dma ( arbel_eq->eqe_size,
  1559. sizeof ( arbel_eq->eqe[0] ) );
  1560. if ( ! arbel_eq->eqe ) {
  1561. rc = -ENOMEM;
  1562. goto err_eqe;
  1563. }
  1564. memset ( arbel_eq->eqe, 0, arbel_eq->eqe_size );
  1565. for ( i = 0 ; i < ARBEL_NUM_EQES ; i++ ) {
  1566. MLX_FILL_1 ( &arbel_eq->eqe[i].generic, 7, owner, 1 );
  1567. }
  1568. barrier();
  1569. /* Hand queue over to hardware */
  1570. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1571. MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
  1572. MLX_FILL_H ( &eqctx, 1,
  1573. start_address_h, virt_to_phys ( arbel_eq->eqe ) );
  1574. MLX_FILL_1 ( &eqctx, 2,
  1575. start_address_l, virt_to_phys ( arbel_eq->eqe ) );
  1576. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( ARBEL_NUM_EQES - 1 ) );
  1577. MLX_FILL_1 ( &eqctx, 6, pd, ARBEL_GLOBAL_PD );
  1578. MLX_FILL_1 ( &eqctx, 7, lkey, arbel->lkey );
  1579. if ( ( rc = arbel_cmd_sw2hw_eq ( arbel, arbel_eq->eqn,
  1580. &eqctx ) ) != 0 ) {
  1581. DBGC ( arbel, "Arbel %p EQN %#lx SW2HW_EQ failed: %s\n",
  1582. arbel, arbel_eq->eqn, strerror ( rc ) );
  1583. goto err_sw2hw_eq;
  1584. }
  1585. /* Map events to this event queue */
  1586. memset ( &mask, 0xff, sizeof ( mask ) );
  1587. if ( ( rc = arbel_cmd_map_eq ( arbel,
  1588. ( ARBEL_MAP_EQ | arbel_eq->eqn ),
  1589. &mask ) ) != 0 ) {
  1590. DBGC ( arbel, "Arbel %p EQN %#lx MAP_EQ failed: %s\n",
  1591. arbel, arbel_eq->eqn, strerror ( rc ) );
  1592. goto err_map_eq;
  1593. }
  1594. DBGC ( arbel, "Arbel %p EQN %#lx ring [%08lx,%08lx), doorbell %08lx\n",
  1595. arbel, arbel_eq->eqn, virt_to_phys ( arbel_eq->eqe ),
  1596. ( virt_to_phys ( arbel_eq->eqe ) + arbel_eq->eqe_size ),
  1597. virt_to_phys ( arbel_eq->doorbell ) );
  1598. return 0;
  1599. err_map_eq:
  1600. arbel_cmd_hw2sw_eq ( arbel, arbel_eq->eqn, &eqctx );
  1601. err_sw2hw_eq:
  1602. free_dma ( arbel_eq->eqe, arbel_eq->eqe_size );
  1603. err_eqe:
  1604. memset ( arbel_eq, 0, sizeof ( *arbel_eq ) );
  1605. return rc;
  1606. }
  1607. /**
  1608. * Destroy event queue
  1609. *
  1610. * @v arbel Arbel device
  1611. */
  1612. static void arbel_destroy_eq ( struct arbel *arbel ) {
  1613. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1614. struct arbelprm_eqc eqctx;
  1615. struct arbelprm_event_mask mask;
  1616. int rc;
  1617. /* Unmap events from event queue */
  1618. memset ( &mask, 0, sizeof ( mask ) );
  1619. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1620. if ( ( rc = arbel_cmd_map_eq ( arbel,
  1621. ( ARBEL_UNMAP_EQ | arbel_eq->eqn ),
  1622. &mask ) ) != 0 ) {
  1623. DBGC ( arbel, "Arbel %p EQN %#lx FATAL MAP_EQ failed to "
  1624. "unmap: %s\n", arbel, arbel_eq->eqn, strerror ( rc ) );
  1625. /* Continue; HCA may die but system should survive */
  1626. }
  1627. /* Take ownership back from hardware */
  1628. if ( ( rc = arbel_cmd_hw2sw_eq ( arbel, arbel_eq->eqn,
  1629. &eqctx ) ) != 0 ) {
  1630. DBGC ( arbel, "Arbel %p EQN %#lx FATAL HW2SW_EQ failed: %s\n",
  1631. arbel, arbel_eq->eqn, strerror ( rc ) );
  1632. /* Leak memory and return; at least we avoid corruption */
  1633. return;
  1634. }
  1635. /* Free memory */
  1636. free_dma ( arbel_eq->eqe, arbel_eq->eqe_size );
  1637. memset ( arbel_eq, 0, sizeof ( *arbel_eq ) );
  1638. }
  1639. /**
  1640. * Handle port state event
  1641. *
  1642. * @v arbel Arbel device
  1643. * @v eqe Port state change event queue entry
  1644. */
  1645. static void arbel_event_port_state_change ( struct arbel *arbel,
  1646. union arbelprm_event_entry *eqe){
  1647. unsigned int port;
  1648. int link_up;
  1649. /* Get port and link status */
  1650. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1651. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1652. DBGC ( arbel, "Arbel %p port %d link %s\n", arbel, ( port + 1 ),
  1653. ( link_up ? "up" : "down" ) );
  1654. /* Sanity check */
  1655. if ( port >= ARBEL_NUM_PORTS ) {
  1656. DBGC ( arbel, "Arbel %p port %d does not exist!\n",
  1657. arbel, ( port + 1 ) );
  1658. return;
  1659. }
  1660. /* Update MAD parameters */
  1661. ib_smc_update ( arbel->ibdev[port], arbel_mad );
  1662. }
  1663. /**
  1664. * Poll event queue
  1665. *
  1666. * @v ibdev Infiniband device
  1667. */
  1668. static void arbel_poll_eq ( struct ib_device *ibdev ) {
  1669. struct arbel *arbel = ib_get_drvdata ( ibdev );
  1670. struct arbel_event_queue *arbel_eq = &arbel->eq;
  1671. union arbelprm_event_entry *eqe;
  1672. union arbelprm_eq_doorbell_register db_reg;
  1673. unsigned int eqe_idx_mask;
  1674. unsigned int event_type;
  1675. /* No event is generated upon reaching INIT, so we must poll
  1676. * separately for link state changes while we remain DOWN.
  1677. */
  1678. if ( ib_is_open ( ibdev ) &&
  1679. ( ibdev->port_state == IB_PORT_STATE_DOWN ) ) {
  1680. ib_smc_update ( ibdev, arbel_mad );
  1681. }
  1682. /* Poll event queue */
  1683. while ( 1 ) {
  1684. /* Look for event entry */
  1685. eqe_idx_mask = ( ARBEL_NUM_EQES - 1 );
  1686. eqe = &arbel_eq->eqe[arbel_eq->next_idx & eqe_idx_mask];
  1687. if ( MLX_GET ( &eqe->generic, owner ) != 0 ) {
  1688. /* Entry still owned by hardware; end of poll */
  1689. break;
  1690. }
  1691. DBGCP ( arbel, "Arbel %p EQN %#lx event:\n",
  1692. arbel, arbel_eq->eqn );
  1693. DBGCP_HDA ( arbel, virt_to_phys ( eqe ),
  1694. eqe, sizeof ( *eqe ) );
  1695. /* Handle event */
  1696. event_type = MLX_GET ( &eqe->generic, event_type );
  1697. switch ( event_type ) {
  1698. case ARBEL_EV_PORT_STATE_CHANGE:
  1699. arbel_event_port_state_change ( arbel, eqe );
  1700. break;
  1701. default:
  1702. DBGC ( arbel, "Arbel %p EQN %#lx unrecognised event "
  1703. "type %#x:\n",
  1704. arbel, arbel_eq->eqn, event_type );
  1705. DBGC_HDA ( arbel, virt_to_phys ( eqe ),
  1706. eqe, sizeof ( *eqe ) );
  1707. break;
  1708. }
  1709. /* Return ownership to hardware */
  1710. MLX_FILL_1 ( &eqe->generic, 7, owner, 1 );
  1711. barrier();
  1712. /* Update event queue's index */
  1713. arbel_eq->next_idx++;
  1714. /* Ring doorbell */
  1715. MLX_FILL_1 ( &db_reg.ci, 0, ci, arbel_eq->next_idx );
  1716. writel ( db_reg.dword[0], arbel_eq->doorbell );
  1717. }
  1718. }
  1719. /***************************************************************************
  1720. *
  1721. * Firmware control
  1722. *
  1723. ***************************************************************************
  1724. */
  1725. /**
  1726. * Map virtual to physical address for firmware usage
  1727. *
  1728. * @v arbel Arbel device
  1729. * @v map Mapping function
  1730. * @v va Virtual address
  1731. * @v pa Physical address
  1732. * @v len Length of region
  1733. * @ret rc Return status code
  1734. */
  1735. static int arbel_map_vpm ( struct arbel *arbel,
  1736. int ( *map ) ( struct arbel *arbel,
  1737. const struct arbelprm_virtual_physical_mapping* ),
  1738. uint64_t va, physaddr_t pa, size_t len ) {
  1739. struct arbelprm_virtual_physical_mapping mapping;
  1740. physaddr_t start;
  1741. physaddr_t low;
  1742. physaddr_t high;
  1743. physaddr_t end;
  1744. size_t size;
  1745. int rc;
  1746. /* Sanity checks */
  1747. assert ( ( va & ( ARBEL_PAGE_SIZE - 1 ) ) == 0 );
  1748. assert ( ( pa & ( ARBEL_PAGE_SIZE - 1 ) ) == 0 );
  1749. assert ( ( len & ( ARBEL_PAGE_SIZE - 1 ) ) == 0 );
  1750. /* Calculate starting points */
  1751. start = pa;
  1752. end = ( start + len );
  1753. size = ( 1UL << ( fls ( start ^ end ) - 1 ) );
  1754. low = high = ( end & ~( size - 1 ) );
  1755. assert ( start < low );
  1756. assert ( high <= end );
  1757. /* These mappings tend to generate huge volumes of
  1758. * uninteresting debug data, which basically makes it
  1759. * impossible to use debugging otherwise.
  1760. */
  1761. DBG_DISABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1762. /* Map blocks in descending order of size */
  1763. while ( size >= ARBEL_PAGE_SIZE ) {
  1764. /* Find the next candidate block */
  1765. if ( ( low - size ) >= start ) {
  1766. low -= size;
  1767. pa = low;
  1768. } else if ( ( high + size ) <= end ) {
  1769. pa = high;
  1770. high += size;
  1771. } else {
  1772. size >>= 1;
  1773. continue;
  1774. }
  1775. assert ( ( va & ( size - 1 ) ) == 0 );
  1776. assert ( ( pa & ( size - 1 ) ) == 0 );
  1777. /* Map this block */
  1778. memset ( &mapping, 0, sizeof ( mapping ) );
  1779. MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
  1780. MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
  1781. MLX_FILL_H ( &mapping, 2, pa_h, pa );
  1782. MLX_FILL_2 ( &mapping, 3,
  1783. log2size, ( ( fls ( size ) - 1 ) - 12 ),
  1784. pa_l, ( pa >> 12 ) );
  1785. if ( ( rc = map ( arbel, &mapping ) ) != 0 ) {
  1786. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1787. DBGC ( arbel, "Arbel %p could not map %08llx+%zx to "
  1788. "%08lx: %s\n",
  1789. arbel, va, size, pa, strerror ( rc ) );
  1790. return rc;
  1791. }
  1792. va += size;
  1793. }
  1794. assert ( low == start );
  1795. assert ( high == end );
  1796. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1797. return 0;
  1798. }
  1799. /**
  1800. * Start firmware running
  1801. *
  1802. * @v arbel Arbel device
  1803. * @ret rc Return status code
  1804. */
  1805. static int arbel_start_firmware ( struct arbel *arbel ) {
  1806. struct arbelprm_query_fw fw;
  1807. struct arbelprm_access_lam lam;
  1808. unsigned int fw_pages;
  1809. size_t fw_len;
  1810. physaddr_t fw_base;
  1811. uint64_t eq_set_ci_base_addr;
  1812. int rc;
  1813. /* Get firmware parameters */
  1814. if ( ( rc = arbel_cmd_query_fw ( arbel, &fw ) ) != 0 ) {
  1815. DBGC ( arbel, "Arbel %p could not query firmware: %s\n",
  1816. arbel, strerror ( rc ) );
  1817. goto err_query_fw;
  1818. }
  1819. DBGC ( arbel, "Arbel %p firmware version %d.%d.%d\n", arbel,
  1820. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  1821. MLX_GET ( &fw, fw_rev_subminor ) );
  1822. fw_pages = MLX_GET ( &fw, fw_pages );
  1823. DBGC ( arbel, "Arbel %p requires %d kB for firmware\n",
  1824. arbel, ( fw_pages * 4 ) );
  1825. eq_set_ci_base_addr =
  1826. ( ( (uint64_t) MLX_GET ( &fw, eq_set_ci_base_addr_h ) << 32 ) |
  1827. ( (uint64_t) MLX_GET ( &fw, eq_set_ci_base_addr_l ) ) );
  1828. arbel->eq_ci_doorbells = ioremap ( eq_set_ci_base_addr, 0x200 );
  1829. /* Enable locally-attached memory. Ignore failure; there may
  1830. * be no attached memory.
  1831. */
  1832. arbel_cmd_enable_lam ( arbel, &lam );
  1833. /* Allocate firmware pages and map firmware area */
  1834. fw_len = ( fw_pages * ARBEL_PAGE_SIZE );
  1835. if ( ! arbel->firmware_area ) {
  1836. arbel->firmware_len = fw_len;
  1837. arbel->firmware_area = umalloc ( arbel->firmware_len );
  1838. if ( ! arbel->firmware_area ) {
  1839. rc = -ENOMEM;
  1840. goto err_alloc_fa;
  1841. }
  1842. } else {
  1843. assert ( arbel->firmware_len == fw_len );
  1844. }
  1845. fw_base = user_to_phys ( arbel->firmware_area, 0 );
  1846. DBGC ( arbel, "Arbel %p firmware area at [%08lx,%08lx)\n",
  1847. arbel, fw_base, ( fw_base + fw_len ) );
  1848. if ( ( rc = arbel_map_vpm ( arbel, arbel_cmd_map_fa,
  1849. 0, fw_base, fw_len ) ) != 0 ) {
  1850. DBGC ( arbel, "Arbel %p could not map firmware: %s\n",
  1851. arbel, strerror ( rc ) );
  1852. goto err_map_fa;
  1853. }
  1854. /* Start firmware */
  1855. if ( ( rc = arbel_cmd_run_fw ( arbel ) ) != 0 ) {
  1856. DBGC ( arbel, "Arbel %p could not run firmware: %s\n",
  1857. arbel, strerror ( rc ) );
  1858. goto err_run_fw;
  1859. }
  1860. DBGC ( arbel, "Arbel %p firmware started\n", arbel );
  1861. return 0;
  1862. err_run_fw:
  1863. arbel_cmd_unmap_fa ( arbel );
  1864. err_map_fa:
  1865. err_alloc_fa:
  1866. err_query_fw:
  1867. return rc;
  1868. }
  1869. /**
  1870. * Stop firmware running
  1871. *
  1872. * @v arbel Arbel device
  1873. */
  1874. static void arbel_stop_firmware ( struct arbel *arbel ) {
  1875. int rc;
  1876. if ( ( rc = arbel_cmd_unmap_fa ( arbel ) ) != 0 ) {
  1877. DBGC ( arbel, "Arbel %p FATAL could not stop firmware: %s\n",
  1878. arbel, strerror ( rc ) );
  1879. /* Leak memory and return; at least we avoid corruption */
  1880. arbel->firmware_area = UNULL;
  1881. return;
  1882. }
  1883. }
  1884. /***************************************************************************
  1885. *
  1886. * Infinihost Context Memory management
  1887. *
  1888. ***************************************************************************
  1889. */
  1890. /**
  1891. * Get device limits
  1892. *
  1893. * @v arbel Arbel device
  1894. * @ret rc Return status code
  1895. */
  1896. static int arbel_get_limits ( struct arbel *arbel ) {
  1897. struct arbelprm_query_dev_lim dev_lim;
  1898. int rc;
  1899. if ( ( rc = arbel_cmd_query_dev_lim ( arbel, &dev_lim ) ) != 0 ) {
  1900. DBGC ( arbel, "Arbel %p could not get device limits: %s\n",
  1901. arbel, strerror ( rc ) );
  1902. return rc;
  1903. }
  1904. arbel->limits.reserved_qps =
  1905. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_qps ) );
  1906. arbel->limits.qpc_entry_size = MLX_GET ( &dev_lim, qpc_entry_sz );
  1907. arbel->limits.eqpc_entry_size = MLX_GET ( &dev_lim, eqpc_entry_sz );
  1908. arbel->limits.reserved_srqs =
  1909. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_srqs ) );
  1910. arbel->limits.srqc_entry_size = MLX_GET ( &dev_lim, srq_entry_sz );
  1911. arbel->limits.reserved_ees =
  1912. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_ees ) );
  1913. arbel->limits.eec_entry_size = MLX_GET ( &dev_lim, eec_entry_sz );
  1914. arbel->limits.eeec_entry_size = MLX_GET ( &dev_lim, eeec_entry_sz );
  1915. arbel->limits.reserved_cqs =
  1916. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_cqs ) );
  1917. arbel->limits.cqc_entry_size = MLX_GET ( &dev_lim, cqc_entry_sz );
  1918. arbel->limits.reserved_mtts =
  1919. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_mtts ) );
  1920. arbel->limits.mtt_entry_size = MLX_GET ( &dev_lim, mtt_entry_sz );
  1921. arbel->limits.reserved_mrws =
  1922. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_mrws ) );
  1923. arbel->limits.mpt_entry_size = MLX_GET ( &dev_lim, mpt_entry_sz );
  1924. arbel->limits.reserved_rdbs =
  1925. ( 1 << MLX_GET ( &dev_lim, log2_rsvd_rdbs ) );
  1926. arbel->limits.reserved_eqs = MLX_GET ( &dev_lim, num_rsvd_eqs );
  1927. arbel->limits.eqc_entry_size = MLX_GET ( &dev_lim, eqc_entry_sz );
  1928. arbel->limits.reserved_uars = MLX_GET ( &dev_lim, num_rsvd_uars );
  1929. arbel->limits.uar_scratch_entry_size =
  1930. MLX_GET ( &dev_lim, uar_scratch_entry_sz );
  1931. DBGC ( arbel, "Arbel %p reserves %d x %#zx QPC, %d x %#zx EQPC, "
  1932. "%d x %#zx SRQC\n", arbel,
  1933. arbel->limits.reserved_qps, arbel->limits.qpc_entry_size,
  1934. arbel->limits.reserved_qps, arbel->limits.eqpc_entry_size,
  1935. arbel->limits.reserved_srqs, arbel->limits.srqc_entry_size );
  1936. DBGC ( arbel, "Arbel %p reserves %d x %#zx EEC, %d x %#zx EEEC, "
  1937. "%d x %#zx CQC\n", arbel,
  1938. arbel->limits.reserved_ees, arbel->limits.eec_entry_size,
  1939. arbel->limits.reserved_ees, arbel->limits.eeec_entry_size,
  1940. arbel->limits.reserved_cqs, arbel->limits.cqc_entry_size );
  1941. DBGC ( arbel, "Arbel %p reserves %d x %#zx EQC, %d x %#zx MTT, "
  1942. "%d x %#zx MPT\n", arbel,
  1943. arbel->limits.reserved_eqs, arbel->limits.eqc_entry_size,
  1944. arbel->limits.reserved_mtts, arbel->limits.mtt_entry_size,
  1945. arbel->limits.reserved_mrws, arbel->limits.mpt_entry_size );
  1946. DBGC ( arbel, "Arbel %p reserves %d x %#zx RDB, %d x %#zx UAR, "
  1947. "%d x %#zx UAR scratchpad\n", arbel,
  1948. arbel->limits.reserved_rdbs, ARBEL_RDB_ENTRY_SIZE,
  1949. arbel->limits.reserved_uars, ARBEL_PAGE_SIZE,
  1950. arbel->limits.reserved_uars,
  1951. arbel->limits.uar_scratch_entry_size );
  1952. return 0;
  1953. }
  1954. /**
  1955. * Align ICM table
  1956. *
  1957. * @v icm_offset Current ICM offset
  1958. * @v len ICM table length
  1959. * @ret icm_offset ICM offset
  1960. */
  1961. static size_t icm_align ( size_t icm_offset, size_t len ) {
  1962. /* Round up to a multiple of the table size */
  1963. assert ( len == ( 1UL << ( fls ( len ) - 1 ) ) );
  1964. return ( ( icm_offset + len - 1 ) & ~( len - 1 ) );
  1965. }
  1966. /**
  1967. * Allocate ICM
  1968. *
  1969. * @v arbel Arbel device
  1970. * @v init_hca INIT_HCA structure to fill in
  1971. * @ret rc Return status code
  1972. */
  1973. static int arbel_alloc_icm ( struct arbel *arbel,
  1974. struct arbelprm_init_hca *init_hca ) {
  1975. struct arbelprm_scalar_parameter icm_size;
  1976. struct arbelprm_scalar_parameter icm_aux_size;
  1977. struct arbelprm_scalar_parameter unmap_icm;
  1978. union arbelprm_doorbell_record *db_rec;
  1979. size_t icm_offset = 0;
  1980. unsigned int log_num_uars, log_num_qps, log_num_srqs, log_num_ees;
  1981. unsigned int log_num_cqs, log_num_mtts, log_num_mpts, log_num_rdbs;
  1982. unsigned int log_num_eqs, log_num_mcs;
  1983. size_t icm_len, icm_aux_len;
  1984. size_t len;
  1985. physaddr_t icm_phys;
  1986. int rc;
  1987. /* Calculate number of each object type within ICM */
  1988. log_num_qps = fls ( arbel->limits.reserved_qps +
  1989. ARBEL_RSVD_SPECIAL_QPS + ARBEL_MAX_QPS - 1 );
  1990. log_num_srqs = fls ( arbel->limits.reserved_srqs - 1 );
  1991. log_num_ees = fls ( arbel->limits.reserved_ees - 1 );
  1992. log_num_cqs = fls ( arbel->limits.reserved_cqs + ARBEL_MAX_CQS - 1 );
  1993. log_num_eqs = fls ( arbel->limits.reserved_eqs + ARBEL_MAX_EQS - 1 );
  1994. log_num_mtts = fls ( arbel->limits.reserved_mtts - 1 );
  1995. log_num_mpts = fls ( arbel->limits.reserved_mrws + 1 - 1 );
  1996. log_num_rdbs = fls ( arbel->limits.reserved_rdbs +
  1997. ARBEL_RSVD_SPECIAL_QPS + ARBEL_MAX_QPS - 1 );
  1998. log_num_uars = fls ( arbel->limits.reserved_uars +
  1999. 1 /* single UAR used */ - 1 );
  2000. log_num_mcs = ARBEL_LOG_MULTICAST_HASH_SIZE;
  2001. /* Queue pair contexts */
  2002. len = ( ( 1 << log_num_qps ) * arbel->limits.qpc_entry_size );
  2003. icm_offset = icm_align ( icm_offset, len );
  2004. MLX_FILL_2 ( init_hca, 13,
  2005. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  2006. ( icm_offset >> 7 ),
  2007. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  2008. log_num_qps );
  2009. DBGC ( arbel, "Arbel %p ICM QPC is %d x %#zx at [%zx,%zx)\n",
  2010. arbel, ( 1 << log_num_qps ), arbel->limits.qpc_entry_size,
  2011. icm_offset, ( icm_offset + len ) );
  2012. icm_offset += len;
  2013. /* Extended queue pair contexts */
  2014. len = ( ( 1 << log_num_qps ) * arbel->limits.eqpc_entry_size );
  2015. icm_offset = icm_align ( icm_offset, len );
  2016. MLX_FILL_1 ( init_hca, 25,
  2017. qpc_eec_cqc_eqc_rdb_parameters.eqpc_base_addr_l,
  2018. icm_offset );
  2019. DBGC ( arbel, "Arbel %p ICM EQPC is %d x %#zx at [%zx,%zx)\n",
  2020. arbel, ( 1 << log_num_qps ), arbel->limits.eqpc_entry_size,
  2021. icm_offset, ( icm_offset + len ) );
  2022. icm_offset += len;
  2023. /* Completion queue contexts */
  2024. len = ( ( 1 << log_num_cqs ) * arbel->limits.cqc_entry_size );
  2025. icm_offset = icm_align ( icm_offset, len );
  2026. MLX_FILL_2 ( init_hca, 21,
  2027. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  2028. ( icm_offset >> 6 ),
  2029. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  2030. log_num_cqs );
  2031. DBGC ( arbel, "Arbel %p ICM CQC is %d x %#zx at [%zx,%zx)\n",
  2032. arbel, ( 1 << log_num_cqs ), arbel->limits.cqc_entry_size,
  2033. icm_offset, ( icm_offset + len ) );
  2034. icm_offset += len;
  2035. /* Event queue contexts */
  2036. len = ( ( 1 << log_num_eqs ) * arbel->limits.eqc_entry_size );
  2037. icm_offset = icm_align ( icm_offset, len );
  2038. MLX_FILL_2 ( init_hca, 33,
  2039. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  2040. ( icm_offset >> 6 ),
  2041. qpc_eec_cqc_eqc_rdb_parameters.log_num_eq,
  2042. log_num_eqs );
  2043. DBGC ( arbel, "Arbel %p ICM EQC is %d x %#zx at [%zx,%zx)\n",
  2044. arbel, ( 1 << log_num_eqs ), arbel->limits.eqc_entry_size,
  2045. icm_offset, ( icm_offset + len ) );
  2046. icm_offset += len;
  2047. /* End-to-end contexts */
  2048. len = ( ( 1 << log_num_ees ) * arbel->limits.eec_entry_size );
  2049. icm_offset = icm_align ( icm_offset, len );
  2050. MLX_FILL_2 ( init_hca, 17,
  2051. qpc_eec_cqc_eqc_rdb_parameters.eec_base_addr_l,
  2052. ( icm_offset >> 7 ),
  2053. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_ee,
  2054. log_num_ees );
  2055. DBGC ( arbel, "Arbel %p ICM EEC is %d x %#zx at [%zx,%zx)\n",
  2056. arbel, ( 1 << log_num_ees ), arbel->limits.eec_entry_size,
  2057. icm_offset, ( icm_offset + len ) );
  2058. icm_offset += len;
  2059. /* Shared receive queue contexts */
  2060. len = ( ( 1 << log_num_srqs ) * arbel->limits.srqc_entry_size );
  2061. icm_offset = icm_align ( icm_offset, len );
  2062. MLX_FILL_2 ( init_hca, 19,
  2063. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  2064. ( icm_offset >> 5 ),
  2065. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  2066. log_num_srqs );
  2067. DBGC ( arbel, "Arbel %p ICM SRQC is %d x %#zx at [%zx,%zx)\n",
  2068. arbel, ( 1 << log_num_srqs ), arbel->limits.srqc_entry_size,
  2069. icm_offset, ( icm_offset + len ) );
  2070. icm_offset += len;
  2071. /* Memory protection table */
  2072. len = ( ( 1 << log_num_mpts ) * arbel->limits.mpt_entry_size );
  2073. icm_offset = icm_align ( icm_offset, len );
  2074. MLX_FILL_1 ( init_hca, 61,
  2075. tpt_parameters.mpt_base_adr_l, icm_offset );
  2076. MLX_FILL_1 ( init_hca, 62,
  2077. tpt_parameters.log_mpt_sz, log_num_mpts );
  2078. DBGC ( arbel, "Arbel %p ICM MPT is %d x %#zx at [%zx,%zx)\n",
  2079. arbel, ( 1 << log_num_mpts ), arbel->limits.mpt_entry_size,
  2080. icm_offset, ( icm_offset + len ) );
  2081. icm_offset += len;
  2082. /* Remote read data base table */
  2083. len = ( ( 1 << log_num_rdbs ) * ARBEL_RDB_ENTRY_SIZE );
  2084. icm_offset = icm_align ( icm_offset, len );
  2085. MLX_FILL_1 ( init_hca, 37,
  2086. qpc_eec_cqc_eqc_rdb_parameters.rdb_base_addr_l,
  2087. icm_offset );
  2088. DBGC ( arbel, "Arbel %p ICM RDB is %d x %#zx at [%zx,%zx)\n",
  2089. arbel, ( 1 << log_num_rdbs ), ARBEL_RDB_ENTRY_SIZE,
  2090. icm_offset, ( icm_offset + len ) );
  2091. icm_offset += len;
  2092. /* Extended end-to-end contexts */
  2093. len = ( ( 1 << log_num_ees ) * arbel->limits.eeec_entry_size );
  2094. icm_offset = icm_align ( icm_offset, len );
  2095. MLX_FILL_1 ( init_hca, 29,
  2096. qpc_eec_cqc_eqc_rdb_parameters.eeec_base_addr_l,
  2097. icm_offset );
  2098. DBGC ( arbel, "Arbel %p ICM EEEC is %d x %#zx at [%zx,%zx)\n",
  2099. arbel, ( 1 << log_num_ees ), arbel->limits.eeec_entry_size,
  2100. icm_offset, ( icm_offset + len ) );
  2101. icm_offset += len;
  2102. /* Multicast table */
  2103. len = ( ( 1 << log_num_mcs ) * sizeof ( struct arbelprm_mgm_entry ) );
  2104. icm_offset = icm_align ( icm_offset, len );
  2105. MLX_FILL_1 ( init_hca, 49,
  2106. multicast_parameters.mc_base_addr_l, icm_offset );
  2107. MLX_FILL_1 ( init_hca, 52,
  2108. multicast_parameters.log_mc_table_entry_sz,
  2109. fls ( sizeof ( struct arbelprm_mgm_entry ) - 1 ) );
  2110. MLX_FILL_1 ( init_hca, 53,
  2111. multicast_parameters.mc_table_hash_sz,
  2112. ( 1 << log_num_mcs ) );
  2113. MLX_FILL_1 ( init_hca, 54,
  2114. multicast_parameters.log_mc_table_sz,
  2115. log_num_mcs /* Only one entry per hash */ );
  2116. DBGC ( arbel, "Arbel %p ICM MC is %d x %#zx at [%zx,%zx)\n", arbel,
  2117. ( 1 << log_num_mcs ), sizeof ( struct arbelprm_mgm_entry ),
  2118. icm_offset, ( icm_offset + len ) );
  2119. icm_offset += len;
  2120. /* Memory translation table */
  2121. len = ( ( 1 << log_num_mtts ) * arbel->limits.mtt_entry_size );
  2122. icm_offset = icm_align ( icm_offset, len );
  2123. MLX_FILL_1 ( init_hca, 65,
  2124. tpt_parameters.mtt_base_addr_l, icm_offset );
  2125. DBGC ( arbel, "Arbel %p ICM MTT is %d x %#zx at [%zx,%zx)\n",
  2126. arbel, ( 1 << log_num_mtts ), arbel->limits.mtt_entry_size,
  2127. icm_offset, ( icm_offset + len ) );
  2128. icm_offset += len;
  2129. /* User access region scratchpads */
  2130. len = ( ( 1 << log_num_uars ) * arbel->limits.uar_scratch_entry_size );
  2131. icm_offset = icm_align ( icm_offset, len );
  2132. MLX_FILL_1 ( init_hca, 77,
  2133. uar_parameters.uar_scratch_base_addr_l, icm_offset );
  2134. DBGC ( arbel, "Arbel %p UAR scratchpad is %d x %#zx at [%zx,%zx)\n",
  2135. arbel, ( 1 << log_num_uars ),
  2136. arbel->limits.uar_scratch_entry_size,
  2137. icm_offset, ( icm_offset + len ) );
  2138. icm_offset += len;
  2139. /* Record amount of ICM to be allocated */
  2140. icm_offset = icm_align ( icm_offset, ARBEL_PAGE_SIZE );
  2141. icm_len = icm_offset;
  2142. /* User access region contexts
  2143. *
  2144. * The reserved UAR(s) do not need to be backed by physical
  2145. * memory, and our UAR is allocated separately; neither are
  2146. * part of the umalloc()ed ICM block, but both contribute to
  2147. * the total length of ICM virtual address space.
  2148. */
  2149. len = ( ( 1 << log_num_uars ) * ARBEL_PAGE_SIZE );
  2150. icm_offset = icm_align ( icm_offset, len );
  2151. MLX_FILL_1 ( init_hca, 74, uar_parameters.log_max_uars, log_num_uars );
  2152. MLX_FILL_1 ( init_hca, 79,
  2153. uar_parameters.uar_context_base_addr_l, icm_offset );
  2154. arbel->db_rec_offset =
  2155. ( icm_offset +
  2156. ( arbel->limits.reserved_uars * ARBEL_PAGE_SIZE ) );
  2157. DBGC ( arbel, "Arbel %p UAR is %d x %#zx at [%zx,%zx), doorbells "
  2158. "[%zx,%zx)\n", arbel, ( 1 << log_num_uars ), ARBEL_PAGE_SIZE,
  2159. icm_offset, ( icm_offset + len ), arbel->db_rec_offset,
  2160. ( arbel->db_rec_offset + ARBEL_PAGE_SIZE ) );
  2161. icm_offset += len;
  2162. /* Get ICM auxiliary area size */
  2163. memset ( &icm_size, 0, sizeof ( icm_size ) );
  2164. MLX_FILL_1 ( &icm_size, 1, value, icm_len );
  2165. if ( ( rc = arbel_cmd_set_icm_size ( arbel, &icm_size,
  2166. &icm_aux_size ) ) != 0 ) {
  2167. DBGC ( arbel, "Arbel %p could not set ICM size: %s\n",
  2168. arbel, strerror ( rc ) );
  2169. goto err_set_icm_size;
  2170. }
  2171. icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * ARBEL_PAGE_SIZE );
  2172. /* Allocate ICM data and auxiliary area */
  2173. DBGC ( arbel, "Arbel %p requires %zd kB ICM and %zd kB AUX ICM\n",
  2174. arbel, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
  2175. if ( ! arbel->icm ) {
  2176. arbel->icm_len = icm_len;
  2177. arbel->icm_aux_len = icm_aux_len;
  2178. arbel->icm = umalloc ( arbel->icm_len + arbel->icm_aux_len );
  2179. if ( ! arbel->icm ) {
  2180. rc = -ENOMEM;
  2181. goto err_alloc_icm;
  2182. }
  2183. } else {
  2184. assert ( arbel->icm_len == icm_len );
  2185. assert ( arbel->icm_aux_len == icm_aux_len );
  2186. }
  2187. icm_phys = user_to_phys ( arbel->icm, 0 );
  2188. /* Allocate doorbell UAR */
  2189. arbel->db_rec = malloc_dma ( ARBEL_PAGE_SIZE, ARBEL_PAGE_SIZE );
  2190. if ( ! arbel->db_rec ) {
  2191. rc = -ENOMEM;
  2192. goto err_alloc_doorbell;
  2193. }
  2194. /* Map ICM auxiliary area */
  2195. DBGC ( arbel, "Arbel %p ICM AUX at [%08lx,%08lx)\n",
  2196. arbel, icm_phys, ( icm_phys + arbel->icm_aux_len ) );
  2197. if ( ( rc = arbel_map_vpm ( arbel, arbel_cmd_map_icm_aux,
  2198. 0, icm_phys, arbel->icm_aux_len ) ) != 0 ){
  2199. DBGC ( arbel, "Arbel %p could not map AUX ICM: %s\n",
  2200. arbel, strerror ( rc ) );
  2201. goto err_map_icm_aux;
  2202. }
  2203. icm_phys += arbel->icm_aux_len;
  2204. /* Map ICM area */
  2205. DBGC ( arbel, "Arbel %p ICM at [%08lx,%08lx)\n",
  2206. arbel, icm_phys, ( icm_phys + arbel->icm_len ) );
  2207. if ( ( rc = arbel_map_vpm ( arbel, arbel_cmd_map_icm,
  2208. 0, icm_phys, arbel->icm_len ) ) != 0 ) {
  2209. DBGC ( arbel, "Arbel %p could not map ICM: %s\n",
  2210. arbel, strerror ( rc ) );
  2211. goto err_map_icm;
  2212. }
  2213. icm_phys += arbel->icm_len;
  2214. /* Map doorbell UAR */
  2215. DBGC ( arbel, "Arbel %p UAR at [%08lx,%08lx)\n",
  2216. arbel, virt_to_phys ( arbel->db_rec ),
  2217. ( virt_to_phys ( arbel->db_rec ) + ARBEL_PAGE_SIZE ) );
  2218. if ( ( rc = arbel_map_vpm ( arbel, arbel_cmd_map_icm,
  2219. arbel->db_rec_offset,
  2220. virt_to_phys ( arbel->db_rec ),
  2221. ARBEL_PAGE_SIZE ) ) != 0 ) {
  2222. DBGC ( arbel, "Arbel %p could not map doorbell UAR: %s\n",
  2223. arbel, strerror ( rc ) );
  2224. goto err_map_doorbell;
  2225. }
  2226. /* Initialise doorbell records */
  2227. memset ( arbel->db_rec, 0, ARBEL_PAGE_SIZE );
  2228. db_rec = &arbel->db_rec[ARBEL_GROUP_SEPARATOR_DOORBELL];
  2229. MLX_FILL_1 ( &db_rec->qp, 1, res, ARBEL_UAR_RES_GROUP_SEP );
  2230. return 0;
  2231. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2232. MLX_FILL_1 ( &unmap_icm, 1, value, arbel->db_rec_offset );
  2233. arbel_cmd_unmap_icm ( arbel, 1, &unmap_icm );
  2234. err_map_doorbell:
  2235. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2236. arbel_cmd_unmap_icm ( arbel, ( arbel->icm_len / ARBEL_PAGE_SIZE ),
  2237. &unmap_icm );
  2238. err_map_icm:
  2239. arbel_cmd_unmap_icm_aux ( arbel );
  2240. err_map_icm_aux:
  2241. free_dma ( arbel->db_rec, ARBEL_PAGE_SIZE );
  2242. arbel->db_rec= NULL;
  2243. err_alloc_doorbell:
  2244. err_alloc_icm:
  2245. err_set_icm_size:
  2246. return rc;
  2247. }
  2248. /**
  2249. * Free ICM
  2250. *
  2251. * @v arbel Arbel device
  2252. */
  2253. static void arbel_free_icm ( struct arbel *arbel ) {
  2254. struct arbelprm_scalar_parameter unmap_icm;
  2255. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2256. MLX_FILL_1 ( &unmap_icm, 1, value, arbel->db_rec_offset );
  2257. arbel_cmd_unmap_icm ( arbel, 1, &unmap_icm );
  2258. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2259. arbel_cmd_unmap_icm ( arbel, ( arbel->icm_len / ARBEL_PAGE_SIZE ),
  2260. &unmap_icm );
  2261. arbel_cmd_unmap_icm_aux ( arbel );
  2262. free_dma ( arbel->db_rec, ARBEL_PAGE_SIZE );
  2263. arbel->db_rec = NULL;
  2264. }
  2265. /***************************************************************************
  2266. *
  2267. * Initialisation and teardown
  2268. *
  2269. ***************************************************************************
  2270. */
  2271. /**
  2272. * Reset device
  2273. *
  2274. * @v arbel Arbel device
  2275. */
  2276. static void arbel_reset ( struct arbel *arbel ) {
  2277. struct pci_device *pci = arbel->pci;
  2278. struct pci_config_backup backup;
  2279. static const uint8_t backup_exclude[] =
  2280. PCI_CONFIG_BACKUP_EXCLUDE ( 0x58, 0x5c );
  2281. uint16_t vendor;
  2282. unsigned int i;
  2283. /* Perform device reset and preserve PCI configuration */
  2284. pci_backup ( pci, &backup, backup_exclude );
  2285. writel ( ARBEL_RESET_MAGIC,
  2286. ( arbel->config + ARBEL_RESET_OFFSET ) );
  2287. for ( i = 0 ; i < ARBEL_RESET_WAIT_TIME_MS ; i++ ) {
  2288. mdelay ( 1 );
  2289. pci_read_config_word ( pci, PCI_VENDOR_ID, &vendor );
  2290. if ( vendor != 0xffff )
  2291. break;
  2292. }
  2293. pci_restore ( pci, &backup, backup_exclude );
  2294. }
  2295. /**
  2296. * Set up memory protection table
  2297. *
  2298. * @v arbel Arbel device
  2299. * @ret rc Return status code
  2300. */
  2301. static int arbel_setup_mpt ( struct arbel *arbel ) {
  2302. struct arbelprm_mpt mpt;
  2303. uint32_t key;
  2304. int rc;
  2305. /* Derive key */
  2306. key = ( arbel->limits.reserved_mrws | ARBEL_MKEY_PREFIX );
  2307. arbel->lkey = ( ( key << 8 ) | ( key >> 24 ) );
  2308. /* Initialise memory protection table */
  2309. memset ( &mpt, 0, sizeof ( mpt ) );
  2310. MLX_FILL_7 ( &mpt, 0,
  2311. a, 1,
  2312. rw, 1,
  2313. rr, 1,
  2314. lw, 1,
  2315. lr, 1,
  2316. pa, 1,
  2317. r_w, 1 );
  2318. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  2319. MLX_FILL_2 ( &mpt, 3,
  2320. pd, ARBEL_GLOBAL_PD,
  2321. rae, 1 );
  2322. MLX_FILL_1 ( &mpt, 6, reg_wnd_len_h, 0xffffffffUL );
  2323. MLX_FILL_1 ( &mpt, 7, reg_wnd_len_l, 0xffffffffUL );
  2324. if ( ( rc = arbel_cmd_sw2hw_mpt ( arbel, arbel->limits.reserved_mrws,
  2325. &mpt ) ) != 0 ) {
  2326. DBGC ( arbel, "Arbel %p could not set up MPT: %s\n",
  2327. arbel, strerror ( rc ) );
  2328. return rc;
  2329. }
  2330. return 0;
  2331. }
  2332. /**
  2333. * Configure special queue pairs
  2334. *
  2335. * @v arbel Arbel device
  2336. * @ret rc Return status code
  2337. */
  2338. static int arbel_configure_special_qps ( struct arbel *arbel ) {
  2339. unsigned int smi_qpn_base;
  2340. unsigned int gsi_qpn_base;
  2341. int rc;
  2342. /* Special QP block must be aligned on an even number */
  2343. arbel->special_qpn_base = ( ( arbel->limits.reserved_qps + 1 ) & ~1 );
  2344. arbel->qpn_base = ( arbel->special_qpn_base +
  2345. ARBEL_NUM_SPECIAL_QPS );
  2346. DBGC ( arbel, "Arbel %p special QPs at [%lx,%lx]\n", arbel,
  2347. arbel->special_qpn_base, ( arbel->qpn_base - 1 ) );
  2348. smi_qpn_base = arbel->special_qpn_base;
  2349. gsi_qpn_base = ( smi_qpn_base + 2 );
  2350. /* Issue commands to configure special QPs */
  2351. if ( ( rc = arbel_cmd_conf_special_qp ( arbel, 0,
  2352. smi_qpn_base ) ) != 0 ) {
  2353. DBGC ( arbel, "Arbel %p could not configure SMI QPs: %s\n",
  2354. arbel, strerror ( rc ) );
  2355. return rc;
  2356. }
  2357. if ( ( rc = arbel_cmd_conf_special_qp ( arbel, 1,
  2358. gsi_qpn_base ) ) != 0 ) {
  2359. DBGC ( arbel, "Arbel %p could not configure GSI QPs: %s\n",
  2360. arbel, strerror ( rc ) );
  2361. return rc;
  2362. }
  2363. return 0;
  2364. }
  2365. /**
  2366. * Start Arbel device
  2367. *
  2368. * @v arbel Arbel device
  2369. * @v running Firmware is already running
  2370. * @ret rc Return status code
  2371. */
  2372. static int arbel_start ( struct arbel *arbel, int running ) {
  2373. struct arbelprm_init_hca init_hca;
  2374. unsigned int i;
  2375. int rc;
  2376. /* Start firmware if not already running */
  2377. if ( ! running ) {
  2378. if ( ( rc = arbel_start_firmware ( arbel ) ) != 0 )
  2379. goto err_start_firmware;
  2380. }
  2381. /* Allocate ICM */
  2382. memset ( &init_hca, 0, sizeof ( init_hca ) );
  2383. if ( ( rc = arbel_alloc_icm ( arbel, &init_hca ) ) != 0 )
  2384. goto err_alloc_icm;
  2385. /* Initialise HCA */
  2386. if ( ( rc = arbel_cmd_init_hca ( arbel, &init_hca ) ) != 0 ) {
  2387. DBGC ( arbel, "Arbel %p could not initialise HCA: %s\n",
  2388. arbel, strerror ( rc ) );
  2389. goto err_init_hca;
  2390. }
  2391. /* Set up memory protection */
  2392. if ( ( rc = arbel_setup_mpt ( arbel ) ) != 0 )
  2393. goto err_setup_mpt;
  2394. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ )
  2395. arbel->ibdev[i]->rdma_key = arbel->lkey;
  2396. /* Set up event queue */
  2397. if ( ( rc = arbel_create_eq ( arbel ) ) != 0 )
  2398. goto err_create_eq;
  2399. /* Configure special QPs */
  2400. if ( ( rc = arbel_configure_special_qps ( arbel ) ) != 0 )
  2401. goto err_conf_special_qps;
  2402. return 0;
  2403. err_conf_special_qps:
  2404. arbel_destroy_eq ( arbel );
  2405. err_create_eq:
  2406. err_setup_mpt:
  2407. arbel_cmd_close_hca ( arbel );
  2408. err_init_hca:
  2409. arbel_free_icm ( arbel );
  2410. err_alloc_icm:
  2411. arbel_stop_firmware ( arbel );
  2412. err_start_firmware:
  2413. return rc;
  2414. }
  2415. /**
  2416. * Stop Arbel device
  2417. *
  2418. * @v arbel Arbel device
  2419. */
  2420. static void arbel_stop ( struct arbel *arbel ) {
  2421. arbel_destroy_eq ( arbel );
  2422. arbel_cmd_close_hca ( arbel );
  2423. arbel_free_icm ( arbel );
  2424. arbel_stop_firmware ( arbel );
  2425. arbel_reset ( arbel );
  2426. }
  2427. /**
  2428. * Open Arbel device
  2429. *
  2430. * @v arbel Arbel device
  2431. * @ret rc Return status code
  2432. */
  2433. static int arbel_open ( struct arbel *arbel ) {
  2434. int rc;
  2435. /* Start device if applicable */
  2436. if ( arbel->open_count == 0 ) {
  2437. if ( ( rc = arbel_start ( arbel, 0 ) ) != 0 )
  2438. return rc;
  2439. }
  2440. /* Increment open counter */
  2441. arbel->open_count++;
  2442. return 0;
  2443. }
  2444. /**
  2445. * Close Arbel device
  2446. *
  2447. * @v arbel Arbel device
  2448. */
  2449. static void arbel_close ( struct arbel *arbel ) {
  2450. /* Decrement open counter */
  2451. assert ( arbel->open_count != 0 );
  2452. arbel->open_count--;
  2453. /* Stop device if applicable */
  2454. if ( arbel->open_count == 0 )
  2455. arbel_stop ( arbel );
  2456. }
  2457. /***************************************************************************
  2458. *
  2459. * Infiniband link-layer operations
  2460. *
  2461. ***************************************************************************
  2462. */
  2463. /**
  2464. * Initialise Infiniband link
  2465. *
  2466. * @v ibdev Infiniband device
  2467. * @ret rc Return status code
  2468. */
  2469. static int arbel_ib_open ( struct ib_device *ibdev ) {
  2470. struct arbel *arbel = ib_get_drvdata ( ibdev );
  2471. struct arbelprm_init_ib init_ib;
  2472. int rc;
  2473. /* Open hardware */
  2474. if ( ( rc = arbel_open ( arbel ) ) != 0 )
  2475. goto err_open;
  2476. /* Initialise IB */
  2477. memset ( &init_ib, 0, sizeof ( init_ib ) );
  2478. MLX_FILL_3 ( &init_ib, 0,
  2479. mtu_cap, ARBEL_MTU_2048,
  2480. port_width_cap, 3,
  2481. vl_cap, 1 );
  2482. MLX_FILL_1 ( &init_ib, 1, max_gid, 1 );
  2483. MLX_FILL_1 ( &init_ib, 2, max_pkey, 64 );
  2484. if ( ( rc = arbel_cmd_init_ib ( arbel, ibdev->port,
  2485. &init_ib ) ) != 0 ) {
  2486. DBGC ( arbel, "Arbel %p port %d could not intialise IB: %s\n",
  2487. arbel, ibdev->port, strerror ( rc ) );
  2488. goto err_init_ib;
  2489. }
  2490. /* Update MAD parameters */
  2491. ib_smc_update ( ibdev, arbel_mad );
  2492. return 0;
  2493. err_init_ib:
  2494. arbel_close ( arbel );
  2495. err_open:
  2496. return rc;
  2497. }
  2498. /**
  2499. * Close Infiniband link
  2500. *
  2501. * @v ibdev Infiniband device
  2502. */
  2503. static void arbel_ib_close ( struct ib_device *ibdev ) {
  2504. struct arbel *arbel = ib_get_drvdata ( ibdev );
  2505. int rc;
  2506. /* Close IB */
  2507. if ( ( rc = arbel_cmd_close_ib ( arbel, ibdev->port ) ) != 0 ) {
  2508. DBGC ( arbel, "Arbel %p port %d could not close IB: %s\n",
  2509. arbel, ibdev->port, strerror ( rc ) );
  2510. /* Nothing we can do about this */
  2511. }
  2512. /* Close hardware */
  2513. arbel_close ( arbel );
  2514. }
  2515. /**
  2516. * Inform embedded subnet management agent of a received MAD
  2517. *
  2518. * @v ibdev Infiniband device
  2519. * @v mad MAD
  2520. * @ret rc Return status code
  2521. */
  2522. static int arbel_inform_sma ( struct ib_device *ibdev, union ib_mad *mad ) {
  2523. int rc;
  2524. /* Send the MAD to the embedded SMA */
  2525. if ( ( rc = arbel_mad ( ibdev, mad ) ) != 0 )
  2526. return rc;
  2527. /* Update parameters held in software */
  2528. ib_smc_update ( ibdev, arbel_mad );
  2529. return 0;
  2530. }
  2531. /***************************************************************************
  2532. *
  2533. * Multicast group operations
  2534. *
  2535. ***************************************************************************
  2536. */
  2537. /**
  2538. * Attach to multicast group
  2539. *
  2540. * @v ibdev Infiniband device
  2541. * @v qp Queue pair
  2542. * @v gid Multicast GID
  2543. * @ret rc Return status code
  2544. */
  2545. static int arbel_mcast_attach ( struct ib_device *ibdev,
  2546. struct ib_queue_pair *qp,
  2547. union ib_gid *gid ) {
  2548. struct arbel *arbel = ib_get_drvdata ( ibdev );
  2549. struct arbelprm_mgm_hash hash;
  2550. struct arbelprm_mgm_entry mgm;
  2551. unsigned int index;
  2552. int rc;
  2553. /* Generate hash table index */
  2554. if ( ( rc = arbel_cmd_mgid_hash ( arbel, gid, &hash ) ) != 0 ) {
  2555. DBGC ( arbel, "Arbel %p could not hash GID: %s\n",
  2556. arbel, strerror ( rc ) );
  2557. return rc;
  2558. }
  2559. index = MLX_GET ( &hash, hash );
  2560. /* Check for existing hash table entry */
  2561. if ( ( rc = arbel_cmd_read_mgm ( arbel, index, &mgm ) ) != 0 ) {
  2562. DBGC ( arbel, "Arbel %p could not read MGM %#x: %s\n",
  2563. arbel, index, strerror ( rc ) );
  2564. return rc;
  2565. }
  2566. if ( MLX_GET ( &mgm, mgmqp_0.qi ) != 0 ) {
  2567. /* FIXME: this implementation allows only a single QP
  2568. * per multicast group, and doesn't handle hash
  2569. * collisions. Sufficient for IPoIB but may need to
  2570. * be extended in future.
  2571. */
  2572. DBGC ( arbel, "Arbel %p MGID index %#x already in use\n",
  2573. arbel, index );
  2574. return -EBUSY;
  2575. }
  2576. /* Update hash table entry */
  2577. MLX_FILL_2 ( &mgm, 8,
  2578. mgmqp_0.qpn_i, qp->qpn,
  2579. mgmqp_0.qi, 1 );
  2580. memcpy ( &mgm.u.dwords[4], gid, sizeof ( *gid ) );
  2581. if ( ( rc = arbel_cmd_write_mgm ( arbel, index, &mgm ) ) != 0 ) {
  2582. DBGC ( arbel, "Arbel %p could not write MGM %#x: %s\n",
  2583. arbel, index, strerror ( rc ) );
  2584. return rc;
  2585. }
  2586. return 0;
  2587. }
  2588. /**
  2589. * Detach from multicast group
  2590. *
  2591. * @v ibdev Infiniband device
  2592. * @v qp Queue pair
  2593. * @v gid Multicast GID
  2594. */
  2595. static void arbel_mcast_detach ( struct ib_device *ibdev,
  2596. struct ib_queue_pair *qp __unused,
  2597. union ib_gid *gid ) {
  2598. struct arbel *arbel = ib_get_drvdata ( ibdev );
  2599. struct arbelprm_mgm_hash hash;
  2600. struct arbelprm_mgm_entry mgm;
  2601. unsigned int index;
  2602. int rc;
  2603. /* Generate hash table index */
  2604. if ( ( rc = arbel_cmd_mgid_hash ( arbel, gid, &hash ) ) != 0 ) {
  2605. DBGC ( arbel, "Arbel %p could not hash GID: %s\n",
  2606. arbel, strerror ( rc ) );
  2607. return;
  2608. }
  2609. index = MLX_GET ( &hash, hash );
  2610. /* Clear hash table entry */
  2611. memset ( &mgm, 0, sizeof ( mgm ) );
  2612. if ( ( rc = arbel_cmd_write_mgm ( arbel, index, &mgm ) ) != 0 ) {
  2613. DBGC ( arbel, "Arbel %p could not write MGM %#x: %s\n",
  2614. arbel, index, strerror ( rc ) );
  2615. return;
  2616. }
  2617. }
  2618. /** Arbel Infiniband operations */
  2619. static struct ib_device_operations arbel_ib_operations = {
  2620. .create_cq = arbel_create_cq,
  2621. .destroy_cq = arbel_destroy_cq,
  2622. .create_qp = arbel_create_qp,
  2623. .modify_qp = arbel_modify_qp,
  2624. .destroy_qp = arbel_destroy_qp,
  2625. .post_send = arbel_post_send,
  2626. .post_recv = arbel_post_recv,
  2627. .poll_cq = arbel_poll_cq,
  2628. .poll_eq = arbel_poll_eq,
  2629. .open = arbel_ib_open,
  2630. .close = arbel_ib_close,
  2631. .mcast_attach = arbel_mcast_attach,
  2632. .mcast_detach = arbel_mcast_detach,
  2633. .set_port_info = arbel_inform_sma,
  2634. .set_pkey_table = arbel_inform_sma,
  2635. };
  2636. /***************************************************************************
  2637. *
  2638. * PCI interface
  2639. *
  2640. ***************************************************************************
  2641. */
  2642. /**
  2643. * Allocate Arbel device
  2644. *
  2645. * @ret arbel Arbel device
  2646. */
  2647. static struct arbel * arbel_alloc ( void ) {
  2648. struct arbel *arbel;
  2649. /* Allocate Arbel device */
  2650. arbel = zalloc ( sizeof ( *arbel ) );
  2651. if ( ! arbel )
  2652. goto err_arbel;
  2653. /* Allocate space for mailboxes */
  2654. arbel->mailbox_in = malloc_dma ( ARBEL_MBOX_SIZE, ARBEL_MBOX_ALIGN );
  2655. if ( ! arbel->mailbox_in )
  2656. goto err_mailbox_in;
  2657. arbel->mailbox_out = malloc_dma ( ARBEL_MBOX_SIZE, ARBEL_MBOX_ALIGN );
  2658. if ( ! arbel->mailbox_out )
  2659. goto err_mailbox_out;
  2660. return arbel;
  2661. free_dma ( arbel->mailbox_out, ARBEL_MBOX_SIZE );
  2662. err_mailbox_out:
  2663. free_dma ( arbel->mailbox_in, ARBEL_MBOX_SIZE );
  2664. err_mailbox_in:
  2665. free ( arbel );
  2666. err_arbel:
  2667. return NULL;
  2668. }
  2669. /**
  2670. * Free Arbel device
  2671. *
  2672. * @v arbel Arbel device
  2673. */
  2674. static void arbel_free ( struct arbel *arbel ) {
  2675. ufree ( arbel->icm );
  2676. ufree ( arbel->firmware_area );
  2677. free_dma ( arbel->mailbox_out, ARBEL_MBOX_SIZE );
  2678. free_dma ( arbel->mailbox_in, ARBEL_MBOX_SIZE );
  2679. free ( arbel );
  2680. }
  2681. /**
  2682. * Probe PCI device
  2683. *
  2684. * @v pci PCI device
  2685. * @v id PCI ID
  2686. * @ret rc Return status code
  2687. */
  2688. static int arbel_probe ( struct pci_device *pci ) {
  2689. struct arbel *arbel;
  2690. struct ib_device *ibdev;
  2691. int i;
  2692. int rc;
  2693. /* Allocate Arbel device */
  2694. arbel = arbel_alloc();
  2695. if ( ! arbel ) {
  2696. rc = -ENOMEM;
  2697. goto err_alloc;
  2698. }
  2699. pci_set_drvdata ( pci, arbel );
  2700. arbel->pci = pci;
  2701. /* Allocate Infiniband devices */
  2702. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ ) {
  2703. ibdev = alloc_ibdev ( 0 );
  2704. if ( ! ibdev ) {
  2705. rc = -ENOMEM;
  2706. goto err_alloc_ibdev;
  2707. }
  2708. arbel->ibdev[i] = ibdev;
  2709. ibdev->op = &arbel_ib_operations;
  2710. ibdev->dev = &pci->dev;
  2711. ibdev->port = ( ARBEL_PORT_BASE + i );
  2712. ib_set_drvdata ( ibdev, arbel );
  2713. }
  2714. /* Fix up PCI device */
  2715. adjust_pci_device ( pci );
  2716. /* Get PCI BARs */
  2717. arbel->config = ioremap ( pci_bar_start ( pci, ARBEL_PCI_CONFIG_BAR ),
  2718. ARBEL_PCI_CONFIG_BAR_SIZE );
  2719. arbel->uar = ioremap ( ( pci_bar_start ( pci, ARBEL_PCI_UAR_BAR ) +
  2720. ARBEL_PCI_UAR_IDX * ARBEL_PCI_UAR_SIZE ),
  2721. ARBEL_PCI_UAR_SIZE );
  2722. /* Reset device */
  2723. arbel_reset ( arbel );
  2724. /* Start firmware */
  2725. if ( ( rc = arbel_start_firmware ( arbel ) ) != 0 )
  2726. goto err_start_firmware;
  2727. /* Get device limits */
  2728. if ( ( rc = arbel_get_limits ( arbel ) ) != 0 )
  2729. goto err_get_limits;
  2730. /* Start device */
  2731. if ( ( rc = arbel_start ( arbel, 1 ) ) != 0 )
  2732. goto err_start;
  2733. /* Initialise parameters using SMC */
  2734. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ )
  2735. ib_smc_init ( arbel->ibdev[i], arbel_mad );
  2736. /* Register Infiniband devices */
  2737. for ( i = 0 ; i < ARBEL_NUM_PORTS ; i++ ) {
  2738. if ( ( rc = register_ibdev ( arbel->ibdev[i] ) ) != 0 ) {
  2739. DBGC ( arbel, "Arbel %p port %d could not register IB "
  2740. "device: %s\n", arbel,
  2741. arbel->ibdev[i]->port, strerror ( rc ) );
  2742. goto err_register_ibdev;
  2743. }
  2744. }
  2745. /* Leave device quiescent until opened */
  2746. if ( arbel->open_count == 0 )
  2747. arbel_stop ( arbel );
  2748. return 0;
  2749. i = ARBEL_NUM_PORTS;
  2750. err_register_ibdev:
  2751. for ( i-- ; i >= 0 ; i-- )
  2752. unregister_ibdev ( arbel->ibdev[i] );
  2753. arbel_stop ( arbel );
  2754. err_start:
  2755. err_get_limits:
  2756. arbel_stop_firmware ( arbel );
  2757. err_start_firmware:
  2758. i = ARBEL_NUM_PORTS;
  2759. err_alloc_ibdev:
  2760. for ( i-- ; i >= 0 ; i-- )
  2761. ibdev_put ( arbel->ibdev[i] );
  2762. arbel_free ( arbel );
  2763. err_alloc:
  2764. return rc;
  2765. }
  2766. /**
  2767. * Remove PCI device
  2768. *
  2769. * @v pci PCI device
  2770. */
  2771. static void arbel_remove ( struct pci_device *pci ) {
  2772. struct arbel *arbel = pci_get_drvdata ( pci );
  2773. int i;
  2774. for ( i = ( ARBEL_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
  2775. unregister_ibdev ( arbel->ibdev[i] );
  2776. for ( i = ( ARBEL_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
  2777. ibdev_put ( arbel->ibdev[i] );
  2778. arbel_free ( arbel );
  2779. }
  2780. static struct pci_device_id arbel_nics[] = {
  2781. PCI_ROM ( 0x15b3, 0x6282, "mt25218", "MT25218 HCA driver", 0 ),
  2782. PCI_ROM ( 0x15b3, 0x6274, "mt25204", "MT25204 HCA driver", 0 ),
  2783. };
  2784. struct pci_driver arbel_driver __pci_driver = {
  2785. .ids = arbel_nics,
  2786. .id_count = ( sizeof ( arbel_nics ) / sizeof ( arbel_nics[0] ) ),
  2787. .probe = arbel_probe,
  2788. .remove = arbel_remove,
  2789. };