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  1. /*
  2. * 3c515.c -- 3COM 3C515 Fast Etherlink ISA 10/100BASE-TX driver for etherboot
  3. * Copyright (C) 2002 Timothy Legge <tlegge@rogers.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. *
  19. * Portions of this code:
  20. * Copyright (C) 1997-2002 Donald Becker 3c515.c: A 3Com ISA EtherLink XL "Corkscrew" ethernet driver for linux.
  21. * Copyright (C) 2001 P.J.H.Fox (fox@roestock.demon.co.uk) ISAPNP Tools
  22. * Copyright (c) 2002 Jaroslav Kysela <perex@suse.cz> ISA Plug & Play support Linux Kernel
  23. * Copyright (C) 2000 Shusuke Nisiyama <shu@athena.qe.eng.hokudai.ac.jp> etherboot-5.0.5 3c595.c
  24. * Coptright (C) 1995 Martin Renters etherboot-5.0.5 3c509.c
  25. * Copyright (C) 1999 LightSys Technology Services, Inc. etherboot-5.0.5 3c90x.c
  26. * Portions Copyright (C) 1999 Steve Smith etherboot-5.0.5 3c90x.c
  27. *
  28. * The probe and reset functions and defines are direct copies from the
  29. * Becker code modified where necessary to make it work for etherboot
  30. *
  31. * The poll and transmit functions either contain code from or were written by referencing
  32. * the above referenced etherboot drivers. This driver would not have been
  33. * possible without this prior work
  34. *
  35. * REVISION HISTORY:
  36. * ================
  37. * v0.10 4-17-2002 TJL Initial implementation.
  38. * v0.11 4-17-2002 TJL Cleanup of the code
  39. * v0.12 4-26-2002 TJL Added ISA Plug and Play for Non-PNP Bioses
  40. * v0.13 6-10-2002 TJL Fixed ISA_PNP MAC Address problem
  41. * v0.14 9-23-2003 TJL Replaced delay with currticks
  42. *
  43. * Indent Options: indent -kr -i8
  44. * *********************************************************/
  45. /* to get some global routines like printf */
  46. #include "etherboot.h"
  47. /* to get the interface to the body of the program */
  48. #include "nic.h"
  49. #include <gpxe/isapnp.h>
  50. #include <gpxe/isa.h> /* for ISA_ROM */
  51. #include "timer.h"
  52. #include <gpxe/ethernet.h>
  53. static void t3c515_wait(unsigned int nticks)
  54. {
  55. unsigned int to = currticks() + nticks;
  56. while (currticks() < to)
  57. /* wait */ ;
  58. }
  59. /* TJL definations */
  60. #define HZ 100
  61. static int if_port;
  62. static struct corkscrew_private *vp;
  63. /* Brought directly from 3c515.c by Becker */
  64. #define CORKSCREW 1
  65. /* Maximum events (Rx packets, etc.) to handle at each interrupt.
  66. static int max_interrupt_work = 20;
  67. */
  68. /* Enable the automatic media selection code -- usually set. */
  69. #define AUTOMEDIA 1
  70. /* Allow the use of fragment bus master transfers instead of only
  71. programmed-I/O for Vortex cards. Full-bus-master transfers are always
  72. enabled by default on Boomerang cards. If VORTEX_BUS_MASTER is defined,
  73. the feature may be turned on using 'options'. */
  74. #define VORTEX_BUS_MASTER
  75. /* A few values that may be tweaked. */
  76. /* Keep the ring sizes a power of two for efficiency. */
  77. #define TX_RING_SIZE 16
  78. #define RX_RING_SIZE 16
  79. #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
  80. /* "Knobs" for adjusting internal parameters. */
  81. /* Put out somewhat more debugging messages. (0 - no msg, 1 minimal msgs). */
  82. #define DRIVER_DEBUG 1
  83. /* Some values here only for performance evaluation and path-coverage
  84. debugging.
  85. static int rx_nocopy, rx_copy, queued_packet;
  86. */
  87. #define CORKSCREW_ID 10
  88. #define EL3WINDOW(win_num) \
  89. outw(SelectWindow + (win_num), nic->ioaddr + EL3_CMD)
  90. #define EL3_CMD 0x0e
  91. #define EL3_STATUS 0x0e
  92. #define RX_BYTES_MASK (unsigned short) (0x07ff)
  93. enum corkscrew_cmd {
  94. TotalReset = 0 << 11, SelectWindow = 1 << 11, StartCoax = 2 << 11,
  95. RxDisable = 3 << 11, RxEnable = 4 << 11, RxReset = 5 << 11,
  96. UpStall = 6 << 11, UpUnstall = (6 << 11) + 1,
  97. DownStall = (6 << 11) + 2, DownUnstall = (6 << 11) + 3,
  98. RxDiscard = 8 << 11, TxEnable = 9 << 11, TxDisable =
  99. 10 << 11, TxReset = 11 << 11,
  100. FakeIntr = 12 << 11, AckIntr = 13 << 11, SetIntrEnb = 14 << 11,
  101. SetStatusEnb = 15 << 11, SetRxFilter = 16 << 11, SetRxThreshold =
  102. 17 << 11,
  103. SetTxThreshold = 18 << 11, SetTxStart = 19 << 11,
  104. StartDMAUp = 20 << 11, StartDMADown = (20 << 11) + 1, StatsEnable =
  105. 21 << 11,
  106. StatsDisable = 22 << 11, StopCoax = 23 << 11,
  107. };
  108. /* The SetRxFilter command accepts the following classes: */
  109. enum RxFilter {
  110. RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8
  111. };
  112. /* Bits in the general status register. */
  113. enum corkscrew_status {
  114. IntLatch = 0x0001, AdapterFailure = 0x0002, TxComplete = 0x0004,
  115. TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
  116. IntReq = 0x0040, StatsFull = 0x0080,
  117. DMADone = 1 << 8, DownComplete = 1 << 9, UpComplete = 1 << 10,
  118. DMAInProgress = 1 << 11, /* DMA controller is still busy. */
  119. CmdInProgress = 1 << 12, /* EL3_CMD is still busy. */
  120. };
  121. /* Register window 1 offsets, the window used in normal operation.
  122. On the Corkscrew this window is always mapped at offsets 0x10-0x1f. */
  123. enum Window1 {
  124. TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
  125. RxStatus = 0x18, Timer = 0x1A, TxStatus = 0x1B,
  126. TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
  127. };
  128. enum Window0 {
  129. Wn0IRQ = 0x08,
  130. #if defined(CORKSCREW)
  131. Wn0EepromCmd = 0x200A, /* Corkscrew EEPROM command register. */
  132. Wn0EepromData = 0x200C, /* Corkscrew EEPROM results register. */
  133. #else
  134. Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
  135. Wn0EepromData = 12, /* Window 0: EEPROM results register. */
  136. #endif
  137. };
  138. enum Win0_EEPROM_bits {
  139. EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
  140. EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
  141. EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
  142. };
  143. enum Window3 { /* Window 3: MAC/config bits. */
  144. Wn3_Config = 0, Wn3_MAC_Ctrl = 6, Wn3_Options = 8,
  145. };
  146. union wn3_config {
  147. int i;
  148. struct w3_config_fields {
  149. unsigned int ram_size:3, ram_width:1, ram_speed:2,
  150. rom_size:2;
  151. int pad8:8;
  152. unsigned int ram_split:2, pad18:2, xcvr:3, pad21:1,
  153. autoselect:1;
  154. int pad24:7;
  155. } u;
  156. };
  157. enum Window4 {
  158. Wn4_NetDiag = 6, Wn4_Media = 10, /* Window 4: Xcvr/media bits. */
  159. };
  160. enum Win4_Media_bits {
  161. Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
  162. Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
  163. Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
  164. Media_LnkBeat = 0x0800,
  165. };
  166. enum Window7 { /* Window 7: Bus Master control. */
  167. Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,
  168. };
  169. /* Boomerang-style bus master control registers. Note ISA aliases! */
  170. enum MasterCtrl {
  171. PktStatus = 0x400, DownListPtr = 0x404, FragAddr = 0x408, FragLen =
  172. 0x40c,
  173. TxFreeThreshold = 0x40f, UpPktStatus = 0x410, UpListPtr = 0x418,
  174. };
  175. /* The Rx and Tx descriptor lists.
  176. Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
  177. alignment contraint on tx_ring[] and rx_ring[]. */
  178. struct boom_rx_desc {
  179. u32 next;
  180. s32 status;
  181. u32 addr;
  182. s32 length;
  183. };
  184. /* Values for the Rx status entry. */
  185. enum rx_desc_status {
  186. RxDComplete = 0x00008000, RxDError = 0x4000,
  187. /* See boomerang_rx() for actual error bits */
  188. };
  189. struct boom_tx_desc {
  190. u32 next;
  191. s32 status;
  192. u32 addr;
  193. s32 length;
  194. };
  195. struct corkscrew_private {
  196. const char *product_name;
  197. struct net_device *next_module;
  198. /* The Rx and Tx rings are here to keep them quad-word-aligned. */
  199. struct boom_rx_desc rx_ring[RX_RING_SIZE];
  200. struct boom_tx_desc tx_ring[TX_RING_SIZE];
  201. /* The addresses of transmit- and receive-in-place skbuffs. */
  202. struct sk_buff *rx_skbuff[RX_RING_SIZE];
  203. struct sk_buff *tx_skbuff[TX_RING_SIZE];
  204. unsigned int cur_rx, cur_tx; /* The next free ring entry */
  205. unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
  206. struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
  207. int capabilities; /* Adapter capabilities word. */
  208. int options; /* User-settable misc. driver options. */
  209. int last_rx_packets; /* For media autoselection. */
  210. unsigned int available_media:8, /* From Wn3_Options */
  211. media_override:3, /* Passed-in media type. */
  212. default_media:3, /* Read from the EEPROM. */
  213. full_duplex:1, autoselect:1, bus_master:1, /* Vortex can only do a fragment bus-m. */
  214. full_bus_master_tx:1, full_bus_master_rx:1, /* Boomerang */
  215. tx_full:1;
  216. };
  217. /* The action to take with a media selection timer tick.
  218. Note that we deviate from the 3Com order by checking 10base2 before AUI.
  219. */
  220. enum xcvr_types {
  221. XCVR_10baseT =
  222. 0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
  223. XCVR_100baseFx, XCVR_MII = 6, XCVR_Default = 8,
  224. };
  225. static struct media_table {
  226. char *name;
  227. unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
  228. mask:8, /* The transceiver-present bit in Wn3_Config. */
  229. next:8; /* The media type to try next. */
  230. short wait; /* Time before we check media status. */
  231. } media_tbl[] = {
  232. {
  233. "10baseT", Media_10TP, 0x08, XCVR_10base2, (14 * HZ) / 10}
  234. , {
  235. "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1 * HZ) / 10}
  236. , {
  237. "undefined", 0, 0x80, XCVR_10baseT, 10000}
  238. , {
  239. "10base2", 0, 0x10, XCVR_AUI, (1 * HZ) / 10}
  240. , {
  241. "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx,
  242. (14 * HZ) / 10}
  243. , {
  244. "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14 * HZ) / 10}
  245. , {
  246. "MII", 0, 0x40, XCVR_10baseT, 3 * HZ}
  247. , {
  248. "undefined", 0, 0x01, XCVR_10baseT, 10000}
  249. , {
  250. "Default", 0, 0xFF, XCVR_10baseT, 10000}
  251. ,};
  252. /* TILEG Modified to remove reference to dev */
  253. static int corkscrew_found_device(int ioaddr, int irq, int product_index,
  254. int options, struct nic *nic);
  255. static int corkscrew_probe1(int ioaddr, int irq, int product_index,
  256. struct nic *nic);
  257. /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
  258. /* Note: this is the only limit on the number of cards supported!! */
  259. static int options = -1;
  260. /* End Brought directly from 3c515.c by Becker */
  261. /**************************************************************************
  262. RESET - Reset adapter
  263. ***************************************************************************/
  264. static void t515_reset(struct nic *nic)
  265. {
  266. union wn3_config config;
  267. int i;
  268. /* Before initializing select the active media port. */
  269. EL3WINDOW(3);
  270. if (vp->full_duplex)
  271. outb(0x20, nic->ioaddr + Wn3_MAC_Ctrl); /* Set the full-duplex bit. */
  272. config.i = inl(nic->ioaddr + Wn3_Config);
  273. if (vp->media_override != 7) {
  274. DBG ( "Media override to transceiver %d (%s).\n",
  275. vp->media_override,
  276. media_tbl[vp->media_override].name);
  277. if_port = vp->media_override;
  278. } else if (vp->autoselect) {
  279. /* Find first available media type, starting with 100baseTx. */
  280. if_port = 4;
  281. while (!(vp->available_media & media_tbl[if_port].mask))
  282. if_port = media_tbl[if_port].next;
  283. DBG ( "Initial media type %s.\n",
  284. media_tbl[if_port].name);
  285. } else
  286. if_port = vp->default_media;
  287. config.u.xcvr = if_port;
  288. outl(config.i, nic->ioaddr + Wn3_Config);
  289. DBG ( "corkscrew_open() InternalConfig 0x%hX.\n",
  290. config.i);
  291. outw(TxReset, nic->ioaddr + EL3_CMD);
  292. for (i = 20; i >= 0; i--)
  293. if (!(inw(nic->ioaddr + EL3_STATUS) & CmdInProgress))
  294. break;
  295. outw(RxReset, nic->ioaddr + EL3_CMD);
  296. /* Wait a few ticks for the RxReset command to complete. */
  297. for (i = 20; i >= 0; i--)
  298. if (!(inw(nic->ioaddr + EL3_STATUS) & CmdInProgress))
  299. break;
  300. outw(SetStatusEnb | 0x00, nic->ioaddr + EL3_CMD);
  301. #ifdef debug_3c515
  302. EL3WINDOW(4);
  303. DBG ( "FIXME: fix print for irq, not 9" );
  304. DBG ( "corkscrew_open() irq %d media status 0x%hX.\n",
  305. 9, inw(nic->ioaddr + Wn4_Media) );
  306. #endif
  307. /* Set the station address and mask in window 2 each time opened. */
  308. EL3WINDOW(2);
  309. for (i = 0; i < 6; i++)
  310. outb(nic->node_addr[i], nic->ioaddr + i);
  311. for (; i < 12; i += 2)
  312. outw(0, nic->ioaddr + i);
  313. if (if_port == 3)
  314. /* Start the thinnet transceiver. We should really wait 50ms... */
  315. outw(StartCoax, nic->ioaddr + EL3_CMD);
  316. EL3WINDOW(4);
  317. outw((inw(nic->ioaddr + Wn4_Media) & ~(Media_10TP | Media_SQE)) |
  318. media_tbl[if_port].media_bits, nic->ioaddr + Wn4_Media);
  319. /* Switch to the stats window, and clear all stats by reading. */
  320. /* outw(StatsDisable, nic->ioaddr + EL3_CMD);*/
  321. EL3WINDOW(6);
  322. for (i = 0; i < 10; i++)
  323. inb(nic->ioaddr + i);
  324. inw(nic->ioaddr + 10);
  325. inw(nic->ioaddr + 12);
  326. /* New: On the Vortex we must also clear the BadSSD counter. */
  327. EL3WINDOW(4);
  328. inb(nic->ioaddr + 12);
  329. /* ..and on the Boomerang we enable the extra statistics bits. */
  330. outw(0x0040, nic->ioaddr + Wn4_NetDiag);
  331. /* Switch to register set 7 for normal use. */
  332. EL3WINDOW(7);
  333. /* Temporarily left in place. If these FIXMEs are printed
  334. it meand that special logic for that card may need to be added
  335. see Becker's 3c515.c driver */
  336. if (vp->full_bus_master_rx) { /* Boomerang bus master. */
  337. printf("FIXME: Is this if necessary");
  338. vp->cur_rx = vp->dirty_rx = 0;
  339. DBG ( " Filling in the Rx ring.\n" );
  340. for (i = 0; i < RX_RING_SIZE; i++) {
  341. printf("FIXME: Is this if necessary");
  342. }
  343. }
  344. if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
  345. vp->cur_tx = vp->dirty_tx = 0;
  346. outb(PKT_BUF_SZ >> 8, nic->ioaddr + TxFreeThreshold); /* Room for a packet. */
  347. /* Clear the Tx ring. */
  348. for (i = 0; i < TX_RING_SIZE; i++)
  349. vp->tx_skbuff[i] = 0;
  350. outl(0, nic->ioaddr + DownListPtr);
  351. }
  352. /* Set receiver mode: presumably accept b-case and phys addr only. */
  353. outw(SetRxFilter | RxStation | RxMulticast | RxBroadcast | RxProm,
  354. nic->ioaddr + EL3_CMD);
  355. outw(RxEnable, nic->ioaddr + EL3_CMD); /* Enable the receiver. */
  356. outw(TxEnable, nic->ioaddr + EL3_CMD); /* Enable transmitter. */
  357. /* Allow status bits to be seen. */
  358. outw(SetStatusEnb | AdapterFailure | IntReq | StatsFull |
  359. (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
  360. (vp->full_bus_master_rx ? UpComplete : RxComplete) |
  361. (vp->bus_master ? DMADone : 0), nic->ioaddr + EL3_CMD);
  362. /* Ack all pending events, and set active indicator mask. */
  363. outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
  364. nic->ioaddr + EL3_CMD);
  365. outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete | StatsFull
  366. | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete,
  367. nic->ioaddr + EL3_CMD);
  368. }
  369. /**************************************************************************
  370. POLL - Wait for a frame
  371. ***************************************************************************/
  372. static int t515_poll(struct nic *nic, int retrieve)
  373. {
  374. short status, cst;
  375. register short rx_fifo;
  376. cst = inw(nic->ioaddr + EL3_STATUS);
  377. if ((cst & RxComplete) == 0) {
  378. /* Ack all pending events, and set active indicator mask. */
  379. outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
  380. nic->ioaddr + EL3_CMD);
  381. outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete |
  382. StatsFull | (vp->
  383. bus_master ? DMADone : 0) | UpComplete |
  384. DownComplete, nic->ioaddr + EL3_CMD);
  385. return 0;
  386. }
  387. status = inw(nic->ioaddr + RxStatus);
  388. if (status & RxDError) {
  389. printf("RxDError\n");
  390. outw(RxDiscard, nic->ioaddr + EL3_CMD);
  391. return 0;
  392. }
  393. rx_fifo = status & RX_BYTES_MASK;
  394. if (rx_fifo == 0)
  395. return 0;
  396. if ( ! retrieve ) return 1;
  397. DBG ( "[l=%d", rx_fifo );
  398. insw(nic->ioaddr + RX_FIFO, nic->packet, rx_fifo / 2);
  399. if (rx_fifo & 1)
  400. nic->packet[rx_fifo - 1] = inb(nic->ioaddr + RX_FIFO);
  401. nic->packetlen = rx_fifo;
  402. while (1) {
  403. status = inw(nic->ioaddr + RxStatus);
  404. DBG ( "0x%hX*", status );
  405. rx_fifo = status & RX_BYTES_MASK;
  406. if (rx_fifo > 0) {
  407. insw(nic->ioaddr + RX_FIFO, nic->packet + nic->packetlen,
  408. rx_fifo / 2);
  409. if (rx_fifo & 1)
  410. nic->packet[nic->packetlen + rx_fifo - 1] =
  411. inb(nic->ioaddr + RX_FIFO);
  412. nic->packetlen += rx_fifo;
  413. DBG ( "+%d", rx_fifo );
  414. }
  415. if ((status & RxComplete) == 0) {
  416. DBG ( "=%d", nic->packetlen );
  417. break;
  418. }
  419. udelay(1000);
  420. }
  421. /* acknowledge reception of packet */
  422. outw(RxDiscard, nic->ioaddr + EL3_CMD);
  423. while (inw(nic->ioaddr + EL3_STATUS) & CmdInProgress);
  424. #ifdef debug_3c515
  425. {
  426. unsigned short type = 0;
  427. type = (nic->packet[12] << 8) | nic->packet[13];
  428. if (nic->packet[0] + nic->packet[1] + nic->packet[2] +
  429. nic->packet[3] + nic->packet[4] + nic->packet[5] ==
  430. 0xFF * ETH_ALEN)
  431. DBG ( ",t=0x%hX,b]", type );
  432. else
  433. DBG ( ",t=0x%hX]", type );
  434. }
  435. #endif
  436. return 1;
  437. }
  438. /*************************************************************************
  439. 3Com 515 - specific routines
  440. **************************************************************************/
  441. static char padmap[] = {
  442. 0, 3, 2, 1
  443. };
  444. /**************************************************************************
  445. TRANSMIT - Transmit a frame
  446. ***************************************************************************/
  447. static void t515_transmit(struct nic *nic, const char *d, /* Destination */
  448. unsigned int t, /* Type */
  449. unsigned int s, /* size */
  450. const char *p)
  451. { /* Packet */
  452. register int len;
  453. int pad;
  454. int status;
  455. DBG ( "{l=%d,t=0x%hX}", s + ETH_HLEN, t );
  456. /* swap bytes of type */
  457. t = htons(t);
  458. len = s + ETH_HLEN; /* actual length of packet */
  459. pad = padmap[len & 3];
  460. /*
  461. * The 3c515 automatically pads short packets to minimum ethernet length,
  462. * but we drop packets that are too large. Perhaps we should truncate
  463. * them instead?
  464. Copied from 3c595. Is this true for the 3c515?
  465. */
  466. if (len + pad > ETH_FRAME_LEN) {
  467. return;
  468. }
  469. /* drop acknowledgements */
  470. while ((status = inb(nic->ioaddr + TxStatus)) & TxComplete) {
  471. /*if(status & (TXS_UNDERRUN|0x88|TXS_STATUS_OVERFLOW)) { */
  472. outw(TxReset, nic->ioaddr + EL3_CMD);
  473. outw(TxEnable, nic->ioaddr + EL3_CMD);
  474. /* } */
  475. outb(0x0, nic->ioaddr + TxStatus);
  476. }
  477. while (inw(nic->ioaddr + TxFree) < len + pad + 4) {
  478. /* no room in FIFO */
  479. }
  480. outw(len, nic->ioaddr + TX_FIFO);
  481. outw(0x0, nic->ioaddr + TX_FIFO); /* Second dword meaningless */
  482. /* write packet */
  483. outsw(nic->ioaddr + TX_FIFO, d, ETH_ALEN / 2);
  484. outsw(nic->ioaddr + TX_FIFO, nic->node_addr, ETH_ALEN / 2);
  485. outw(t, nic->ioaddr + TX_FIFO);
  486. outsw(nic->ioaddr + TX_FIFO, p, s / 2);
  487. if (s & 1)
  488. outb(*(p + s - 1), nic->ioaddr + TX_FIFO);
  489. while (pad--)
  490. outb(0, nic->ioaddr + TX_FIFO); /* Padding */
  491. /* wait for Tx complete */
  492. while ((inw(nic->ioaddr + EL3_STATUS) & CmdInProgress) != 0);
  493. }
  494. /**************************************************************************
  495. DISABLE - Turn off ethernet interface
  496. ***************************************************************************/
  497. static void t515_disable ( struct nic *nic,
  498. struct isapnp_device *isapnp ) {
  499. t515_reset(nic);
  500. /* This is a hack. Since ltsp worked on my
  501. system without any disable functionality I
  502. have no way to determine if this works */
  503. /* Disable the receiver and transmitter. */
  504. outw(RxDisable, nic->ioaddr + EL3_CMD);
  505. outw(TxDisable, nic->ioaddr + EL3_CMD);
  506. if (if_port == XCVR_10base2)
  507. /* Turn off thinnet power. Green! */
  508. outw(StopCoax, nic->ioaddr + EL3_CMD);
  509. outw(SetIntrEnb | 0x0000, nic->ioaddr + EL3_CMD);
  510. deactivate_isapnp_device ( isapnp );
  511. return;
  512. }
  513. static void t515_irq(struct nic *nic __unused, irq_action_t action __unused)
  514. {
  515. switch ( action ) {
  516. case DISABLE :
  517. break;
  518. case ENABLE :
  519. break;
  520. case FORCE :
  521. break;
  522. }
  523. }
  524. static struct nic_operations t515_operations = {
  525. .connect = dummy_connect,
  526. .poll = t515_poll,
  527. .transmit = t515_transmit,
  528. .irq = t515_irq,
  529. };
  530. /**************************************************************************
  531. PROBE - Look for an adapter, this routine's visible to the outside
  532. You should omit the last argument struct pci_device * for a non-PCI NIC
  533. ***************************************************************************/
  534. static int t515_probe ( struct nic *nic, struct isapnp_device *isapnp ) {
  535. /* Direct copy from Beckers 3c515.c removing any ISAPNP sections */
  536. nic->ioaddr = isapnp->ioaddr;
  537. nic->irqno = isapnp->irqno;
  538. activate_isapnp_device ( isapnp );
  539. /* Check the resource configuration for a matching ioaddr. */
  540. if ((unsigned)(inw(nic->ioaddr + 0x2002) & 0x1f0)
  541. != (nic->ioaddr & 0x1f0)) {
  542. DBG ( "3c515 ioaddr mismatch\n" );
  543. return 0;
  544. }
  545. /* Verify by reading the device ID from the EEPROM. */
  546. {
  547. int timer;
  548. outw(EEPROM_Read + 7, nic->ioaddr + Wn0EepromCmd);
  549. /* Pause for at least 162 us. for the read to take place. */
  550. for (timer = 4; timer >= 0; timer--) {
  551. t3c515_wait(1);
  552. if ((inw(nic->ioaddr + Wn0EepromCmd) & 0x0200) == 0)
  553. break;
  554. }
  555. if (inw(nic->ioaddr + Wn0EepromData) != 0x6d50) {
  556. DBG ( "3c515 read incorrect vendor ID from EEPROM" );
  557. return 0;
  558. }
  559. }
  560. DBG ( "3c515 Resource configuration register 0x%lX, DCR 0x%hX.\n",
  561. inl(nic->ioaddr + 0x2002), inw(nic->ioaddr + 0x2000) );
  562. corkscrew_found_device(nic->ioaddr, nic->irqno, CORKSCREW_ID,
  563. options, nic);
  564. t515_reset(nic);
  565. nic->nic_op = &t515_operations;
  566. return 1;
  567. }
  568. static int
  569. corkscrew_found_device(int ioaddr, int irq,
  570. int product_index, int options, struct nic *nic)
  571. {
  572. /* Direct copy from Becker 3c515.c with unecessary parts removed */
  573. vp->product_name = "3c515";
  574. vp->options = options;
  575. if (options >= 0) {
  576. vp->media_override =
  577. ((options & 7) == 2) ? 0 : options & 7;
  578. vp->full_duplex = (options & 8) ? 1 : 0;
  579. vp->bus_master = (options & 16) ? 1 : 0;
  580. } else {
  581. vp->media_override = 7;
  582. vp->full_duplex = 0;
  583. vp->bus_master = 0;
  584. }
  585. corkscrew_probe1(ioaddr, irq, product_index, nic);
  586. return 0;
  587. }
  588. static int
  589. corkscrew_probe1(int ioaddr, int irq, int product_index __unused,
  590. struct nic *nic)
  591. {
  592. unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
  593. int i;
  594. printf("3Com %s at 0x%hX, ", vp->product_name, ioaddr);
  595. /* Read the station address from the EEPROM. */
  596. EL3WINDOW(0);
  597. for (i = 0; i < 0x18; i++) {
  598. short *phys_addr = (short *) nic->node_addr;
  599. int timer;
  600. outw(EEPROM_Read + i, ioaddr + Wn0EepromCmd);
  601. /* Pause for at least 162 us. for the read to take place. */
  602. for (timer = 4; timer >= 0; timer--) {
  603. t3c515_wait(1);
  604. if ((inw(ioaddr + Wn0EepromCmd) & 0x0200) == 0)
  605. break;
  606. }
  607. eeprom[i] = inw(ioaddr + Wn0EepromData);
  608. DBG ( "Value %d: %hX ", i, eeprom[i] );
  609. checksum ^= eeprom[i];
  610. if (i < 3)
  611. phys_addr[i] = htons(eeprom[i]);
  612. }
  613. checksum = (checksum ^ (checksum >> 8)) & 0xff;
  614. if (checksum != 0x00)
  615. printf(" ***INVALID CHECKSUM 0x%hX*** ", checksum);
  616. DBG ( "%s", eth_ntoa ( nic->node_addr ) );
  617. if (eeprom[16] == 0x11c7) { /* Corkscrew */
  618. }
  619. printf(", IRQ %d\n", irq);
  620. /* Tell them about an invalid IRQ. */
  621. if ( (irq <= 0 || irq > 15) ) {
  622. DBG (" *** Warning: this IRQ is unlikely to work! ***\n" );
  623. }
  624. {
  625. char *ram_split[] = { "5:3", "3:1", "1:1", "3:5" };
  626. union wn3_config config;
  627. EL3WINDOW(3);
  628. vp->available_media = inw(ioaddr + Wn3_Options);
  629. config.i = inl(ioaddr + Wn3_Config);
  630. DBG ( " Internal config register is %4.4x, "
  631. "transceivers 0x%hX.\n",
  632. config.i, inw(ioaddr + Wn3_Options) );
  633. printf
  634. (" %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
  635. 8 << config.u.ram_size,
  636. config.u.ram_width ? "word" : "byte",
  637. ram_split[config.u.ram_split],
  638. config.u.autoselect ? "autoselect/" : "",
  639. media_tbl[config.u.xcvr].name);
  640. if_port = config.u.xcvr;
  641. vp->default_media = config.u.xcvr;
  642. vp->autoselect = config.u.autoselect;
  643. }
  644. if (vp->media_override != 7) {
  645. printf(" Media override to transceiver type %d (%s).\n",
  646. vp->media_override,
  647. media_tbl[vp->media_override].name);
  648. if_port = vp->media_override;
  649. }
  650. vp->capabilities = eeprom[16];
  651. vp->full_bus_master_tx = (vp->capabilities & 0x20) ? 1 : 0;
  652. /* Rx is broken at 10mbps, so we always disable it. */
  653. /* vp->full_bus_master_rx = 0; */
  654. vp->full_bus_master_rx = (vp->capabilities & 0x20) ? 1 : 0;
  655. return 0;
  656. }
  657. static struct isapnp_device_id t515_adapters[] = {
  658. { "3c515 (ISAPnP)", ISAPNP_VENDOR('T','C','M'), 0x5051 },
  659. };
  660. ISAPNP_DRIVER ( t515_driver, t515_adapters );
  661. DRIVER ( "3c515", nic_driver, isapnp_driver, t515_driver,
  662. t515_probe, t515_disable );
  663. ISA_ROM ( "3c515", "3c515 Fast EtherLink ISAPnP" );