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eepro100.c 32KB

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  1. /*
  2. * eepro100.c -- This is a driver for Intel Fast Ethernet Controllers
  3. * (ifec).
  4. *
  5. * Originally written for Etherboot by:
  6. *
  7. * Copyright (C) AW Computer Systems.
  8. * written by R.E.Wolff -- R.E.Wolff@BitWizard.nl
  9. *
  10. * AW Computer Systems is contributing to the free software community
  11. * by paying for this driver and then putting the result under GPL.
  12. *
  13. * If you need a Linux device driver, please contact BitWizard for a
  14. * quote.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation; either version 2, or (at
  19. * your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  24. * General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  29. *
  30. *
  31. * date version by what
  32. * Written: May 29 1997 V0.10 REW Initial revision.
  33. * changes: May 31 1997 V0.90 REW Works!
  34. * Jun 1 1997 V0.91 REW Cleanup
  35. * Jun 2 1997 V0.92 REW Add some code documentation
  36. * Jul 25 1997 V1.00 REW Tested by AW to work in a PROM
  37. * Cleanup for publication
  38. * Dez 11 2004 V1.10 Kiszka Add RX ring buffer support
  39. * Jun 2008 v2.0 mdeck Updated to iPXE. Changed much.
  40. *
  41. * Cleanups and fixes by Thomas Miletich<thomas.miletich@gmail.com>
  42. *
  43. * This is the etherboot intel etherexpress Pro/100B driver.
  44. *
  45. * It was written from scratch, with Donald Beckers eepro100.c kernel
  46. * driver as a guideline. Mostly the 82557 related definitions and the
  47. * lower level routines have been cut-and-pasted into this source.
  48. *
  49. * The driver was finished before Intel got the NDA out of the closet.
  50. *
  51. * Datasheet is now published and available from
  52. * ftp://download.intel.com/design/network/manuals/8255X_OpenSDM.pdf
  53. * - Michael Brown
  54. * */
  55. FILE_LICENCE ( GPL2_OR_LATER );
  56. /*
  57. * General Theory of Operation
  58. *
  59. * Initialization
  60. *
  61. * ifec_pci_probe() is called by iPXE during initialization. Typical NIC
  62. * initialization is performed. EEPROM data is read.
  63. *
  64. * Network Boot
  65. *
  66. * ifec_net_open() is called by iPXE before attempting to network boot from the
  67. * card. Here, the Command Unit & Receive Unit are initialized. The tx & rx
  68. * rings are setup. The MAC address is programmed and the card is configured.
  69. *
  70. * Transmit
  71. *
  72. * ifec_net_transmit() enqueues a packet in the tx ring - active::tcbs[] The tx
  73. * ring is composed of TCBs linked to each other into a ring. A tx request
  74. * fills out the next available TCB with a pointer to the packet data.
  75. * The last enqueued tx is always at active::tcb_head. Thus, a tx request fills
  76. * out the TCB following tcb_head.
  77. * active::tcb_tail points to the TCB we're awaiting completion of.
  78. * ifec_tx_process() checks tcb_tail, and once complete,
  79. * blindly increments tcb_tail to the next ring TCB.
  80. *
  81. * Receive
  82. *
  83. * priv::rfds[] is an array of Receive Frame Descriptors. The RFDs are linked
  84. * together to form a ring.
  85. * ifec_net_poll() calls ifec_rx_process(), which checks the next RFD for
  86. * data. If we received a packet, we allocate a new io_buffer and copy the
  87. * packet data into it. If alloc_iob() fails, we don't touch the RFD and try
  88. * again on the next poll.
  89. */
  90. /*
  91. * Debugging levels:
  92. * - DBG() is for any errors, i.e. failed alloc_iob(), malloc_dma(),
  93. * TX overflow, corrupted packets, ...
  94. * - DBG2() is for successful events, like packet received,
  95. * packet transmitted, and other general notifications.
  96. * - DBGP() prints the name of each called function on entry
  97. */
  98. #include <stdint.h>
  99. #include <byteswap.h>
  100. #include <errno.h>
  101. #include <stdio.h>
  102. #include <unistd.h>
  103. #include <ipxe/ethernet.h>
  104. #include <ipxe/if_ether.h>
  105. #include <ipxe/iobuf.h>
  106. #include <ipxe/malloc.h>
  107. #include <ipxe/pci.h>
  108. #include <ipxe/spi_bit.h>
  109. #include <ipxe/timer.h>
  110. #include <ipxe/nvs.h>
  111. #include <ipxe/threewire.h>
  112. #include <ipxe/netdevice.h>
  113. #include "eepro100.h"
  114. /****************************** Global data **********************************/
  115. /*
  116. * This is the default configuration command data. The values were copied from
  117. * the Linux kernel initialization for the eepro100.
  118. */
  119. static struct ifec_cfg ifec_cfg = {
  120. .status = 0,
  121. .command = CmdConfigure | CmdSuspend,
  122. .link = 0, /* Filled in later */
  123. .byte = { 22, /* How many bytes in this array */
  124. ( TX_FIFO << 4 ) | RX_FIFO, /* Rx & Tx FIFO limits */
  125. 0, 0, /* Adaptive Interframe Spacing */
  126. RX_DMA_COUNT, /* Rx DMA max byte count */
  127. TX_DMA_COUNT + 0x80, /* Tx DMA max byte count */
  128. 0x32, /* Many bits. */
  129. 0x03, /* Discard short receive & Underrun retries */
  130. 1, /* 1=Use MII 0=Use AUI */
  131. 0,
  132. 0x2E, /* NSAI, Preamble length, & Loopback*/
  133. 0, /* Linear priority */
  134. 0x60, /* L PRI MODE & Interframe spacing */
  135. 0, 0xf2,
  136. 0x48, /* Promiscuous, Broadcast disable, CRS & CDT */
  137. 0, 0x40,
  138. 0xf2, /* Stripping, Padding, Receive CRC Transfer */
  139. 0x80, /* 0x40=Force full-duplex, 0x80=Allowfull-duplex*/
  140. 0x3f, /* Multiple IA */
  141. 0x0D } /* Multicast all */
  142. };
  143. static struct net_device_operations ifec_operations = {
  144. .open = ifec_net_open,
  145. .close = ifec_net_close,
  146. .transmit = ifec_net_transmit,
  147. .poll = ifec_net_poll,
  148. .irq = ifec_net_irq
  149. };
  150. /******************* iPXE PCI Device Driver API functions ********************/
  151. /*
  152. * Initialize the PCI device.
  153. *
  154. * @v pci The device's associated pci_device structure.
  155. * @v id The PCI device + vendor id.
  156. * @ret rc Returns zero if successfully initialized.
  157. *
  158. * This function is called very early on, while iPXE is initializing.
  159. * This is a iPXE PCI Device Driver API function.
  160. */
  161. static int ifec_pci_probe ( struct pci_device *pci )
  162. {
  163. struct net_device *netdev;
  164. struct ifec_private *priv;
  165. int rc;
  166. DBGP ( "ifec_pci_probe: " );
  167. if ( pci->ioaddr == 0 )
  168. return -EINVAL;
  169. netdev = alloc_etherdev ( sizeof(*priv) );
  170. if ( !netdev )
  171. return -ENOMEM;
  172. netdev_init ( netdev, &ifec_operations );
  173. priv = netdev->priv;
  174. pci_set_drvdata ( pci, netdev );
  175. netdev->dev = &pci->dev;
  176. /* enable bus master, etc */
  177. adjust_pci_device( pci );
  178. DBGP ( "pci " );
  179. memset ( priv, 0, sizeof(*priv) );
  180. priv->ioaddr = pci->ioaddr;
  181. ifec_reset ( netdev );
  182. DBGP ( "reset " );
  183. ifec_init_eeprom ( netdev );
  184. /* read MAC address */
  185. nvs_read ( &priv->eeprom.nvs, EEPROM_ADDR_MAC_0, netdev->hw_addr,
  186. ETH_ALEN );
  187. /* read mdio_register */
  188. nvs_read ( &priv->eeprom.nvs, EEPROM_ADDR_MDIO_REGISTER,
  189. &priv->mdio_register, 2 );
  190. if ( ( rc = register_netdev ( netdev ) ) != 0 )
  191. goto error;
  192. netdev_link_up ( netdev );
  193. DBGP ( "ints\n" );
  194. return 0;
  195. error:
  196. ifec_reset ( netdev );
  197. netdev_nullify ( netdev );
  198. netdev_put ( netdev );
  199. return rc;
  200. }
  201. /*
  202. * Remove a device from the PCI device list.
  203. *
  204. * @v pci PCI device to remove.
  205. *
  206. * This is a PCI Device Driver API function.
  207. */
  208. static void ifec_pci_remove ( struct pci_device *pci )
  209. {
  210. struct net_device *netdev = pci_get_drvdata ( pci );
  211. DBGP ( "ifec_pci_remove\n" );
  212. unregister_netdev ( netdev );
  213. ifec_reset ( netdev );
  214. netdev_nullify ( netdev );
  215. netdev_put ( netdev );
  216. }
  217. /****************** iPXE Network Device Driver API functions *****************/
  218. /*
  219. * Close a network device.
  220. *
  221. * @v netdev Device to close.
  222. *
  223. * This is a iPXE Network Device Driver API function.
  224. */
  225. static void ifec_net_close ( struct net_device *netdev )
  226. {
  227. struct ifec_private *priv = netdev->priv;
  228. unsigned long ioaddr = priv->ioaddr;
  229. unsigned short intr_status;
  230. DBGP ( "ifec_net_close\n" );
  231. /* disable interrupts */
  232. ifec_net_irq ( netdev, 0 );
  233. /* Ack & clear ints */
  234. intr_status = inw ( ioaddr + SCBStatus );
  235. outw ( intr_status, ioaddr + SCBStatus );
  236. inw ( ioaddr + SCBStatus );
  237. ifec_reset ( netdev );
  238. /* Free any resources */
  239. ifec_free ( netdev );
  240. }
  241. /* Interrupts to be masked */
  242. #define INTERRUPT_MASK ( SCBMaskEarlyRx | SCBMaskFlowCtl )
  243. /*
  244. * Enable or disable IRQ masking.
  245. *
  246. * @v netdev Device to control.
  247. * @v enable Zero to mask off IRQ, non-zero to enable IRQ.
  248. *
  249. * This is a iPXE Network Driver API function.
  250. */
  251. static void ifec_net_irq ( struct net_device *netdev, int enable )
  252. {
  253. struct ifec_private *priv = netdev->priv;
  254. unsigned long ioaddr = priv->ioaddr;
  255. DBGP ( "ifec_net_irq\n" );
  256. outw ( enable ? INTERRUPT_MASK : SCBMaskAll, ioaddr + SCBCmd );
  257. }
  258. /*
  259. * Opens a network device.
  260. *
  261. * @v netdev Device to be opened.
  262. * @ret rc Non-zero if failed to open.
  263. *
  264. * This enables tx and rx on the device.
  265. * This is a iPXE Network Device Driver API function.
  266. */
  267. static int ifec_net_open ( struct net_device *netdev )
  268. {
  269. struct ifec_private *priv = netdev->priv;
  270. struct ifec_ias *ias = NULL;
  271. struct ifec_cfg *cfg = NULL;
  272. int i, options;
  273. int rc = -ENOMEM;
  274. DBGP ( "ifec_net_open: " );
  275. /* Ensure interrupts are disabled. */
  276. ifec_net_irq ( netdev, 0 );
  277. /* Initialize Command Unit and Receive Unit base addresses. */
  278. ifec_scb_cmd ( netdev, 0, RUAddrLoad );
  279. ifec_scb_cmd ( netdev, virt_to_bus ( &priv->stats ), CUStatsAddr );
  280. ifec_scb_cmd ( netdev, 0, CUCmdBase );
  281. /* Initialize both rings */
  282. if ( ( rc = ifec_rx_setup ( netdev ) ) != 0 )
  283. goto error;
  284. if ( ( rc = ifec_tx_setup ( netdev ) ) != 0 )
  285. goto error;
  286. /* Initialize MDIO */
  287. options = 0x00; /* 0x40 = 10mbps half duplex, 0x00 = Autosense */
  288. ifec_mdio_setup ( netdev, options );
  289. /* Prepare MAC address w/ Individual Address Setup (ias) command.*/
  290. ias = malloc_dma ( sizeof ( *ias ), CB_ALIGN );
  291. if ( !ias ) {
  292. rc = -ENOMEM;
  293. goto error;
  294. }
  295. ias->command = CmdIASetup;
  296. ias->status = 0;
  297. memcpy ( ias->ia, netdev->ll_addr, ETH_ALEN );
  298. /* Prepare operating parameters w/ a configure command. */
  299. cfg = malloc_dma ( sizeof ( *cfg ), CB_ALIGN );
  300. if ( !cfg ) {
  301. rc = -ENOMEM;
  302. goto error;
  303. }
  304. memcpy ( cfg, &ifec_cfg, sizeof ( *cfg ) );
  305. cfg->link = virt_to_bus ( priv->tcbs );
  306. cfg->byte[19] = ( options & 0x10 ) ? 0xC0 : 0x80;
  307. ias->link = virt_to_bus ( cfg );
  308. /* Issue the ias and configure commands. */
  309. ifec_scb_cmd ( netdev, virt_to_bus ( ias ), CUStart );
  310. ifec_scb_cmd_wait ( netdev );
  311. priv->configured = 1;
  312. /* Wait up to 10 ms for configuration to initiate */
  313. for ( i = 10; i && !cfg->status; i-- )
  314. mdelay ( 1 );
  315. if ( ! cfg->status ) {
  316. DBG ( "Failed to initiate!\n" );
  317. goto error;
  318. }
  319. free_dma ( ias, sizeof ( *ias ) );
  320. free_dma ( cfg, sizeof ( *cfg ) );
  321. DBG2 ( "cfg " );
  322. /* Enable rx by sending ring address to card */
  323. if ( priv->rfds[0] != NULL ) {
  324. ifec_scb_cmd ( netdev, virt_to_bus( priv->rfds[0] ), RUStart );
  325. ifec_scb_cmd_wait ( netdev );
  326. }
  327. DBG2 ( "rx_start\n" );
  328. return 0;
  329. error:
  330. free_dma ( cfg, sizeof ( *cfg ) );
  331. free_dma ( ias, sizeof ( *ias ) );
  332. ifec_free ( netdev );
  333. ifec_reset ( netdev );
  334. return rc;
  335. }
  336. /*
  337. * This function allows a driver to process events during operation.
  338. *
  339. * @v netdev Device being polled.
  340. *
  341. * This is called periodically by iPXE to let the driver check the status of
  342. * transmitted packets and to allow the driver to check for received packets.
  343. * This is a iPXE Network Device Driver API function.
  344. */
  345. static void ifec_net_poll ( struct net_device *netdev )
  346. {
  347. struct ifec_private *priv = netdev->priv;
  348. unsigned short intr_status;
  349. DBGP ( "ifec_net_poll\n" );
  350. /* acknowledge interrupts ASAP */
  351. intr_status = inw ( priv->ioaddr + SCBStatus );
  352. outw ( intr_status, priv->ioaddr + SCBStatus );
  353. inw ( priv->ioaddr + SCBStatus );
  354. DBG2 ( "poll - status: 0x%04X\n", intr_status );
  355. /* anything to do here? */
  356. if ( ( intr_status & ( ~INTERRUPT_MASK ) ) == 0 )
  357. return;
  358. /* process received and transmitted packets */
  359. ifec_tx_process ( netdev );
  360. ifec_rx_process ( netdev );
  361. ifec_check_ru_status ( netdev, intr_status );
  362. return;
  363. }
  364. /*
  365. * This transmits a packet.
  366. *
  367. * @v netdev Device to transmit from.
  368. * @v iobuf Data to transmit.
  369. * @ret rc Non-zero if failed to transmit.
  370. *
  371. * This is a iPXE Network Driver API function.
  372. */
  373. static int ifec_net_transmit ( struct net_device *netdev,
  374. struct io_buffer *iobuf )
  375. {
  376. struct ifec_private *priv = netdev->priv;
  377. struct ifec_tcb *tcb = priv->tcb_head->next;
  378. unsigned long ioaddr = priv->ioaddr;
  379. DBGP ( "ifec_net_transmit\n" );
  380. /* Wait for TCB to become available. */
  381. if ( tcb->status || tcb->iob ) {
  382. DBG ( "TX overflow\n" );
  383. return -ENOBUFS;
  384. }
  385. DBG2 ( "transmitting packet (%zd bytes). status = %hX, cmd=%hX\n",
  386. iob_len ( iobuf ), tcb->status, inw ( ioaddr + SCBCmd ) );
  387. tcb->command = CmdSuspend | CmdTx | CmdTxFlex;
  388. tcb->count = 0x01208000;
  389. tcb->tbd_addr0 = virt_to_bus ( iobuf->data );
  390. tcb->tbd_size0 = 0x3FFF & iob_len ( iobuf );
  391. tcb->iob = iobuf;
  392. ifec_tx_wake ( netdev );
  393. /* Append to end of ring. */
  394. priv->tcb_head = tcb;
  395. return 0;
  396. }
  397. /*************************** Local support functions *************************/
  398. /* Define what each GPIO Pin does */
  399. static const uint16_t ifec_ee_bits[] = {
  400. [SPI_BIT_SCLK] = EE_SHIFT_CLK,
  401. [SPI_BIT_MOSI] = EE_DATA_WRITE,
  402. [SPI_BIT_MISO] = EE_DATA_READ,
  403. [SPI_BIT_SS(0)] = EE_ENB,
  404. };
  405. /*
  406. * Read a single bit from the GPIO pins used for SPI.
  407. * should be called by SPI bitbash functions only
  408. *
  409. * @v basher Bitbash device
  410. * @v bit_id Line to be read
  411. */
  412. static int ifec_spi_read_bit ( struct bit_basher *basher,
  413. unsigned int bit_id )
  414. {
  415. struct ifec_private *priv =
  416. container_of ( basher, struct ifec_private, spi.basher );
  417. unsigned long ee_addr = priv->ioaddr + CSREeprom;
  418. unsigned int ret = 0;
  419. uint16_t mask;
  420. DBGP ( "ifec_spi_read_bit\n" );
  421. mask = ifec_ee_bits[bit_id];
  422. ret = inw (ee_addr);
  423. return ( ret & mask ) ? 1 : 0;
  424. }
  425. /*
  426. * Write a single bit to the GPIO pins used for SPI.
  427. * should be called by SPI bitbash functions only
  428. *
  429. * @v basher Bitbash device
  430. * @v bit_id Line to write to
  431. * @v data Value to write
  432. */
  433. static void ifec_spi_write_bit ( struct bit_basher *basher,
  434. unsigned int bit_id,
  435. unsigned long data )
  436. {
  437. struct ifec_private *priv =
  438. container_of ( basher, struct ifec_private, spi.basher );
  439. unsigned long ee_addr = priv->ioaddr + CSREeprom;
  440. short val;
  441. uint16_t mask = ifec_ee_bits[bit_id];
  442. DBGP ( "ifec_spi_write_bit\n" );
  443. val = inw ( ee_addr );
  444. val &= ~mask;
  445. val |= data & mask;
  446. outw ( val, ee_addr );
  447. }
  448. /* set function pointer to SPI read- and write-bit functions */
  449. static struct bit_basher_operations ifec_basher_ops = {
  450. .read = ifec_spi_read_bit,
  451. .write = ifec_spi_write_bit,
  452. };
  453. /*
  454. * Initialize the eeprom stuff
  455. *
  456. * @v netdev Network device
  457. */
  458. static void ifec_init_eeprom ( struct net_device *netdev )
  459. {
  460. struct ifec_private *priv = netdev->priv;
  461. DBGP ( "ifec_init_eeprom\n" );
  462. priv->spi.basher.op = &ifec_basher_ops;
  463. priv->spi.bus.mode = SPI_MODE_THREEWIRE;
  464. init_spi_bit_basher ( &priv->spi );
  465. priv->eeprom.bus = &priv->spi.bus;
  466. /* init as 93c46(93c14 compatible) first, to set the command len,
  467. * block size and word len. Needs to be set for address len detection.
  468. */
  469. init_at93c46 ( &priv->eeprom, 16 );
  470. /* detect address length, */
  471. threewire_detect_address_len ( &priv->eeprom );
  472. /* address len == 8 means 93c66 instead of 93c46 */
  473. if ( priv->eeprom.address_len == 8 )
  474. init_at93c66 ( &priv->eeprom, 16 );
  475. }
  476. /*
  477. * Support function: ifec_mdio_read
  478. *
  479. * This probably reads a register in the "physical media interface chip".
  480. * -- REW
  481. */
  482. static int ifec_mdio_read ( struct net_device *netdev, int phy_id,
  483. int location )
  484. {
  485. struct ifec_private *priv = netdev->priv;
  486. unsigned long ioaddr = priv->ioaddr;
  487. int val;
  488. int boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
  489. DBGP ( "ifec_mdio_read\n" );
  490. outl ( 0x08000000 | ( location << 16 ) | ( phy_id << 21 ),
  491. ioaddr + CSRCtrlMDI );
  492. do {
  493. udelay ( 16 );
  494. val = inl ( ioaddr + CSRCtrlMDI );
  495. if ( --boguscnt < 0 ) {
  496. DBG ( " ifec_mdio_read() time out with val = %X.\n",
  497. val );
  498. break;
  499. }
  500. } while (! ( val & 0x10000000 ) );
  501. return val & 0xffff;
  502. }
  503. /*
  504. * Initializes MDIO.
  505. *
  506. * @v netdev Network device
  507. * @v options MDIO options
  508. */
  509. static void ifec_mdio_setup ( struct net_device *netdev, int options )
  510. {
  511. struct ifec_private *priv = netdev->priv;
  512. unsigned short mdio_register = priv->mdio_register;
  513. DBGP ( "ifec_mdio_setup\n" );
  514. if ( ( (mdio_register>>8) & 0x3f ) == DP83840
  515. || ( (mdio_register>>8) & 0x3f ) == DP83840A ) {
  516. int mdi_reg23 = ifec_mdio_read ( netdev, mdio_register
  517. & 0x1f, 23 ) | 0x0422;
  518. if (CONGENB)
  519. mdi_reg23 |= 0x0100;
  520. DBG2 ( "DP83840 specific setup, setting register 23 to "
  521. "%hX.\n", mdi_reg23 );
  522. ifec_mdio_write ( netdev, mdio_register & 0x1f, 23, mdi_reg23 );
  523. }
  524. DBG2 ( "dp83840 " );
  525. if ( options != 0 ) {
  526. ifec_mdio_write ( netdev, mdio_register & 0x1f, 0,
  527. ( (options & 0x20) ? 0x2000 : 0 ) |
  528. ( (options & 0x10) ? 0x0100 : 0 ) );
  529. DBG2 ( "set mdio_register. " );
  530. }
  531. }
  532. /*
  533. * Support function: ifec_mdio_write
  534. *
  535. * This probably writes to the "physical media interface chip".
  536. * -- REW
  537. */
  538. static int ifec_mdio_write ( struct net_device *netdev,
  539. int phy_id, int location, int value )
  540. {
  541. struct ifec_private *priv = netdev->priv;
  542. unsigned long ioaddr = priv->ioaddr;
  543. int val;
  544. int boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
  545. DBGP ( "ifec_mdio_write\n" );
  546. outl ( 0x04000000 | ( location << 16 ) | ( phy_id << 21 ) | value,
  547. ioaddr + CSRCtrlMDI );
  548. do {
  549. udelay ( 16 );
  550. val = inl ( ioaddr + CSRCtrlMDI );
  551. if ( --boguscnt < 0 ) {
  552. DBG ( " ifec_mdio_write() time out with val = %X.\n",
  553. val );
  554. break;
  555. }
  556. } while (! ( val & 0x10000000 ) );
  557. return val & 0xffff;
  558. }
  559. /*
  560. * Resets the hardware.
  561. *
  562. * @v netdev Network device
  563. */
  564. static void ifec_reset ( struct net_device *netdev )
  565. {
  566. struct ifec_private *priv = netdev->priv;
  567. unsigned long ioaddr = priv->ioaddr;
  568. DBGP ( "ifec_reset\n" );
  569. /* do partial reset first */
  570. outl ( PortPartialReset, ioaddr + CSRPort );
  571. inw ( ioaddr + SCBStatus );
  572. udelay ( 20 );
  573. /* full reset */
  574. outl ( PortReset, ioaddr + CSRPort );
  575. inw ( ioaddr + SCBStatus );
  576. udelay ( 20 );
  577. /* disable interrupts again */
  578. ifec_net_irq ( netdev, 0 );
  579. }
  580. /*
  581. * free()s the tx/rx rings.
  582. *
  583. * @v netdev Network device
  584. */
  585. static void ifec_free ( struct net_device *netdev )
  586. {
  587. struct ifec_private *priv = netdev_priv ( netdev );
  588. int i;
  589. DBGP ( "ifec_free\n" );
  590. /* free all allocated receive io_buffers */
  591. for ( i = 0; i < RFD_COUNT; i++ ) {
  592. free_iob ( priv->rx_iobs[i] );
  593. priv->rx_iobs[i] = NULL;
  594. priv->rfds[i] = NULL;
  595. }
  596. /* free TX ring buffer */
  597. free_dma ( priv->tcbs, TX_RING_BYTES );
  598. priv->tcbs = NULL;
  599. }
  600. /*
  601. * Initializes an RFD.
  602. *
  603. * @v rfd RFD struct to initialize
  604. * @v command Command word
  605. * @v link Link value
  606. */
  607. static void ifec_rfd_init ( struct ifec_rfd *rfd, s16 command, u32 link )
  608. {
  609. DBGP ( "ifec_rfd_init\n" );
  610. rfd->status = 0;
  611. rfd->command = command;
  612. rfd->rx_buf_addr = 0xFFFFFFFF;
  613. rfd->count = 0;
  614. rfd->size = RFD_PACKET_LEN;
  615. rfd->link = link;
  616. }
  617. /*
  618. * Send address of new RFD to card
  619. *
  620. * @v netdev Network device
  621. */
  622. static void ifec_reprime_ru ( struct net_device *netdev )
  623. {
  624. struct ifec_private *priv = netdev->priv;
  625. int cur_rx = priv->cur_rx;
  626. DBGP ( "ifec_reprime_ru\n" );
  627. if ( priv->rfds[cur_rx] != NULL ) {
  628. ifec_scb_cmd ( netdev, virt_to_bus ( priv->rfds[cur_rx] ),
  629. RUStart );
  630. ifec_scb_cmd_wait ( netdev );
  631. }
  632. }
  633. /*
  634. * Check if reprime of RU needed
  635. *
  636. * @v netdev Network device
  637. */
  638. static void ifec_check_ru_status ( struct net_device *netdev,
  639. unsigned short intr_status )
  640. {
  641. struct ifec_private *priv = netdev->priv;
  642. DBGP ( "ifec_check_ru_status\n" );
  643. /*
  644. * The chip may have suspended reception for various reasons.
  645. * Check for that, and re-prime it should this be the case.
  646. */
  647. switch ( ( intr_status >> 2 ) & 0xf ) {
  648. case 0: /* Idle */
  649. case 4: /* Ready */
  650. break;
  651. case 1: /* Suspended */
  652. case 2: /* No resources (RFDs) */
  653. case 9: /* Suspended with no more RBDs */
  654. case 10: /* No resources due to no RBDs */
  655. case 12: /* Ready with no RBDs */
  656. DBG ( "ifec_net_poll: RU reprimed.\n" );
  657. ifec_reprime_ru ( netdev );
  658. break;
  659. default:
  660. /* reserved values */
  661. DBG ( "ifec_net_poll: RU state anomaly: %i\n",
  662. ( inw ( priv->ioaddr + SCBStatus ) >> 2 ) & 0xf );
  663. break;
  664. }
  665. }
  666. #define RFD_STATUS ( RFD_OK | RFDRxCol | RFDRxErr | RFDShort | \
  667. RFDDMAOverrun | RFDNoBufs | RFDCRCError )
  668. /*
  669. * Looks for received packets in the rx ring, reports success or error to
  670. * the core accordingly. Starts reallocation of rx ring.
  671. *
  672. * @v netdev Network device
  673. */
  674. static void ifec_rx_process ( struct net_device *netdev )
  675. {
  676. struct ifec_private *priv = netdev->priv;
  677. int cur_rx = priv->cur_rx;
  678. struct io_buffer *iob = priv->rx_iobs[cur_rx];
  679. struct ifec_rfd *rfd = priv->rfds[cur_rx];
  680. unsigned int rx_len;
  681. s16 status;
  682. DBGP ( "ifec_rx_process\n" );
  683. /* Process any received packets */
  684. while ( iob && rfd && ( status = rfd->status ) ) {
  685. rx_len = rfd->count & RFDMaskCount;
  686. DBG2 ( "Got a packet: Len = %d, cur_rx = %d.\n", rx_len,
  687. cur_rx );
  688. DBGIO_HD ( (void*)rfd->packet, 0x30 );
  689. if ( ( status & ( RFD_STATUS & ~RFDShort ) ) != RFD_OK ) {
  690. DBG ( "Corrupted packet received. "
  691. "Status = %#08hx\n", status );
  692. netdev_rx_err ( netdev, iob, -EINVAL );
  693. } else {
  694. /* Hand off the packet to the network subsystem */
  695. iob_put ( iob, rx_len );
  696. DBG2 ( "Received packet: %p, len: %d\n", iob, rx_len );
  697. netdev_rx ( netdev, iob );
  698. }
  699. /* make sure we don't reuse this RFD */
  700. priv->rx_iobs[cur_rx] = NULL;
  701. priv->rfds[cur_rx] = NULL;
  702. /* Next RFD */
  703. priv->cur_rx = ( cur_rx + 1 ) % RFD_COUNT;
  704. cur_rx = priv->cur_rx;
  705. iob = priv->rx_iobs[cur_rx];
  706. rfd = priv->rfds[cur_rx];
  707. }
  708. ifec_refill_rx_ring ( netdev );
  709. }
  710. /*
  711. * Allocates io_buffer, set pointers in ifec_private structure accordingly,
  712. * reserves space for RFD header in io_buffer.
  713. *
  714. * @v netdev Network device
  715. * @v cur Descriptor number to work on
  716. * @v cmd Value to set cmd field in RFD to
  717. * @v link Pointer to ned RFD
  718. * @ret rc 0 on success, negative on failure
  719. */
  720. static int ifec_get_rx_desc ( struct net_device *netdev, int cur, int cmd,
  721. int link )
  722. {
  723. struct ifec_private *priv = netdev->priv;
  724. struct ifec_rfd *rfd = priv->rfds[cur];
  725. DBGP ( "ifec_get_rx_desc\n" );
  726. priv->rx_iobs[cur] = alloc_iob ( sizeof ( *rfd ) );
  727. if ( ! priv->rx_iobs[cur] ) {
  728. DBG ( "alloc_iob failed. desc. nr: %d\n", cur );
  729. priv->rfds[cur] = NULL;
  730. return -ENOMEM;
  731. }
  732. /* Initialize new tail. */
  733. priv->rfds[cur] = priv->rx_iobs[cur]->data;
  734. ifec_rfd_init ( priv->rfds[cur], cmd, link );
  735. iob_reserve ( priv->rx_iobs[cur], RFD_HEADER_LEN );
  736. return 0;
  737. }
  738. /*
  739. * Allocate new descriptor entries and initialize them if needed
  740. *
  741. * @v netdev Network device
  742. */
  743. static void ifec_refill_rx_ring ( struct net_device *netdev )
  744. {
  745. struct ifec_private *priv = netdev->priv;
  746. int i, cur_rx;
  747. unsigned short intr_status;
  748. DBGP ( "ifec_refill_rx_ring\n" );
  749. for ( i = 0; i < RFD_COUNT; i++ ) {
  750. cur_rx = ( priv->cur_rx + i ) % RFD_COUNT;
  751. /* only refill if empty */
  752. if ( priv->rfds[cur_rx] != NULL ||
  753. priv->rx_iobs[cur_rx] != NULL )
  754. continue;
  755. DBG2 ( "refilling RFD %d\n", cur_rx );
  756. if ( ifec_get_rx_desc ( netdev, cur_rx,
  757. CmdSuspend | CmdEndOfList, 0 ) == 0 ) {
  758. if ( i > 0 ) {
  759. int prev_rx = ( ( ( cur_rx + RFD_COUNT ) - 1 )
  760. % RFD_COUNT );
  761. struct ifec_rfd *rfd = priv->rfds[prev_rx];
  762. rfd->command = 0;
  763. rfd->link = virt_to_bus ( priv->rfds[cur_rx] );
  764. }
  765. }
  766. }
  767. intr_status = inw ( priv->ioaddr + SCBStatus );
  768. ifec_check_ru_status ( netdev, intr_status );
  769. }
  770. /*
  771. * Initial allocation & initialization of the rx ring.
  772. *
  773. * @v netdev Device of rx ring.
  774. * @ret rc Non-zero if error occured
  775. */
  776. static int ifec_rx_setup ( struct net_device *netdev )
  777. {
  778. struct ifec_private *priv = netdev->priv;
  779. int i;
  780. DBGP ( "ifec_rx_setup\n" );
  781. priv->cur_rx = 0;
  782. /* init values for ifec_refill_rx_ring() */
  783. for ( i = 0; i < RFD_COUNT; i++ ) {
  784. priv->rfds[i] = NULL;
  785. priv->rx_iobs[i] = NULL;
  786. }
  787. ifec_refill_rx_ring ( netdev );
  788. return 0;
  789. }
  790. /*
  791. * Initiates a SCB command.
  792. *
  793. * @v netdev Network device
  794. * @v ptr General pointer value for command.
  795. * @v cmd Command to issue.
  796. * @ret rc Non-zero if command not issued.
  797. */
  798. static int ifec_scb_cmd ( struct net_device *netdev, u32 ptr, u8 cmd )
  799. {
  800. struct ifec_private *priv = netdev->priv;
  801. unsigned long ioaddr = priv->ioaddr;
  802. int rc;
  803. DBGP ( "ifec_scb_cmd\n" );
  804. rc = ifec_scb_cmd_wait ( netdev ); /* Wait until ready */
  805. if ( !rc ) {
  806. outl ( ptr, ioaddr + SCBPointer );
  807. outb ( cmd, ioaddr + SCBCmd ); /* Issue command */
  808. }
  809. return rc;
  810. }
  811. /*
  812. * Wait for command unit to accept a command.
  813. *
  814. * @v cmd_ioaddr I/O address of command register.
  815. * @ret rc Non-zero if command timed out.
  816. */
  817. static int ifec_scb_cmd_wait ( struct net_device *netdev )
  818. {
  819. struct ifec_private *priv = netdev->priv;
  820. unsigned long cmd_ioaddr = priv->ioaddr + SCBCmd;
  821. int rc, wait = CU_CMD_TIMEOUT;
  822. DBGP ( "ifec_scb_cmd_wait\n" );
  823. for ( ; wait && ( rc = inb ( cmd_ioaddr ) ); wait-- )
  824. udelay ( 1 );
  825. if ( !wait )
  826. DBG ( "ifec_scb_cmd_wait timeout!\n" );
  827. return rc;
  828. }
  829. /*
  830. * Check status of transmitted packets & perform tx completions.
  831. *
  832. * @v netdev Network device.
  833. */
  834. static void ifec_tx_process ( struct net_device *netdev )
  835. {
  836. struct ifec_private *priv = netdev->priv;
  837. struct ifec_tcb *tcb = priv->tcb_tail;
  838. s16 status;
  839. DBGP ( "ifec_tx_process\n" );
  840. /* Check status of transmitted packets */
  841. while ( ( status = tcb->status ) && tcb->iob ) {
  842. if ( status & TCB_U ) {
  843. /* report error to iPXE */
  844. DBG ( "ifec_tx_process : tx error!\n " );
  845. netdev_tx_complete_err ( netdev, tcb->iob, -EINVAL );
  846. } else {
  847. /* report successful transmit */
  848. netdev_tx_complete ( netdev, tcb->iob );
  849. }
  850. DBG2 ( "tx completion\n" );
  851. tcb->iob = NULL;
  852. tcb->status = 0;
  853. priv->tcb_tail = tcb->next; /* Next TCB */
  854. tcb = tcb->next;
  855. }
  856. }
  857. /*
  858. * Allocates & initialize tx resources.
  859. *
  860. * @v netdev Network device.
  861. * @ret rc Non-zero if error occurred.
  862. */
  863. static int ifec_tx_setup ( struct net_device *netdev )
  864. {
  865. struct ifec_private *priv = netdev->priv;
  866. struct ifec_tcb *tcb;
  867. int i;
  868. DBGP ( "ifec_tx_setup\n" );
  869. /* allocate tx ring */
  870. priv->tcbs = malloc_dma ( TX_RING_BYTES, CB_ALIGN );
  871. if ( !priv->tcbs ) {
  872. DBG ( "TX-ring allocation failed\n" );
  873. return -ENOMEM;
  874. }
  875. tcb = priv->tcb_tail = priv->tcbs;
  876. priv->tx_curr = priv->tx_tail = 0;
  877. priv->tx_cnt = 0;
  878. for ( i = 0; i < TCB_COUNT; i++, tcb++ ) {
  879. tcb->status = 0;
  880. tcb->count = 0x01208000;
  881. tcb->iob = NULL;
  882. tcb->tbda_addr = virt_to_bus ( &tcb->tbd_addr0 );
  883. tcb->link = virt_to_bus ( tcb + 1 );
  884. tcb->next = tcb + 1;
  885. }
  886. /* We point tcb_head at the last TCB, so the first ifec_net_transmit()
  887. * will use the first (head->next) TCB to transmit. */
  888. priv->tcb_head = --tcb;
  889. tcb->link = virt_to_bus ( priv->tcbs );
  890. tcb->next = priv->tcbs;
  891. return 0;
  892. }
  893. /*
  894. * Wake up the Command Unit and issue a Resume/Start.
  895. *
  896. * @v netdev Network device containing Command Unit
  897. *
  898. * The time between clearing the S bit and issuing Resume must be as short as
  899. * possible to prevent a race condition. As noted in linux eepro100.c :
  900. * Note: Watch out for the potential race condition here: imagine
  901. * erasing the previous suspend
  902. * the chip processes the previous command
  903. * the chip processes the final command, and suspends
  904. * doing the CU_RESUME
  905. * the chip processes the next-yet-valid post-final-command.
  906. * So blindly sending a CU_RESUME is only safe if we do it immediately after
  907. * erasing the previous CmdSuspend, without the possibility of an intervening
  908. * delay.
  909. */
  910. void ifec_tx_wake ( struct net_device *netdev )
  911. {
  912. struct ifec_private *priv = netdev->priv;
  913. unsigned long ioaddr = priv->ioaddr;
  914. struct ifec_tcb *tcb = priv->tcb_head->next;
  915. DBGP ( "ifec_tx_wake\n" );
  916. /* For the special case of the first transmit, we issue a START. The
  917. * card won't RESUME after the configure command. */
  918. if ( priv->configured ) {
  919. priv->configured = 0;
  920. ifec_scb_cmd ( netdev, virt_to_bus ( tcb ), CUStart );
  921. ifec_scb_cmd_wait ( netdev );
  922. return;
  923. }
  924. /* Resume if suspended. */
  925. switch ( ( inw ( ioaddr + SCBStatus ) >> 6 ) & 0x3 ) {
  926. case 0: /* Idle - We should not reach this state. */
  927. DBG2 ( "ifec_tx_wake: tx idle!\n" );
  928. ifec_scb_cmd ( netdev, virt_to_bus ( tcb ), CUStart );
  929. ifec_scb_cmd_wait ( netdev );
  930. return;
  931. case 1: /* Suspended */
  932. DBG2 ( "s" );
  933. break;
  934. default: /* Active */
  935. DBG2 ( "a" );
  936. }
  937. ifec_scb_cmd_wait ( netdev );
  938. outl ( 0, ioaddr + SCBPointer );
  939. priv->tcb_head->command &= ~CmdSuspend;
  940. /* Immediately issue Resume command */
  941. outb ( CUResume, ioaddr + SCBCmd );
  942. ifec_scb_cmd_wait ( netdev );
  943. }
  944. /*********************************************************************/
  945. static struct pci_device_id ifec_nics[] = {
  946. PCI_ROM(0x8086, 0x1029, "id1029", "Intel EtherExpressPro100 ID1029", 0),
  947. PCI_ROM(0x8086, 0x1030, "id1030", "Intel EtherExpressPro100 ID1030", 0),
  948. PCI_ROM(0x8086, 0x1031, "82801cam", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  949. PCI_ROM(0x8086, 0x1032, "eepro100-1032", "Intel PRO/100 VE Network Connection", 0),
  950. PCI_ROM(0x8086, 0x1033, "eepro100-1033", "Intel PRO/100 VM Network Connection", 0),
  951. PCI_ROM(0x8086, 0x1034, "eepro100-1034", "Intel PRO/100 VM Network Connection", 0),
  952. PCI_ROM(0x8086, 0x1035, "eepro100-1035", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  953. PCI_ROM(0x8086, 0x1036, "eepro100-1036", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  954. PCI_ROM(0x8086, 0x1037, "eepro100-1037", "Intel 82801CAM (ICH3) Chipset Ethernet Controller", 0),
  955. PCI_ROM(0x8086, 0x1038, "id1038", "Intel PRO/100 VM Network Connection", 0),
  956. PCI_ROM(0x8086, 0x1039, "82562et", "Intel PRO100 VE 82562ET", 0),
  957. PCI_ROM(0x8086, 0x103a, "id103a", "Intel Corporation 82559 InBusiness 10/100", 0),
  958. PCI_ROM(0x8086, 0x103b, "82562etb", "Intel PRO100 VE 82562ETB", 0),
  959. PCI_ROM(0x8086, 0x103c, "eepro100-103c", "Intel PRO/100 VM Network Connection", 0),
  960. PCI_ROM(0x8086, 0x103d, "eepro100-103d", "Intel PRO/100 VE Network Connection", 0),
  961. PCI_ROM(0x8086, 0x103e, "eepro100-103e", "Intel PRO/100 VM Network Connection", 0),
  962. PCI_ROM(0x8086, 0x1051, "prove", "Intel PRO/100 VE Network Connection", 0),
  963. PCI_ROM(0x8086, 0x1059, "82551qm", "Intel PRO/100 M Mobile Connection", 0),
  964. PCI_ROM(0x8086, 0x1209, "82559er", "Intel EtherExpressPro100 82559ER", 0),
  965. PCI_ROM(0x8086, 0x1227, "82865", "Intel 82865 EtherExpress PRO/100A", 0),
  966. PCI_ROM(0x8086, 0x1228, "82556", "Intel 82556 EtherExpress PRO/100 Smart", 0),
  967. PCI_ROM(0x8086, 0x1229, "eepro100", "Intel EtherExpressPro100", 0),
  968. PCI_ROM(0x8086, 0x2449, "82562em", "Intel EtherExpressPro100 82562EM", 0),
  969. PCI_ROM(0x8086, 0x2459, "82562-1", "Intel 82562 based Fast Ethernet Connection", 0),
  970. PCI_ROM(0x8086, 0x245d, "82562-2", "Intel 82562 based Fast Ethernet Connection", 0),
  971. PCI_ROM(0x8086, 0x1050, "82562ez", "Intel 82562EZ Network Connection", 0),
  972. PCI_ROM(0x8086, 0x1051, "eepro100-1051", "Intel 82801EB/ER (ICH5/ICH5R) Chipset Ethernet Controller", 0),
  973. PCI_ROM(0x8086, 0x1065, "82562-3", "Intel 82562 based Fast Ethernet Connection", 0),
  974. PCI_ROM(0x8086, 0x5200, "eepro100-5200", "Intel EtherExpress PRO/100 Intelligent Server", 0),
  975. PCI_ROM(0x8086, 0x5201, "eepro100-5201", "Intel EtherExpress PRO/100 Intelligent Server", 0),
  976. PCI_ROM(0x8086, 0x1092, "82562-3", "Intel Pro/100 VE Network", 0),
  977. PCI_ROM(0x8086, 0x27dc, "eepro100-27dc", "Intel 82801G (ICH7) Chipset Ethernet Controller", 0),
  978. PCI_ROM(0x8086, 0x10fe, "82552", "Intel 82552 10/100 Network Connection", 0),
  979. };
  980. /* Cards with device ids 0x1030 to 0x103F, 0x2449, 0x2459 or 0x245D might need
  981. * a workaround for hardware bug on 10 mbit half duplex (see linux driver eepro100.c)
  982. * 2003/03/17 gbaum */
  983. struct pci_driver ifec_driver __pci_driver = {
  984. .ids = ifec_nics,
  985. .id_count = ( sizeof (ifec_nics) / sizeof (ifec_nics[0]) ),
  986. .probe = ifec_pci_probe,
  987. .remove = ifec_pci_remove
  988. };
  989. /*
  990. * Local variables:
  991. * c-basic-offset: 8
  992. * c-indent-level: 8
  993. * tab-width: 8
  994. * End:
  995. */