Nevar pievienot vairāk kā 25 tēmas Tēmai ir jāsākas ar burtu vai ciparu, tā var saturēt domu zīmes ('-') un var būt līdz 35 simboliem gara.

BaseLib.h 216KB

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  1. /** @file
  2. Provides string functions, linked list functions, math functions, synchronization
  3. functions, and CPU architecture-specific functions.
  4. Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
  5. Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
  6. This program and the accompanying materials
  7. are licensed and made available under the terms and conditions of the BSD License
  8. which accompanies this distribution. The full text of the license may be found at
  9. http://opensource.org/licenses/bsd-license.php.
  10. THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11. WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12. **/
  13. #ifndef __BASE_LIB__
  14. #define __BASE_LIB__
  15. FILE_LICENCE ( BSD3 );
  16. //
  17. // Definitions for architecture-specific types
  18. //
  19. #if defined (MDE_CPU_IA32)
  20. ///
  21. /// The IA-32 architecture context buffer used by SetJump() and LongJump().
  22. ///
  23. typedef struct {
  24. UINT32 Ebx;
  25. UINT32 Esi;
  26. UINT32 Edi;
  27. UINT32 Ebp;
  28. UINT32 Esp;
  29. UINT32 Eip;
  30. } BASE_LIBRARY_JUMP_BUFFER;
  31. #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
  32. #endif // defined (MDE_CPU_IA32)
  33. #if defined (MDE_CPU_IPF)
  34. ///
  35. /// The Itanium architecture context buffer used by SetJump() and LongJump().
  36. ///
  37. typedef struct {
  38. UINT64 F2[2];
  39. UINT64 F3[2];
  40. UINT64 F4[2];
  41. UINT64 F5[2];
  42. UINT64 F16[2];
  43. UINT64 F17[2];
  44. UINT64 F18[2];
  45. UINT64 F19[2];
  46. UINT64 F20[2];
  47. UINT64 F21[2];
  48. UINT64 F22[2];
  49. UINT64 F23[2];
  50. UINT64 F24[2];
  51. UINT64 F25[2];
  52. UINT64 F26[2];
  53. UINT64 F27[2];
  54. UINT64 F28[2];
  55. UINT64 F29[2];
  56. UINT64 F30[2];
  57. UINT64 F31[2];
  58. UINT64 R4;
  59. UINT64 R5;
  60. UINT64 R6;
  61. UINT64 R7;
  62. UINT64 SP;
  63. UINT64 BR0;
  64. UINT64 BR1;
  65. UINT64 BR2;
  66. UINT64 BR3;
  67. UINT64 BR4;
  68. UINT64 BR5;
  69. UINT64 InitialUNAT;
  70. UINT64 AfterSpillUNAT;
  71. UINT64 PFS;
  72. UINT64 BSP;
  73. UINT64 Predicates;
  74. UINT64 LoopCount;
  75. UINT64 FPSR;
  76. } BASE_LIBRARY_JUMP_BUFFER;
  77. #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
  78. #endif // defined (MDE_CPU_IPF)
  79. #if defined (MDE_CPU_X64)
  80. ///
  81. /// The x64 architecture context buffer used by SetJump() and LongJump().
  82. ///
  83. typedef struct {
  84. UINT64 Rbx;
  85. UINT64 Rsp;
  86. UINT64 Rbp;
  87. UINT64 Rdi;
  88. UINT64 Rsi;
  89. UINT64 R12;
  90. UINT64 R13;
  91. UINT64 R14;
  92. UINT64 R15;
  93. UINT64 Rip;
  94. UINT64 MxCsr;
  95. UINT8 XmmBuffer[160]; ///< XMM6-XMM15.
  96. } BASE_LIBRARY_JUMP_BUFFER;
  97. #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
  98. #endif // defined (MDE_CPU_X64)
  99. #if defined (MDE_CPU_EBC)
  100. ///
  101. /// The EBC context buffer used by SetJump() and LongJump().
  102. ///
  103. typedef struct {
  104. UINT64 R0;
  105. UINT64 R1;
  106. UINT64 R2;
  107. UINT64 R3;
  108. UINT64 IP;
  109. } BASE_LIBRARY_JUMP_BUFFER;
  110. #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
  111. #endif // defined (MDE_CPU_EBC)
  112. #if defined (MDE_CPU_ARM)
  113. typedef struct {
  114. UINT32 R3; ///< A copy of R13.
  115. UINT32 R4;
  116. UINT32 R5;
  117. UINT32 R6;
  118. UINT32 R7;
  119. UINT32 R8;
  120. UINT32 R9;
  121. UINT32 R10;
  122. UINT32 R11;
  123. UINT32 R12;
  124. UINT32 R14;
  125. } BASE_LIBRARY_JUMP_BUFFER;
  126. #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
  127. #endif // defined (MDE_CPU_ARM)
  128. //
  129. // String Services
  130. //
  131. /**
  132. Copies one Null-terminated Unicode string to another Null-terminated Unicode
  133. string and returns the new Unicode string.
  134. This function copies the contents of the Unicode string Source to the Unicode
  135. string Destination, and returns Destination. If Source and Destination
  136. overlap, then the results are undefined.
  137. If Destination is NULL, then ASSERT().
  138. If Destination is not aligned on a 16-bit boundary, then ASSERT().
  139. If Source is NULL, then ASSERT().
  140. If Source is not aligned on a 16-bit boundary, then ASSERT().
  141. If Source and Destination overlap, then ASSERT().
  142. If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
  143. PcdMaximumUnicodeStringLength Unicode characters not including the
  144. Null-terminator, then ASSERT().
  145. @param Destination The pointer to a Null-terminated Unicode string.
  146. @param Source The pointer to a Null-terminated Unicode string.
  147. @return Destination.
  148. **/
  149. CHAR16 *
  150. EFIAPI
  151. StrCpy (
  152. OUT CHAR16 *Destination,
  153. IN CONST CHAR16 *Source
  154. );
  155. /**
  156. Copies up to a specified length from one Null-terminated Unicode string to
  157. another Null-terminated Unicode string and returns the new Unicode string.
  158. This function copies the contents of the Unicode string Source to the Unicode
  159. string Destination, and returns Destination. At most, Length Unicode
  160. characters are copied from Source to Destination. If Length is 0, then
  161. Destination is returned unmodified. If Length is greater that the number of
  162. Unicode characters in Source, then Destination is padded with Null Unicode
  163. characters. If Source and Destination overlap, then the results are
  164. undefined.
  165. If Length > 0 and Destination is NULL, then ASSERT().
  166. If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
  167. If Length > 0 and Source is NULL, then ASSERT().
  168. If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
  169. If Source and Destination overlap, then ASSERT().
  170. If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
  171. PcdMaximumUnicodeStringLength, then ASSERT().
  172. If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
  173. PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
  174. then ASSERT().
  175. @param Destination The pointer to a Null-terminated Unicode string.
  176. @param Source The pointer to a Null-terminated Unicode string.
  177. @param Length The maximum number of Unicode characters to copy.
  178. @return Destination.
  179. **/
  180. CHAR16 *
  181. EFIAPI
  182. StrnCpy (
  183. OUT CHAR16 *Destination,
  184. IN CONST CHAR16 *Source,
  185. IN UINTN Length
  186. );
  187. /**
  188. Returns the length of a Null-terminated Unicode string.
  189. This function returns the number of Unicode characters in the Null-terminated
  190. Unicode string specified by String.
  191. If String is NULL, then ASSERT().
  192. If String is not aligned on a 16-bit boundary, then ASSERT().
  193. If PcdMaximumUnicodeStringLength is not zero, and String contains more than
  194. PcdMaximumUnicodeStringLength Unicode characters not including the
  195. Null-terminator, then ASSERT().
  196. @param String Pointer to a Null-terminated Unicode string.
  197. @return The length of String.
  198. **/
  199. UINTN
  200. EFIAPI
  201. StrLen (
  202. IN CONST CHAR16 *String
  203. );
  204. /**
  205. Returns the size of a Null-terminated Unicode string in bytes, including the
  206. Null terminator.
  207. This function returns the size, in bytes, of the Null-terminated Unicode string
  208. specified by String.
  209. If String is NULL, then ASSERT().
  210. If String is not aligned on a 16-bit boundary, then ASSERT().
  211. If PcdMaximumUnicodeStringLength is not zero, and String contains more than
  212. PcdMaximumUnicodeStringLength Unicode characters not including the
  213. Null-terminator, then ASSERT().
  214. @param String The pointer to a Null-terminated Unicode string.
  215. @return The size of String.
  216. **/
  217. UINTN
  218. EFIAPI
  219. StrSize (
  220. IN CONST CHAR16 *String
  221. );
  222. /**
  223. Compares two Null-terminated Unicode strings, and returns the difference
  224. between the first mismatched Unicode characters.
  225. This function compares the Null-terminated Unicode string FirstString to the
  226. Null-terminated Unicode string SecondString. If FirstString is identical to
  227. SecondString, then 0 is returned. Otherwise, the value returned is the first
  228. mismatched Unicode character in SecondString subtracted from the first
  229. mismatched Unicode character in FirstString.
  230. If FirstString is NULL, then ASSERT().
  231. If FirstString is not aligned on a 16-bit boundary, then ASSERT().
  232. If SecondString is NULL, then ASSERT().
  233. If SecondString is not aligned on a 16-bit boundary, then ASSERT().
  234. If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
  235. than PcdMaximumUnicodeStringLength Unicode characters not including the
  236. Null-terminator, then ASSERT().
  237. If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
  238. than PcdMaximumUnicodeStringLength Unicode characters, not including the
  239. Null-terminator, then ASSERT().
  240. @param FirstString The pointer to a Null-terminated Unicode string.
  241. @param SecondString The pointer to a Null-terminated Unicode string.
  242. @retval 0 FirstString is identical to SecondString.
  243. @return others FirstString is not identical to SecondString.
  244. **/
  245. INTN
  246. EFIAPI
  247. StrCmp (
  248. IN CONST CHAR16 *FirstString,
  249. IN CONST CHAR16 *SecondString
  250. );
  251. /**
  252. Compares up to a specified length the contents of two Null-terminated Unicode strings,
  253. and returns the difference between the first mismatched Unicode characters.
  254. This function compares the Null-terminated Unicode string FirstString to the
  255. Null-terminated Unicode string SecondString. At most, Length Unicode
  256. characters will be compared. If Length is 0, then 0 is returned. If
  257. FirstString is identical to SecondString, then 0 is returned. Otherwise, the
  258. value returned is the first mismatched Unicode character in SecondString
  259. subtracted from the first mismatched Unicode character in FirstString.
  260. If Length > 0 and FirstString is NULL, then ASSERT().
  261. If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().
  262. If Length > 0 and SecondString is NULL, then ASSERT().
  263. If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().
  264. If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
  265. PcdMaximumUnicodeStringLength, then ASSERT().
  266. If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than
  267. PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
  268. then ASSERT().
  269. If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than
  270. PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
  271. then ASSERT().
  272. @param FirstString The pointer to a Null-terminated Unicode string.
  273. @param SecondString The pointer to a Null-terminated Unicode string.
  274. @param Length The maximum number of Unicode characters to compare.
  275. @retval 0 FirstString is identical to SecondString.
  276. @return others FirstString is not identical to SecondString.
  277. **/
  278. INTN
  279. EFIAPI
  280. StrnCmp (
  281. IN CONST CHAR16 *FirstString,
  282. IN CONST CHAR16 *SecondString,
  283. IN UINTN Length
  284. );
  285. /**
  286. Concatenates one Null-terminated Unicode string to another Null-terminated
  287. Unicode string, and returns the concatenated Unicode string.
  288. This function concatenates two Null-terminated Unicode strings. The contents
  289. of Null-terminated Unicode string Source are concatenated to the end of
  290. Null-terminated Unicode string Destination. The Null-terminated concatenated
  291. Unicode String is returned. If Source and Destination overlap, then the
  292. results are undefined.
  293. If Destination is NULL, then ASSERT().
  294. If Destination is not aligned on a 16-bit boundary, then ASSERT().
  295. If Source is NULL, then ASSERT().
  296. If Source is not aligned on a 16-bit boundary, then ASSERT().
  297. If Source and Destination overlap, then ASSERT().
  298. If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
  299. than PcdMaximumUnicodeStringLength Unicode characters, not including the
  300. Null-terminator, then ASSERT().
  301. If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
  302. PcdMaximumUnicodeStringLength Unicode characters, not including the
  303. Null-terminator, then ASSERT().
  304. If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
  305. and Source results in a Unicode string with more than
  306. PcdMaximumUnicodeStringLength Unicode characters, not including the
  307. Null-terminator, then ASSERT().
  308. @param Destination The pointer to a Null-terminated Unicode string.
  309. @param Source The pointer to a Null-terminated Unicode string.
  310. @return Destination.
  311. **/
  312. CHAR16 *
  313. EFIAPI
  314. StrCat (
  315. IN OUT CHAR16 *Destination,
  316. IN CONST CHAR16 *Source
  317. );
  318. /**
  319. Concatenates up to a specified length one Null-terminated Unicode to the end
  320. of another Null-terminated Unicode string, and returns the concatenated
  321. Unicode string.
  322. This function concatenates two Null-terminated Unicode strings. The contents
  323. of Null-terminated Unicode string Source are concatenated to the end of
  324. Null-terminated Unicode string Destination, and Destination is returned. At
  325. most, Length Unicode characters are concatenated from Source to the end of
  326. Destination, and Destination is always Null-terminated. If Length is 0, then
  327. Destination is returned unmodified. If Source and Destination overlap, then
  328. the results are undefined.
  329. If Destination is NULL, then ASSERT().
  330. If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
  331. If Length > 0 and Source is NULL, then ASSERT().
  332. If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
  333. If Source and Destination overlap, then ASSERT().
  334. If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
  335. PcdMaximumUnicodeStringLength, then ASSERT().
  336. If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
  337. than PcdMaximumUnicodeStringLength Unicode characters, not including the
  338. Null-terminator, then ASSERT().
  339. If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
  340. PcdMaximumUnicodeStringLength Unicode characters, not including the
  341. Null-terminator, then ASSERT().
  342. If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
  343. and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength
  344. Unicode characters, not including the Null-terminator, then ASSERT().
  345. @param Destination The pointer to a Null-terminated Unicode string.
  346. @param Source The pointer to a Null-terminated Unicode string.
  347. @param Length The maximum number of Unicode characters to concatenate from
  348. Source.
  349. @return Destination.
  350. **/
  351. CHAR16 *
  352. EFIAPI
  353. StrnCat (
  354. IN OUT CHAR16 *Destination,
  355. IN CONST CHAR16 *Source,
  356. IN UINTN Length
  357. );
  358. /**
  359. Returns the first occurrence of a Null-terminated Unicode sub-string
  360. in a Null-terminated Unicode string.
  361. This function scans the contents of the Null-terminated Unicode string
  362. specified by String and returns the first occurrence of SearchString.
  363. If SearchString is not found in String, then NULL is returned. If
  364. the length of SearchString is zero, then String is returned.
  365. If String is NULL, then ASSERT().
  366. If String is not aligned on a 16-bit boundary, then ASSERT().
  367. If SearchString is NULL, then ASSERT().
  368. If SearchString is not aligned on a 16-bit boundary, then ASSERT().
  369. If PcdMaximumUnicodeStringLength is not zero, and SearchString
  370. or String contains more than PcdMaximumUnicodeStringLength Unicode
  371. characters, not including the Null-terminator, then ASSERT().
  372. @param String The pointer to a Null-terminated Unicode string.
  373. @param SearchString The pointer to a Null-terminated Unicode string to search for.
  374. @retval NULL If the SearchString does not appear in String.
  375. @return others If there is a match.
  376. **/
  377. CHAR16 *
  378. EFIAPI
  379. StrStr (
  380. IN CONST CHAR16 *String,
  381. IN CONST CHAR16 *SearchString
  382. );
  383. /**
  384. Convert a Null-terminated Unicode decimal string to a value of
  385. type UINTN.
  386. This function returns a value of type UINTN by interpreting the contents
  387. of the Unicode string specified by String as a decimal number. The format
  388. of the input Unicode string String is:
  389. [spaces] [decimal digits].
  390. The valid decimal digit character is in the range [0-9]. The
  391. function will ignore the pad space, which includes spaces or
  392. tab characters, before [decimal digits]. The running zero in the
  393. beginning of [decimal digits] will be ignored. Then, the function
  394. stops at the first character that is a not a valid decimal character
  395. or a Null-terminator, whichever one comes first.
  396. If String is NULL, then ASSERT().
  397. If String is not aligned in a 16-bit boundary, then ASSERT().
  398. If String has only pad spaces, then 0 is returned.
  399. If String has no pad spaces or valid decimal digits,
  400. then 0 is returned.
  401. If the number represented by String overflows according
  402. to the range defined by UINTN, then ASSERT().
  403. If PcdMaximumUnicodeStringLength is not zero, and String contains
  404. more than PcdMaximumUnicodeStringLength Unicode characters not including
  405. the Null-terminator, then ASSERT().
  406. @param String The pointer to a Null-terminated Unicode string.
  407. @retval Value translated from String.
  408. **/
  409. UINTN
  410. EFIAPI
  411. StrDecimalToUintn (
  412. IN CONST CHAR16 *String
  413. );
  414. /**
  415. Convert a Null-terminated Unicode decimal string to a value of
  416. type UINT64.
  417. This function returns a value of type UINT64 by interpreting the contents
  418. of the Unicode string specified by String as a decimal number. The format
  419. of the input Unicode string String is:
  420. [spaces] [decimal digits].
  421. The valid decimal digit character is in the range [0-9]. The
  422. function will ignore the pad space, which includes spaces or
  423. tab characters, before [decimal digits]. The running zero in the
  424. beginning of [decimal digits] will be ignored. Then, the function
  425. stops at the first character that is a not a valid decimal character
  426. or a Null-terminator, whichever one comes first.
  427. If String is NULL, then ASSERT().
  428. If String is not aligned in a 16-bit boundary, then ASSERT().
  429. If String has only pad spaces, then 0 is returned.
  430. If String has no pad spaces or valid decimal digits,
  431. then 0 is returned.
  432. If the number represented by String overflows according
  433. to the range defined by UINT64, then ASSERT().
  434. If PcdMaximumUnicodeStringLength is not zero, and String contains
  435. more than PcdMaximumUnicodeStringLength Unicode characters not including
  436. the Null-terminator, then ASSERT().
  437. @param String The pointer to a Null-terminated Unicode string.
  438. @retval Value translated from String.
  439. **/
  440. UINT64
  441. EFIAPI
  442. StrDecimalToUint64 (
  443. IN CONST CHAR16 *String
  444. );
  445. /**
  446. Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
  447. This function returns a value of type UINTN by interpreting the contents
  448. of the Unicode string specified by String as a hexadecimal number.
  449. The format of the input Unicode string String is:
  450. [spaces][zeros][x][hexadecimal digits].
  451. The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
  452. The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
  453. If "x" appears in the input string, it must be prefixed with at least one 0.
  454. The function will ignore the pad space, which includes spaces or tab characters,
  455. before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
  456. [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
  457. first valid hexadecimal digit. Then, the function stops at the first character
  458. that is a not a valid hexadecimal character or NULL, whichever one comes first.
  459. If String is NULL, then ASSERT().
  460. If String is not aligned in a 16-bit boundary, then ASSERT().
  461. If String has only pad spaces, then zero is returned.
  462. If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
  463. then zero is returned.
  464. If the number represented by String overflows according to the range defined by
  465. UINTN, then ASSERT().
  466. If PcdMaximumUnicodeStringLength is not zero, and String contains more than
  467. PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
  468. then ASSERT().
  469. @param String The pointer to a Null-terminated Unicode string.
  470. @retval Value translated from String.
  471. **/
  472. UINTN
  473. EFIAPI
  474. StrHexToUintn (
  475. IN CONST CHAR16 *String
  476. );
  477. /**
  478. Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
  479. This function returns a value of type UINT64 by interpreting the contents
  480. of the Unicode string specified by String as a hexadecimal number.
  481. The format of the input Unicode string String is
  482. [spaces][zeros][x][hexadecimal digits].
  483. The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
  484. The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
  485. If "x" appears in the input string, it must be prefixed with at least one 0.
  486. The function will ignore the pad space, which includes spaces or tab characters,
  487. before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
  488. [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
  489. first valid hexadecimal digit. Then, the function stops at the first character that is
  490. a not a valid hexadecimal character or NULL, whichever one comes first.
  491. If String is NULL, then ASSERT().
  492. If String is not aligned in a 16-bit boundary, then ASSERT().
  493. If String has only pad spaces, then zero is returned.
  494. If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
  495. then zero is returned.
  496. If the number represented by String overflows according to the range defined by
  497. UINT64, then ASSERT().
  498. If PcdMaximumUnicodeStringLength is not zero, and String contains more than
  499. PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
  500. then ASSERT().
  501. @param String The pointer to a Null-terminated Unicode string.
  502. @retval Value translated from String.
  503. **/
  504. UINT64
  505. EFIAPI
  506. StrHexToUint64 (
  507. IN CONST CHAR16 *String
  508. );
  509. /**
  510. Convert a Null-terminated Unicode string to a Null-terminated
  511. ASCII string and returns the ASCII string.
  512. This function converts the content of the Unicode string Source
  513. to the ASCII string Destination by copying the lower 8 bits of
  514. each Unicode character. It returns Destination.
  515. The caller is responsible to make sure Destination points to a buffer with size
  516. equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.
  517. If any Unicode characters in Source contain non-zero value in
  518. the upper 8 bits, then ASSERT().
  519. If Destination is NULL, then ASSERT().
  520. If Source is NULL, then ASSERT().
  521. If Source is not aligned on a 16-bit boundary, then ASSERT().
  522. If Source and Destination overlap, then ASSERT().
  523. If PcdMaximumUnicodeStringLength is not zero, and Source contains
  524. more than PcdMaximumUnicodeStringLength Unicode characters not including
  525. the Null-terminator, then ASSERT().
  526. If PcdMaximumAsciiStringLength is not zero, and Source contains more
  527. than PcdMaximumAsciiStringLength Unicode characters not including the
  528. Null-terminator, then ASSERT().
  529. @param Source The pointer to a Null-terminated Unicode string.
  530. @param Destination The pointer to a Null-terminated ASCII string.
  531. @return Destination.
  532. **/
  533. CHAR8 *
  534. EFIAPI
  535. UnicodeStrToAsciiStr (
  536. IN CONST CHAR16 *Source,
  537. OUT CHAR8 *Destination
  538. );
  539. /**
  540. Copies one Null-terminated ASCII string to another Null-terminated ASCII
  541. string and returns the new ASCII string.
  542. This function copies the contents of the ASCII string Source to the ASCII
  543. string Destination, and returns Destination. If Source and Destination
  544. overlap, then the results are undefined.
  545. If Destination is NULL, then ASSERT().
  546. If Source is NULL, then ASSERT().
  547. If Source and Destination overlap, then ASSERT().
  548. If PcdMaximumAsciiStringLength is not zero and Source contains more than
  549. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  550. then ASSERT().
  551. @param Destination The pointer to a Null-terminated ASCII string.
  552. @param Source The pointer to a Null-terminated ASCII string.
  553. @return Destination
  554. **/
  555. CHAR8 *
  556. EFIAPI
  557. AsciiStrCpy (
  558. OUT CHAR8 *Destination,
  559. IN CONST CHAR8 *Source
  560. );
  561. /**
  562. Copies up to a specified length one Null-terminated ASCII string to another
  563. Null-terminated ASCII string and returns the new ASCII string.
  564. This function copies the contents of the ASCII string Source to the ASCII
  565. string Destination, and returns Destination. At most, Length ASCII characters
  566. are copied from Source to Destination. If Length is 0, then Destination is
  567. returned unmodified. If Length is greater that the number of ASCII characters
  568. in Source, then Destination is padded with Null ASCII characters. If Source
  569. and Destination overlap, then the results are undefined.
  570. If Destination is NULL, then ASSERT().
  571. If Source is NULL, then ASSERT().
  572. If Source and Destination overlap, then ASSERT().
  573. If PcdMaximumAsciiStringLength is not zero, and Length is greater than
  574. PcdMaximumAsciiStringLength, then ASSERT().
  575. If PcdMaximumAsciiStringLength is not zero, and Source contains more than
  576. PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
  577. then ASSERT().
  578. @param Destination The pointer to a Null-terminated ASCII string.
  579. @param Source The pointer to a Null-terminated ASCII string.
  580. @param Length The maximum number of ASCII characters to copy.
  581. @return Destination
  582. **/
  583. CHAR8 *
  584. EFIAPI
  585. AsciiStrnCpy (
  586. OUT CHAR8 *Destination,
  587. IN CONST CHAR8 *Source,
  588. IN UINTN Length
  589. );
  590. /**
  591. Returns the length of a Null-terminated ASCII string.
  592. This function returns the number of ASCII characters in the Null-terminated
  593. ASCII string specified by String.
  594. If Length > 0 and Destination is NULL, then ASSERT().
  595. If Length > 0 and Source is NULL, then ASSERT().
  596. If PcdMaximumAsciiStringLength is not zero and String contains more than
  597. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  598. then ASSERT().
  599. @param String The pointer to a Null-terminated ASCII string.
  600. @return The length of String.
  601. **/
  602. UINTN
  603. EFIAPI
  604. AsciiStrLen (
  605. IN CONST CHAR8 *String
  606. );
  607. /**
  608. Returns the size of a Null-terminated ASCII string in bytes, including the
  609. Null terminator.
  610. This function returns the size, in bytes, of the Null-terminated ASCII string
  611. specified by String.
  612. If String is NULL, then ASSERT().
  613. If PcdMaximumAsciiStringLength is not zero and String contains more than
  614. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  615. then ASSERT().
  616. @param String The pointer to a Null-terminated ASCII string.
  617. @return The size of String.
  618. **/
  619. UINTN
  620. EFIAPI
  621. AsciiStrSize (
  622. IN CONST CHAR8 *String
  623. );
  624. /**
  625. Compares two Null-terminated ASCII strings, and returns the difference
  626. between the first mismatched ASCII characters.
  627. This function compares the Null-terminated ASCII string FirstString to the
  628. Null-terminated ASCII string SecondString. If FirstString is identical to
  629. SecondString, then 0 is returned. Otherwise, the value returned is the first
  630. mismatched ASCII character in SecondString subtracted from the first
  631. mismatched ASCII character in FirstString.
  632. If FirstString is NULL, then ASSERT().
  633. If SecondString is NULL, then ASSERT().
  634. If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
  635. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  636. then ASSERT().
  637. If PcdMaximumAsciiStringLength is not zero and SecondString contains more
  638. than PcdMaximumAsciiStringLength ASCII characters not including the
  639. Null-terminator, then ASSERT().
  640. @param FirstString The pointer to a Null-terminated ASCII string.
  641. @param SecondString The pointer to a Null-terminated ASCII string.
  642. @retval ==0 FirstString is identical to SecondString.
  643. @retval !=0 FirstString is not identical to SecondString.
  644. **/
  645. INTN
  646. EFIAPI
  647. AsciiStrCmp (
  648. IN CONST CHAR8 *FirstString,
  649. IN CONST CHAR8 *SecondString
  650. );
  651. /**
  652. Performs a case insensitive comparison of two Null-terminated ASCII strings,
  653. and returns the difference between the first mismatched ASCII characters.
  654. This function performs a case insensitive comparison of the Null-terminated
  655. ASCII string FirstString to the Null-terminated ASCII string SecondString. If
  656. FirstString is identical to SecondString, then 0 is returned. Otherwise, the
  657. value returned is the first mismatched lower case ASCII character in
  658. SecondString subtracted from the first mismatched lower case ASCII character
  659. in FirstString.
  660. If FirstString is NULL, then ASSERT().
  661. If SecondString is NULL, then ASSERT().
  662. If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
  663. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  664. then ASSERT().
  665. If PcdMaximumAsciiStringLength is not zero and SecondString contains more
  666. than PcdMaximumAsciiStringLength ASCII characters not including the
  667. Null-terminator, then ASSERT().
  668. @param FirstString The pointer to a Null-terminated ASCII string.
  669. @param SecondString The pointer to a Null-terminated ASCII string.
  670. @retval ==0 FirstString is identical to SecondString using case insensitive
  671. comparisons.
  672. @retval !=0 FirstString is not identical to SecondString using case
  673. insensitive comparisons.
  674. **/
  675. INTN
  676. EFIAPI
  677. AsciiStriCmp (
  678. IN CONST CHAR8 *FirstString,
  679. IN CONST CHAR8 *SecondString
  680. );
  681. /**
  682. Compares two Null-terminated ASCII strings with maximum lengths, and returns
  683. the difference between the first mismatched ASCII characters.
  684. This function compares the Null-terminated ASCII string FirstString to the
  685. Null-terminated ASCII string SecondString. At most, Length ASCII characters
  686. will be compared. If Length is 0, then 0 is returned. If FirstString is
  687. identical to SecondString, then 0 is returned. Otherwise, the value returned
  688. is the first mismatched ASCII character in SecondString subtracted from the
  689. first mismatched ASCII character in FirstString.
  690. If Length > 0 and FirstString is NULL, then ASSERT().
  691. If Length > 0 and SecondString is NULL, then ASSERT().
  692. If PcdMaximumAsciiStringLength is not zero, and Length is greater than
  693. PcdMaximumAsciiStringLength, then ASSERT().
  694. If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than
  695. PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
  696. then ASSERT().
  697. If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than
  698. PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
  699. then ASSERT().
  700. @param FirstString The pointer to a Null-terminated ASCII string.
  701. @param SecondString The pointer to a Null-terminated ASCII string.
  702. @param Length The maximum number of ASCII characters for compare.
  703. @retval ==0 FirstString is identical to SecondString.
  704. @retval !=0 FirstString is not identical to SecondString.
  705. **/
  706. INTN
  707. EFIAPI
  708. AsciiStrnCmp (
  709. IN CONST CHAR8 *FirstString,
  710. IN CONST CHAR8 *SecondString,
  711. IN UINTN Length
  712. );
  713. /**
  714. Concatenates one Null-terminated ASCII string to another Null-terminated
  715. ASCII string, and returns the concatenated ASCII string.
  716. This function concatenates two Null-terminated ASCII strings. The contents of
  717. Null-terminated ASCII string Source are concatenated to the end of Null-
  718. terminated ASCII string Destination. The Null-terminated concatenated ASCII
  719. String is returned.
  720. If Destination is NULL, then ASSERT().
  721. If Source is NULL, then ASSERT().
  722. If PcdMaximumAsciiStringLength is not zero and Destination contains more than
  723. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  724. then ASSERT().
  725. If PcdMaximumAsciiStringLength is not zero and Source contains more than
  726. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  727. then ASSERT().
  728. If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
  729. Source results in a ASCII string with more than PcdMaximumAsciiStringLength
  730. ASCII characters, then ASSERT().
  731. @param Destination The pointer to a Null-terminated ASCII string.
  732. @param Source The pointer to a Null-terminated ASCII string.
  733. @return Destination
  734. **/
  735. CHAR8 *
  736. EFIAPI
  737. AsciiStrCat (
  738. IN OUT CHAR8 *Destination,
  739. IN CONST CHAR8 *Source
  740. );
  741. /**
  742. Concatenates up to a specified length one Null-terminated ASCII string to
  743. the end of another Null-terminated ASCII string, and returns the
  744. concatenated ASCII string.
  745. This function concatenates two Null-terminated ASCII strings. The contents
  746. of Null-terminated ASCII string Source are concatenated to the end of Null-
  747. terminated ASCII string Destination, and Destination is returned. At most,
  748. Length ASCII characters are concatenated from Source to the end of
  749. Destination, and Destination is always Null-terminated. If Length is 0, then
  750. Destination is returned unmodified. If Source and Destination overlap, then
  751. the results are undefined.
  752. If Length > 0 and Destination is NULL, then ASSERT().
  753. If Length > 0 and Source is NULL, then ASSERT().
  754. If Source and Destination overlap, then ASSERT().
  755. If PcdMaximumAsciiStringLength is not zero, and Length is greater than
  756. PcdMaximumAsciiStringLength, then ASSERT().
  757. If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
  758. PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
  759. then ASSERT().
  760. If PcdMaximumAsciiStringLength is not zero, and Source contains more than
  761. PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
  762. then ASSERT().
  763. If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
  764. Source results in a ASCII string with more than PcdMaximumAsciiStringLength
  765. ASCII characters, not including the Null-terminator, then ASSERT().
  766. @param Destination The pointer to a Null-terminated ASCII string.
  767. @param Source The pointer to a Null-terminated ASCII string.
  768. @param Length The maximum number of ASCII characters to concatenate from
  769. Source.
  770. @return Destination
  771. **/
  772. CHAR8 *
  773. EFIAPI
  774. AsciiStrnCat (
  775. IN OUT CHAR8 *Destination,
  776. IN CONST CHAR8 *Source,
  777. IN UINTN Length
  778. );
  779. /**
  780. Returns the first occurrence of a Null-terminated ASCII sub-string
  781. in a Null-terminated ASCII string.
  782. This function scans the contents of the ASCII string specified by String
  783. and returns the first occurrence of SearchString. If SearchString is not
  784. found in String, then NULL is returned. If the length of SearchString is zero,
  785. then String is returned.
  786. If String is NULL, then ASSERT().
  787. If SearchString is NULL, then ASSERT().
  788. If PcdMaximumAsciiStringLength is not zero, and SearchString or
  789. String contains more than PcdMaximumAsciiStringLength Unicode characters
  790. not including the Null-terminator, then ASSERT().
  791. @param String The pointer to a Null-terminated ASCII string.
  792. @param SearchString The pointer to a Null-terminated ASCII string to search for.
  793. @retval NULL If the SearchString does not appear in String.
  794. @retval others If there is a match return the first occurrence of SearchingString.
  795. If the length of SearchString is zero,return String.
  796. **/
  797. CHAR8 *
  798. EFIAPI
  799. AsciiStrStr (
  800. IN CONST CHAR8 *String,
  801. IN CONST CHAR8 *SearchString
  802. );
  803. /**
  804. Convert a Null-terminated ASCII decimal string to a value of type
  805. UINTN.
  806. This function returns a value of type UINTN by interpreting the contents
  807. of the ASCII string String as a decimal number. The format of the input
  808. ASCII string String is:
  809. [spaces] [decimal digits].
  810. The valid decimal digit character is in the range [0-9]. The function will
  811. ignore the pad space, which includes spaces or tab characters, before the digits.
  812. The running zero in the beginning of [decimal digits] will be ignored. Then, the
  813. function stops at the first character that is a not a valid decimal character or
  814. Null-terminator, whichever on comes first.
  815. If String has only pad spaces, then 0 is returned.
  816. If String has no pad spaces or valid decimal digits, then 0 is returned.
  817. If the number represented by String overflows according to the range defined by
  818. UINTN, then ASSERT().
  819. If String is NULL, then ASSERT().
  820. If PcdMaximumAsciiStringLength is not zero, and String contains more than
  821. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  822. then ASSERT().
  823. @param String The pointer to a Null-terminated ASCII string.
  824. @retval The value translated from String.
  825. **/
  826. UINTN
  827. EFIAPI
  828. AsciiStrDecimalToUintn (
  829. IN CONST CHAR8 *String
  830. );
  831. /**
  832. Convert a Null-terminated ASCII decimal string to a value of type
  833. UINT64.
  834. This function returns a value of type UINT64 by interpreting the contents
  835. of the ASCII string String as a decimal number. The format of the input
  836. ASCII string String is:
  837. [spaces] [decimal digits].
  838. The valid decimal digit character is in the range [0-9]. The function will
  839. ignore the pad space, which includes spaces or tab characters, before the digits.
  840. The running zero in the beginning of [decimal digits] will be ignored. Then, the
  841. function stops at the first character that is a not a valid decimal character or
  842. Null-terminator, whichever on comes first.
  843. If String has only pad spaces, then 0 is returned.
  844. If String has no pad spaces or valid decimal digits, then 0 is returned.
  845. If the number represented by String overflows according to the range defined by
  846. UINT64, then ASSERT().
  847. If String is NULL, then ASSERT().
  848. If PcdMaximumAsciiStringLength is not zero, and String contains more than
  849. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  850. then ASSERT().
  851. @param String The pointer to a Null-terminated ASCII string.
  852. @retval Value translated from String.
  853. **/
  854. UINT64
  855. EFIAPI
  856. AsciiStrDecimalToUint64 (
  857. IN CONST CHAR8 *String
  858. );
  859. /**
  860. Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
  861. This function returns a value of type UINTN by interpreting the contents of
  862. the ASCII string String as a hexadecimal number. The format of the input ASCII
  863. string String is:
  864. [spaces][zeros][x][hexadecimal digits].
  865. The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
  866. The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
  867. appears in the input string, it must be prefixed with at least one 0. The function
  868. will ignore the pad space, which includes spaces or tab characters, before [zeros],
  869. [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
  870. will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
  871. digit. Then, the function stops at the first character that is a not a valid
  872. hexadecimal character or Null-terminator, whichever on comes first.
  873. If String has only pad spaces, then 0 is returned.
  874. If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
  875. 0 is returned.
  876. If the number represented by String overflows according to the range defined by UINTN,
  877. then ASSERT().
  878. If String is NULL, then ASSERT().
  879. If PcdMaximumAsciiStringLength is not zero,
  880. and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
  881. the Null-terminator, then ASSERT().
  882. @param String The pointer to a Null-terminated ASCII string.
  883. @retval Value translated from String.
  884. **/
  885. UINTN
  886. EFIAPI
  887. AsciiStrHexToUintn (
  888. IN CONST CHAR8 *String
  889. );
  890. /**
  891. Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
  892. This function returns a value of type UINT64 by interpreting the contents of
  893. the ASCII string String as a hexadecimal number. The format of the input ASCII
  894. string String is:
  895. [spaces][zeros][x][hexadecimal digits].
  896. The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
  897. The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
  898. appears in the input string, it must be prefixed with at least one 0. The function
  899. will ignore the pad space, which includes spaces or tab characters, before [zeros],
  900. [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
  901. will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
  902. digit. Then, the function stops at the first character that is a not a valid
  903. hexadecimal character or Null-terminator, whichever on comes first.
  904. If String has only pad spaces, then 0 is returned.
  905. If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
  906. 0 is returned.
  907. If the number represented by String overflows according to the range defined by UINT64,
  908. then ASSERT().
  909. If String is NULL, then ASSERT().
  910. If PcdMaximumAsciiStringLength is not zero,
  911. and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
  912. the Null-terminator, then ASSERT().
  913. @param String The pointer to a Null-terminated ASCII string.
  914. @retval Value translated from String.
  915. **/
  916. UINT64
  917. EFIAPI
  918. AsciiStrHexToUint64 (
  919. IN CONST CHAR8 *String
  920. );
  921. /**
  922. Convert one Null-terminated ASCII string to a Null-terminated
  923. Unicode string and returns the Unicode string.
  924. This function converts the contents of the ASCII string Source to the Unicode
  925. string Destination, and returns Destination. The function terminates the
  926. Unicode string Destination by appending a Null-terminator character at the end.
  927. The caller is responsible to make sure Destination points to a buffer with size
  928. equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
  929. If Destination is NULL, then ASSERT().
  930. If Destination is not aligned on a 16-bit boundary, then ASSERT().
  931. If Source is NULL, then ASSERT().
  932. If Source and Destination overlap, then ASSERT().
  933. If PcdMaximumAsciiStringLength is not zero, and Source contains more than
  934. PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
  935. then ASSERT().
  936. If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
  937. PcdMaximumUnicodeStringLength ASCII characters not including the
  938. Null-terminator, then ASSERT().
  939. @param Source The pointer to a Null-terminated ASCII string.
  940. @param Destination The pointer to a Null-terminated Unicode string.
  941. @return Destination.
  942. **/
  943. CHAR16 *
  944. EFIAPI
  945. AsciiStrToUnicodeStr (
  946. IN CONST CHAR8 *Source,
  947. OUT CHAR16 *Destination
  948. );
  949. /**
  950. Converts an 8-bit value to an 8-bit BCD value.
  951. Converts the 8-bit value specified by Value to BCD. The BCD value is
  952. returned.
  953. If Value >= 100, then ASSERT().
  954. @param Value The 8-bit value to convert to BCD. Range 0..99.
  955. @return The BCD value.
  956. **/
  957. UINT8
  958. EFIAPI
  959. DecimalToBcd8 (
  960. IN UINT8 Value
  961. );
  962. /**
  963. Converts an 8-bit BCD value to an 8-bit value.
  964. Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
  965. value is returned.
  966. If Value >= 0xA0, then ASSERT().
  967. If (Value & 0x0F) >= 0x0A, then ASSERT().
  968. @param Value The 8-bit BCD value to convert to an 8-bit value.
  969. @return The 8-bit value is returned.
  970. **/
  971. UINT8
  972. EFIAPI
  973. BcdToDecimal8 (
  974. IN UINT8 Value
  975. );
  976. //
  977. // Linked List Functions and Macros
  978. //
  979. /**
  980. Initializes the head node of a doubly linked list that is declared as a
  981. global variable in a module.
  982. Initializes the forward and backward links of a new linked list. After
  983. initializing a linked list with this macro, the other linked list functions
  984. may be used to add and remove nodes from the linked list. This macro results
  985. in smaller executables by initializing the linked list in the data section,
  986. instead if calling the InitializeListHead() function to perform the
  987. equivalent operation.
  988. @param ListHead The head note of a list to initialize.
  989. **/
  990. #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
  991. /**
  992. Initializes the head node of a doubly linked list, and returns the pointer to
  993. the head node of the doubly linked list.
  994. Initializes the forward and backward links of a new linked list. After
  995. initializing a linked list with this function, the other linked list
  996. functions may be used to add and remove nodes from the linked list. It is up
  997. to the caller of this function to allocate the memory for ListHead.
  998. If ListHead is NULL, then ASSERT().
  999. @param ListHead A pointer to the head node of a new doubly linked list.
  1000. @return ListHead
  1001. **/
  1002. LIST_ENTRY *
  1003. EFIAPI
  1004. InitializeListHead (
  1005. IN OUT LIST_ENTRY *ListHead
  1006. );
  1007. /**
  1008. Adds a node to the beginning of a doubly linked list, and returns the pointer
  1009. to the head node of the doubly linked list.
  1010. Adds the node Entry at the beginning of the doubly linked list denoted by
  1011. ListHead, and returns ListHead.
  1012. If ListHead is NULL, then ASSERT().
  1013. If Entry is NULL, then ASSERT().
  1014. If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
  1015. InitializeListHead(), then ASSERT().
  1016. If PcdMaximumLinkedListLength is not zero, and prior to insertion the number
  1017. of nodes in ListHead, including the ListHead node, is greater than or
  1018. equal to PcdMaximumLinkedListLength, then ASSERT().
  1019. @param ListHead A pointer to the head node of a doubly linked list.
  1020. @param Entry A pointer to a node that is to be inserted at the beginning
  1021. of a doubly linked list.
  1022. @return ListHead
  1023. **/
  1024. LIST_ENTRY *
  1025. EFIAPI
  1026. InsertHeadList (
  1027. IN OUT LIST_ENTRY *ListHead,
  1028. IN OUT LIST_ENTRY *Entry
  1029. );
  1030. /**
  1031. Adds a node to the end of a doubly linked list, and returns the pointer to
  1032. the head node of the doubly linked list.
  1033. Adds the node Entry to the end of the doubly linked list denoted by ListHead,
  1034. and returns ListHead.
  1035. If ListHead is NULL, then ASSERT().
  1036. If Entry is NULL, then ASSERT().
  1037. If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
  1038. InitializeListHead(), then ASSERT().
  1039. If PcdMaximumLinkedListLength is not zero, and prior to insertion the number
  1040. of nodes in ListHead, including the ListHead node, is greater than or
  1041. equal to PcdMaximumLinkedListLength, then ASSERT().
  1042. @param ListHead A pointer to the head node of a doubly linked list.
  1043. @param Entry A pointer to a node that is to be added at the end of the
  1044. doubly linked list.
  1045. @return ListHead
  1046. **/
  1047. LIST_ENTRY *
  1048. EFIAPI
  1049. InsertTailList (
  1050. IN OUT LIST_ENTRY *ListHead,
  1051. IN OUT LIST_ENTRY *Entry
  1052. );
  1053. /**
  1054. Retrieves the first node of a doubly linked list.
  1055. Returns the first node of a doubly linked list. List must have been
  1056. initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
  1057. If List is empty, then List is returned.
  1058. If List is NULL, then ASSERT().
  1059. If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
  1060. InitializeListHead(), then ASSERT().
  1061. If PcdMaximumLinkedListLength is not zero, and the number of nodes
  1062. in List, including the List node, is greater than or equal to
  1063. PcdMaximumLinkedListLength, then ASSERT().
  1064. @param List A pointer to the head node of a doubly linked list.
  1065. @return The first node of a doubly linked list.
  1066. @retval NULL The list is empty.
  1067. **/
  1068. LIST_ENTRY *
  1069. EFIAPI
  1070. GetFirstNode (
  1071. IN CONST LIST_ENTRY *List
  1072. );
  1073. /**
  1074. Retrieves the next node of a doubly linked list.
  1075. Returns the node of a doubly linked list that follows Node.
  1076. List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
  1077. or InitializeListHead(). If List is empty, then List is returned.
  1078. If List is NULL, then ASSERT().
  1079. If Node is NULL, then ASSERT().
  1080. If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
  1081. InitializeListHead(), then ASSERT().
  1082. If PcdMaximumLinkedListLength is not zero, and List contains more than
  1083. PcdMaximumLinkedListLength nodes, then ASSERT().
  1084. If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
  1085. @param List A pointer to the head node of a doubly linked list.
  1086. @param Node A pointer to a node in the doubly linked list.
  1087. @return The pointer to the next node if one exists. Otherwise List is returned.
  1088. **/
  1089. LIST_ENTRY *
  1090. EFIAPI
  1091. GetNextNode (
  1092. IN CONST LIST_ENTRY *List,
  1093. IN CONST LIST_ENTRY *Node
  1094. );
  1095. /**
  1096. Retrieves the previous node of a doubly linked list.
  1097. Returns the node of a doubly linked list that precedes Node.
  1098. List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
  1099. or InitializeListHead(). If List is empty, then List is returned.
  1100. If List is NULL, then ASSERT().
  1101. If Node is NULL, then ASSERT().
  1102. If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
  1103. InitializeListHead(), then ASSERT().
  1104. If PcdMaximumLinkedListLength is not zero, and List contains more than
  1105. PcdMaximumLinkedListLength nodes, then ASSERT().
  1106. If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
  1107. @param List A pointer to the head node of a doubly linked list.
  1108. @param Node A pointer to a node in the doubly linked list.
  1109. @return The pointer to the previous node if one exists. Otherwise List is returned.
  1110. **/
  1111. LIST_ENTRY *
  1112. EFIAPI
  1113. GetPreviousNode (
  1114. IN CONST LIST_ENTRY *List,
  1115. IN CONST LIST_ENTRY *Node
  1116. );
  1117. /**
  1118. Checks to see if a doubly linked list is empty or not.
  1119. Checks to see if the doubly linked list is empty. If the linked list contains
  1120. zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
  1121. If ListHead is NULL, then ASSERT().
  1122. If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
  1123. InitializeListHead(), then ASSERT().
  1124. If PcdMaximumLinkedListLength is not zero, and the number of nodes
  1125. in List, including the List node, is greater than or equal to
  1126. PcdMaximumLinkedListLength, then ASSERT().
  1127. @param ListHead A pointer to the head node of a doubly linked list.
  1128. @retval TRUE The linked list is empty.
  1129. @retval FALSE The linked list is not empty.
  1130. **/
  1131. BOOLEAN
  1132. EFIAPI
  1133. IsListEmpty (
  1134. IN CONST LIST_ENTRY *ListHead
  1135. );
  1136. /**
  1137. Determines if a node in a doubly linked list is the head node of a the same
  1138. doubly linked list. This function is typically used to terminate a loop that
  1139. traverses all the nodes in a doubly linked list starting with the head node.
  1140. Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
  1141. nodes in the doubly linked list specified by List. List must have been
  1142. initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
  1143. If List is NULL, then ASSERT().
  1144. If Node is NULL, then ASSERT().
  1145. If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
  1146. then ASSERT().
  1147. If PcdMaximumLinkedListLength is not zero, and the number of nodes
  1148. in List, including the List node, is greater than or equal to
  1149. PcdMaximumLinkedListLength, then ASSERT().
  1150. If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal
  1151. to List, then ASSERT().
  1152. @param List A pointer to the head node of a doubly linked list.
  1153. @param Node A pointer to a node in the doubly linked list.
  1154. @retval TRUE Node is the head of the doubly-linked list pointed by List.
  1155. @retval FALSE Node is not the head of the doubly-linked list pointed by List.
  1156. **/
  1157. BOOLEAN
  1158. EFIAPI
  1159. IsNull (
  1160. IN CONST LIST_ENTRY *List,
  1161. IN CONST LIST_ENTRY *Node
  1162. );
  1163. /**
  1164. Determines if a node the last node in a doubly linked list.
  1165. Returns TRUE if Node is the last node in the doubly linked list specified by
  1166. List. Otherwise, FALSE is returned. List must have been initialized with
  1167. INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
  1168. If List is NULL, then ASSERT().
  1169. If Node is NULL, then ASSERT().
  1170. If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
  1171. InitializeListHead(), then ASSERT().
  1172. If PcdMaximumLinkedListLength is not zero, and the number of nodes
  1173. in List, including the List node, is greater than or equal to
  1174. PcdMaximumLinkedListLength, then ASSERT().
  1175. If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
  1176. @param List A pointer to the head node of a doubly linked list.
  1177. @param Node A pointer to a node in the doubly linked list.
  1178. @retval TRUE Node is the last node in the linked list.
  1179. @retval FALSE Node is not the last node in the linked list.
  1180. **/
  1181. BOOLEAN
  1182. EFIAPI
  1183. IsNodeAtEnd (
  1184. IN CONST LIST_ENTRY *List,
  1185. IN CONST LIST_ENTRY *Node
  1186. );
  1187. /**
  1188. Swaps the location of two nodes in a doubly linked list, and returns the
  1189. first node after the swap.
  1190. If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
  1191. Otherwise, the location of the FirstEntry node is swapped with the location
  1192. of the SecondEntry node in a doubly linked list. SecondEntry must be in the
  1193. same double linked list as FirstEntry and that double linked list must have
  1194. been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
  1195. SecondEntry is returned after the nodes are swapped.
  1196. If FirstEntry is NULL, then ASSERT().
  1197. If SecondEntry is NULL, then ASSERT().
  1198. If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the
  1199. same linked list, then ASSERT().
  1200. If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
  1201. linked list containing the FirstEntry and SecondEntry nodes, including
  1202. the FirstEntry and SecondEntry nodes, is greater than or equal to
  1203. PcdMaximumLinkedListLength, then ASSERT().
  1204. @param FirstEntry A pointer to a node in a linked list.
  1205. @param SecondEntry A pointer to another node in the same linked list.
  1206. @return SecondEntry.
  1207. **/
  1208. LIST_ENTRY *
  1209. EFIAPI
  1210. SwapListEntries (
  1211. IN OUT LIST_ENTRY *FirstEntry,
  1212. IN OUT LIST_ENTRY *SecondEntry
  1213. );
  1214. /**
  1215. Removes a node from a doubly linked list, and returns the node that follows
  1216. the removed node.
  1217. Removes the node Entry from a doubly linked list. It is up to the caller of
  1218. this function to release the memory used by this node if that is required. On
  1219. exit, the node following Entry in the doubly linked list is returned. If
  1220. Entry is the only node in the linked list, then the head node of the linked
  1221. list is returned.
  1222. If Entry is NULL, then ASSERT().
  1223. If Entry is the head node of an empty list, then ASSERT().
  1224. If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
  1225. linked list containing Entry, including the Entry node, is greater than
  1226. or equal to PcdMaximumLinkedListLength, then ASSERT().
  1227. @param Entry A pointer to a node in a linked list.
  1228. @return Entry.
  1229. **/
  1230. LIST_ENTRY *
  1231. EFIAPI
  1232. RemoveEntryList (
  1233. IN CONST LIST_ENTRY *Entry
  1234. );
  1235. //
  1236. // Math Services
  1237. //
  1238. /**
  1239. Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
  1240. with zeros. The shifted value is returned.
  1241. This function shifts the 64-bit value Operand to the left by Count bits. The
  1242. low Count bits are set to zero. The shifted value is returned.
  1243. If Count is greater than 63, then ASSERT().
  1244. @param Operand The 64-bit operand to shift left.
  1245. @param Count The number of bits to shift left.
  1246. @return Operand << Count.
  1247. **/
  1248. UINT64
  1249. EFIAPI
  1250. LShiftU64 (
  1251. IN UINT64 Operand,
  1252. IN UINTN Count
  1253. );
  1254. /**
  1255. Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
  1256. filled with zeros. The shifted value is returned.
  1257. This function shifts the 64-bit value Operand to the right by Count bits. The
  1258. high Count bits are set to zero. The shifted value is returned.
  1259. If Count is greater than 63, then ASSERT().
  1260. @param Operand The 64-bit operand to shift right.
  1261. @param Count The number of bits to shift right.
  1262. @return Operand >> Count
  1263. **/
  1264. UINT64
  1265. EFIAPI
  1266. RShiftU64 (
  1267. IN UINT64 Operand,
  1268. IN UINTN Count
  1269. );
  1270. /**
  1271. Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
  1272. with original integer's bit 63. The shifted value is returned.
  1273. This function shifts the 64-bit value Operand to the right by Count bits. The
  1274. high Count bits are set to bit 63 of Operand. The shifted value is returned.
  1275. If Count is greater than 63, then ASSERT().
  1276. @param Operand The 64-bit operand to shift right.
  1277. @param Count The number of bits to shift right.
  1278. @return Operand >> Count
  1279. **/
  1280. UINT64
  1281. EFIAPI
  1282. ARShiftU64 (
  1283. IN UINT64 Operand,
  1284. IN UINTN Count
  1285. );
  1286. /**
  1287. Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
  1288. with the high bits that were rotated.
  1289. This function rotates the 32-bit value Operand to the left by Count bits. The
  1290. low Count bits are fill with the high Count bits of Operand. The rotated
  1291. value is returned.
  1292. If Count is greater than 31, then ASSERT().
  1293. @param Operand The 32-bit operand to rotate left.
  1294. @param Count The number of bits to rotate left.
  1295. @return Operand << Count
  1296. **/
  1297. UINT32
  1298. EFIAPI
  1299. LRotU32 (
  1300. IN UINT32 Operand,
  1301. IN UINTN Count
  1302. );
  1303. /**
  1304. Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
  1305. with the low bits that were rotated.
  1306. This function rotates the 32-bit value Operand to the right by Count bits.
  1307. The high Count bits are fill with the low Count bits of Operand. The rotated
  1308. value is returned.
  1309. If Count is greater than 31, then ASSERT().
  1310. @param Operand The 32-bit operand to rotate right.
  1311. @param Count The number of bits to rotate right.
  1312. @return Operand >> Count
  1313. **/
  1314. UINT32
  1315. EFIAPI
  1316. RRotU32 (
  1317. IN UINT32 Operand,
  1318. IN UINTN Count
  1319. );
  1320. /**
  1321. Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
  1322. with the high bits that were rotated.
  1323. This function rotates the 64-bit value Operand to the left by Count bits. The
  1324. low Count bits are fill with the high Count bits of Operand. The rotated
  1325. value is returned.
  1326. If Count is greater than 63, then ASSERT().
  1327. @param Operand The 64-bit operand to rotate left.
  1328. @param Count The number of bits to rotate left.
  1329. @return Operand << Count
  1330. **/
  1331. UINT64
  1332. EFIAPI
  1333. LRotU64 (
  1334. IN UINT64 Operand,
  1335. IN UINTN Count
  1336. );
  1337. /**
  1338. Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
  1339. with the high low bits that were rotated.
  1340. This function rotates the 64-bit value Operand to the right by Count bits.
  1341. The high Count bits are fill with the low Count bits of Operand. The rotated
  1342. value is returned.
  1343. If Count is greater than 63, then ASSERT().
  1344. @param Operand The 64-bit operand to rotate right.
  1345. @param Count The number of bits to rotate right.
  1346. @return Operand >> Count
  1347. **/
  1348. UINT64
  1349. EFIAPI
  1350. RRotU64 (
  1351. IN UINT64 Operand,
  1352. IN UINTN Count
  1353. );
  1354. /**
  1355. Returns the bit position of the lowest bit set in a 32-bit value.
  1356. This function computes the bit position of the lowest bit set in the 32-bit
  1357. value specified by Operand. If Operand is zero, then -1 is returned.
  1358. Otherwise, a value between 0 and 31 is returned.
  1359. @param Operand The 32-bit operand to evaluate.
  1360. @retval 0..31 The lowest bit set in Operand was found.
  1361. @retval -1 Operand is zero.
  1362. **/
  1363. INTN
  1364. EFIAPI
  1365. LowBitSet32 (
  1366. IN UINT32 Operand
  1367. );
  1368. /**
  1369. Returns the bit position of the lowest bit set in a 64-bit value.
  1370. This function computes the bit position of the lowest bit set in the 64-bit
  1371. value specified by Operand. If Operand is zero, then -1 is returned.
  1372. Otherwise, a value between 0 and 63 is returned.
  1373. @param Operand The 64-bit operand to evaluate.
  1374. @retval 0..63 The lowest bit set in Operand was found.
  1375. @retval -1 Operand is zero.
  1376. **/
  1377. INTN
  1378. EFIAPI
  1379. LowBitSet64 (
  1380. IN UINT64 Operand
  1381. );
  1382. /**
  1383. Returns the bit position of the highest bit set in a 32-bit value. Equivalent
  1384. to log2(x).
  1385. This function computes the bit position of the highest bit set in the 32-bit
  1386. value specified by Operand. If Operand is zero, then -1 is returned.
  1387. Otherwise, a value between 0 and 31 is returned.
  1388. @param Operand The 32-bit operand to evaluate.
  1389. @retval 0..31 Position of the highest bit set in Operand if found.
  1390. @retval -1 Operand is zero.
  1391. **/
  1392. INTN
  1393. EFIAPI
  1394. HighBitSet32 (
  1395. IN UINT32 Operand
  1396. );
  1397. /**
  1398. Returns the bit position of the highest bit set in a 64-bit value. Equivalent
  1399. to log2(x).
  1400. This function computes the bit position of the highest bit set in the 64-bit
  1401. value specified by Operand. If Operand is zero, then -1 is returned.
  1402. Otherwise, a value between 0 and 63 is returned.
  1403. @param Operand The 64-bit operand to evaluate.
  1404. @retval 0..63 Position of the highest bit set in Operand if found.
  1405. @retval -1 Operand is zero.
  1406. **/
  1407. INTN
  1408. EFIAPI
  1409. HighBitSet64 (
  1410. IN UINT64 Operand
  1411. );
  1412. /**
  1413. Returns the value of the highest bit set in a 32-bit value. Equivalent to
  1414. 1 << log2(x).
  1415. This function computes the value of the highest bit set in the 32-bit value
  1416. specified by Operand. If Operand is zero, then zero is returned.
  1417. @param Operand The 32-bit operand to evaluate.
  1418. @return 1 << HighBitSet32(Operand)
  1419. @retval 0 Operand is zero.
  1420. **/
  1421. UINT32
  1422. EFIAPI
  1423. GetPowerOfTwo32 (
  1424. IN UINT32 Operand
  1425. );
  1426. /**
  1427. Returns the value of the highest bit set in a 64-bit value. Equivalent to
  1428. 1 << log2(x).
  1429. This function computes the value of the highest bit set in the 64-bit value
  1430. specified by Operand. If Operand is zero, then zero is returned.
  1431. @param Operand The 64-bit operand to evaluate.
  1432. @return 1 << HighBitSet64(Operand)
  1433. @retval 0 Operand is zero.
  1434. **/
  1435. UINT64
  1436. EFIAPI
  1437. GetPowerOfTwo64 (
  1438. IN UINT64 Operand
  1439. );
  1440. /**
  1441. Switches the endianness of a 16-bit integer.
  1442. This function swaps the bytes in a 16-bit unsigned value to switch the value
  1443. from little endian to big endian or vice versa. The byte swapped value is
  1444. returned.
  1445. @param Value A 16-bit unsigned value.
  1446. @return The byte swapped Value.
  1447. **/
  1448. UINT16
  1449. EFIAPI
  1450. SwapBytes16 (
  1451. IN UINT16 Value
  1452. );
  1453. /**
  1454. Switches the endianness of a 32-bit integer.
  1455. This function swaps the bytes in a 32-bit unsigned value to switch the value
  1456. from little endian to big endian or vice versa. The byte swapped value is
  1457. returned.
  1458. @param Value A 32-bit unsigned value.
  1459. @return The byte swapped Value.
  1460. **/
  1461. UINT32
  1462. EFIAPI
  1463. SwapBytes32 (
  1464. IN UINT32 Value
  1465. );
  1466. /**
  1467. Switches the endianness of a 64-bit integer.
  1468. This function swaps the bytes in a 64-bit unsigned value to switch the value
  1469. from little endian to big endian or vice versa. The byte swapped value is
  1470. returned.
  1471. @param Value A 64-bit unsigned value.
  1472. @return The byte swapped Value.
  1473. **/
  1474. UINT64
  1475. EFIAPI
  1476. SwapBytes64 (
  1477. IN UINT64 Value
  1478. );
  1479. /**
  1480. Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
  1481. generates a 64-bit unsigned result.
  1482. This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
  1483. unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
  1484. bit unsigned result is returned.
  1485. @param Multiplicand A 64-bit unsigned value.
  1486. @param Multiplier A 32-bit unsigned value.
  1487. @return Multiplicand * Multiplier
  1488. **/
  1489. UINT64
  1490. EFIAPI
  1491. MultU64x32 (
  1492. IN UINT64 Multiplicand,
  1493. IN UINT32 Multiplier
  1494. );
  1495. /**
  1496. Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
  1497. generates a 64-bit unsigned result.
  1498. This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
  1499. unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
  1500. bit unsigned result is returned.
  1501. @param Multiplicand A 64-bit unsigned value.
  1502. @param Multiplier A 64-bit unsigned value.
  1503. @return Multiplicand * Multiplier.
  1504. **/
  1505. UINT64
  1506. EFIAPI
  1507. MultU64x64 (
  1508. IN UINT64 Multiplicand,
  1509. IN UINT64 Multiplier
  1510. );
  1511. /**
  1512. Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
  1513. 64-bit signed result.
  1514. This function multiples the 64-bit signed value Multiplicand by the 64-bit
  1515. signed value Multiplier and generates a 64-bit signed result. This 64-bit
  1516. signed result is returned.
  1517. @param Multiplicand A 64-bit signed value.
  1518. @param Multiplier A 64-bit signed value.
  1519. @return Multiplicand * Multiplier
  1520. **/
  1521. INT64
  1522. EFIAPI
  1523. MultS64x64 (
  1524. IN INT64 Multiplicand,
  1525. IN INT64 Multiplier
  1526. );
  1527. /**
  1528. Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
  1529. a 64-bit unsigned result.
  1530. This function divides the 64-bit unsigned value Dividend by the 32-bit
  1531. unsigned value Divisor and generates a 64-bit unsigned quotient. This
  1532. function returns the 64-bit unsigned quotient.
  1533. If Divisor is 0, then ASSERT().
  1534. @param Dividend A 64-bit unsigned value.
  1535. @param Divisor A 32-bit unsigned value.
  1536. @return Dividend / Divisor.
  1537. **/
  1538. UINT64
  1539. EFIAPI
  1540. DivU64x32 (
  1541. IN UINT64 Dividend,
  1542. IN UINT32 Divisor
  1543. );
  1544. /**
  1545. Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
  1546. a 32-bit unsigned remainder.
  1547. This function divides the 64-bit unsigned value Dividend by the 32-bit
  1548. unsigned value Divisor and generates a 32-bit remainder. This function
  1549. returns the 32-bit unsigned remainder.
  1550. If Divisor is 0, then ASSERT().
  1551. @param Dividend A 64-bit unsigned value.
  1552. @param Divisor A 32-bit unsigned value.
  1553. @return Dividend % Divisor.
  1554. **/
  1555. UINT32
  1556. EFIAPI
  1557. ModU64x32 (
  1558. IN UINT64 Dividend,
  1559. IN UINT32 Divisor
  1560. );
  1561. /**
  1562. Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
  1563. a 64-bit unsigned result and an optional 32-bit unsigned remainder.
  1564. This function divides the 64-bit unsigned value Dividend by the 32-bit
  1565. unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
  1566. is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
  1567. This function returns the 64-bit unsigned quotient.
  1568. If Divisor is 0, then ASSERT().
  1569. @param Dividend A 64-bit unsigned value.
  1570. @param Divisor A 32-bit unsigned value.
  1571. @param Remainder A pointer to a 32-bit unsigned value. This parameter is
  1572. optional and may be NULL.
  1573. @return Dividend / Divisor.
  1574. **/
  1575. UINT64
  1576. EFIAPI
  1577. DivU64x32Remainder (
  1578. IN UINT64 Dividend,
  1579. IN UINT32 Divisor,
  1580. OUT UINT32 *Remainder OPTIONAL
  1581. );
  1582. /**
  1583. Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
  1584. a 64-bit unsigned result and an optional 64-bit unsigned remainder.
  1585. This function divides the 64-bit unsigned value Dividend by the 64-bit
  1586. unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
  1587. is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
  1588. This function returns the 64-bit unsigned quotient.
  1589. If Divisor is 0, then ASSERT().
  1590. @param Dividend A 64-bit unsigned value.
  1591. @param Divisor A 64-bit unsigned value.
  1592. @param Remainder A pointer to a 64-bit unsigned value. This parameter is
  1593. optional and may be NULL.
  1594. @return Dividend / Divisor.
  1595. **/
  1596. UINT64
  1597. EFIAPI
  1598. DivU64x64Remainder (
  1599. IN UINT64 Dividend,
  1600. IN UINT64 Divisor,
  1601. OUT UINT64 *Remainder OPTIONAL
  1602. );
  1603. /**
  1604. Divides a 64-bit signed integer by a 64-bit signed integer and generates a
  1605. 64-bit signed result and a optional 64-bit signed remainder.
  1606. This function divides the 64-bit signed value Dividend by the 64-bit signed
  1607. value Divisor and generates a 64-bit signed quotient. If Remainder is not
  1608. NULL, then the 64-bit signed remainder is returned in Remainder. This
  1609. function returns the 64-bit signed quotient.
  1610. It is the caller's responsibility to not call this function with a Divisor of 0.
  1611. If Divisor is 0, then the quotient and remainder should be assumed to be
  1612. the largest negative integer.
  1613. If Divisor is 0, then ASSERT().
  1614. @param Dividend A 64-bit signed value.
  1615. @param Divisor A 64-bit signed value.
  1616. @param Remainder A pointer to a 64-bit signed value. This parameter is
  1617. optional and may be NULL.
  1618. @return Dividend / Divisor.
  1619. **/
  1620. INT64
  1621. EFIAPI
  1622. DivS64x64Remainder (
  1623. IN INT64 Dividend,
  1624. IN INT64 Divisor,
  1625. OUT INT64 *Remainder OPTIONAL
  1626. );
  1627. /**
  1628. Reads a 16-bit value from memory that may be unaligned.
  1629. This function returns the 16-bit value pointed to by Buffer. The function
  1630. guarantees that the read operation does not produce an alignment fault.
  1631. If the Buffer is NULL, then ASSERT().
  1632. @param Buffer The pointer to a 16-bit value that may be unaligned.
  1633. @return The 16-bit value read from Buffer.
  1634. **/
  1635. UINT16
  1636. EFIAPI
  1637. ReadUnaligned16 (
  1638. IN CONST UINT16 *Buffer
  1639. );
  1640. /**
  1641. Writes a 16-bit value to memory that may be unaligned.
  1642. This function writes the 16-bit value specified by Value to Buffer. Value is
  1643. returned. The function guarantees that the write operation does not produce
  1644. an alignment fault.
  1645. If the Buffer is NULL, then ASSERT().
  1646. @param Buffer The pointer to a 16-bit value that may be unaligned.
  1647. @param Value 16-bit value to write to Buffer.
  1648. @return The 16-bit value to write to Buffer.
  1649. **/
  1650. UINT16
  1651. EFIAPI
  1652. WriteUnaligned16 (
  1653. OUT UINT16 *Buffer,
  1654. IN UINT16 Value
  1655. );
  1656. /**
  1657. Reads a 24-bit value from memory that may be unaligned.
  1658. This function returns the 24-bit value pointed to by Buffer. The function
  1659. guarantees that the read operation does not produce an alignment fault.
  1660. If the Buffer is NULL, then ASSERT().
  1661. @param Buffer The pointer to a 24-bit value that may be unaligned.
  1662. @return The 24-bit value read from Buffer.
  1663. **/
  1664. UINT32
  1665. EFIAPI
  1666. ReadUnaligned24 (
  1667. IN CONST UINT32 *Buffer
  1668. );
  1669. /**
  1670. Writes a 24-bit value to memory that may be unaligned.
  1671. This function writes the 24-bit value specified by Value to Buffer. Value is
  1672. returned. The function guarantees that the write operation does not produce
  1673. an alignment fault.
  1674. If the Buffer is NULL, then ASSERT().
  1675. @param Buffer The pointer to a 24-bit value that may be unaligned.
  1676. @param Value 24-bit value to write to Buffer.
  1677. @return The 24-bit value to write to Buffer.
  1678. **/
  1679. UINT32
  1680. EFIAPI
  1681. WriteUnaligned24 (
  1682. OUT UINT32 *Buffer,
  1683. IN UINT32 Value
  1684. );
  1685. /**
  1686. Reads a 32-bit value from memory that may be unaligned.
  1687. This function returns the 32-bit value pointed to by Buffer. The function
  1688. guarantees that the read operation does not produce an alignment fault.
  1689. If the Buffer is NULL, then ASSERT().
  1690. @param Buffer The pointer to a 32-bit value that may be unaligned.
  1691. @return The 32-bit value read from Buffer.
  1692. **/
  1693. UINT32
  1694. EFIAPI
  1695. ReadUnaligned32 (
  1696. IN CONST UINT32 *Buffer
  1697. );
  1698. /**
  1699. Writes a 32-bit value to memory that may be unaligned.
  1700. This function writes the 32-bit value specified by Value to Buffer. Value is
  1701. returned. The function guarantees that the write operation does not produce
  1702. an alignment fault.
  1703. If the Buffer is NULL, then ASSERT().
  1704. @param Buffer The pointer to a 32-bit value that may be unaligned.
  1705. @param Value 32-bit value to write to Buffer.
  1706. @return The 32-bit value to write to Buffer.
  1707. **/
  1708. UINT32
  1709. EFIAPI
  1710. WriteUnaligned32 (
  1711. OUT UINT32 *Buffer,
  1712. IN UINT32 Value
  1713. );
  1714. /**
  1715. Reads a 64-bit value from memory that may be unaligned.
  1716. This function returns the 64-bit value pointed to by Buffer. The function
  1717. guarantees that the read operation does not produce an alignment fault.
  1718. If the Buffer is NULL, then ASSERT().
  1719. @param Buffer The pointer to a 64-bit value that may be unaligned.
  1720. @return The 64-bit value read from Buffer.
  1721. **/
  1722. UINT64
  1723. EFIAPI
  1724. ReadUnaligned64 (
  1725. IN CONST UINT64 *Buffer
  1726. );
  1727. /**
  1728. Writes a 64-bit value to memory that may be unaligned.
  1729. This function writes the 64-bit value specified by Value to Buffer. Value is
  1730. returned. The function guarantees that the write operation does not produce
  1731. an alignment fault.
  1732. If the Buffer is NULL, then ASSERT().
  1733. @param Buffer The pointer to a 64-bit value that may be unaligned.
  1734. @param Value 64-bit value to write to Buffer.
  1735. @return The 64-bit value to write to Buffer.
  1736. **/
  1737. UINT64
  1738. EFIAPI
  1739. WriteUnaligned64 (
  1740. OUT UINT64 *Buffer,
  1741. IN UINT64 Value
  1742. );
  1743. //
  1744. // Bit Field Functions
  1745. //
  1746. /**
  1747. Returns a bit field from an 8-bit value.
  1748. Returns the bitfield specified by the StartBit and the EndBit from Operand.
  1749. If 8-bit operations are not supported, then ASSERT().
  1750. If StartBit is greater than 7, then ASSERT().
  1751. If EndBit is greater than 7, then ASSERT().
  1752. If EndBit is less than StartBit, then ASSERT().
  1753. @param Operand Operand on which to perform the bitfield operation.
  1754. @param StartBit The ordinal of the least significant bit in the bit field.
  1755. Range 0..7.
  1756. @param EndBit The ordinal of the most significant bit in the bit field.
  1757. Range 0..7.
  1758. @return The bit field read.
  1759. **/
  1760. UINT8
  1761. EFIAPI
  1762. BitFieldRead8 (
  1763. IN UINT8 Operand,
  1764. IN UINTN StartBit,
  1765. IN UINTN EndBit
  1766. );
  1767. /**
  1768. Writes a bit field to an 8-bit value, and returns the result.
  1769. Writes Value to the bit field specified by the StartBit and the EndBit in
  1770. Operand. All other bits in Operand are preserved. The new 8-bit value is
  1771. returned.
  1772. If 8-bit operations are not supported, then ASSERT().
  1773. If StartBit is greater than 7, then ASSERT().
  1774. If EndBit is greater than 7, then ASSERT().
  1775. If EndBit is less than StartBit, then ASSERT().
  1776. If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1777. @param Operand Operand on which to perform the bitfield operation.
  1778. @param StartBit The ordinal of the least significant bit in the bit field.
  1779. Range 0..7.
  1780. @param EndBit The ordinal of the most significant bit in the bit field.
  1781. Range 0..7.
  1782. @param Value New value of the bit field.
  1783. @return The new 8-bit value.
  1784. **/
  1785. UINT8
  1786. EFIAPI
  1787. BitFieldWrite8 (
  1788. IN UINT8 Operand,
  1789. IN UINTN StartBit,
  1790. IN UINTN EndBit,
  1791. IN UINT8 Value
  1792. );
  1793. /**
  1794. Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
  1795. result.
  1796. Performs a bitwise OR between the bit field specified by StartBit
  1797. and EndBit in Operand and the value specified by OrData. All other bits in
  1798. Operand are preserved. The new 8-bit value is returned.
  1799. If 8-bit operations are not supported, then ASSERT().
  1800. If StartBit is greater than 7, then ASSERT().
  1801. If EndBit is greater than 7, then ASSERT().
  1802. If EndBit is less than StartBit, then ASSERT().
  1803. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1804. @param Operand Operand on which to perform the bitfield operation.
  1805. @param StartBit The ordinal of the least significant bit in the bit field.
  1806. Range 0..7.
  1807. @param EndBit The ordinal of the most significant bit in the bit field.
  1808. Range 0..7.
  1809. @param OrData The value to OR with the read value from the value
  1810. @return The new 8-bit value.
  1811. **/
  1812. UINT8
  1813. EFIAPI
  1814. BitFieldOr8 (
  1815. IN UINT8 Operand,
  1816. IN UINTN StartBit,
  1817. IN UINTN EndBit,
  1818. IN UINT8 OrData
  1819. );
  1820. /**
  1821. Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
  1822. the result.
  1823. Performs a bitwise AND between the bit field specified by StartBit and EndBit
  1824. in Operand and the value specified by AndData. All other bits in Operand are
  1825. preserved. The new 8-bit value is returned.
  1826. If 8-bit operations are not supported, then ASSERT().
  1827. If StartBit is greater than 7, then ASSERT().
  1828. If EndBit is greater than 7, then ASSERT().
  1829. If EndBit is less than StartBit, then ASSERT().
  1830. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1831. @param Operand Operand on which to perform the bitfield operation.
  1832. @param StartBit The ordinal of the least significant bit in the bit field.
  1833. Range 0..7.
  1834. @param EndBit The ordinal of the most significant bit in the bit field.
  1835. Range 0..7.
  1836. @param AndData The value to AND with the read value from the value.
  1837. @return The new 8-bit value.
  1838. **/
  1839. UINT8
  1840. EFIAPI
  1841. BitFieldAnd8 (
  1842. IN UINT8 Operand,
  1843. IN UINTN StartBit,
  1844. IN UINTN EndBit,
  1845. IN UINT8 AndData
  1846. );
  1847. /**
  1848. Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
  1849. bitwise OR, and returns the result.
  1850. Performs a bitwise AND between the bit field specified by StartBit and EndBit
  1851. in Operand and the value specified by AndData, followed by a bitwise
  1852. OR with value specified by OrData. All other bits in Operand are
  1853. preserved. The new 8-bit value is returned.
  1854. If 8-bit operations are not supported, then ASSERT().
  1855. If StartBit is greater than 7, then ASSERT().
  1856. If EndBit is greater than 7, then ASSERT().
  1857. If EndBit is less than StartBit, then ASSERT().
  1858. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1859. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1860. @param Operand Operand on which to perform the bitfield operation.
  1861. @param StartBit The ordinal of the least significant bit in the bit field.
  1862. Range 0..7.
  1863. @param EndBit The ordinal of the most significant bit in the bit field.
  1864. Range 0..7.
  1865. @param AndData The value to AND with the read value from the value.
  1866. @param OrData The value to OR with the result of the AND operation.
  1867. @return The new 8-bit value.
  1868. **/
  1869. UINT8
  1870. EFIAPI
  1871. BitFieldAndThenOr8 (
  1872. IN UINT8 Operand,
  1873. IN UINTN StartBit,
  1874. IN UINTN EndBit,
  1875. IN UINT8 AndData,
  1876. IN UINT8 OrData
  1877. );
  1878. /**
  1879. Returns a bit field from a 16-bit value.
  1880. Returns the bitfield specified by the StartBit and the EndBit from Operand.
  1881. If 16-bit operations are not supported, then ASSERT().
  1882. If StartBit is greater than 15, then ASSERT().
  1883. If EndBit is greater than 15, then ASSERT().
  1884. If EndBit is less than StartBit, then ASSERT().
  1885. @param Operand Operand on which to perform the bitfield operation.
  1886. @param StartBit The ordinal of the least significant bit in the bit field.
  1887. Range 0..15.
  1888. @param EndBit The ordinal of the most significant bit in the bit field.
  1889. Range 0..15.
  1890. @return The bit field read.
  1891. **/
  1892. UINT16
  1893. EFIAPI
  1894. BitFieldRead16 (
  1895. IN UINT16 Operand,
  1896. IN UINTN StartBit,
  1897. IN UINTN EndBit
  1898. );
  1899. /**
  1900. Writes a bit field to a 16-bit value, and returns the result.
  1901. Writes Value to the bit field specified by the StartBit and the EndBit in
  1902. Operand. All other bits in Operand are preserved. The new 16-bit value is
  1903. returned.
  1904. If 16-bit operations are not supported, then ASSERT().
  1905. If StartBit is greater than 15, then ASSERT().
  1906. If EndBit is greater than 15, then ASSERT().
  1907. If EndBit is less than StartBit, then ASSERT().
  1908. If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1909. @param Operand Operand on which to perform the bitfield operation.
  1910. @param StartBit The ordinal of the least significant bit in the bit field.
  1911. Range 0..15.
  1912. @param EndBit The ordinal of the most significant bit in the bit field.
  1913. Range 0..15.
  1914. @param Value New value of the bit field.
  1915. @return The new 16-bit value.
  1916. **/
  1917. UINT16
  1918. EFIAPI
  1919. BitFieldWrite16 (
  1920. IN UINT16 Operand,
  1921. IN UINTN StartBit,
  1922. IN UINTN EndBit,
  1923. IN UINT16 Value
  1924. );
  1925. /**
  1926. Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
  1927. result.
  1928. Performs a bitwise OR between the bit field specified by StartBit
  1929. and EndBit in Operand and the value specified by OrData. All other bits in
  1930. Operand are preserved. The new 16-bit value is returned.
  1931. If 16-bit operations are not supported, then ASSERT().
  1932. If StartBit is greater than 15, then ASSERT().
  1933. If EndBit is greater than 15, then ASSERT().
  1934. If EndBit is less than StartBit, then ASSERT().
  1935. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1936. @param Operand Operand on which to perform the bitfield operation.
  1937. @param StartBit The ordinal of the least significant bit in the bit field.
  1938. Range 0..15.
  1939. @param EndBit The ordinal of the most significant bit in the bit field.
  1940. Range 0..15.
  1941. @param OrData The value to OR with the read value from the value
  1942. @return The new 16-bit value.
  1943. **/
  1944. UINT16
  1945. EFIAPI
  1946. BitFieldOr16 (
  1947. IN UINT16 Operand,
  1948. IN UINTN StartBit,
  1949. IN UINTN EndBit,
  1950. IN UINT16 OrData
  1951. );
  1952. /**
  1953. Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
  1954. the result.
  1955. Performs a bitwise AND between the bit field specified by StartBit and EndBit
  1956. in Operand and the value specified by AndData. All other bits in Operand are
  1957. preserved. The new 16-bit value is returned.
  1958. If 16-bit operations are not supported, then ASSERT().
  1959. If StartBit is greater than 15, then ASSERT().
  1960. If EndBit is greater than 15, then ASSERT().
  1961. If EndBit is less than StartBit, then ASSERT().
  1962. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1963. @param Operand Operand on which to perform the bitfield operation.
  1964. @param StartBit The ordinal of the least significant bit in the bit field.
  1965. Range 0..15.
  1966. @param EndBit The ordinal of the most significant bit in the bit field.
  1967. Range 0..15.
  1968. @param AndData The value to AND with the read value from the value
  1969. @return The new 16-bit value.
  1970. **/
  1971. UINT16
  1972. EFIAPI
  1973. BitFieldAnd16 (
  1974. IN UINT16 Operand,
  1975. IN UINTN StartBit,
  1976. IN UINTN EndBit,
  1977. IN UINT16 AndData
  1978. );
  1979. /**
  1980. Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
  1981. bitwise OR, and returns the result.
  1982. Performs a bitwise AND between the bit field specified by StartBit and EndBit
  1983. in Operand and the value specified by AndData, followed by a bitwise
  1984. OR with value specified by OrData. All other bits in Operand are
  1985. preserved. The new 16-bit value is returned.
  1986. If 16-bit operations are not supported, then ASSERT().
  1987. If StartBit is greater than 15, then ASSERT().
  1988. If EndBit is greater than 15, then ASSERT().
  1989. If EndBit is less than StartBit, then ASSERT().
  1990. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1991. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  1992. @param Operand Operand on which to perform the bitfield operation.
  1993. @param StartBit The ordinal of the least significant bit in the bit field.
  1994. Range 0..15.
  1995. @param EndBit The ordinal of the most significant bit in the bit field.
  1996. Range 0..15.
  1997. @param AndData The value to AND with the read value from the value.
  1998. @param OrData The value to OR with the result of the AND operation.
  1999. @return The new 16-bit value.
  2000. **/
  2001. UINT16
  2002. EFIAPI
  2003. BitFieldAndThenOr16 (
  2004. IN UINT16 Operand,
  2005. IN UINTN StartBit,
  2006. IN UINTN EndBit,
  2007. IN UINT16 AndData,
  2008. IN UINT16 OrData
  2009. );
  2010. /**
  2011. Returns a bit field from a 32-bit value.
  2012. Returns the bitfield specified by the StartBit and the EndBit from Operand.
  2013. If 32-bit operations are not supported, then ASSERT().
  2014. If StartBit is greater than 31, then ASSERT().
  2015. If EndBit is greater than 31, then ASSERT().
  2016. If EndBit is less than StartBit, then ASSERT().
  2017. @param Operand Operand on which to perform the bitfield operation.
  2018. @param StartBit The ordinal of the least significant bit in the bit field.
  2019. Range 0..31.
  2020. @param EndBit The ordinal of the most significant bit in the bit field.
  2021. Range 0..31.
  2022. @return The bit field read.
  2023. **/
  2024. UINT32
  2025. EFIAPI
  2026. BitFieldRead32 (
  2027. IN UINT32 Operand,
  2028. IN UINTN StartBit,
  2029. IN UINTN EndBit
  2030. );
  2031. /**
  2032. Writes a bit field to a 32-bit value, and returns the result.
  2033. Writes Value to the bit field specified by the StartBit and the EndBit in
  2034. Operand. All other bits in Operand are preserved. The new 32-bit value is
  2035. returned.
  2036. If 32-bit operations are not supported, then ASSERT().
  2037. If StartBit is greater than 31, then ASSERT().
  2038. If EndBit is greater than 31, then ASSERT().
  2039. If EndBit is less than StartBit, then ASSERT().
  2040. If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2041. @param Operand Operand on which to perform the bitfield operation.
  2042. @param StartBit The ordinal of the least significant bit in the bit field.
  2043. Range 0..31.
  2044. @param EndBit The ordinal of the most significant bit in the bit field.
  2045. Range 0..31.
  2046. @param Value New value of the bit field.
  2047. @return The new 32-bit value.
  2048. **/
  2049. UINT32
  2050. EFIAPI
  2051. BitFieldWrite32 (
  2052. IN UINT32 Operand,
  2053. IN UINTN StartBit,
  2054. IN UINTN EndBit,
  2055. IN UINT32 Value
  2056. );
  2057. /**
  2058. Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
  2059. result.
  2060. Performs a bitwise OR between the bit field specified by StartBit
  2061. and EndBit in Operand and the value specified by OrData. All other bits in
  2062. Operand are preserved. The new 32-bit value is returned.
  2063. If 32-bit operations are not supported, then ASSERT().
  2064. If StartBit is greater than 31, then ASSERT().
  2065. If EndBit is greater than 31, then ASSERT().
  2066. If EndBit is less than StartBit, then ASSERT().
  2067. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2068. @param Operand Operand on which to perform the bitfield operation.
  2069. @param StartBit The ordinal of the least significant bit in the bit field.
  2070. Range 0..31.
  2071. @param EndBit The ordinal of the most significant bit in the bit field.
  2072. Range 0..31.
  2073. @param OrData The value to OR with the read value from the value.
  2074. @return The new 32-bit value.
  2075. **/
  2076. UINT32
  2077. EFIAPI
  2078. BitFieldOr32 (
  2079. IN UINT32 Operand,
  2080. IN UINTN StartBit,
  2081. IN UINTN EndBit,
  2082. IN UINT32 OrData
  2083. );
  2084. /**
  2085. Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
  2086. the result.
  2087. Performs a bitwise AND between the bit field specified by StartBit and EndBit
  2088. in Operand and the value specified by AndData. All other bits in Operand are
  2089. preserved. The new 32-bit value is returned.
  2090. If 32-bit operations are not supported, then ASSERT().
  2091. If StartBit is greater than 31, then ASSERT().
  2092. If EndBit is greater than 31, then ASSERT().
  2093. If EndBit is less than StartBit, then ASSERT().
  2094. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2095. @param Operand Operand on which to perform the bitfield operation.
  2096. @param StartBit The ordinal of the least significant bit in the bit field.
  2097. Range 0..31.
  2098. @param EndBit The ordinal of the most significant bit in the bit field.
  2099. Range 0..31.
  2100. @param AndData The value to AND with the read value from the value
  2101. @return The new 32-bit value.
  2102. **/
  2103. UINT32
  2104. EFIAPI
  2105. BitFieldAnd32 (
  2106. IN UINT32 Operand,
  2107. IN UINTN StartBit,
  2108. IN UINTN EndBit,
  2109. IN UINT32 AndData
  2110. );
  2111. /**
  2112. Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
  2113. bitwise OR, and returns the result.
  2114. Performs a bitwise AND between the bit field specified by StartBit and EndBit
  2115. in Operand and the value specified by AndData, followed by a bitwise
  2116. OR with value specified by OrData. All other bits in Operand are
  2117. preserved. The new 32-bit value is returned.
  2118. If 32-bit operations are not supported, then ASSERT().
  2119. If StartBit is greater than 31, then ASSERT().
  2120. If EndBit is greater than 31, then ASSERT().
  2121. If EndBit is less than StartBit, then ASSERT().
  2122. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2123. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2124. @param Operand Operand on which to perform the bitfield operation.
  2125. @param StartBit The ordinal of the least significant bit in the bit field.
  2126. Range 0..31.
  2127. @param EndBit The ordinal of the most significant bit in the bit field.
  2128. Range 0..31.
  2129. @param AndData The value to AND with the read value from the value.
  2130. @param OrData The value to OR with the result of the AND operation.
  2131. @return The new 32-bit value.
  2132. **/
  2133. UINT32
  2134. EFIAPI
  2135. BitFieldAndThenOr32 (
  2136. IN UINT32 Operand,
  2137. IN UINTN StartBit,
  2138. IN UINTN EndBit,
  2139. IN UINT32 AndData,
  2140. IN UINT32 OrData
  2141. );
  2142. /**
  2143. Returns a bit field from a 64-bit value.
  2144. Returns the bitfield specified by the StartBit and the EndBit from Operand.
  2145. If 64-bit operations are not supported, then ASSERT().
  2146. If StartBit is greater than 63, then ASSERT().
  2147. If EndBit is greater than 63, then ASSERT().
  2148. If EndBit is less than StartBit, then ASSERT().
  2149. @param Operand Operand on which to perform the bitfield operation.
  2150. @param StartBit The ordinal of the least significant bit in the bit field.
  2151. Range 0..63.
  2152. @param EndBit The ordinal of the most significant bit in the bit field.
  2153. Range 0..63.
  2154. @return The bit field read.
  2155. **/
  2156. UINT64
  2157. EFIAPI
  2158. BitFieldRead64 (
  2159. IN UINT64 Operand,
  2160. IN UINTN StartBit,
  2161. IN UINTN EndBit
  2162. );
  2163. /**
  2164. Writes a bit field to a 64-bit value, and returns the result.
  2165. Writes Value to the bit field specified by the StartBit and the EndBit in
  2166. Operand. All other bits in Operand are preserved. The new 64-bit value is
  2167. returned.
  2168. If 64-bit operations are not supported, then ASSERT().
  2169. If StartBit is greater than 63, then ASSERT().
  2170. If EndBit is greater than 63, then ASSERT().
  2171. If EndBit is less than StartBit, then ASSERT().
  2172. If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2173. @param Operand Operand on which to perform the bitfield operation.
  2174. @param StartBit The ordinal of the least significant bit in the bit field.
  2175. Range 0..63.
  2176. @param EndBit The ordinal of the most significant bit in the bit field.
  2177. Range 0..63.
  2178. @param Value New value of the bit field.
  2179. @return The new 64-bit value.
  2180. **/
  2181. UINT64
  2182. EFIAPI
  2183. BitFieldWrite64 (
  2184. IN UINT64 Operand,
  2185. IN UINTN StartBit,
  2186. IN UINTN EndBit,
  2187. IN UINT64 Value
  2188. );
  2189. /**
  2190. Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
  2191. result.
  2192. Performs a bitwise OR between the bit field specified by StartBit
  2193. and EndBit in Operand and the value specified by OrData. All other bits in
  2194. Operand are preserved. The new 64-bit value is returned.
  2195. If 64-bit operations are not supported, then ASSERT().
  2196. If StartBit is greater than 63, then ASSERT().
  2197. If EndBit is greater than 63, then ASSERT().
  2198. If EndBit is less than StartBit, then ASSERT().
  2199. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2200. @param Operand Operand on which to perform the bitfield operation.
  2201. @param StartBit The ordinal of the least significant bit in the bit field.
  2202. Range 0..63.
  2203. @param EndBit The ordinal of the most significant bit in the bit field.
  2204. Range 0..63.
  2205. @param OrData The value to OR with the read value from the value
  2206. @return The new 64-bit value.
  2207. **/
  2208. UINT64
  2209. EFIAPI
  2210. BitFieldOr64 (
  2211. IN UINT64 Operand,
  2212. IN UINTN StartBit,
  2213. IN UINTN EndBit,
  2214. IN UINT64 OrData
  2215. );
  2216. /**
  2217. Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
  2218. the result.
  2219. Performs a bitwise AND between the bit field specified by StartBit and EndBit
  2220. in Operand and the value specified by AndData. All other bits in Operand are
  2221. preserved. The new 64-bit value is returned.
  2222. If 64-bit operations are not supported, then ASSERT().
  2223. If StartBit is greater than 63, then ASSERT().
  2224. If EndBit is greater than 63, then ASSERT().
  2225. If EndBit is less than StartBit, then ASSERT().
  2226. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2227. @param Operand Operand on which to perform the bitfield operation.
  2228. @param StartBit The ordinal of the least significant bit in the bit field.
  2229. Range 0..63.
  2230. @param EndBit The ordinal of the most significant bit in the bit field.
  2231. Range 0..63.
  2232. @param AndData The value to AND with the read value from the value
  2233. @return The new 64-bit value.
  2234. **/
  2235. UINT64
  2236. EFIAPI
  2237. BitFieldAnd64 (
  2238. IN UINT64 Operand,
  2239. IN UINTN StartBit,
  2240. IN UINTN EndBit,
  2241. IN UINT64 AndData
  2242. );
  2243. /**
  2244. Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
  2245. bitwise OR, and returns the result.
  2246. Performs a bitwise AND between the bit field specified by StartBit and EndBit
  2247. in Operand and the value specified by AndData, followed by a bitwise
  2248. OR with value specified by OrData. All other bits in Operand are
  2249. preserved. The new 64-bit value is returned.
  2250. If 64-bit operations are not supported, then ASSERT().
  2251. If StartBit is greater than 63, then ASSERT().
  2252. If EndBit is greater than 63, then ASSERT().
  2253. If EndBit is less than StartBit, then ASSERT().
  2254. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2255. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  2256. @param Operand Operand on which to perform the bitfield operation.
  2257. @param StartBit The ordinal of the least significant bit in the bit field.
  2258. Range 0..63.
  2259. @param EndBit The ordinal of the most significant bit in the bit field.
  2260. Range 0..63.
  2261. @param AndData The value to AND with the read value from the value.
  2262. @param OrData The value to OR with the result of the AND operation.
  2263. @return The new 64-bit value.
  2264. **/
  2265. UINT64
  2266. EFIAPI
  2267. BitFieldAndThenOr64 (
  2268. IN UINT64 Operand,
  2269. IN UINTN StartBit,
  2270. IN UINTN EndBit,
  2271. IN UINT64 AndData,
  2272. IN UINT64 OrData
  2273. );
  2274. //
  2275. // Base Library Checksum Functions
  2276. //
  2277. /**
  2278. Returns the sum of all elements in a buffer in unit of UINT8.
  2279. During calculation, the carry bits are dropped.
  2280. This function calculates the sum of all elements in a buffer
  2281. in unit of UINT8. The carry bits in result of addition are dropped.
  2282. The result is returned as UINT8. If Length is Zero, then Zero is
  2283. returned.
  2284. If Buffer is NULL, then ASSERT().
  2285. If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
  2286. @param Buffer The pointer to the buffer to carry out the sum operation.
  2287. @param Length The size, in bytes, of Buffer.
  2288. @return Sum The sum of Buffer with carry bits dropped during additions.
  2289. **/
  2290. UINT8
  2291. EFIAPI
  2292. CalculateSum8 (
  2293. IN CONST UINT8 *Buffer,
  2294. IN UINTN Length
  2295. );
  2296. /**
  2297. Returns the two's complement checksum of all elements in a buffer
  2298. of 8-bit values.
  2299. This function first calculates the sum of the 8-bit values in the
  2300. buffer specified by Buffer and Length. The carry bits in the result
  2301. of addition are dropped. Then, the two's complement of the sum is
  2302. returned. If Length is 0, then 0 is returned.
  2303. If Buffer is NULL, then ASSERT().
  2304. If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
  2305. @param Buffer The pointer to the buffer to carry out the checksum operation.
  2306. @param Length The size, in bytes, of Buffer.
  2307. @return Checksum The two's complement checksum of Buffer.
  2308. **/
  2309. UINT8
  2310. EFIAPI
  2311. CalculateCheckSum8 (
  2312. IN CONST UINT8 *Buffer,
  2313. IN UINTN Length
  2314. );
  2315. /**
  2316. Returns the sum of all elements in a buffer of 16-bit values. During
  2317. calculation, the carry bits are dropped.
  2318. This function calculates the sum of the 16-bit values in the buffer
  2319. specified by Buffer and Length. The carry bits in result of addition are dropped.
  2320. The 16-bit result is returned. If Length is 0, then 0 is returned.
  2321. If Buffer is NULL, then ASSERT().
  2322. If Buffer is not aligned on a 16-bit boundary, then ASSERT().
  2323. If Length is not aligned on a 16-bit boundary, then ASSERT().
  2324. If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
  2325. @param Buffer The pointer to the buffer to carry out the sum operation.
  2326. @param Length The size, in bytes, of Buffer.
  2327. @return Sum The sum of Buffer with carry bits dropped during additions.
  2328. **/
  2329. UINT16
  2330. EFIAPI
  2331. CalculateSum16 (
  2332. IN CONST UINT16 *Buffer,
  2333. IN UINTN Length
  2334. );
  2335. /**
  2336. Returns the two's complement checksum of all elements in a buffer of
  2337. 16-bit values.
  2338. This function first calculates the sum of the 16-bit values in the buffer
  2339. specified by Buffer and Length. The carry bits in the result of addition
  2340. are dropped. Then, the two's complement of the sum is returned. If Length
  2341. is 0, then 0 is returned.
  2342. If Buffer is NULL, then ASSERT().
  2343. If Buffer is not aligned on a 16-bit boundary, then ASSERT().
  2344. If Length is not aligned on a 16-bit boundary, then ASSERT().
  2345. If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
  2346. @param Buffer The pointer to the buffer to carry out the checksum operation.
  2347. @param Length The size, in bytes, of Buffer.
  2348. @return Checksum The two's complement checksum of Buffer.
  2349. **/
  2350. UINT16
  2351. EFIAPI
  2352. CalculateCheckSum16 (
  2353. IN CONST UINT16 *Buffer,
  2354. IN UINTN Length
  2355. );
  2356. /**
  2357. Returns the sum of all elements in a buffer of 32-bit values. During
  2358. calculation, the carry bits are dropped.
  2359. This function calculates the sum of the 32-bit values in the buffer
  2360. specified by Buffer and Length. The carry bits in result of addition are dropped.
  2361. The 32-bit result is returned. If Length is 0, then 0 is returned.
  2362. If Buffer is NULL, then ASSERT().
  2363. If Buffer is not aligned on a 32-bit boundary, then ASSERT().
  2364. If Length is not aligned on a 32-bit boundary, then ASSERT().
  2365. If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
  2366. @param Buffer The pointer to the buffer to carry out the sum operation.
  2367. @param Length The size, in bytes, of Buffer.
  2368. @return Sum The sum of Buffer with carry bits dropped during additions.
  2369. **/
  2370. UINT32
  2371. EFIAPI
  2372. CalculateSum32 (
  2373. IN CONST UINT32 *Buffer,
  2374. IN UINTN Length
  2375. );
  2376. /**
  2377. Returns the two's complement checksum of all elements in a buffer of
  2378. 32-bit values.
  2379. This function first calculates the sum of the 32-bit values in the buffer
  2380. specified by Buffer and Length. The carry bits in the result of addition
  2381. are dropped. Then, the two's complement of the sum is returned. If Length
  2382. is 0, then 0 is returned.
  2383. If Buffer is NULL, then ASSERT().
  2384. If Buffer is not aligned on a 32-bit boundary, then ASSERT().
  2385. If Length is not aligned on a 32-bit boundary, then ASSERT().
  2386. If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
  2387. @param Buffer The pointer to the buffer to carry out the checksum operation.
  2388. @param Length The size, in bytes, of Buffer.
  2389. @return Checksum The two's complement checksum of Buffer.
  2390. **/
  2391. UINT32
  2392. EFIAPI
  2393. CalculateCheckSum32 (
  2394. IN CONST UINT32 *Buffer,
  2395. IN UINTN Length
  2396. );
  2397. /**
  2398. Returns the sum of all elements in a buffer of 64-bit values. During
  2399. calculation, the carry bits are dropped.
  2400. This function calculates the sum of the 64-bit values in the buffer
  2401. specified by Buffer and Length. The carry bits in result of addition are dropped.
  2402. The 64-bit result is returned. If Length is 0, then 0 is returned.
  2403. If Buffer is NULL, then ASSERT().
  2404. If Buffer is not aligned on a 64-bit boundary, then ASSERT().
  2405. If Length is not aligned on a 64-bit boundary, then ASSERT().
  2406. If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
  2407. @param Buffer The pointer to the buffer to carry out the sum operation.
  2408. @param Length The size, in bytes, of Buffer.
  2409. @return Sum The sum of Buffer with carry bits dropped during additions.
  2410. **/
  2411. UINT64
  2412. EFIAPI
  2413. CalculateSum64 (
  2414. IN CONST UINT64 *Buffer,
  2415. IN UINTN Length
  2416. );
  2417. /**
  2418. Returns the two's complement checksum of all elements in a buffer of
  2419. 64-bit values.
  2420. This function first calculates the sum of the 64-bit values in the buffer
  2421. specified by Buffer and Length. The carry bits in the result of addition
  2422. are dropped. Then, the two's complement of the sum is returned. If Length
  2423. is 0, then 0 is returned.
  2424. If Buffer is NULL, then ASSERT().
  2425. If Buffer is not aligned on a 64-bit boundary, then ASSERT().
  2426. If Length is not aligned on a 64-bit boundary, then ASSERT().
  2427. If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
  2428. @param Buffer The pointer to the buffer to carry out the checksum operation.
  2429. @param Length The size, in bytes, of Buffer.
  2430. @return Checksum The two's complement checksum of Buffer.
  2431. **/
  2432. UINT64
  2433. EFIAPI
  2434. CalculateCheckSum64 (
  2435. IN CONST UINT64 *Buffer,
  2436. IN UINTN Length
  2437. );
  2438. //
  2439. // Base Library CPU Functions
  2440. //
  2441. /**
  2442. Function entry point used when a stack switch is requested with SwitchStack()
  2443. @param Context1 Context1 parameter passed into SwitchStack().
  2444. @param Context2 Context2 parameter passed into SwitchStack().
  2445. **/
  2446. typedef
  2447. VOID
  2448. (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
  2449. IN VOID *Context1, OPTIONAL
  2450. IN VOID *Context2 OPTIONAL
  2451. );
  2452. /**
  2453. Used to serialize load and store operations.
  2454. All loads and stores that proceed calls to this function are guaranteed to be
  2455. globally visible when this function returns.
  2456. **/
  2457. VOID
  2458. EFIAPI
  2459. MemoryFence (
  2460. VOID
  2461. );
  2462. /**
  2463. Saves the current CPU context that can be restored with a call to LongJump()
  2464. and returns 0.
  2465. Saves the current CPU context in the buffer specified by JumpBuffer and
  2466. returns 0. The initial call to SetJump() must always return 0. Subsequent
  2467. calls to LongJump() cause a non-zero value to be returned by SetJump().
  2468. If JumpBuffer is NULL, then ASSERT().
  2469. For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
  2470. NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
  2471. The same structure must never be used for more than one CPU architecture context.
  2472. For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
  2473. SetJump()/LongJump() is not currently supported for the EBC processor type.
  2474. @param JumpBuffer A pointer to CPU context buffer.
  2475. @retval 0 Indicates a return from SetJump().
  2476. **/
  2477. UINTN
  2478. EFIAPI
  2479. SetJump (
  2480. OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
  2481. );
  2482. /**
  2483. Restores the CPU context that was saved with SetJump().
  2484. Restores the CPU context from the buffer specified by JumpBuffer. This
  2485. function never returns to the caller. Instead is resumes execution based on
  2486. the state of JumpBuffer.
  2487. If JumpBuffer is NULL, then ASSERT().
  2488. For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
  2489. If Value is 0, then ASSERT().
  2490. @param JumpBuffer A pointer to CPU context buffer.
  2491. @param Value The value to return when the SetJump() context is
  2492. restored and must be non-zero.
  2493. **/
  2494. VOID
  2495. EFIAPI
  2496. LongJump (
  2497. IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
  2498. IN UINTN Value
  2499. );
  2500. /**
  2501. Enables CPU interrupts.
  2502. **/
  2503. VOID
  2504. EFIAPI
  2505. EnableInterrupts (
  2506. VOID
  2507. );
  2508. /**
  2509. Disables CPU interrupts.
  2510. **/
  2511. VOID
  2512. EFIAPI
  2513. DisableInterrupts (
  2514. VOID
  2515. );
  2516. /**
  2517. Disables CPU interrupts and returns the interrupt state prior to the disable
  2518. operation.
  2519. @retval TRUE CPU interrupts were enabled on entry to this call.
  2520. @retval FALSE CPU interrupts were disabled on entry to this call.
  2521. **/
  2522. BOOLEAN
  2523. EFIAPI
  2524. SaveAndDisableInterrupts (
  2525. VOID
  2526. );
  2527. /**
  2528. Enables CPU interrupts for the smallest window required to capture any
  2529. pending interrupts.
  2530. **/
  2531. VOID
  2532. EFIAPI
  2533. EnableDisableInterrupts (
  2534. VOID
  2535. );
  2536. /**
  2537. Retrieves the current CPU interrupt state.
  2538. Returns TRUE if interrupts are currently enabled. Otherwise
  2539. returns FALSE.
  2540. @retval TRUE CPU interrupts are enabled.
  2541. @retval FALSE CPU interrupts are disabled.
  2542. **/
  2543. BOOLEAN
  2544. EFIAPI
  2545. GetInterruptState (
  2546. VOID
  2547. );
  2548. /**
  2549. Set the current CPU interrupt state.
  2550. Sets the current CPU interrupt state to the state specified by
  2551. InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
  2552. InterruptState is FALSE, then interrupts are disabled. InterruptState is
  2553. returned.
  2554. @param InterruptState TRUE if interrupts should enabled. FALSE if
  2555. interrupts should be disabled.
  2556. @return InterruptState
  2557. **/
  2558. BOOLEAN
  2559. EFIAPI
  2560. SetInterruptState (
  2561. IN BOOLEAN InterruptState
  2562. );
  2563. /**
  2564. Requests CPU to pause for a short period of time.
  2565. Requests CPU to pause for a short period of time. Typically used in MP
  2566. systems to prevent memory starvation while waiting for a spin lock.
  2567. **/
  2568. VOID
  2569. EFIAPI
  2570. CpuPause (
  2571. VOID
  2572. );
  2573. /**
  2574. Transfers control to a function starting with a new stack.
  2575. Transfers control to the function specified by EntryPoint using the
  2576. new stack specified by NewStack and passing in the parameters specified
  2577. by Context1 and Context2. Context1 and Context2 are optional and may
  2578. be NULL. The function EntryPoint must never return. This function
  2579. supports a variable number of arguments following the NewStack parameter.
  2580. These additional arguments are ignored on IA-32, x64, and EBC architectures.
  2581. Itanium processors expect one additional parameter of type VOID * that specifies
  2582. the new backing store pointer.
  2583. If EntryPoint is NULL, then ASSERT().
  2584. If NewStack is NULL, then ASSERT().
  2585. @param EntryPoint A pointer to function to call with the new stack.
  2586. @param Context1 A pointer to the context to pass into the EntryPoint
  2587. function.
  2588. @param Context2 A pointer to the context to pass into the EntryPoint
  2589. function.
  2590. @param NewStack A pointer to the new stack to use for the EntryPoint
  2591. function.
  2592. @param ... This variable argument list is ignored for IA-32, x64, and
  2593. EBC architectures. For Itanium processors, this variable
  2594. argument list is expected to contain a single parameter of
  2595. type VOID * that specifies the new backing store pointer.
  2596. **/
  2597. VOID
  2598. EFIAPI
  2599. SwitchStack (
  2600. IN SWITCH_STACK_ENTRY_POINT EntryPoint,
  2601. IN VOID *Context1, OPTIONAL
  2602. IN VOID *Context2, OPTIONAL
  2603. IN VOID *NewStack,
  2604. ...
  2605. );
  2606. /**
  2607. Generates a breakpoint on the CPU.
  2608. Generates a breakpoint on the CPU. The breakpoint must be implemented such
  2609. that code can resume normal execution after the breakpoint.
  2610. **/
  2611. VOID
  2612. EFIAPI
  2613. CpuBreakpoint (
  2614. VOID
  2615. );
  2616. /**
  2617. Executes an infinite loop.
  2618. Forces the CPU to execute an infinite loop. A debugger may be used to skip
  2619. past the loop and the code that follows the loop must execute properly. This
  2620. implies that the infinite loop must not cause the code that follow it to be
  2621. optimized away.
  2622. **/
  2623. VOID
  2624. EFIAPI
  2625. CpuDeadLoop (
  2626. VOID
  2627. );
  2628. #if defined (MDE_CPU_IPF)
  2629. /**
  2630. Flush a range of cache lines in the cache coherency domain of the calling
  2631. CPU.
  2632. Flushes the cache lines specified by Address and Length. If Address is not aligned
  2633. on a cache line boundary, then entire cache line containing Address is flushed.
  2634. If Address + Length is not aligned on a cache line boundary, then the entire cache
  2635. line containing Address + Length - 1 is flushed. This function may choose to flush
  2636. the entire cache if that is more efficient than flushing the specified range. If
  2637. Length is 0, the no cache lines are flushed. Address is returned.
  2638. This function is only available on Itanium processors.
  2639. If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
  2640. @param Address The base address of the instruction lines to invalidate. If
  2641. the CPU is in a physical addressing mode, then Address is a
  2642. physical address. If the CPU is in a virtual addressing mode,
  2643. then Address is a virtual address.
  2644. @param Length The number of bytes to invalidate from the instruction cache.
  2645. @return Address.
  2646. **/
  2647. VOID *
  2648. EFIAPI
  2649. AsmFlushCacheRange (
  2650. IN VOID *Address,
  2651. IN UINTN Length
  2652. );
  2653. /**
  2654. Executes an FC instruction.
  2655. Executes an FC instruction on the cache line specified by Address.
  2656. The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
  2657. An implementation may flush a larger region. This function is only available on Itanium processors.
  2658. @param Address The Address of cache line to be flushed.
  2659. @return The address of FC instruction executed.
  2660. **/
  2661. UINT64
  2662. EFIAPI
  2663. AsmFc (
  2664. IN UINT64 Address
  2665. );
  2666. /**
  2667. Executes an FC.I instruction.
  2668. Executes an FC.I instruction on the cache line specified by Address.
  2669. The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
  2670. An implementation may flush a larger region. This function is only available on Itanium processors.
  2671. @param Address The Address of cache line to be flushed.
  2672. @return The address of the FC.I instruction executed.
  2673. **/
  2674. UINT64
  2675. EFIAPI
  2676. AsmFci (
  2677. IN UINT64 Address
  2678. );
  2679. /**
  2680. Reads the current value of a Processor Identifier Register (CPUID).
  2681. Reads and returns the current value of Processor Identifier Register specified by Index.
  2682. The Index of largest implemented CPUID (One less than the number of implemented CPUID
  2683. registers) is determined by CPUID [3] bits {7:0}.
  2684. No parameter checking is performed on Index. If the Index value is beyond the
  2685. implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
  2686. must either guarantee that Index is valid, or the caller must set up fault handlers to
  2687. catch the faults. This function is only available on Itanium processors.
  2688. @param Index The 8-bit Processor Identifier Register index to read.
  2689. @return The current value of Processor Identifier Register specified by Index.
  2690. **/
  2691. UINT64
  2692. EFIAPI
  2693. AsmReadCpuid (
  2694. IN UINT8 Index
  2695. );
  2696. /**
  2697. Reads the current value of 64-bit Processor Status Register (PSR).
  2698. This function is only available on Itanium processors.
  2699. @return The current value of PSR.
  2700. **/
  2701. UINT64
  2702. EFIAPI
  2703. AsmReadPsr (
  2704. VOID
  2705. );
  2706. /**
  2707. Writes the current value of 64-bit Processor Status Register (PSR).
  2708. No parameter checking is performed on Value. All bits of Value corresponding to
  2709. reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
  2710. The caller must either guarantee that Value is valid, or the caller must set up
  2711. fault handlers to catch the faults. This function is only available on Itanium processors.
  2712. @param Value The 64-bit value to write to PSR.
  2713. @return The 64-bit value written to the PSR.
  2714. **/
  2715. UINT64
  2716. EFIAPI
  2717. AsmWritePsr (
  2718. IN UINT64 Value
  2719. );
  2720. /**
  2721. Reads the current value of 64-bit Kernel Register #0 (KR0).
  2722. Reads and returns the current value of KR0.
  2723. This function is only available on Itanium processors.
  2724. @return The current value of KR0.
  2725. **/
  2726. UINT64
  2727. EFIAPI
  2728. AsmReadKr0 (
  2729. VOID
  2730. );
  2731. /**
  2732. Reads the current value of 64-bit Kernel Register #1 (KR1).
  2733. Reads and returns the current value of KR1.
  2734. This function is only available on Itanium processors.
  2735. @return The current value of KR1.
  2736. **/
  2737. UINT64
  2738. EFIAPI
  2739. AsmReadKr1 (
  2740. VOID
  2741. );
  2742. /**
  2743. Reads the current value of 64-bit Kernel Register #2 (KR2).
  2744. Reads and returns the current value of KR2.
  2745. This function is only available on Itanium processors.
  2746. @return The current value of KR2.
  2747. **/
  2748. UINT64
  2749. EFIAPI
  2750. AsmReadKr2 (
  2751. VOID
  2752. );
  2753. /**
  2754. Reads the current value of 64-bit Kernel Register #3 (KR3).
  2755. Reads and returns the current value of KR3.
  2756. This function is only available on Itanium processors.
  2757. @return The current value of KR3.
  2758. **/
  2759. UINT64
  2760. EFIAPI
  2761. AsmReadKr3 (
  2762. VOID
  2763. );
  2764. /**
  2765. Reads the current value of 64-bit Kernel Register #4 (KR4).
  2766. Reads and returns the current value of KR4.
  2767. This function is only available on Itanium processors.
  2768. @return The current value of KR4.
  2769. **/
  2770. UINT64
  2771. EFIAPI
  2772. AsmReadKr4 (
  2773. VOID
  2774. );
  2775. /**
  2776. Reads the current value of 64-bit Kernel Register #5 (KR5).
  2777. Reads and returns the current value of KR5.
  2778. This function is only available on Itanium processors.
  2779. @return The current value of KR5.
  2780. **/
  2781. UINT64
  2782. EFIAPI
  2783. AsmReadKr5 (
  2784. VOID
  2785. );
  2786. /**
  2787. Reads the current value of 64-bit Kernel Register #6 (KR6).
  2788. Reads and returns the current value of KR6.
  2789. This function is only available on Itanium processors.
  2790. @return The current value of KR6.
  2791. **/
  2792. UINT64
  2793. EFIAPI
  2794. AsmReadKr6 (
  2795. VOID
  2796. );
  2797. /**
  2798. Reads the current value of 64-bit Kernel Register #7 (KR7).
  2799. Reads and returns the current value of KR7.
  2800. This function is only available on Itanium processors.
  2801. @return The current value of KR7.
  2802. **/
  2803. UINT64
  2804. EFIAPI
  2805. AsmReadKr7 (
  2806. VOID
  2807. );
  2808. /**
  2809. Write the current value of 64-bit Kernel Register #0 (KR0).
  2810. Writes the current value of KR0. The 64-bit value written to
  2811. the KR0 is returned. This function is only available on Itanium processors.
  2812. @param Value The 64-bit value to write to KR0.
  2813. @return The 64-bit value written to the KR0.
  2814. **/
  2815. UINT64
  2816. EFIAPI
  2817. AsmWriteKr0 (
  2818. IN UINT64 Value
  2819. );
  2820. /**
  2821. Write the current value of 64-bit Kernel Register #1 (KR1).
  2822. Writes the current value of KR1. The 64-bit value written to
  2823. the KR1 is returned. This function is only available on Itanium processors.
  2824. @param Value The 64-bit value to write to KR1.
  2825. @return The 64-bit value written to the KR1.
  2826. **/
  2827. UINT64
  2828. EFIAPI
  2829. AsmWriteKr1 (
  2830. IN UINT64 Value
  2831. );
  2832. /**
  2833. Write the current value of 64-bit Kernel Register #2 (KR2).
  2834. Writes the current value of KR2. The 64-bit value written to
  2835. the KR2 is returned. This function is only available on Itanium processors.
  2836. @param Value The 64-bit value to write to KR2.
  2837. @return The 64-bit value written to the KR2.
  2838. **/
  2839. UINT64
  2840. EFIAPI
  2841. AsmWriteKr2 (
  2842. IN UINT64 Value
  2843. );
  2844. /**
  2845. Write the current value of 64-bit Kernel Register #3 (KR3).
  2846. Writes the current value of KR3. The 64-bit value written to
  2847. the KR3 is returned. This function is only available on Itanium processors.
  2848. @param Value The 64-bit value to write to KR3.
  2849. @return The 64-bit value written to the KR3.
  2850. **/
  2851. UINT64
  2852. EFIAPI
  2853. AsmWriteKr3 (
  2854. IN UINT64 Value
  2855. );
  2856. /**
  2857. Write the current value of 64-bit Kernel Register #4 (KR4).
  2858. Writes the current value of KR4. The 64-bit value written to
  2859. the KR4 is returned. This function is only available on Itanium processors.
  2860. @param Value The 64-bit value to write to KR4.
  2861. @return The 64-bit value written to the KR4.
  2862. **/
  2863. UINT64
  2864. EFIAPI
  2865. AsmWriteKr4 (
  2866. IN UINT64 Value
  2867. );
  2868. /**
  2869. Write the current value of 64-bit Kernel Register #5 (KR5).
  2870. Writes the current value of KR5. The 64-bit value written to
  2871. the KR5 is returned. This function is only available on Itanium processors.
  2872. @param Value The 64-bit value to write to KR5.
  2873. @return The 64-bit value written to the KR5.
  2874. **/
  2875. UINT64
  2876. EFIAPI
  2877. AsmWriteKr5 (
  2878. IN UINT64 Value
  2879. );
  2880. /**
  2881. Write the current value of 64-bit Kernel Register #6 (KR6).
  2882. Writes the current value of KR6. The 64-bit value written to
  2883. the KR6 is returned. This function is only available on Itanium processors.
  2884. @param Value The 64-bit value to write to KR6.
  2885. @return The 64-bit value written to the KR6.
  2886. **/
  2887. UINT64
  2888. EFIAPI
  2889. AsmWriteKr6 (
  2890. IN UINT64 Value
  2891. );
  2892. /**
  2893. Write the current value of 64-bit Kernel Register #7 (KR7).
  2894. Writes the current value of KR7. The 64-bit value written to
  2895. the KR7 is returned. This function is only available on Itanium processors.
  2896. @param Value The 64-bit value to write to KR7.
  2897. @return The 64-bit value written to the KR7.
  2898. **/
  2899. UINT64
  2900. EFIAPI
  2901. AsmWriteKr7 (
  2902. IN UINT64 Value
  2903. );
  2904. /**
  2905. Reads the current value of Interval Timer Counter Register (ITC).
  2906. Reads and returns the current value of ITC.
  2907. This function is only available on Itanium processors.
  2908. @return The current value of ITC.
  2909. **/
  2910. UINT64
  2911. EFIAPI
  2912. AsmReadItc (
  2913. VOID
  2914. );
  2915. /**
  2916. Reads the current value of Interval Timer Vector Register (ITV).
  2917. Reads and returns the current value of ITV.
  2918. This function is only available on Itanium processors.
  2919. @return The current value of ITV.
  2920. **/
  2921. UINT64
  2922. EFIAPI
  2923. AsmReadItv (
  2924. VOID
  2925. );
  2926. /**
  2927. Reads the current value of Interval Timer Match Register (ITM).
  2928. Reads and returns the current value of ITM.
  2929. This function is only available on Itanium processors.
  2930. @return The current value of ITM.
  2931. **/
  2932. UINT64
  2933. EFIAPI
  2934. AsmReadItm (
  2935. VOID
  2936. );
  2937. /**
  2938. Writes the current value of 64-bit Interval Timer Counter Register (ITC).
  2939. Writes the current value of ITC. The 64-bit value written to the ITC is returned.
  2940. This function is only available on Itanium processors.
  2941. @param Value The 64-bit value to write to ITC.
  2942. @return The 64-bit value written to the ITC.
  2943. **/
  2944. UINT64
  2945. EFIAPI
  2946. AsmWriteItc (
  2947. IN UINT64 Value
  2948. );
  2949. /**
  2950. Writes the current value of 64-bit Interval Timer Match Register (ITM).
  2951. Writes the current value of ITM. The 64-bit value written to the ITM is returned.
  2952. This function is only available on Itanium processors.
  2953. @param Value The 64-bit value to write to ITM.
  2954. @return The 64-bit value written to the ITM.
  2955. **/
  2956. UINT64
  2957. EFIAPI
  2958. AsmWriteItm (
  2959. IN UINT64 Value
  2960. );
  2961. /**
  2962. Writes the current value of 64-bit Interval Timer Vector Register (ITV).
  2963. Writes the current value of ITV. The 64-bit value written to the ITV is returned.
  2964. No parameter checking is performed on Value. All bits of Value corresponding to
  2965. reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
  2966. The caller must either guarantee that Value is valid, or the caller must set up
  2967. fault handlers to catch the faults.
  2968. This function is only available on Itanium processors.
  2969. @param Value The 64-bit value to write to ITV.
  2970. @return The 64-bit value written to the ITV.
  2971. **/
  2972. UINT64
  2973. EFIAPI
  2974. AsmWriteItv (
  2975. IN UINT64 Value
  2976. );
  2977. /**
  2978. Reads the current value of Default Control Register (DCR).
  2979. Reads and returns the current value of DCR. This function is only available on Itanium processors.
  2980. @return The current value of DCR.
  2981. **/
  2982. UINT64
  2983. EFIAPI
  2984. AsmReadDcr (
  2985. VOID
  2986. );
  2987. /**
  2988. Reads the current value of Interruption Vector Address Register (IVA).
  2989. Reads and returns the current value of IVA. This function is only available on Itanium processors.
  2990. @return The current value of IVA.
  2991. **/
  2992. UINT64
  2993. EFIAPI
  2994. AsmReadIva (
  2995. VOID
  2996. );
  2997. /**
  2998. Reads the current value of Page Table Address Register (PTA).
  2999. Reads and returns the current value of PTA. This function is only available on Itanium processors.
  3000. @return The current value of PTA.
  3001. **/
  3002. UINT64
  3003. EFIAPI
  3004. AsmReadPta (
  3005. VOID
  3006. );
  3007. /**
  3008. Writes the current value of 64-bit Default Control Register (DCR).
  3009. Writes the current value of DCR. The 64-bit value written to the DCR is returned.
  3010. No parameter checking is performed on Value. All bits of Value corresponding to
  3011. reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
  3012. The caller must either guarantee that Value is valid, or the caller must set up
  3013. fault handlers to catch the faults.
  3014. This function is only available on Itanium processors.
  3015. @param Value The 64-bit value to write to DCR.
  3016. @return The 64-bit value written to the DCR.
  3017. **/
  3018. UINT64
  3019. EFIAPI
  3020. AsmWriteDcr (
  3021. IN UINT64 Value
  3022. );
  3023. /**
  3024. Writes the current value of 64-bit Interruption Vector Address Register (IVA).
  3025. Writes the current value of IVA. The 64-bit value written to the IVA is returned.
  3026. The size of vector table is 32 K bytes and is 32 K bytes aligned
  3027. the low 15 bits of Value is ignored when written.
  3028. This function is only available on Itanium processors.
  3029. @param Value The 64-bit value to write to IVA.
  3030. @return The 64-bit value written to the IVA.
  3031. **/
  3032. UINT64
  3033. EFIAPI
  3034. AsmWriteIva (
  3035. IN UINT64 Value
  3036. );
  3037. /**
  3038. Writes the current value of 64-bit Page Table Address Register (PTA).
  3039. Writes the current value of PTA. The 64-bit value written to the PTA is returned.
  3040. No parameter checking is performed on Value. All bits of Value corresponding to
  3041. reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
  3042. The caller must either guarantee that Value is valid, or the caller must set up
  3043. fault handlers to catch the faults.
  3044. This function is only available on Itanium processors.
  3045. @param Value The 64-bit value to write to PTA.
  3046. @return The 64-bit value written to the PTA.
  3047. **/
  3048. UINT64
  3049. EFIAPI
  3050. AsmWritePta (
  3051. IN UINT64 Value
  3052. );
  3053. /**
  3054. Reads the current value of Local Interrupt ID Register (LID).
  3055. Reads and returns the current value of LID. This function is only available on Itanium processors.
  3056. @return The current value of LID.
  3057. **/
  3058. UINT64
  3059. EFIAPI
  3060. AsmReadLid (
  3061. VOID
  3062. );
  3063. /**
  3064. Reads the current value of External Interrupt Vector Register (IVR).
  3065. Reads and returns the current value of IVR. This function is only available on Itanium processors.
  3066. @return The current value of IVR.
  3067. **/
  3068. UINT64
  3069. EFIAPI
  3070. AsmReadIvr (
  3071. VOID
  3072. );
  3073. /**
  3074. Reads the current value of Task Priority Register (TPR).
  3075. Reads and returns the current value of TPR. This function is only available on Itanium processors.
  3076. @return The current value of TPR.
  3077. **/
  3078. UINT64
  3079. EFIAPI
  3080. AsmReadTpr (
  3081. VOID
  3082. );
  3083. /**
  3084. Reads the current value of External Interrupt Request Register #0 (IRR0).
  3085. Reads and returns the current value of IRR0. This function is only available on Itanium processors.
  3086. @return The current value of IRR0.
  3087. **/
  3088. UINT64
  3089. EFIAPI
  3090. AsmReadIrr0 (
  3091. VOID
  3092. );
  3093. /**
  3094. Reads the current value of External Interrupt Request Register #1 (IRR1).
  3095. Reads and returns the current value of IRR1. This function is only available on Itanium processors.
  3096. @return The current value of IRR1.
  3097. **/
  3098. UINT64
  3099. EFIAPI
  3100. AsmReadIrr1 (
  3101. VOID
  3102. );
  3103. /**
  3104. Reads the current value of External Interrupt Request Register #2 (IRR2).
  3105. Reads and returns the current value of IRR2. This function is only available on Itanium processors.
  3106. @return The current value of IRR2.
  3107. **/
  3108. UINT64
  3109. EFIAPI
  3110. AsmReadIrr2 (
  3111. VOID
  3112. );
  3113. /**
  3114. Reads the current value of External Interrupt Request Register #3 (IRR3).
  3115. Reads and returns the current value of IRR3. This function is only available on Itanium processors.
  3116. @return The current value of IRR3.
  3117. **/
  3118. UINT64
  3119. EFIAPI
  3120. AsmReadIrr3 (
  3121. VOID
  3122. );
  3123. /**
  3124. Reads the current value of Performance Monitor Vector Register (PMV).
  3125. Reads and returns the current value of PMV. This function is only available on Itanium processors.
  3126. @return The current value of PMV.
  3127. **/
  3128. UINT64
  3129. EFIAPI
  3130. AsmReadPmv (
  3131. VOID
  3132. );
  3133. /**
  3134. Reads the current value of Corrected Machine Check Vector Register (CMCV).
  3135. Reads and returns the current value of CMCV. This function is only available on Itanium processors.
  3136. @return The current value of CMCV.
  3137. **/
  3138. UINT64
  3139. EFIAPI
  3140. AsmReadCmcv (
  3141. VOID
  3142. );
  3143. /**
  3144. Reads the current value of Local Redirection Register #0 (LRR0).
  3145. Reads and returns the current value of LRR0. This function is only available on Itanium processors.
  3146. @return The current value of LRR0.
  3147. **/
  3148. UINT64
  3149. EFIAPI
  3150. AsmReadLrr0 (
  3151. VOID
  3152. );
  3153. /**
  3154. Reads the current value of Local Redirection Register #1 (LRR1).
  3155. Reads and returns the current value of LRR1. This function is only available on Itanium processors.
  3156. @return The current value of LRR1.
  3157. **/
  3158. UINT64
  3159. EFIAPI
  3160. AsmReadLrr1 (
  3161. VOID
  3162. );
  3163. /**
  3164. Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
  3165. Writes the current value of LID. The 64-bit value written to the LID is returned.
  3166. No parameter checking is performed on Value. All bits of Value corresponding to
  3167. reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
  3168. The caller must either guarantee that Value is valid, or the caller must set up
  3169. fault handlers to catch the faults.
  3170. This function is only available on Itanium processors.
  3171. @param Value The 64-bit value to write to LID.
  3172. @return The 64-bit value written to the LID.
  3173. **/
  3174. UINT64
  3175. EFIAPI
  3176. AsmWriteLid (
  3177. IN UINT64 Value
  3178. );
  3179. /**
  3180. Writes the current value of 64-bit Task Priority Register (TPR).
  3181. Writes the current value of TPR. The 64-bit value written to the TPR is returned.
  3182. No parameter checking is performed on Value. All bits of Value corresponding to
  3183. reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
  3184. The caller must either guarantee that Value is valid, or the caller must set up
  3185. fault handlers to catch the faults.
  3186. This function is only available on Itanium processors.
  3187. @param Value The 64-bit value to write to TPR.
  3188. @return The 64-bit value written to the TPR.
  3189. **/
  3190. UINT64
  3191. EFIAPI
  3192. AsmWriteTpr (
  3193. IN UINT64 Value
  3194. );
  3195. /**
  3196. Performs a write operation on End OF External Interrupt Register (EOI).
  3197. Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.
  3198. **/
  3199. VOID
  3200. EFIAPI
  3201. AsmWriteEoi (
  3202. VOID
  3203. );
  3204. /**
  3205. Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
  3206. Writes the current value of PMV. The 64-bit value written to the PMV is returned.
  3207. No parameter checking is performed on Value. All bits of Value corresponding
  3208. to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
  3209. The caller must either guarantee that Value is valid, or the caller must set up
  3210. fault handlers to catch the faults.
  3211. This function is only available on Itanium processors.
  3212. @param Value The 64-bit value to write to PMV.
  3213. @return The 64-bit value written to the PMV.
  3214. **/
  3215. UINT64
  3216. EFIAPI
  3217. AsmWritePmv (
  3218. IN UINT64 Value
  3219. );
  3220. /**
  3221. Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
  3222. Writes the current value of CMCV. The 64-bit value written to the CMCV is returned.
  3223. No parameter checking is performed on Value. All bits of Value corresponding
  3224. to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
  3225. The caller must either guarantee that Value is valid, or the caller must set up
  3226. fault handlers to catch the faults.
  3227. This function is only available on Itanium processors.
  3228. @param Value The 64-bit value to write to CMCV.
  3229. @return The 64-bit value written to the CMCV.
  3230. **/
  3231. UINT64
  3232. EFIAPI
  3233. AsmWriteCmcv (
  3234. IN UINT64 Value
  3235. );
  3236. /**
  3237. Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
  3238. Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned.
  3239. No parameter checking is performed on Value. All bits of Value corresponding
  3240. to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
  3241. The caller must either guarantee that Value is valid, or the caller must set up
  3242. fault handlers to catch the faults.
  3243. This function is only available on Itanium processors.
  3244. @param Value The 64-bit value to write to LRR0.
  3245. @return The 64-bit value written to the LRR0.
  3246. **/
  3247. UINT64
  3248. EFIAPI
  3249. AsmWriteLrr0 (
  3250. IN UINT64 Value
  3251. );
  3252. /**
  3253. Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
  3254. Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned.
  3255. No parameter checking is performed on Value. All bits of Value corresponding
  3256. to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
  3257. The caller must either guarantee that Value is valid, or the caller must
  3258. set up fault handlers to catch the faults.
  3259. This function is only available on Itanium processors.
  3260. @param Value The 64-bit value to write to LRR1.
  3261. @return The 64-bit value written to the LRR1.
  3262. **/
  3263. UINT64
  3264. EFIAPI
  3265. AsmWriteLrr1 (
  3266. IN UINT64 Value
  3267. );
  3268. /**
  3269. Reads the current value of Instruction Breakpoint Register (IBR).
  3270. The Instruction Breakpoint Registers are used in pairs. The even numbered
  3271. registers contain breakpoint addresses, and the odd numbered registers contain
  3272. breakpoint mask conditions. At least four instruction registers pairs are implemented
  3273. on all processor models. Implemented registers are contiguous starting with
  3274. register 0. No parameter checking is performed on Index, and if the Index value
  3275. is beyond the implemented IBR register range, a Reserved Register/Field fault may
  3276. occur. The caller must either guarantee that Index is valid, or the caller must
  3277. set up fault handlers to catch the faults.
  3278. This function is only available on Itanium processors.
  3279. @param Index The 8-bit Instruction Breakpoint Register index to read.
  3280. @return The current value of Instruction Breakpoint Register specified by Index.
  3281. **/
  3282. UINT64
  3283. EFIAPI
  3284. AsmReadIbr (
  3285. IN UINT8 Index
  3286. );
  3287. /**
  3288. Reads the current value of Data Breakpoint Register (DBR).
  3289. The Data Breakpoint Registers are used in pairs. The even numbered registers
  3290. contain breakpoint addresses, and odd numbered registers contain breakpoint
  3291. mask conditions. At least four data registers pairs are implemented on all processor
  3292. models. Implemented registers are contiguous starting with register 0.
  3293. No parameter checking is performed on Index. If the Index value is beyond
  3294. the implemented DBR register range, a Reserved Register/Field fault may occur.
  3295. The caller must either guarantee that Index is valid, or the caller must set up
  3296. fault handlers to catch the faults.
  3297. This function is only available on Itanium processors.
  3298. @param Index The 8-bit Data Breakpoint Register index to read.
  3299. @return The current value of Data Breakpoint Register specified by Index.
  3300. **/
  3301. UINT64
  3302. EFIAPI
  3303. AsmReadDbr (
  3304. IN UINT8 Index
  3305. );
  3306. /**
  3307. Reads the current value of Performance Monitor Configuration Register (PMC).
  3308. All processor implementations provide at least four performance counters
  3309. (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
  3310. status registers (PMC [0]... PMC [3]). Processor implementations may provide
  3311. additional implementation-dependent PMC and PMD to increase the number of
  3312. 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
  3313. register set is implementation dependent. No parameter checking is performed
  3314. on Index. If the Index value is beyond the implemented PMC register range,
  3315. zero value will be returned.
  3316. This function is only available on Itanium processors.
  3317. @param Index The 8-bit Performance Monitor Configuration Register index to read.
  3318. @return The current value of Performance Monitor Configuration Register
  3319. specified by Index.
  3320. **/
  3321. UINT64
  3322. EFIAPI
  3323. AsmReadPmc (
  3324. IN UINT8 Index
  3325. );
  3326. /**
  3327. Reads the current value of Performance Monitor Data Register (PMD).
  3328. All processor implementations provide at least 4 performance counters
  3329. (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
  3330. overflow status registers (PMC [0]... PMC [3]). Processor implementations may
  3331. provide additional implementation-dependent PMC and PMD to increase the number
  3332. of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
  3333. register set is implementation dependent. No parameter checking is performed
  3334. on Index. If the Index value is beyond the implemented PMD register range,
  3335. zero value will be returned.
  3336. This function is only available on Itanium processors.
  3337. @param Index The 8-bit Performance Monitor Data Register index to read.
  3338. @return The current value of Performance Monitor Data Register specified by Index.
  3339. **/
  3340. UINT64
  3341. EFIAPI
  3342. AsmReadPmd (
  3343. IN UINT8 Index
  3344. );
  3345. /**
  3346. Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
  3347. Writes current value of Instruction Breakpoint Register specified by Index.
  3348. The Instruction Breakpoint Registers are used in pairs. The even numbered
  3349. registers contain breakpoint addresses, and odd numbered registers contain
  3350. breakpoint mask conditions. At least four instruction registers pairs are implemented
  3351. on all processor models. Implemented registers are contiguous starting with
  3352. register 0. No parameter checking is performed on Index. If the Index value
  3353. is beyond the implemented IBR register range, a Reserved Register/Field fault may
  3354. occur. The caller must either guarantee that Index is valid, or the caller must
  3355. set up fault handlers to catch the faults.
  3356. This function is only available on Itanium processors.
  3357. @param Index The 8-bit Instruction Breakpoint Register index to write.
  3358. @param Value The 64-bit value to write to IBR.
  3359. @return The 64-bit value written to the IBR.
  3360. **/
  3361. UINT64
  3362. EFIAPI
  3363. AsmWriteIbr (
  3364. IN UINT8 Index,
  3365. IN UINT64 Value
  3366. );
  3367. /**
  3368. Writes the current value of 64-bit Data Breakpoint Register (DBR).
  3369. Writes current value of Data Breakpoint Register specified by Index.
  3370. The Data Breakpoint Registers are used in pairs. The even numbered registers
  3371. contain breakpoint addresses, and odd numbered registers contain breakpoint
  3372. mask conditions. At least four data registers pairs are implemented on all processor
  3373. models. Implemented registers are contiguous starting with register 0. No parameter
  3374. checking is performed on Index. If the Index value is beyond the implemented
  3375. DBR register range, a Reserved Register/Field fault may occur. The caller must
  3376. either guarantee that Index is valid, or the caller must set up fault handlers to
  3377. catch the faults.
  3378. This function is only available on Itanium processors.
  3379. @param Index The 8-bit Data Breakpoint Register index to write.
  3380. @param Value The 64-bit value to write to DBR.
  3381. @return The 64-bit value written to the DBR.
  3382. **/
  3383. UINT64
  3384. EFIAPI
  3385. AsmWriteDbr (
  3386. IN UINT8 Index,
  3387. IN UINT64 Value
  3388. );
  3389. /**
  3390. Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
  3391. Writes current value of Performance Monitor Configuration Register specified by Index.
  3392. All processor implementations provide at least four performance counters
  3393. (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status
  3394. registers (PMC [0]... PMC [3]). Processor implementations may provide additional
  3395. implementation-dependent PMC and PMD to increase the number of 'generic' performance
  3396. counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
  3397. dependent. No parameter checking is performed on Index. If the Index value is
  3398. beyond the implemented PMC register range, the write is ignored.
  3399. This function is only available on Itanium processors.
  3400. @param Index The 8-bit Performance Monitor Configuration Register index to write.
  3401. @param Value The 64-bit value to write to PMC.
  3402. @return The 64-bit value written to the PMC.
  3403. **/
  3404. UINT64
  3405. EFIAPI
  3406. AsmWritePmc (
  3407. IN UINT8 Index,
  3408. IN UINT64 Value
  3409. );
  3410. /**
  3411. Writes the current value of 64-bit Performance Monitor Data Register (PMD).
  3412. Writes current value of Performance Monitor Data Register specified by Index.
  3413. All processor implementations provide at least four performance counters
  3414. (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
  3415. status registers (PMC [0]... PMC [3]). Processor implementations may provide
  3416. additional implementation-dependent PMC and PMD to increase the number of 'generic'
  3417. performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
  3418. is implementation dependent. No parameter checking is performed on Index. If the
  3419. Index value is beyond the implemented PMD register range, the write is ignored.
  3420. This function is only available on Itanium processors.
  3421. @param Index The 8-bit Performance Monitor Data Register index to write.
  3422. @param Value The 64-bit value to write to PMD.
  3423. @return The 64-bit value written to the PMD.
  3424. **/
  3425. UINT64
  3426. EFIAPI
  3427. AsmWritePmd (
  3428. IN UINT8 Index,
  3429. IN UINT64 Value
  3430. );
  3431. /**
  3432. Reads the current value of 64-bit Global Pointer (GP).
  3433. Reads and returns the current value of GP.
  3434. This function is only available on Itanium processors.
  3435. @return The current value of GP.
  3436. **/
  3437. UINT64
  3438. EFIAPI
  3439. AsmReadGp (
  3440. VOID
  3441. );
  3442. /**
  3443. Write the current value of 64-bit Global Pointer (GP).
  3444. Writes the current value of GP. The 64-bit value written to the GP is returned.
  3445. No parameter checking is performed on Value.
  3446. This function is only available on Itanium processors.
  3447. @param Value The 64-bit value to write to GP.
  3448. @return The 64-bit value written to the GP.
  3449. **/
  3450. UINT64
  3451. EFIAPI
  3452. AsmWriteGp (
  3453. IN UINT64 Value
  3454. );
  3455. /**
  3456. Reads the current value of 64-bit Stack Pointer (SP).
  3457. Reads and returns the current value of SP.
  3458. This function is only available on Itanium processors.
  3459. @return The current value of SP.
  3460. **/
  3461. UINT64
  3462. EFIAPI
  3463. AsmReadSp (
  3464. VOID
  3465. );
  3466. ///
  3467. /// Valid Index value for AsmReadControlRegister().
  3468. ///
  3469. #define IPF_CONTROL_REGISTER_DCR 0
  3470. #define IPF_CONTROL_REGISTER_ITM 1
  3471. #define IPF_CONTROL_REGISTER_IVA 2
  3472. #define IPF_CONTROL_REGISTER_PTA 8
  3473. #define IPF_CONTROL_REGISTER_IPSR 16
  3474. #define IPF_CONTROL_REGISTER_ISR 17
  3475. #define IPF_CONTROL_REGISTER_IIP 19
  3476. #define IPF_CONTROL_REGISTER_IFA 20
  3477. #define IPF_CONTROL_REGISTER_ITIR 21
  3478. #define IPF_CONTROL_REGISTER_IIPA 22
  3479. #define IPF_CONTROL_REGISTER_IFS 23
  3480. #define IPF_CONTROL_REGISTER_IIM 24
  3481. #define IPF_CONTROL_REGISTER_IHA 25
  3482. #define IPF_CONTROL_REGISTER_LID 64
  3483. #define IPF_CONTROL_REGISTER_IVR 65
  3484. #define IPF_CONTROL_REGISTER_TPR 66
  3485. #define IPF_CONTROL_REGISTER_EOI 67
  3486. #define IPF_CONTROL_REGISTER_IRR0 68
  3487. #define IPF_CONTROL_REGISTER_IRR1 69
  3488. #define IPF_CONTROL_REGISTER_IRR2 70
  3489. #define IPF_CONTROL_REGISTER_IRR3 71
  3490. #define IPF_CONTROL_REGISTER_ITV 72
  3491. #define IPF_CONTROL_REGISTER_PMV 73
  3492. #define IPF_CONTROL_REGISTER_CMCV 74
  3493. #define IPF_CONTROL_REGISTER_LRR0 80
  3494. #define IPF_CONTROL_REGISTER_LRR1 81
  3495. /**
  3496. Reads a 64-bit control register.
  3497. Reads and returns the control register specified by Index. The valid Index valued
  3498. are defined above in "Related Definitions".
  3499. If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only
  3500. available on Itanium processors.
  3501. @param Index The index of the control register to read.
  3502. @return The control register specified by Index.
  3503. **/
  3504. UINT64
  3505. EFIAPI
  3506. AsmReadControlRegister (
  3507. IN UINT64 Index
  3508. );
  3509. ///
  3510. /// Valid Index value for AsmReadApplicationRegister().
  3511. ///
  3512. #define IPF_APPLICATION_REGISTER_K0 0
  3513. #define IPF_APPLICATION_REGISTER_K1 1
  3514. #define IPF_APPLICATION_REGISTER_K2 2
  3515. #define IPF_APPLICATION_REGISTER_K3 3
  3516. #define IPF_APPLICATION_REGISTER_K4 4
  3517. #define IPF_APPLICATION_REGISTER_K5 5
  3518. #define IPF_APPLICATION_REGISTER_K6 6
  3519. #define IPF_APPLICATION_REGISTER_K7 7
  3520. #define IPF_APPLICATION_REGISTER_RSC 16
  3521. #define IPF_APPLICATION_REGISTER_BSP 17
  3522. #define IPF_APPLICATION_REGISTER_BSPSTORE 18
  3523. #define IPF_APPLICATION_REGISTER_RNAT 19
  3524. #define IPF_APPLICATION_REGISTER_FCR 21
  3525. #define IPF_APPLICATION_REGISTER_EFLAG 24
  3526. #define IPF_APPLICATION_REGISTER_CSD 25
  3527. #define IPF_APPLICATION_REGISTER_SSD 26
  3528. #define IPF_APPLICATION_REGISTER_CFLG 27
  3529. #define IPF_APPLICATION_REGISTER_FSR 28
  3530. #define IPF_APPLICATION_REGISTER_FIR 29
  3531. #define IPF_APPLICATION_REGISTER_FDR 30
  3532. #define IPF_APPLICATION_REGISTER_CCV 32
  3533. #define IPF_APPLICATION_REGISTER_UNAT 36
  3534. #define IPF_APPLICATION_REGISTER_FPSR 40
  3535. #define IPF_APPLICATION_REGISTER_ITC 44
  3536. #define IPF_APPLICATION_REGISTER_PFS 64
  3537. #define IPF_APPLICATION_REGISTER_LC 65
  3538. #define IPF_APPLICATION_REGISTER_EC 66
  3539. /**
  3540. Reads a 64-bit application register.
  3541. Reads and returns the application register specified by Index. The valid Index
  3542. valued are defined above in "Related Definitions".
  3543. If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only
  3544. available on Itanium processors.
  3545. @param Index The index of the application register to read.
  3546. @return The application register specified by Index.
  3547. **/
  3548. UINT64
  3549. EFIAPI
  3550. AsmReadApplicationRegister (
  3551. IN UINT64 Index
  3552. );
  3553. /**
  3554. Reads the current value of a Machine Specific Register (MSR).
  3555. Reads and returns the current value of the Machine Specific Register specified by Index. No
  3556. parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
  3557. register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
  3558. Index is valid, or the caller must set up fault handlers to catch the faults. This function is
  3559. only available on Itanium processors.
  3560. @param Index The 8-bit Machine Specific Register index to read.
  3561. @return The current value of the Machine Specific Register specified by Index.
  3562. **/
  3563. UINT64
  3564. EFIAPI
  3565. AsmReadMsr (
  3566. IN UINT8 Index
  3567. );
  3568. /**
  3569. Writes the current value of a Machine Specific Register (MSR).
  3570. Writes Value to the Machine Specific Register specified by Index. Value is returned. No
  3571. parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
  3572. register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
  3573. Index is valid, or the caller must set up fault handlers to catch the faults. This function is
  3574. only available on Itanium processors.
  3575. @param Index The 8-bit Machine Specific Register index to write.
  3576. @param Value The 64-bit value to write to the Machine Specific Register.
  3577. @return The 64-bit value to write to the Machine Specific Register.
  3578. **/
  3579. UINT64
  3580. EFIAPI
  3581. AsmWriteMsr (
  3582. IN UINT8 Index,
  3583. IN UINT64 Value
  3584. );
  3585. /**
  3586. Determines if the CPU is currently executing in virtual, physical, or mixed mode.
  3587. Determines the current execution mode of the CPU.
  3588. If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
  3589. If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
  3590. If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
  3591. and -1 is returned.
  3592. This function is only available on Itanium processors.
  3593. @retval 1 The CPU is in virtual mode.
  3594. @retval 0 The CPU is in physical mode.
  3595. @retval -1 The CPU is in mixed mode.
  3596. **/
  3597. INT64
  3598. EFIAPI
  3599. AsmCpuVirtual (
  3600. VOID
  3601. );
  3602. /**
  3603. Makes a PAL procedure call.
  3604. This is a wrapper function to make a PAL procedure call. Based on the Index
  3605. value this API will make static or stacked PAL call. The following table
  3606. describes the usage of PAL Procedure Index Assignment. Architected procedures
  3607. may be designated as required or optional. If a PAL procedure is specified
  3608. as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
  3609. Status field of the PAL_CALL_RETURN structure.
  3610. This indicates that the procedure is not present in this PAL implementation.
  3611. It is the caller's responsibility to check for this return code after calling
  3612. any optional PAL procedure.
  3613. No parameter checking is performed on the 5 input parameters, but there are
  3614. some common rules that the caller should follow when making a PAL call. Any
  3615. address passed to PAL as buffers for return parameters must be 8-byte aligned.
  3616. Unaligned addresses may cause undefined results. For those parameters defined
  3617. as reserved or some fields defined as reserved must be zero filled or the invalid
  3618. argument return value may be returned or undefined result may occur during the
  3619. execution of the procedure. If the PalEntryPoint does not point to a valid
  3620. PAL entry point then the system behavior is undefined. This function is only
  3621. available on Itanium processors.
  3622. @param PalEntryPoint The PAL procedure calls entry point.
  3623. @param Index The PAL procedure Index number.
  3624. @param Arg2 The 2nd parameter for PAL procedure calls.
  3625. @param Arg3 The 3rd parameter for PAL procedure calls.
  3626. @param Arg4 The 4th parameter for PAL procedure calls.
  3627. @return structure returned from the PAL Call procedure, including the status and return value.
  3628. **/
  3629. PAL_CALL_RETURN
  3630. EFIAPI
  3631. AsmPalCall (
  3632. IN UINT64 PalEntryPoint,
  3633. IN UINT64 Index,
  3634. IN UINT64 Arg2,
  3635. IN UINT64 Arg3,
  3636. IN UINT64 Arg4
  3637. );
  3638. #endif
  3639. #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
  3640. ///
  3641. /// IA32 and x64 Specific Functions.
  3642. /// Byte packed structure for 16-bit Real Mode EFLAGS.
  3643. ///
  3644. typedef union {
  3645. struct {
  3646. UINT32 CF:1; ///< Carry Flag.
  3647. UINT32 Reserved_0:1; ///< Reserved.
  3648. UINT32 PF:1; ///< Parity Flag.
  3649. UINT32 Reserved_1:1; ///< Reserved.
  3650. UINT32 AF:1; ///< Auxiliary Carry Flag.
  3651. UINT32 Reserved_2:1; ///< Reserved.
  3652. UINT32 ZF:1; ///< Zero Flag.
  3653. UINT32 SF:1; ///< Sign Flag.
  3654. UINT32 TF:1; ///< Trap Flag.
  3655. UINT32 IF:1; ///< Interrupt Enable Flag.
  3656. UINT32 DF:1; ///< Direction Flag.
  3657. UINT32 OF:1; ///< Overflow Flag.
  3658. UINT32 IOPL:2; ///< I/O Privilege Level.
  3659. UINT32 NT:1; ///< Nested Task.
  3660. UINT32 Reserved_3:1; ///< Reserved.
  3661. } Bits;
  3662. UINT16 Uint16;
  3663. } IA32_FLAGS16;
  3664. ///
  3665. /// Byte packed structure for EFLAGS/RFLAGS.
  3666. /// 32-bits on IA-32.
  3667. /// 64-bits on x64. The upper 32-bits on x64 are reserved.
  3668. ///
  3669. typedef union {
  3670. struct {
  3671. UINT32 CF:1; ///< Carry Flag.
  3672. UINT32 Reserved_0:1; ///< Reserved.
  3673. UINT32 PF:1; ///< Parity Flag.
  3674. UINT32 Reserved_1:1; ///< Reserved.
  3675. UINT32 AF:1; ///< Auxiliary Carry Flag.
  3676. UINT32 Reserved_2:1; ///< Reserved.
  3677. UINT32 ZF:1; ///< Zero Flag.
  3678. UINT32 SF:1; ///< Sign Flag.
  3679. UINT32 TF:1; ///< Trap Flag.
  3680. UINT32 IF:1; ///< Interrupt Enable Flag.
  3681. UINT32 DF:1; ///< Direction Flag.
  3682. UINT32 OF:1; ///< Overflow Flag.
  3683. UINT32 IOPL:2; ///< I/O Privilege Level.
  3684. UINT32 NT:1; ///< Nested Task.
  3685. UINT32 Reserved_3:1; ///< Reserved.
  3686. UINT32 RF:1; ///< Resume Flag.
  3687. UINT32 VM:1; ///< Virtual 8086 Mode.
  3688. UINT32 AC:1; ///< Alignment Check.
  3689. UINT32 VIF:1; ///< Virtual Interrupt Flag.
  3690. UINT32 VIP:1; ///< Virtual Interrupt Pending.
  3691. UINT32 ID:1; ///< ID Flag.
  3692. UINT32 Reserved_4:10; ///< Reserved.
  3693. } Bits;
  3694. UINTN UintN;
  3695. } IA32_EFLAGS32;
  3696. ///
  3697. /// Byte packed structure for Control Register 0 (CR0).
  3698. /// 32-bits on IA-32.
  3699. /// 64-bits on x64. The upper 32-bits on x64 are reserved.
  3700. ///
  3701. typedef union {
  3702. struct {
  3703. UINT32 PE:1; ///< Protection Enable.
  3704. UINT32 MP:1; ///< Monitor Coprocessor.
  3705. UINT32 EM:1; ///< Emulation.
  3706. UINT32 TS:1; ///< Task Switched.
  3707. UINT32 ET:1; ///< Extension Type.
  3708. UINT32 NE:1; ///< Numeric Error.
  3709. UINT32 Reserved_0:10; ///< Reserved.
  3710. UINT32 WP:1; ///< Write Protect.
  3711. UINT32 Reserved_1:1; ///< Reserved.
  3712. UINT32 AM:1; ///< Alignment Mask.
  3713. UINT32 Reserved_2:10; ///< Reserved.
  3714. UINT32 NW:1; ///< Mot Write-through.
  3715. UINT32 CD:1; ///< Cache Disable.
  3716. UINT32 PG:1; ///< Paging.
  3717. } Bits;
  3718. UINTN UintN;
  3719. } IA32_CR0;
  3720. ///
  3721. /// Byte packed structure for Control Register 4 (CR4).
  3722. /// 32-bits on IA-32.
  3723. /// 64-bits on x64. The upper 32-bits on x64 are reserved.
  3724. ///
  3725. typedef union {
  3726. struct {
  3727. UINT32 VME:1; ///< Virtual-8086 Mode Extensions.
  3728. UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts.
  3729. UINT32 TSD:1; ///< Time Stamp Disable.
  3730. UINT32 DE:1; ///< Debugging Extensions.
  3731. UINT32 PSE:1; ///< Page Size Extensions.
  3732. UINT32 PAE:1; ///< Physical Address Extension.
  3733. UINT32 MCE:1; ///< Machine Check Enable.
  3734. UINT32 PGE:1; ///< Page Global Enable.
  3735. UINT32 PCE:1; ///< Performance Monitoring Counter
  3736. ///< Enable.
  3737. UINT32 OSFXSR:1; ///< Operating System Support for
  3738. ///< FXSAVE and FXRSTOR instructions
  3739. UINT32 OSXMMEXCPT:1; ///< Operating System Support for
  3740. ///< Unmasked SIMD Floating Point
  3741. ///< Exceptions.
  3742. UINT32 Reserved_0:2; ///< Reserved.
  3743. UINT32 VMXE:1; ///< VMX Enable
  3744. UINT32 Reserved_1:18; ///< Reserved.
  3745. } Bits;
  3746. UINTN UintN;
  3747. } IA32_CR4;
  3748. ///
  3749. /// Byte packed structure for a segment descriptor in a GDT/LDT.
  3750. ///
  3751. typedef union {
  3752. struct {
  3753. UINT32 LimitLow:16;
  3754. UINT32 BaseLow:16;
  3755. UINT32 BaseMid:8;
  3756. UINT32 Type:4;
  3757. UINT32 S:1;
  3758. UINT32 DPL:2;
  3759. UINT32 P:1;
  3760. UINT32 LimitHigh:4;
  3761. UINT32 AVL:1;
  3762. UINT32 L:1;
  3763. UINT32 DB:1;
  3764. UINT32 G:1;
  3765. UINT32 BaseHigh:8;
  3766. } Bits;
  3767. UINT64 Uint64;
  3768. } IA32_SEGMENT_DESCRIPTOR;
  3769. ///
  3770. /// Byte packed structure for an IDTR, GDTR, LDTR descriptor.
  3771. ///
  3772. #pragma pack (1)
  3773. typedef struct {
  3774. UINT16 Limit;
  3775. UINTN Base;
  3776. } IA32_DESCRIPTOR;
  3777. #pragma pack ()
  3778. #define IA32_IDT_GATE_TYPE_TASK 0x85
  3779. #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
  3780. #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
  3781. #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
  3782. #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
  3783. #if defined (MDE_CPU_IA32)
  3784. ///
  3785. /// Byte packed structure for an IA-32 Interrupt Gate Descriptor.
  3786. ///
  3787. typedef union {
  3788. struct {
  3789. UINT32 OffsetLow:16; ///< Offset bits 15..0.
  3790. UINT32 Selector:16; ///< Selector.
  3791. UINT32 Reserved_0:8; ///< Reserved.
  3792. UINT32 GateType:8; ///< Gate Type. See #defines above.
  3793. UINT32 OffsetHigh:16; ///< Offset bits 31..16.
  3794. } Bits;
  3795. UINT64 Uint64;
  3796. } IA32_IDT_GATE_DESCRIPTOR;
  3797. #endif
  3798. #if defined (MDE_CPU_X64)
  3799. ///
  3800. /// Byte packed structure for an x64 Interrupt Gate Descriptor.
  3801. ///
  3802. typedef union {
  3803. struct {
  3804. UINT32 OffsetLow:16; ///< Offset bits 15..0.
  3805. UINT32 Selector:16; ///< Selector.
  3806. UINT32 Reserved_0:8; ///< Reserved.
  3807. UINT32 GateType:8; ///< Gate Type. See #defines above.
  3808. UINT32 OffsetHigh:16; ///< Offset bits 31..16.
  3809. UINT32 OffsetUpper:32; ///< Offset bits 63..32.
  3810. UINT32 Reserved_1:32; ///< Reserved.
  3811. } Bits;
  3812. struct {
  3813. UINT64 Uint64;
  3814. UINT64 Uint64_1;
  3815. } Uint128;
  3816. } IA32_IDT_GATE_DESCRIPTOR;
  3817. #endif
  3818. ///
  3819. /// Byte packed structure for an FP/SSE/SSE2 context.
  3820. ///
  3821. typedef struct {
  3822. UINT8 Buffer[512];
  3823. } IA32_FX_BUFFER;
  3824. ///
  3825. /// Structures for the 16-bit real mode thunks.
  3826. ///
  3827. typedef struct {
  3828. UINT32 Reserved1;
  3829. UINT32 Reserved2;
  3830. UINT32 Reserved3;
  3831. UINT32 Reserved4;
  3832. UINT8 BL;
  3833. UINT8 BH;
  3834. UINT16 Reserved5;
  3835. UINT8 DL;
  3836. UINT8 DH;
  3837. UINT16 Reserved6;
  3838. UINT8 CL;
  3839. UINT8 CH;
  3840. UINT16 Reserved7;
  3841. UINT8 AL;
  3842. UINT8 AH;
  3843. UINT16 Reserved8;
  3844. } IA32_BYTE_REGS;
  3845. typedef struct {
  3846. UINT16 DI;
  3847. UINT16 Reserved1;
  3848. UINT16 SI;
  3849. UINT16 Reserved2;
  3850. UINT16 BP;
  3851. UINT16 Reserved3;
  3852. UINT16 SP;
  3853. UINT16 Reserved4;
  3854. UINT16 BX;
  3855. UINT16 Reserved5;
  3856. UINT16 DX;
  3857. UINT16 Reserved6;
  3858. UINT16 CX;
  3859. UINT16 Reserved7;
  3860. UINT16 AX;
  3861. UINT16 Reserved8;
  3862. } IA32_WORD_REGS;
  3863. typedef struct {
  3864. UINT32 EDI;
  3865. UINT32 ESI;
  3866. UINT32 EBP;
  3867. UINT32 ESP;
  3868. UINT32 EBX;
  3869. UINT32 EDX;
  3870. UINT32 ECX;
  3871. UINT32 EAX;
  3872. UINT16 DS;
  3873. UINT16 ES;
  3874. UINT16 FS;
  3875. UINT16 GS;
  3876. IA32_EFLAGS32 EFLAGS;
  3877. UINT32 Eip;
  3878. UINT16 CS;
  3879. UINT16 SS;
  3880. } IA32_DWORD_REGS;
  3881. typedef union {
  3882. IA32_DWORD_REGS E;
  3883. IA32_WORD_REGS X;
  3884. IA32_BYTE_REGS H;
  3885. } IA32_REGISTER_SET;
  3886. ///
  3887. /// Byte packed structure for an 16-bit real mode thunks.
  3888. ///
  3889. typedef struct {
  3890. IA32_REGISTER_SET *RealModeState;
  3891. VOID *RealModeBuffer;
  3892. UINT32 RealModeBufferSize;
  3893. UINT32 ThunkAttributes;
  3894. } THUNK_CONTEXT;
  3895. #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
  3896. #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
  3897. #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
  3898. /**
  3899. Retrieves CPUID information.
  3900. Executes the CPUID instruction with EAX set to the value specified by Index.
  3901. This function always returns Index.
  3902. If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
  3903. If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
  3904. If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
  3905. If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
  3906. This function is only available on IA-32 and x64.
  3907. @param Index The 32-bit value to load into EAX prior to invoking the CPUID
  3908. instruction.
  3909. @param Eax The pointer to the 32-bit EAX value returned by the CPUID
  3910. instruction. This is an optional parameter that may be NULL.
  3911. @param Ebx The pointer to the 32-bit EBX value returned by the CPUID
  3912. instruction. This is an optional parameter that may be NULL.
  3913. @param Ecx The pointer to the 32-bit ECX value returned by the CPUID
  3914. instruction. This is an optional parameter that may be NULL.
  3915. @param Edx The pointer to the 32-bit EDX value returned by the CPUID
  3916. instruction. This is an optional parameter that may be NULL.
  3917. @return Index.
  3918. **/
  3919. UINT32
  3920. EFIAPI
  3921. AsmCpuid (
  3922. IN UINT32 Index,
  3923. OUT UINT32 *Eax, OPTIONAL
  3924. OUT UINT32 *Ebx, OPTIONAL
  3925. OUT UINT32 *Ecx, OPTIONAL
  3926. OUT UINT32 *Edx OPTIONAL
  3927. );
  3928. /**
  3929. Retrieves CPUID information using an extended leaf identifier.
  3930. Executes the CPUID instruction with EAX set to the value specified by Index
  3931. and ECX set to the value specified by SubIndex. This function always returns
  3932. Index. This function is only available on IA-32 and x64.
  3933. If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
  3934. If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
  3935. If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
  3936. If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
  3937. @param Index The 32-bit value to load into EAX prior to invoking the
  3938. CPUID instruction.
  3939. @param SubIndex The 32-bit value to load into ECX prior to invoking the
  3940. CPUID instruction.
  3941. @param Eax The pointer to the 32-bit EAX value returned by the CPUID
  3942. instruction. This is an optional parameter that may be
  3943. NULL.
  3944. @param Ebx The pointer to the 32-bit EBX value returned by the CPUID
  3945. instruction. This is an optional parameter that may be
  3946. NULL.
  3947. @param Ecx The pointer to the 32-bit ECX value returned by the CPUID
  3948. instruction. This is an optional parameter that may be
  3949. NULL.
  3950. @param Edx The pointer to the 32-bit EDX value returned by the CPUID
  3951. instruction. This is an optional parameter that may be
  3952. NULL.
  3953. @return Index.
  3954. **/
  3955. UINT32
  3956. EFIAPI
  3957. AsmCpuidEx (
  3958. IN UINT32 Index,
  3959. IN UINT32 SubIndex,
  3960. OUT UINT32 *Eax, OPTIONAL
  3961. OUT UINT32 *Ebx, OPTIONAL
  3962. OUT UINT32 *Ecx, OPTIONAL
  3963. OUT UINT32 *Edx OPTIONAL
  3964. );
  3965. /**
  3966. Set CD bit and clear NW bit of CR0 followed by a WBINVD.
  3967. Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
  3968. and executing a WBINVD instruction. This function is only available on IA-32 and x64.
  3969. **/
  3970. VOID
  3971. EFIAPI
  3972. AsmDisableCache (
  3973. VOID
  3974. );
  3975. /**
  3976. Perform a WBINVD and clear both the CD and NW bits of CR0.
  3977. Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
  3978. bits of CR0 to 0. This function is only available on IA-32 and x64.
  3979. **/
  3980. VOID
  3981. EFIAPI
  3982. AsmEnableCache (
  3983. VOID
  3984. );
  3985. /**
  3986. Returns the lower 32-bits of a Machine Specific Register(MSR).
  3987. Reads and returns the lower 32-bits of the MSR specified by Index.
  3988. No parameter checking is performed on Index, and some Index values may cause
  3989. CPU exceptions. The caller must either guarantee that Index is valid, or the
  3990. caller must set up exception handlers to catch the exceptions. This function
  3991. is only available on IA-32 and x64.
  3992. @param Index The 32-bit MSR index to read.
  3993. @return The lower 32 bits of the MSR identified by Index.
  3994. **/
  3995. UINT32
  3996. EFIAPI
  3997. AsmReadMsr32 (
  3998. IN UINT32 Index
  3999. );
  4000. /**
  4001. Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
  4002. The upper 32-bits of the MSR are set to zero.
  4003. Writes the 32-bit value specified by Value to the MSR specified by Index. The
  4004. upper 32-bits of the MSR write are set to zero. The 32-bit value written to
  4005. the MSR is returned. No parameter checking is performed on Index or Value,
  4006. and some of these may cause CPU exceptions. The caller must either guarantee
  4007. that Index and Value are valid, or the caller must establish proper exception
  4008. handlers. This function is only available on IA-32 and x64.
  4009. @param Index The 32-bit MSR index to write.
  4010. @param Value The 32-bit value to write to the MSR.
  4011. @return Value
  4012. **/
  4013. UINT32
  4014. EFIAPI
  4015. AsmWriteMsr32 (
  4016. IN UINT32 Index,
  4017. IN UINT32 Value
  4018. );
  4019. /**
  4020. Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
  4021. writes the result back to the 64-bit MSR.
  4022. Reads the 64-bit MSR specified by Index, performs a bitwise OR
  4023. between the lower 32-bits of the read result and the value specified by
  4024. OrData, and writes the result to the 64-bit MSR specified by Index. The lower
  4025. 32-bits of the value written to the MSR is returned. No parameter checking is
  4026. performed on Index or OrData, and some of these may cause CPU exceptions. The
  4027. caller must either guarantee that Index and OrData are valid, or the caller
  4028. must establish proper exception handlers. This function is only available on
  4029. IA-32 and x64.
  4030. @param Index The 32-bit MSR index to write.
  4031. @param OrData The value to OR with the read value from the MSR.
  4032. @return The lower 32-bit value written to the MSR.
  4033. **/
  4034. UINT32
  4035. EFIAPI
  4036. AsmMsrOr32 (
  4037. IN UINT32 Index,
  4038. IN UINT32 OrData
  4039. );
  4040. /**
  4041. Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
  4042. the result back to the 64-bit MSR.
  4043. Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
  4044. lower 32-bits of the read result and the value specified by AndData, and
  4045. writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
  4046. the value written to the MSR is returned. No parameter checking is performed
  4047. on Index or AndData, and some of these may cause CPU exceptions. The caller
  4048. must either guarantee that Index and AndData are valid, or the caller must
  4049. establish proper exception handlers. This function is only available on IA-32
  4050. and x64.
  4051. @param Index The 32-bit MSR index to write.
  4052. @param AndData The value to AND with the read value from the MSR.
  4053. @return The lower 32-bit value written to the MSR.
  4054. **/
  4055. UINT32
  4056. EFIAPI
  4057. AsmMsrAnd32 (
  4058. IN UINT32 Index,
  4059. IN UINT32 AndData
  4060. );
  4061. /**
  4062. Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
  4063. on the lower 32-bits, and writes the result back to the 64-bit MSR.
  4064. Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
  4065. lower 32-bits of the read result and the value specified by AndData
  4066. preserving the upper 32-bits, performs a bitwise OR between the
  4067. result of the AND operation and the value specified by OrData, and writes the
  4068. result to the 64-bit MSR specified by Address. The lower 32-bits of the value
  4069. written to the MSR is returned. No parameter checking is performed on Index,
  4070. AndData, or OrData, and some of these may cause CPU exceptions. The caller
  4071. must either guarantee that Index, AndData, and OrData are valid, or the
  4072. caller must establish proper exception handlers. This function is only
  4073. available on IA-32 and x64.
  4074. @param Index The 32-bit MSR index to write.
  4075. @param AndData The value to AND with the read value from the MSR.
  4076. @param OrData The value to OR with the result of the AND operation.
  4077. @return The lower 32-bit value written to the MSR.
  4078. **/
  4079. UINT32
  4080. EFIAPI
  4081. AsmMsrAndThenOr32 (
  4082. IN UINT32 Index,
  4083. IN UINT32 AndData,
  4084. IN UINT32 OrData
  4085. );
  4086. /**
  4087. Reads a bit field of an MSR.
  4088. Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
  4089. specified by the StartBit and the EndBit. The value of the bit field is
  4090. returned. The caller must either guarantee that Index is valid, or the caller
  4091. must set up exception handlers to catch the exceptions. This function is only
  4092. available on IA-32 and x64.
  4093. If StartBit is greater than 31, then ASSERT().
  4094. If EndBit is greater than 31, then ASSERT().
  4095. If EndBit is less than StartBit, then ASSERT().
  4096. @param Index The 32-bit MSR index to read.
  4097. @param StartBit The ordinal of the least significant bit in the bit field.
  4098. Range 0..31.
  4099. @param EndBit The ordinal of the most significant bit in the bit field.
  4100. Range 0..31.
  4101. @return The bit field read from the MSR.
  4102. **/
  4103. UINT32
  4104. EFIAPI
  4105. AsmMsrBitFieldRead32 (
  4106. IN UINT32 Index,
  4107. IN UINTN StartBit,
  4108. IN UINTN EndBit
  4109. );
  4110. /**
  4111. Writes a bit field to an MSR.
  4112. Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
  4113. field is specified by the StartBit and the EndBit. All other bits in the
  4114. destination MSR are preserved. The lower 32-bits of the MSR written is
  4115. returned. The caller must either guarantee that Index and the data written
  4116. is valid, or the caller must set up exception handlers to catch the exceptions.
  4117. This function is only available on IA-32 and x64.
  4118. If StartBit is greater than 31, then ASSERT().
  4119. If EndBit is greater than 31, then ASSERT().
  4120. If EndBit is less than StartBit, then ASSERT().
  4121. If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4122. @param Index The 32-bit MSR index to write.
  4123. @param StartBit The ordinal of the least significant bit in the bit field.
  4124. Range 0..31.
  4125. @param EndBit The ordinal of the most significant bit in the bit field.
  4126. Range 0..31.
  4127. @param Value New value of the bit field.
  4128. @return The lower 32-bit of the value written to the MSR.
  4129. **/
  4130. UINT32
  4131. EFIAPI
  4132. AsmMsrBitFieldWrite32 (
  4133. IN UINT32 Index,
  4134. IN UINTN StartBit,
  4135. IN UINTN EndBit,
  4136. IN UINT32 Value
  4137. );
  4138. /**
  4139. Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
  4140. result back to the bit field in the 64-bit MSR.
  4141. Reads the 64-bit MSR specified by Index, performs a bitwise OR
  4142. between the read result and the value specified by OrData, and writes the
  4143. result to the 64-bit MSR specified by Index. The lower 32-bits of the value
  4144. written to the MSR are returned. Extra left bits in OrData are stripped. The
  4145. caller must either guarantee that Index and the data written is valid, or
  4146. the caller must set up exception handlers to catch the exceptions. This
  4147. function is only available on IA-32 and x64.
  4148. If StartBit is greater than 31, then ASSERT().
  4149. If EndBit is greater than 31, then ASSERT().
  4150. If EndBit is less than StartBit, then ASSERT().
  4151. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4152. @param Index The 32-bit MSR index to write.
  4153. @param StartBit The ordinal of the least significant bit in the bit field.
  4154. Range 0..31.
  4155. @param EndBit The ordinal of the most significant bit in the bit field.
  4156. Range 0..31.
  4157. @param OrData The value to OR with the read value from the MSR.
  4158. @return The lower 32-bit of the value written to the MSR.
  4159. **/
  4160. UINT32
  4161. EFIAPI
  4162. AsmMsrBitFieldOr32 (
  4163. IN UINT32 Index,
  4164. IN UINTN StartBit,
  4165. IN UINTN EndBit,
  4166. IN UINT32 OrData
  4167. );
  4168. /**
  4169. Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
  4170. result back to the bit field in the 64-bit MSR.
  4171. Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
  4172. read result and the value specified by AndData, and writes the result to the
  4173. 64-bit MSR specified by Index. The lower 32-bits of the value written to the
  4174. MSR are returned. Extra left bits in AndData are stripped. The caller must
  4175. either guarantee that Index and the data written is valid, or the caller must
  4176. set up exception handlers to catch the exceptions. This function is only
  4177. available on IA-32 and x64.
  4178. If StartBit is greater than 31, then ASSERT().
  4179. If EndBit is greater than 31, then ASSERT().
  4180. If EndBit is less than StartBit, then ASSERT().
  4181. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4182. @param Index The 32-bit MSR index to write.
  4183. @param StartBit The ordinal of the least significant bit in the bit field.
  4184. Range 0..31.
  4185. @param EndBit The ordinal of the most significant bit in the bit field.
  4186. Range 0..31.
  4187. @param AndData The value to AND with the read value from the MSR.
  4188. @return The lower 32-bit of the value written to the MSR.
  4189. **/
  4190. UINT32
  4191. EFIAPI
  4192. AsmMsrBitFieldAnd32 (
  4193. IN UINT32 Index,
  4194. IN UINTN StartBit,
  4195. IN UINTN EndBit,
  4196. IN UINT32 AndData
  4197. );
  4198. /**
  4199. Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
  4200. bitwise OR, and writes the result back to the bit field in the
  4201. 64-bit MSR.
  4202. Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
  4203. bitwise OR between the read result and the value specified by
  4204. AndData, and writes the result to the 64-bit MSR specified by Index. The
  4205. lower 32-bits of the value written to the MSR are returned. Extra left bits
  4206. in both AndData and OrData are stripped. The caller must either guarantee
  4207. that Index and the data written is valid, or the caller must set up exception
  4208. handlers to catch the exceptions. This function is only available on IA-32
  4209. and x64.
  4210. If StartBit is greater than 31, then ASSERT().
  4211. If EndBit is greater than 31, then ASSERT().
  4212. If EndBit is less than StartBit, then ASSERT().
  4213. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4214. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4215. @param Index The 32-bit MSR index to write.
  4216. @param StartBit The ordinal of the least significant bit in the bit field.
  4217. Range 0..31.
  4218. @param EndBit The ordinal of the most significant bit in the bit field.
  4219. Range 0..31.
  4220. @param AndData The value to AND with the read value from the MSR.
  4221. @param OrData The value to OR with the result of the AND operation.
  4222. @return The lower 32-bit of the value written to the MSR.
  4223. **/
  4224. UINT32
  4225. EFIAPI
  4226. AsmMsrBitFieldAndThenOr32 (
  4227. IN UINT32 Index,
  4228. IN UINTN StartBit,
  4229. IN UINTN EndBit,
  4230. IN UINT32 AndData,
  4231. IN UINT32 OrData
  4232. );
  4233. /**
  4234. Returns a 64-bit Machine Specific Register(MSR).
  4235. Reads and returns the 64-bit MSR specified by Index. No parameter checking is
  4236. performed on Index, and some Index values may cause CPU exceptions. The
  4237. caller must either guarantee that Index is valid, or the caller must set up
  4238. exception handlers to catch the exceptions. This function is only available
  4239. on IA-32 and x64.
  4240. @param Index The 32-bit MSR index to read.
  4241. @return The value of the MSR identified by Index.
  4242. **/
  4243. UINT64
  4244. EFIAPI
  4245. AsmReadMsr64 (
  4246. IN UINT32 Index
  4247. );
  4248. /**
  4249. Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
  4250. value.
  4251. Writes the 64-bit value specified by Value to the MSR specified by Index. The
  4252. 64-bit value written to the MSR is returned. No parameter checking is
  4253. performed on Index or Value, and some of these may cause CPU exceptions. The
  4254. caller must either guarantee that Index and Value are valid, or the caller
  4255. must establish proper exception handlers. This function is only available on
  4256. IA-32 and x64.
  4257. @param Index The 32-bit MSR index to write.
  4258. @param Value The 64-bit value to write to the MSR.
  4259. @return Value
  4260. **/
  4261. UINT64
  4262. EFIAPI
  4263. AsmWriteMsr64 (
  4264. IN UINT32 Index,
  4265. IN UINT64 Value
  4266. );
  4267. /**
  4268. Reads a 64-bit MSR, performs a bitwise OR, and writes the result
  4269. back to the 64-bit MSR.
  4270. Reads the 64-bit MSR specified by Index, performs a bitwise OR
  4271. between the read result and the value specified by OrData, and writes the
  4272. result to the 64-bit MSR specified by Index. The value written to the MSR is
  4273. returned. No parameter checking is performed on Index or OrData, and some of
  4274. these may cause CPU exceptions. The caller must either guarantee that Index
  4275. and OrData are valid, or the caller must establish proper exception handlers.
  4276. This function is only available on IA-32 and x64.
  4277. @param Index The 32-bit MSR index to write.
  4278. @param OrData The value to OR with the read value from the MSR.
  4279. @return The value written back to the MSR.
  4280. **/
  4281. UINT64
  4282. EFIAPI
  4283. AsmMsrOr64 (
  4284. IN UINT32 Index,
  4285. IN UINT64 OrData
  4286. );
  4287. /**
  4288. Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
  4289. 64-bit MSR.
  4290. Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
  4291. read result and the value specified by OrData, and writes the result to the
  4292. 64-bit MSR specified by Index. The value written to the MSR is returned. No
  4293. parameter checking is performed on Index or OrData, and some of these may
  4294. cause CPU exceptions. The caller must either guarantee that Index and OrData
  4295. are valid, or the caller must establish proper exception handlers. This
  4296. function is only available on IA-32 and x64.
  4297. @param Index The 32-bit MSR index to write.
  4298. @param AndData The value to AND with the read value from the MSR.
  4299. @return The value written back to the MSR.
  4300. **/
  4301. UINT64
  4302. EFIAPI
  4303. AsmMsrAnd64 (
  4304. IN UINT32 Index,
  4305. IN UINT64 AndData
  4306. );
  4307. /**
  4308. Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
  4309. OR, and writes the result back to the 64-bit MSR.
  4310. Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
  4311. result and the value specified by AndData, performs a bitwise OR
  4312. between the result of the AND operation and the value specified by OrData,
  4313. and writes the result to the 64-bit MSR specified by Index. The value written
  4314. to the MSR is returned. No parameter checking is performed on Index, AndData,
  4315. or OrData, and some of these may cause CPU exceptions. The caller must either
  4316. guarantee that Index, AndData, and OrData are valid, or the caller must
  4317. establish proper exception handlers. This function is only available on IA-32
  4318. and x64.
  4319. @param Index The 32-bit MSR index to write.
  4320. @param AndData The value to AND with the read value from the MSR.
  4321. @param OrData The value to OR with the result of the AND operation.
  4322. @return The value written back to the MSR.
  4323. **/
  4324. UINT64
  4325. EFIAPI
  4326. AsmMsrAndThenOr64 (
  4327. IN UINT32 Index,
  4328. IN UINT64 AndData,
  4329. IN UINT64 OrData
  4330. );
  4331. /**
  4332. Reads a bit field of an MSR.
  4333. Reads the bit field in the 64-bit MSR. The bit field is specified by the
  4334. StartBit and the EndBit. The value of the bit field is returned. The caller
  4335. must either guarantee that Index is valid, or the caller must set up
  4336. exception handlers to catch the exceptions. This function is only available
  4337. on IA-32 and x64.
  4338. If StartBit is greater than 63, then ASSERT().
  4339. If EndBit is greater than 63, then ASSERT().
  4340. If EndBit is less than StartBit, then ASSERT().
  4341. @param Index The 32-bit MSR index to read.
  4342. @param StartBit The ordinal of the least significant bit in the bit field.
  4343. Range 0..63.
  4344. @param EndBit The ordinal of the most significant bit in the bit field.
  4345. Range 0..63.
  4346. @return The value read from the MSR.
  4347. **/
  4348. UINT64
  4349. EFIAPI
  4350. AsmMsrBitFieldRead64 (
  4351. IN UINT32 Index,
  4352. IN UINTN StartBit,
  4353. IN UINTN EndBit
  4354. );
  4355. /**
  4356. Writes a bit field to an MSR.
  4357. Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
  4358. the StartBit and the EndBit. All other bits in the destination MSR are
  4359. preserved. The MSR written is returned. The caller must either guarantee
  4360. that Index and the data written is valid, or the caller must set up exception
  4361. handlers to catch the exceptions. This function is only available on IA-32 and x64.
  4362. If StartBit is greater than 63, then ASSERT().
  4363. If EndBit is greater than 63, then ASSERT().
  4364. If EndBit is less than StartBit, then ASSERT().
  4365. If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4366. @param Index The 32-bit MSR index to write.
  4367. @param StartBit The ordinal of the least significant bit in the bit field.
  4368. Range 0..63.
  4369. @param EndBit The ordinal of the most significant bit in the bit field.
  4370. Range 0..63.
  4371. @param Value New value of the bit field.
  4372. @return The value written back to the MSR.
  4373. **/
  4374. UINT64
  4375. EFIAPI
  4376. AsmMsrBitFieldWrite64 (
  4377. IN UINT32 Index,
  4378. IN UINTN StartBit,
  4379. IN UINTN EndBit,
  4380. IN UINT64 Value
  4381. );
  4382. /**
  4383. Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
  4384. writes the result back to the bit field in the 64-bit MSR.
  4385. Reads the 64-bit MSR specified by Index, performs a bitwise OR
  4386. between the read result and the value specified by OrData, and writes the
  4387. result to the 64-bit MSR specified by Index. The value written to the MSR is
  4388. returned. Extra left bits in OrData are stripped. The caller must either
  4389. guarantee that Index and the data written is valid, or the caller must set up
  4390. exception handlers to catch the exceptions. This function is only available
  4391. on IA-32 and x64.
  4392. If StartBit is greater than 63, then ASSERT().
  4393. If EndBit is greater than 63, then ASSERT().
  4394. If EndBit is less than StartBit, then ASSERT().
  4395. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4396. @param Index The 32-bit MSR index to write.
  4397. @param StartBit The ordinal of the least significant bit in the bit field.
  4398. Range 0..63.
  4399. @param EndBit The ordinal of the most significant bit in the bit field.
  4400. Range 0..63.
  4401. @param OrData The value to OR with the read value from the bit field.
  4402. @return The value written back to the MSR.
  4403. **/
  4404. UINT64
  4405. EFIAPI
  4406. AsmMsrBitFieldOr64 (
  4407. IN UINT32 Index,
  4408. IN UINTN StartBit,
  4409. IN UINTN EndBit,
  4410. IN UINT64 OrData
  4411. );
  4412. /**
  4413. Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
  4414. result back to the bit field in the 64-bit MSR.
  4415. Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
  4416. read result and the value specified by AndData, and writes the result to the
  4417. 64-bit MSR specified by Index. The value written to the MSR is returned.
  4418. Extra left bits in AndData are stripped. The caller must either guarantee
  4419. that Index and the data written is valid, or the caller must set up exception
  4420. handlers to catch the exceptions. This function is only available on IA-32
  4421. and x64.
  4422. If StartBit is greater than 63, then ASSERT().
  4423. If EndBit is greater than 63, then ASSERT().
  4424. If EndBit is less than StartBit, then ASSERT().
  4425. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4426. @param Index The 32-bit MSR index to write.
  4427. @param StartBit The ordinal of the least significant bit in the bit field.
  4428. Range 0..63.
  4429. @param EndBit The ordinal of the most significant bit in the bit field.
  4430. Range 0..63.
  4431. @param AndData The value to AND with the read value from the bit field.
  4432. @return The value written back to the MSR.
  4433. **/
  4434. UINT64
  4435. EFIAPI
  4436. AsmMsrBitFieldAnd64 (
  4437. IN UINT32 Index,
  4438. IN UINTN StartBit,
  4439. IN UINTN EndBit,
  4440. IN UINT64 AndData
  4441. );
  4442. /**
  4443. Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
  4444. bitwise OR, and writes the result back to the bit field in the
  4445. 64-bit MSR.
  4446. Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
  4447. a bitwise OR between the read result and the value specified by
  4448. AndData, and writes the result to the 64-bit MSR specified by Index. The
  4449. value written to the MSR is returned. Extra left bits in both AndData and
  4450. OrData are stripped. The caller must either guarantee that Index and the data
  4451. written is valid, or the caller must set up exception handlers to catch the
  4452. exceptions. This function is only available on IA-32 and x64.
  4453. If StartBit is greater than 63, then ASSERT().
  4454. If EndBit is greater than 63, then ASSERT().
  4455. If EndBit is less than StartBit, then ASSERT().
  4456. If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4457. If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
  4458. @param Index The 32-bit MSR index to write.
  4459. @param StartBit The ordinal of the least significant bit in the bit field.
  4460. Range 0..63.
  4461. @param EndBit The ordinal of the most significant bit in the bit field.
  4462. Range 0..63.
  4463. @param AndData The value to AND with the read value from the bit field.
  4464. @param OrData The value to OR with the result of the AND operation.
  4465. @return The value written back to the MSR.
  4466. **/
  4467. UINT64
  4468. EFIAPI
  4469. AsmMsrBitFieldAndThenOr64 (
  4470. IN UINT32 Index,
  4471. IN UINTN StartBit,
  4472. IN UINTN EndBit,
  4473. IN UINT64 AndData,
  4474. IN UINT64 OrData
  4475. );
  4476. /**
  4477. Reads the current value of the EFLAGS register.
  4478. Reads and returns the current value of the EFLAGS register. This function is
  4479. only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
  4480. 64-bit value on x64.
  4481. @return EFLAGS on IA-32 or RFLAGS on x64.
  4482. **/
  4483. UINTN
  4484. EFIAPI
  4485. AsmReadEflags (
  4486. VOID
  4487. );
  4488. /**
  4489. Reads the current value of the Control Register 0 (CR0).
  4490. Reads and returns the current value of CR0. This function is only available
  4491. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4492. x64.
  4493. @return The value of the Control Register 0 (CR0).
  4494. **/
  4495. UINTN
  4496. EFIAPI
  4497. AsmReadCr0 (
  4498. VOID
  4499. );
  4500. /**
  4501. Reads the current value of the Control Register 2 (CR2).
  4502. Reads and returns the current value of CR2. This function is only available
  4503. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4504. x64.
  4505. @return The value of the Control Register 2 (CR2).
  4506. **/
  4507. UINTN
  4508. EFIAPI
  4509. AsmReadCr2 (
  4510. VOID
  4511. );
  4512. /**
  4513. Reads the current value of the Control Register 3 (CR3).
  4514. Reads and returns the current value of CR3. This function is only available
  4515. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4516. x64.
  4517. @return The value of the Control Register 3 (CR3).
  4518. **/
  4519. UINTN
  4520. EFIAPI
  4521. AsmReadCr3 (
  4522. VOID
  4523. );
  4524. /**
  4525. Reads the current value of the Control Register 4 (CR4).
  4526. Reads and returns the current value of CR4. This function is only available
  4527. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4528. x64.
  4529. @return The value of the Control Register 4 (CR4).
  4530. **/
  4531. UINTN
  4532. EFIAPI
  4533. AsmReadCr4 (
  4534. VOID
  4535. );
  4536. /**
  4537. Writes a value to Control Register 0 (CR0).
  4538. Writes and returns a new value to CR0. This function is only available on
  4539. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4540. @param Cr0 The value to write to CR0.
  4541. @return The value written to CR0.
  4542. **/
  4543. UINTN
  4544. EFIAPI
  4545. AsmWriteCr0 (
  4546. UINTN Cr0
  4547. );
  4548. /**
  4549. Writes a value to Control Register 2 (CR2).
  4550. Writes and returns a new value to CR2. This function is only available on
  4551. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4552. @param Cr2 The value to write to CR2.
  4553. @return The value written to CR2.
  4554. **/
  4555. UINTN
  4556. EFIAPI
  4557. AsmWriteCr2 (
  4558. UINTN Cr2
  4559. );
  4560. /**
  4561. Writes a value to Control Register 3 (CR3).
  4562. Writes and returns a new value to CR3. This function is only available on
  4563. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4564. @param Cr3 The value to write to CR3.
  4565. @return The value written to CR3.
  4566. **/
  4567. UINTN
  4568. EFIAPI
  4569. AsmWriteCr3 (
  4570. UINTN Cr3
  4571. );
  4572. /**
  4573. Writes a value to Control Register 4 (CR4).
  4574. Writes and returns a new value to CR4. This function is only available on
  4575. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4576. @param Cr4 The value to write to CR4.
  4577. @return The value written to CR4.
  4578. **/
  4579. UINTN
  4580. EFIAPI
  4581. AsmWriteCr4 (
  4582. UINTN Cr4
  4583. );
  4584. /**
  4585. Reads the current value of Debug Register 0 (DR0).
  4586. Reads and returns the current value of DR0. This function is only available
  4587. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4588. x64.
  4589. @return The value of Debug Register 0 (DR0).
  4590. **/
  4591. UINTN
  4592. EFIAPI
  4593. AsmReadDr0 (
  4594. VOID
  4595. );
  4596. /**
  4597. Reads the current value of Debug Register 1 (DR1).
  4598. Reads and returns the current value of DR1. This function is only available
  4599. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4600. x64.
  4601. @return The value of Debug Register 1 (DR1).
  4602. **/
  4603. UINTN
  4604. EFIAPI
  4605. AsmReadDr1 (
  4606. VOID
  4607. );
  4608. /**
  4609. Reads the current value of Debug Register 2 (DR2).
  4610. Reads and returns the current value of DR2. This function is only available
  4611. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4612. x64.
  4613. @return The value of Debug Register 2 (DR2).
  4614. **/
  4615. UINTN
  4616. EFIAPI
  4617. AsmReadDr2 (
  4618. VOID
  4619. );
  4620. /**
  4621. Reads the current value of Debug Register 3 (DR3).
  4622. Reads and returns the current value of DR3. This function is only available
  4623. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4624. x64.
  4625. @return The value of Debug Register 3 (DR3).
  4626. **/
  4627. UINTN
  4628. EFIAPI
  4629. AsmReadDr3 (
  4630. VOID
  4631. );
  4632. /**
  4633. Reads the current value of Debug Register 4 (DR4).
  4634. Reads and returns the current value of DR4. This function is only available
  4635. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4636. x64.
  4637. @return The value of Debug Register 4 (DR4).
  4638. **/
  4639. UINTN
  4640. EFIAPI
  4641. AsmReadDr4 (
  4642. VOID
  4643. );
  4644. /**
  4645. Reads the current value of Debug Register 5 (DR5).
  4646. Reads and returns the current value of DR5. This function is only available
  4647. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4648. x64.
  4649. @return The value of Debug Register 5 (DR5).
  4650. **/
  4651. UINTN
  4652. EFIAPI
  4653. AsmReadDr5 (
  4654. VOID
  4655. );
  4656. /**
  4657. Reads the current value of Debug Register 6 (DR6).
  4658. Reads and returns the current value of DR6. This function is only available
  4659. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4660. x64.
  4661. @return The value of Debug Register 6 (DR6).
  4662. **/
  4663. UINTN
  4664. EFIAPI
  4665. AsmReadDr6 (
  4666. VOID
  4667. );
  4668. /**
  4669. Reads the current value of Debug Register 7 (DR7).
  4670. Reads and returns the current value of DR7. This function is only available
  4671. on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
  4672. x64.
  4673. @return The value of Debug Register 7 (DR7).
  4674. **/
  4675. UINTN
  4676. EFIAPI
  4677. AsmReadDr7 (
  4678. VOID
  4679. );
  4680. /**
  4681. Writes a value to Debug Register 0 (DR0).
  4682. Writes and returns a new value to DR0. This function is only available on
  4683. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4684. @param Dr0 The value to write to Dr0.
  4685. @return The value written to Debug Register 0 (DR0).
  4686. **/
  4687. UINTN
  4688. EFIAPI
  4689. AsmWriteDr0 (
  4690. UINTN Dr0
  4691. );
  4692. /**
  4693. Writes a value to Debug Register 1 (DR1).
  4694. Writes and returns a new value to DR1. This function is only available on
  4695. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4696. @param Dr1 The value to write to Dr1.
  4697. @return The value written to Debug Register 1 (DR1).
  4698. **/
  4699. UINTN
  4700. EFIAPI
  4701. AsmWriteDr1 (
  4702. UINTN Dr1
  4703. );
  4704. /**
  4705. Writes a value to Debug Register 2 (DR2).
  4706. Writes and returns a new value to DR2. This function is only available on
  4707. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4708. @param Dr2 The value to write to Dr2.
  4709. @return The value written to Debug Register 2 (DR2).
  4710. **/
  4711. UINTN
  4712. EFIAPI
  4713. AsmWriteDr2 (
  4714. UINTN Dr2
  4715. );
  4716. /**
  4717. Writes a value to Debug Register 3 (DR3).
  4718. Writes and returns a new value to DR3. This function is only available on
  4719. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4720. @param Dr3 The value to write to Dr3.
  4721. @return The value written to Debug Register 3 (DR3).
  4722. **/
  4723. UINTN
  4724. EFIAPI
  4725. AsmWriteDr3 (
  4726. UINTN Dr3
  4727. );
  4728. /**
  4729. Writes a value to Debug Register 4 (DR4).
  4730. Writes and returns a new value to DR4. This function is only available on
  4731. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4732. @param Dr4 The value to write to Dr4.
  4733. @return The value written to Debug Register 4 (DR4).
  4734. **/
  4735. UINTN
  4736. EFIAPI
  4737. AsmWriteDr4 (
  4738. UINTN Dr4
  4739. );
  4740. /**
  4741. Writes a value to Debug Register 5 (DR5).
  4742. Writes and returns a new value to DR5. This function is only available on
  4743. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4744. @param Dr5 The value to write to Dr5.
  4745. @return The value written to Debug Register 5 (DR5).
  4746. **/
  4747. UINTN
  4748. EFIAPI
  4749. AsmWriteDr5 (
  4750. UINTN Dr5
  4751. );
  4752. /**
  4753. Writes a value to Debug Register 6 (DR6).
  4754. Writes and returns a new value to DR6. This function is only available on
  4755. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4756. @param Dr6 The value to write to Dr6.
  4757. @return The value written to Debug Register 6 (DR6).
  4758. **/
  4759. UINTN
  4760. EFIAPI
  4761. AsmWriteDr6 (
  4762. UINTN Dr6
  4763. );
  4764. /**
  4765. Writes a value to Debug Register 7 (DR7).
  4766. Writes and returns a new value to DR7. This function is only available on
  4767. IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
  4768. @param Dr7 The value to write to Dr7.
  4769. @return The value written to Debug Register 7 (DR7).
  4770. **/
  4771. UINTN
  4772. EFIAPI
  4773. AsmWriteDr7 (
  4774. UINTN Dr7
  4775. );
  4776. /**
  4777. Reads the current value of Code Segment Register (CS).
  4778. Reads and returns the current value of CS. This function is only available on
  4779. IA-32 and x64.
  4780. @return The current value of CS.
  4781. **/
  4782. UINT16
  4783. EFIAPI
  4784. AsmReadCs (
  4785. VOID
  4786. );
  4787. /**
  4788. Reads the current value of Data Segment Register (DS).
  4789. Reads and returns the current value of DS. This function is only available on
  4790. IA-32 and x64.
  4791. @return The current value of DS.
  4792. **/
  4793. UINT16
  4794. EFIAPI
  4795. AsmReadDs (
  4796. VOID
  4797. );
  4798. /**
  4799. Reads the current value of Extra Segment Register (ES).
  4800. Reads and returns the current value of ES. This function is only available on
  4801. IA-32 and x64.
  4802. @return The current value of ES.
  4803. **/
  4804. UINT16
  4805. EFIAPI
  4806. AsmReadEs (
  4807. VOID
  4808. );
  4809. /**
  4810. Reads the current value of FS Data Segment Register (FS).
  4811. Reads and returns the current value of FS. This function is only available on
  4812. IA-32 and x64.
  4813. @return The current value of FS.
  4814. **/
  4815. UINT16
  4816. EFIAPI
  4817. AsmReadFs (
  4818. VOID
  4819. );
  4820. /**
  4821. Reads the current value of GS Data Segment Register (GS).
  4822. Reads and returns the current value of GS. This function is only available on
  4823. IA-32 and x64.
  4824. @return The current value of GS.
  4825. **/
  4826. UINT16
  4827. EFIAPI
  4828. AsmReadGs (
  4829. VOID
  4830. );
  4831. /**
  4832. Reads the current value of Stack Segment Register (SS).
  4833. Reads and returns the current value of SS. This function is only available on
  4834. IA-32 and x64.
  4835. @return The current value of SS.
  4836. **/
  4837. UINT16
  4838. EFIAPI
  4839. AsmReadSs (
  4840. VOID
  4841. );
  4842. /**
  4843. Reads the current value of Task Register (TR).
  4844. Reads and returns the current value of TR. This function is only available on
  4845. IA-32 and x64.
  4846. @return The current value of TR.
  4847. **/
  4848. UINT16
  4849. EFIAPI
  4850. AsmReadTr (
  4851. VOID
  4852. );
  4853. /**
  4854. Reads the current Global Descriptor Table Register(GDTR) descriptor.
  4855. Reads and returns the current GDTR descriptor and returns it in Gdtr. This
  4856. function is only available on IA-32 and x64.
  4857. If Gdtr is NULL, then ASSERT().
  4858. @param Gdtr The pointer to a GDTR descriptor.
  4859. **/
  4860. VOID
  4861. EFIAPI
  4862. AsmReadGdtr (
  4863. OUT IA32_DESCRIPTOR *Gdtr
  4864. );
  4865. /**
  4866. Writes the current Global Descriptor Table Register (GDTR) descriptor.
  4867. Writes and the current GDTR descriptor specified by Gdtr. This function is
  4868. only available on IA-32 and x64.
  4869. If Gdtr is NULL, then ASSERT().
  4870. @param Gdtr The pointer to a GDTR descriptor.
  4871. **/
  4872. VOID
  4873. EFIAPI
  4874. AsmWriteGdtr (
  4875. IN CONST IA32_DESCRIPTOR *Gdtr
  4876. );
  4877. /**
  4878. Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
  4879. Reads and returns the current IDTR descriptor and returns it in Idtr. This
  4880. function is only available on IA-32 and x64.
  4881. If Idtr is NULL, then ASSERT().
  4882. @param Idtr The pointer to a IDTR descriptor.
  4883. **/
  4884. VOID
  4885. EFIAPI
  4886. AsmReadIdtr (
  4887. OUT IA32_DESCRIPTOR *Idtr
  4888. );
  4889. /**
  4890. Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
  4891. Writes the current IDTR descriptor and returns it in Idtr. This function is
  4892. only available on IA-32 and x64.
  4893. If Idtr is NULL, then ASSERT().
  4894. @param Idtr The pointer to a IDTR descriptor.
  4895. **/
  4896. VOID
  4897. EFIAPI
  4898. AsmWriteIdtr (
  4899. IN CONST IA32_DESCRIPTOR *Idtr
  4900. );
  4901. /**
  4902. Reads the current Local Descriptor Table Register(LDTR) selector.
  4903. Reads and returns the current 16-bit LDTR descriptor value. This function is
  4904. only available on IA-32 and x64.
  4905. @return The current selector of LDT.
  4906. **/
  4907. UINT16
  4908. EFIAPI
  4909. AsmReadLdtr (
  4910. VOID
  4911. );
  4912. /**
  4913. Writes the current Local Descriptor Table Register (LDTR) selector.
  4914. Writes and the current LDTR descriptor specified by Ldtr. This function is
  4915. only available on IA-32 and x64.
  4916. @param Ldtr 16-bit LDTR selector value.
  4917. **/
  4918. VOID
  4919. EFIAPI
  4920. AsmWriteLdtr (
  4921. IN UINT16 Ldtr
  4922. );
  4923. /**
  4924. Save the current floating point/SSE/SSE2 context to a buffer.
  4925. Saves the current floating point/SSE/SSE2 state to the buffer specified by
  4926. Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
  4927. available on IA-32 and x64.
  4928. If Buffer is NULL, then ASSERT().
  4929. If Buffer is not aligned on a 16-byte boundary, then ASSERT().
  4930. @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.
  4931. **/
  4932. VOID
  4933. EFIAPI
  4934. AsmFxSave (
  4935. OUT IA32_FX_BUFFER *Buffer
  4936. );
  4937. /**
  4938. Restores the current floating point/SSE/SSE2 context from a buffer.
  4939. Restores the current floating point/SSE/SSE2 state from the buffer specified
  4940. by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
  4941. only available on IA-32 and x64.
  4942. If Buffer is NULL, then ASSERT().
  4943. If Buffer is not aligned on a 16-byte boundary, then ASSERT().
  4944. If Buffer was not saved with AsmFxSave(), then ASSERT().
  4945. @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.
  4946. **/
  4947. VOID
  4948. EFIAPI
  4949. AsmFxRestore (
  4950. IN CONST IA32_FX_BUFFER *Buffer
  4951. );
  4952. /**
  4953. Reads the current value of 64-bit MMX Register #0 (MM0).
  4954. Reads and returns the current value of MM0. This function is only available
  4955. on IA-32 and x64.
  4956. @return The current value of MM0.
  4957. **/
  4958. UINT64
  4959. EFIAPI
  4960. AsmReadMm0 (
  4961. VOID
  4962. );
  4963. /**
  4964. Reads the current value of 64-bit MMX Register #1 (MM1).
  4965. Reads and returns the current value of MM1. This function is only available
  4966. on IA-32 and x64.
  4967. @return The current value of MM1.
  4968. **/
  4969. UINT64
  4970. EFIAPI
  4971. AsmReadMm1 (
  4972. VOID
  4973. );
  4974. /**
  4975. Reads the current value of 64-bit MMX Register #2 (MM2).
  4976. Reads and returns the current value of MM2. This function is only available
  4977. on IA-32 and x64.
  4978. @return The current value of MM2.
  4979. **/
  4980. UINT64
  4981. EFIAPI
  4982. AsmReadMm2 (
  4983. VOID
  4984. );
  4985. /**
  4986. Reads the current value of 64-bit MMX Register #3 (MM3).
  4987. Reads and returns the current value of MM3. This function is only available
  4988. on IA-32 and x64.
  4989. @return The current value of MM3.
  4990. **/
  4991. UINT64
  4992. EFIAPI
  4993. AsmReadMm3 (
  4994. VOID
  4995. );
  4996. /**
  4997. Reads the current value of 64-bit MMX Register #4 (MM4).
  4998. Reads and returns the current value of MM4. This function is only available
  4999. on IA-32 and x64.
  5000. @return The current value of MM4.
  5001. **/
  5002. UINT64
  5003. EFIAPI
  5004. AsmReadMm4 (
  5005. VOID
  5006. );
  5007. /**
  5008. Reads the current value of 64-bit MMX Register #5 (MM5).
  5009. Reads and returns the current value of MM5. This function is only available
  5010. on IA-32 and x64.
  5011. @return The current value of MM5.
  5012. **/
  5013. UINT64
  5014. EFIAPI
  5015. AsmReadMm5 (
  5016. VOID
  5017. );
  5018. /**
  5019. Reads the current value of 64-bit MMX Register #6 (MM6).
  5020. Reads and returns the current value of MM6. This function is only available
  5021. on IA-32 and x64.
  5022. @return The current value of MM6.
  5023. **/
  5024. UINT64
  5025. EFIAPI
  5026. AsmReadMm6 (
  5027. VOID
  5028. );
  5029. /**
  5030. Reads the current value of 64-bit MMX Register #7 (MM7).
  5031. Reads and returns the current value of MM7. This function is only available
  5032. on IA-32 and x64.
  5033. @return The current value of MM7.
  5034. **/
  5035. UINT64
  5036. EFIAPI
  5037. AsmReadMm7 (
  5038. VOID
  5039. );
  5040. /**
  5041. Writes the current value of 64-bit MMX Register #0 (MM0).
  5042. Writes the current value of MM0. This function is only available on IA32 and
  5043. x64.
  5044. @param Value The 64-bit value to write to MM0.
  5045. **/
  5046. VOID
  5047. EFIAPI
  5048. AsmWriteMm0 (
  5049. IN UINT64 Value
  5050. );
  5051. /**
  5052. Writes the current value of 64-bit MMX Register #1 (MM1).
  5053. Writes the current value of MM1. This function is only available on IA32 and
  5054. x64.
  5055. @param Value The 64-bit value to write to MM1.
  5056. **/
  5057. VOID
  5058. EFIAPI
  5059. AsmWriteMm1 (
  5060. IN UINT64 Value
  5061. );
  5062. /**
  5063. Writes the current value of 64-bit MMX Register #2 (MM2).
  5064. Writes the current value of MM2. This function is only available on IA32 and
  5065. x64.
  5066. @param Value The 64-bit value to write to MM2.
  5067. **/
  5068. VOID
  5069. EFIAPI
  5070. AsmWriteMm2 (
  5071. IN UINT64 Value
  5072. );
  5073. /**
  5074. Writes the current value of 64-bit MMX Register #3 (MM3).
  5075. Writes the current value of MM3. This function is only available on IA32 and
  5076. x64.
  5077. @param Value The 64-bit value to write to MM3.
  5078. **/
  5079. VOID
  5080. EFIAPI
  5081. AsmWriteMm3 (
  5082. IN UINT64 Value
  5083. );
  5084. /**
  5085. Writes the current value of 64-bit MMX Register #4 (MM4).
  5086. Writes the current value of MM4. This function is only available on IA32 and
  5087. x64.
  5088. @param Value The 64-bit value to write to MM4.
  5089. **/
  5090. VOID
  5091. EFIAPI
  5092. AsmWriteMm4 (
  5093. IN UINT64 Value
  5094. );
  5095. /**
  5096. Writes the current value of 64-bit MMX Register #5 (MM5).
  5097. Writes the current value of MM5. This function is only available on IA32 and
  5098. x64.
  5099. @param Value The 64-bit value to write to MM5.
  5100. **/
  5101. VOID
  5102. EFIAPI
  5103. AsmWriteMm5 (
  5104. IN UINT64 Value
  5105. );
  5106. /**
  5107. Writes the current value of 64-bit MMX Register #6 (MM6).
  5108. Writes the current value of MM6. This function is only available on IA32 and
  5109. x64.
  5110. @param Value The 64-bit value to write to MM6.
  5111. **/
  5112. VOID
  5113. EFIAPI
  5114. AsmWriteMm6 (
  5115. IN UINT64 Value
  5116. );
  5117. /**
  5118. Writes the current value of 64-bit MMX Register #7 (MM7).
  5119. Writes the current value of MM7. This function is only available on IA32 and
  5120. x64.
  5121. @param Value The 64-bit value to write to MM7.
  5122. **/
  5123. VOID
  5124. EFIAPI
  5125. AsmWriteMm7 (
  5126. IN UINT64 Value
  5127. );
  5128. /**
  5129. Reads the current value of Time Stamp Counter (TSC).
  5130. Reads and returns the current value of TSC. This function is only available
  5131. on IA-32 and x64.
  5132. @return The current value of TSC
  5133. **/
  5134. UINT64
  5135. EFIAPI
  5136. AsmReadTsc (
  5137. VOID
  5138. );
  5139. /**
  5140. Reads the current value of a Performance Counter (PMC).
  5141. Reads and returns the current value of performance counter specified by
  5142. Index. This function is only available on IA-32 and x64.
  5143. @param Index The 32-bit Performance Counter index to read.
  5144. @return The value of the PMC specified by Index.
  5145. **/
  5146. UINT64
  5147. EFIAPI
  5148. AsmReadPmc (
  5149. IN UINT32 Index
  5150. );
  5151. /**
  5152. Sets up a monitor buffer that is used by AsmMwait().
  5153. Executes a MONITOR instruction with the register state specified by Eax, Ecx
  5154. and Edx. Returns Eax. This function is only available on IA-32 and x64.
  5155. @param Eax The value to load into EAX or RAX before executing the MONITOR
  5156. instruction.
  5157. @param Ecx The value to load into ECX or RCX before executing the MONITOR
  5158. instruction.
  5159. @param Edx The value to load into EDX or RDX before executing the MONITOR
  5160. instruction.
  5161. @return Eax
  5162. **/
  5163. UINTN
  5164. EFIAPI
  5165. AsmMonitor (
  5166. IN UINTN Eax,
  5167. IN UINTN Ecx,
  5168. IN UINTN Edx
  5169. );
  5170. /**
  5171. Executes an MWAIT instruction.
  5172. Executes an MWAIT instruction with the register state specified by Eax and
  5173. Ecx. Returns Eax. This function is only available on IA-32 and x64.
  5174. @param Eax The value to load into EAX or RAX before executing the MONITOR
  5175. instruction.
  5176. @param Ecx The value to load into ECX or RCX before executing the MONITOR
  5177. instruction.
  5178. @return Eax
  5179. **/
  5180. UINTN
  5181. EFIAPI
  5182. AsmMwait (
  5183. IN UINTN Eax,
  5184. IN UINTN Ecx
  5185. );
  5186. /**
  5187. Executes a WBINVD instruction.
  5188. Executes a WBINVD instruction. This function is only available on IA-32 and
  5189. x64.
  5190. **/
  5191. VOID
  5192. EFIAPI
  5193. AsmWbinvd (
  5194. VOID
  5195. );
  5196. /**
  5197. Executes a INVD instruction.
  5198. Executes a INVD instruction. This function is only available on IA-32 and
  5199. x64.
  5200. **/
  5201. VOID
  5202. EFIAPI
  5203. AsmInvd (
  5204. VOID
  5205. );
  5206. /**
  5207. Flushes a cache line from all the instruction and data caches within the
  5208. coherency domain of the CPU.
  5209. Flushed the cache line specified by LinearAddress, and returns LinearAddress.
  5210. This function is only available on IA-32 and x64.
  5211. @param LinearAddress The address of the cache line to flush. If the CPU is
  5212. in a physical addressing mode, then LinearAddress is a
  5213. physical address. If the CPU is in a virtual
  5214. addressing mode, then LinearAddress is a virtual
  5215. address.
  5216. @return LinearAddress.
  5217. **/
  5218. VOID *
  5219. EFIAPI
  5220. AsmFlushCacheLine (
  5221. IN VOID *LinearAddress
  5222. );
  5223. /**
  5224. Enables the 32-bit paging mode on the CPU.
  5225. Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
  5226. must be properly initialized prior to calling this service. This function
  5227. assumes the current execution mode is 32-bit protected mode. This function is
  5228. only available on IA-32. After the 32-bit paging mode is enabled, control is
  5229. transferred to the function specified by EntryPoint using the new stack
  5230. specified by NewStack and passing in the parameters specified by Context1 and
  5231. Context2. Context1 and Context2 are optional and may be NULL. The function
  5232. EntryPoint must never return.
  5233. If the current execution mode is not 32-bit protected mode, then ASSERT().
  5234. If EntryPoint is NULL, then ASSERT().
  5235. If NewStack is NULL, then ASSERT().
  5236. There are a number of constraints that must be followed before calling this
  5237. function:
  5238. 1) Interrupts must be disabled.
  5239. 2) The caller must be in 32-bit protected mode with flat descriptors. This
  5240. means all descriptors must have a base of 0 and a limit of 4GB.
  5241. 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
  5242. descriptors.
  5243. 4) CR3 must point to valid page tables that will be used once the transition
  5244. is complete, and those page tables must guarantee that the pages for this
  5245. function and the stack are identity mapped.
  5246. @param EntryPoint A pointer to function to call with the new stack after
  5247. paging is enabled.
  5248. @param Context1 A pointer to the context to pass into the EntryPoint
  5249. function as the first parameter after paging is enabled.
  5250. @param Context2 A pointer to the context to pass into the EntryPoint
  5251. function as the second parameter after paging is enabled.
  5252. @param NewStack A pointer to the new stack to use for the EntryPoint
  5253. function after paging is enabled.
  5254. **/
  5255. VOID
  5256. EFIAPI
  5257. AsmEnablePaging32 (
  5258. IN SWITCH_STACK_ENTRY_POINT EntryPoint,
  5259. IN VOID *Context1, OPTIONAL
  5260. IN VOID *Context2, OPTIONAL
  5261. IN VOID *NewStack
  5262. );
  5263. /**
  5264. Disables the 32-bit paging mode on the CPU.
  5265. Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
  5266. mode. This function assumes the current execution mode is 32-paged protected
  5267. mode. This function is only available on IA-32. After the 32-bit paging mode
  5268. is disabled, control is transferred to the function specified by EntryPoint
  5269. using the new stack specified by NewStack and passing in the parameters
  5270. specified by Context1 and Context2. Context1 and Context2 are optional and
  5271. may be NULL. The function EntryPoint must never return.
  5272. If the current execution mode is not 32-bit paged mode, then ASSERT().
  5273. If EntryPoint is NULL, then ASSERT().
  5274. If NewStack is NULL, then ASSERT().
  5275. There are a number of constraints that must be followed before calling this
  5276. function:
  5277. 1) Interrupts must be disabled.
  5278. 2) The caller must be in 32-bit paged mode.
  5279. 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
  5280. 4) CR3 must point to valid page tables that guarantee that the pages for
  5281. this function and the stack are identity mapped.
  5282. @param EntryPoint A pointer to function to call with the new stack after
  5283. paging is disabled.
  5284. @param Context1 A pointer to the context to pass into the EntryPoint
  5285. function as the first parameter after paging is disabled.
  5286. @param Context2 A pointer to the context to pass into the EntryPoint
  5287. function as the second parameter after paging is
  5288. disabled.
  5289. @param NewStack A pointer to the new stack to use for the EntryPoint
  5290. function after paging is disabled.
  5291. **/
  5292. VOID
  5293. EFIAPI
  5294. AsmDisablePaging32 (
  5295. IN SWITCH_STACK_ENTRY_POINT EntryPoint,
  5296. IN VOID *Context1, OPTIONAL
  5297. IN VOID *Context2, OPTIONAL
  5298. IN VOID *NewStack
  5299. );
  5300. /**
  5301. Enables the 64-bit paging mode on the CPU.
  5302. Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
  5303. must be properly initialized prior to calling this service. This function
  5304. assumes the current execution mode is 32-bit protected mode with flat
  5305. descriptors. This function is only available on IA-32. After the 64-bit
  5306. paging mode is enabled, control is transferred to the function specified by
  5307. EntryPoint using the new stack specified by NewStack and passing in the
  5308. parameters specified by Context1 and Context2. Context1 and Context2 are
  5309. optional and may be 0. The function EntryPoint must never return.
  5310. If the current execution mode is not 32-bit protected mode with flat
  5311. descriptors, then ASSERT().
  5312. If EntryPoint is 0, then ASSERT().
  5313. If NewStack is 0, then ASSERT().
  5314. @param Cs The 16-bit selector to load in the CS before EntryPoint
  5315. is called. The descriptor in the GDT that this selector
  5316. references must be setup for long mode.
  5317. @param EntryPoint The 64-bit virtual address of the function to call with
  5318. the new stack after paging is enabled.
  5319. @param Context1 The 64-bit virtual address of the context to pass into
  5320. the EntryPoint function as the first parameter after
  5321. paging is enabled.
  5322. @param Context2 The 64-bit virtual address of the context to pass into
  5323. the EntryPoint function as the second parameter after
  5324. paging is enabled.
  5325. @param NewStack The 64-bit virtual address of the new stack to use for
  5326. the EntryPoint function after paging is enabled.
  5327. **/
  5328. VOID
  5329. EFIAPI
  5330. AsmEnablePaging64 (
  5331. IN UINT16 Cs,
  5332. IN UINT64 EntryPoint,
  5333. IN UINT64 Context1, OPTIONAL
  5334. IN UINT64 Context2, OPTIONAL
  5335. IN UINT64 NewStack
  5336. );
  5337. /**
  5338. Disables the 64-bit paging mode on the CPU.
  5339. Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
  5340. mode. This function assumes the current execution mode is 64-paging mode.
  5341. This function is only available on x64. After the 64-bit paging mode is
  5342. disabled, control is transferred to the function specified by EntryPoint
  5343. using the new stack specified by NewStack and passing in the parameters
  5344. specified by Context1 and Context2. Context1 and Context2 are optional and
  5345. may be 0. The function EntryPoint must never return.
  5346. If the current execution mode is not 64-bit paged mode, then ASSERT().
  5347. If EntryPoint is 0, then ASSERT().
  5348. If NewStack is 0, then ASSERT().
  5349. @param Cs The 16-bit selector to load in the CS before EntryPoint
  5350. is called. The descriptor in the GDT that this selector
  5351. references must be setup for 32-bit protected mode.
  5352. @param EntryPoint The 64-bit virtual address of the function to call with
  5353. the new stack after paging is disabled.
  5354. @param Context1 The 64-bit virtual address of the context to pass into
  5355. the EntryPoint function as the first parameter after
  5356. paging is disabled.
  5357. @param Context2 The 64-bit virtual address of the context to pass into
  5358. the EntryPoint function as the second parameter after
  5359. paging is disabled.
  5360. @param NewStack The 64-bit virtual address of the new stack to use for
  5361. the EntryPoint function after paging is disabled.
  5362. **/
  5363. VOID
  5364. EFIAPI
  5365. AsmDisablePaging64 (
  5366. IN UINT16 Cs,
  5367. IN UINT32 EntryPoint,
  5368. IN UINT32 Context1, OPTIONAL
  5369. IN UINT32 Context2, OPTIONAL
  5370. IN UINT32 NewStack
  5371. );
  5372. //
  5373. // 16-bit thunking services
  5374. //
  5375. /**
  5376. Retrieves the properties for 16-bit thunk functions.
  5377. Computes the size of the buffer and stack below 1MB required to use the
  5378. AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
  5379. buffer size is returned in RealModeBufferSize, and the stack size is returned
  5380. in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
  5381. then the actual minimum stack size is ExtraStackSize plus the maximum number
  5382. of bytes that need to be passed to the 16-bit real mode code.
  5383. If RealModeBufferSize is NULL, then ASSERT().
  5384. If ExtraStackSize is NULL, then ASSERT().
  5385. @param RealModeBufferSize A pointer to the size of the buffer below 1MB
  5386. required to use the 16-bit thunk functions.
  5387. @param ExtraStackSize A pointer to the extra size of stack below 1MB
  5388. that the 16-bit thunk functions require for
  5389. temporary storage in the transition to and from
  5390. 16-bit real mode.
  5391. **/
  5392. VOID
  5393. EFIAPI
  5394. AsmGetThunk16Properties (
  5395. OUT UINT32 *RealModeBufferSize,
  5396. OUT UINT32 *ExtraStackSize
  5397. );
  5398. /**
  5399. Prepares all structures a code required to use AsmThunk16().
  5400. Prepares all structures and code required to use AsmThunk16().
  5401. This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
  5402. virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
  5403. If ThunkContext is NULL, then ASSERT().
  5404. @param ThunkContext A pointer to the context structure that describes the
  5405. 16-bit real mode code to call.
  5406. **/
  5407. VOID
  5408. EFIAPI
  5409. AsmPrepareThunk16 (
  5410. IN OUT THUNK_CONTEXT *ThunkContext
  5411. );
  5412. /**
  5413. Transfers control to a 16-bit real mode entry point and returns the results.
  5414. Transfers control to a 16-bit real mode entry point and returns the results.
  5415. AsmPrepareThunk16() must be called with ThunkContext before this function is used.
  5416. This function must be called with interrupts disabled.
  5417. The register state from the RealModeState field of ThunkContext is restored just prior
  5418. to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
  5419. which is used to set the interrupt state when a 16-bit real mode entry point is called.
  5420. Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
  5421. The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
  5422. the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
  5423. The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
  5424. so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
  5425. and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
  5426. point must exit with a RETF instruction. The register state is captured into RealModeState immediately
  5427. after the RETF instruction is executed.
  5428. If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
  5429. or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
  5430. the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
  5431. If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
  5432. then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
  5433. This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
  5434. If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
  5435. is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
  5436. If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
  5437. ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
  5438. disable the A20 mask.
  5439. If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
  5440. ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
  5441. then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
  5442. If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
  5443. ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
  5444. If ThunkContext is NULL, then ASSERT().
  5445. If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
  5446. If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
  5447. ThunkAttributes, then ASSERT().
  5448. This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
  5449. virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1.
  5450. @param ThunkContext A pointer to the context structure that describes the
  5451. 16-bit real mode code to call.
  5452. **/
  5453. VOID
  5454. EFIAPI
  5455. AsmThunk16 (
  5456. IN OUT THUNK_CONTEXT *ThunkContext
  5457. );
  5458. /**
  5459. Prepares all structures and code for a 16-bit real mode thunk, transfers
  5460. control to a 16-bit real mode entry point, and returns the results.
  5461. Prepares all structures and code for a 16-bit real mode thunk, transfers
  5462. control to a 16-bit real mode entry point, and returns the results. If the
  5463. caller only need to perform a single 16-bit real mode thunk, then this
  5464. service should be used. If the caller intends to make more than one 16-bit
  5465. real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
  5466. once and AsmThunk16() can be called for each 16-bit real mode thunk.
  5467. This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
  5468. virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
  5469. See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
  5470. @param ThunkContext A pointer to the context structure that describes the
  5471. 16-bit real mode code to call.
  5472. **/
  5473. VOID
  5474. EFIAPI
  5475. AsmPrepareAndThunk16 (
  5476. IN OUT THUNK_CONTEXT *ThunkContext
  5477. );
  5478. #endif
  5479. #endif