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3c515.c 24KB

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  1. /*
  2. * 3c515.c -- 3COM 3C515 Fast Etherlink ISA 10/100BASE-TX driver for etherboot
  3. * Copyright (C) 2002 Timothy Legge <tlegge@rogers.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. *
  19. * Portions of this code:
  20. * Copyright (C) 1997-2002 Donald Becker 3c515.c: A 3Com ISA EtherLink XL "Corkscrew" ethernet driver for linux.
  21. * Copyright (C) 2001 P.J.H.Fox (fox@roestock.demon.co.uk) ISAPNP Tools
  22. * Copyright (c) 2002 Jaroslav Kysela <perex@suse.cz> ISA Plug & Play support Linux Kernel
  23. * Copyright (C) 2000 Shusuke Nisiyama <shu@athena.qe.eng.hokudai.ac.jp> etherboot-5.0.5 3c595.c
  24. * Coptright (C) 1995 Martin Renters etherboot-5.0.5 3c509.c
  25. * Copyright (C) 1999 LightSys Technology Services, Inc. etherboot-5.0.5 3c90x.c
  26. * Portions Copyright (C) 1999 Steve Smith etherboot-5.0.5 3c90x.c
  27. *
  28. * The probe and reset functions and defines are direct copies from the
  29. * Becker code modified where necessary to make it work for etherboot
  30. *
  31. * The poll and transmit functions either contain code from or were written by referencing
  32. * the above referenced etherboot drivers. This driver would not have been
  33. * possible without this prior work
  34. *
  35. * REVISION HISTORY:
  36. * ================
  37. * v0.10 4-17-2002 TJL Initial implementation.
  38. * v0.11 4-17-2002 TJL Cleanup of the code
  39. * v0.12 4-26-2002 TJL Added ISA Plug and Play for Non-PNP Bioses
  40. * v0.13 6-10-2002 TJL Fixed ISA_PNP MAC Address problem
  41. * v0.14 9-23-2003 TJL Replaced delay with currticks
  42. *
  43. * Indent Options: indent -kr -i8
  44. * *********************************************************/
  45. #define ISA_PNP
  46. /*#define EDEBUG1*/
  47. /* to get some global routines like printf */
  48. #include "etherboot.h"
  49. /* to get the interface to the body of the program */
  50. #include "nic.h"
  51. #include "isa.h"
  52. #include "timer.h"
  53. #ifdef ISA_PNP
  54. static void t3c515_wait(unsigned int nticks)
  55. {
  56. unsigned int to = currticks() + nticks;
  57. while (currticks() < to)
  58. /* wait */ ;
  59. }
  60. #endif
  61. /* TJL definations */
  62. #define HZ 100
  63. #define u16 unsigned short
  64. #define u32 unsigned long
  65. #define s16 signed short
  66. #define s32 signed long
  67. static unsigned short eth_nic_base;
  68. #define BASE (eth_nic_base)
  69. static int if_port;
  70. struct corkscrew_private *vp;
  71. /* Brought directly from 3c515.c by Becker */
  72. #define CORKSCREW 1
  73. /* Maximum events (Rx packets, etc.) to handle at each interrupt.
  74. static int max_interrupt_work = 20;
  75. */
  76. /* Enable the automatic media selection code -- usually set. */
  77. #define AUTOMEDIA 1
  78. /* Allow the use of fragment bus master transfers instead of only
  79. programmed-I/O for Vortex cards. Full-bus-master transfers are always
  80. enabled by default on Boomerang cards. If VORTEX_BUS_MASTER is defined,
  81. the feature may be turned on using 'options'. */
  82. #define VORTEX_BUS_MASTER
  83. /* A few values that may be tweaked. */
  84. /* Keep the ring sizes a power of two for efficiency. */
  85. #define TX_RING_SIZE 16
  86. #define RX_RING_SIZE 16
  87. #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
  88. /* "Knobs" for adjusting internal parameters. */
  89. /* Put out somewhat more debugging messages. (0 - no msg, 1 minimal msgs). */
  90. #define DRIVER_DEBUG 1
  91. /* Some values here only for performance evaluation and path-coverage
  92. debugging.
  93. static int rx_nocopy, rx_copy, queued_packet;
  94. */
  95. #ifdef DRIVER_DEBUG
  96. static int corkscrew_debug = DRIVER_DEBUG;
  97. #else
  98. static int corkscrew_debug = 1;
  99. #endif
  100. #define CORKSCREW_ID 10
  101. #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
  102. #define EL3_CMD 0x0e
  103. #define EL3_STATUS 0x0e
  104. #define RX_BYTES_MASK (unsigned short) (0x07ff)
  105. enum corkscrew_cmd {
  106. TotalReset = 0 << 11, SelectWindow = 1 << 11, StartCoax = 2 << 11,
  107. RxDisable = 3 << 11, RxEnable = 4 << 11, RxReset = 5 << 11,
  108. UpStall = 6 << 11, UpUnstall = (6 << 11) + 1,
  109. DownStall = (6 << 11) + 2, DownUnstall = (6 << 11) + 3,
  110. RxDiscard = 8 << 11, TxEnable = 9 << 11, TxDisable =
  111. 10 << 11, TxReset = 11 << 11,
  112. FakeIntr = 12 << 11, AckIntr = 13 << 11, SetIntrEnb = 14 << 11,
  113. SetStatusEnb = 15 << 11, SetRxFilter = 16 << 11, SetRxThreshold =
  114. 17 << 11,
  115. SetTxThreshold = 18 << 11, SetTxStart = 19 << 11,
  116. StartDMAUp = 20 << 11, StartDMADown = (20 << 11) + 1, StatsEnable =
  117. 21 << 11,
  118. StatsDisable = 22 << 11, StopCoax = 23 << 11,
  119. };
  120. /* The SetRxFilter command accepts the following classes: */
  121. enum RxFilter {
  122. RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8
  123. };
  124. /* Bits in the general status register. */
  125. enum corkscrew_status {
  126. IntLatch = 0x0001, AdapterFailure = 0x0002, TxComplete = 0x0004,
  127. TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
  128. IntReq = 0x0040, StatsFull = 0x0080,
  129. DMADone = 1 << 8, DownComplete = 1 << 9, UpComplete = 1 << 10,
  130. DMAInProgress = 1 << 11, /* DMA controller is still busy. */
  131. CmdInProgress = 1 << 12, /* EL3_CMD is still busy. */
  132. };
  133. /* Register window 1 offsets, the window used in normal operation.
  134. On the Corkscrew this window is always mapped at offsets 0x10-0x1f. */
  135. enum Window1 {
  136. TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
  137. RxStatus = 0x18, Timer = 0x1A, TxStatus = 0x1B,
  138. TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
  139. };
  140. enum Window0 {
  141. Wn0IRQ = 0x08,
  142. #if defined(CORKSCREW)
  143. Wn0EepromCmd = 0x200A, /* Corkscrew EEPROM command register. */
  144. Wn0EepromData = 0x200C, /* Corkscrew EEPROM results register. */
  145. #else
  146. Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
  147. Wn0EepromData = 12, /* Window 0: EEPROM results register. */
  148. #endif
  149. };
  150. enum Win0_EEPROM_bits {
  151. EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
  152. EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
  153. EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
  154. };
  155. enum Window3 { /* Window 3: MAC/config bits. */
  156. Wn3_Config = 0, Wn3_MAC_Ctrl = 6, Wn3_Options = 8,
  157. };
  158. union wn3_config {
  159. int i;
  160. struct w3_config_fields {
  161. unsigned int ram_size:3, ram_width:1, ram_speed:2,
  162. rom_size:2;
  163. int pad8:8;
  164. unsigned int ram_split:2, pad18:2, xcvr:3, pad21:1,
  165. autoselect:1;
  166. int pad24:7;
  167. } u;
  168. };
  169. enum Window4 {
  170. Wn4_NetDiag = 6, Wn4_Media = 10, /* Window 4: Xcvr/media bits. */
  171. };
  172. enum Win4_Media_bits {
  173. Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
  174. Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
  175. Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
  176. Media_LnkBeat = 0x0800,
  177. };
  178. enum Window7 { /* Window 7: Bus Master control. */
  179. Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,
  180. };
  181. /* Boomerang-style bus master control registers. Note ISA aliases! */
  182. enum MasterCtrl {
  183. PktStatus = 0x400, DownListPtr = 0x404, FragAddr = 0x408, FragLen =
  184. 0x40c,
  185. TxFreeThreshold = 0x40f, UpPktStatus = 0x410, UpListPtr = 0x418,
  186. };
  187. /* The Rx and Tx descriptor lists.
  188. Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
  189. alignment contraint on tx_ring[] and rx_ring[]. */
  190. struct boom_rx_desc {
  191. u32 next;
  192. s32 status;
  193. u32 addr;
  194. s32 length;
  195. };
  196. /* Values for the Rx status entry. */
  197. enum rx_desc_status {
  198. RxDComplete = 0x00008000, RxDError = 0x4000,
  199. /* See boomerang_rx() for actual error bits */
  200. };
  201. struct boom_tx_desc {
  202. u32 next;
  203. s32 status;
  204. u32 addr;
  205. s32 length;
  206. };
  207. struct corkscrew_private {
  208. const char *product_name;
  209. struct net_device *next_module;
  210. /* The Rx and Tx rings are here to keep them quad-word-aligned. */
  211. struct boom_rx_desc rx_ring[RX_RING_SIZE];
  212. struct boom_tx_desc tx_ring[TX_RING_SIZE];
  213. /* The addresses of transmit- and receive-in-place skbuffs. */
  214. struct sk_buff *rx_skbuff[RX_RING_SIZE];
  215. struct sk_buff *tx_skbuff[TX_RING_SIZE];
  216. unsigned int cur_rx, cur_tx; /* The next free ring entry */
  217. unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
  218. struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
  219. int capabilities; /* Adapter capabilities word. */
  220. int options; /* User-settable misc. driver options. */
  221. int last_rx_packets; /* For media autoselection. */
  222. unsigned int available_media:8, /* From Wn3_Options */
  223. media_override:3, /* Passed-in media type. */
  224. default_media:3, /* Read from the EEPROM. */
  225. full_duplex:1, autoselect:1, bus_master:1, /* Vortex can only do a fragment bus-m. */
  226. full_bus_master_tx:1, full_bus_master_rx:1, /* Boomerang */
  227. tx_full:1;
  228. };
  229. /* The action to take with a media selection timer tick.
  230. Note that we deviate from the 3Com order by checking 10base2 before AUI.
  231. */
  232. enum xcvr_types {
  233. XCVR_10baseT =
  234. 0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
  235. XCVR_100baseFx, XCVR_MII = 6, XCVR_Default = 8,
  236. };
  237. static struct media_table {
  238. char *name;
  239. unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
  240. mask:8, /* The transceiver-present bit in Wn3_Config. */
  241. next:8; /* The media type to try next. */
  242. short wait; /* Time before we check media status. */
  243. } media_tbl[] = {
  244. {
  245. "10baseT", Media_10TP, 0x08, XCVR_10base2, (14 * HZ) / 10}
  246. , {
  247. "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1 * HZ) / 10}
  248. , {
  249. "undefined", 0, 0x80, XCVR_10baseT, 10000}
  250. , {
  251. "10base2", 0, 0x10, XCVR_AUI, (1 * HZ) / 10}
  252. , {
  253. "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx,
  254. (14 * HZ) / 10}
  255. , {
  256. "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14 * HZ) / 10}
  257. , {
  258. "MII", 0, 0x40, XCVR_10baseT, 3 * HZ}
  259. , {
  260. "undefined", 0, 0x01, XCVR_10baseT, 10000}
  261. , {
  262. "Default", 0, 0xFF, XCVR_10baseT, 10000}
  263. ,};
  264. /* TILEG Modified to remove reference to dev */
  265. static int corkscrew_found_device(int ioaddr, int irq, int product_index,
  266. int options, struct nic *nic);
  267. static int corkscrew_probe1(int ioaddr, int irq, int product_index,
  268. struct nic *nic);
  269. /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
  270. /* Note: this is the only limit on the number of cards supported!! */
  271. static int options[8] = { -1, -1, -1, -1, -1, -1, -1, -1, };
  272. /* End Brought directly from 3c515.c by Becker */
  273. /**************************************************************************
  274. RESET - Reset adapter
  275. ***************************************************************************/
  276. static void t515_reset(struct nic *nic)
  277. {
  278. int ioaddr = BASE;
  279. union wn3_config config;
  280. int i;
  281. /* Before initializing select the active media port. */
  282. EL3WINDOW(3);
  283. if (vp->full_duplex)
  284. outb(0x20, ioaddr + Wn3_MAC_Ctrl); /* Set the full-duplex bit. */
  285. config.i = inl(ioaddr + Wn3_Config);
  286. if (vp->media_override != 7) {
  287. if (corkscrew_debug > 1)
  288. printf("Media override to transceiver %d (%s).\n",
  289. vp->media_override,
  290. media_tbl[vp->media_override].name);
  291. if_port = vp->media_override;
  292. } else if (vp->autoselect) {
  293. /* Find first available media type, starting with 100baseTx. */
  294. if_port = 4;
  295. while (!(vp->available_media & media_tbl[if_port].mask))
  296. if_port = media_tbl[if_port].next;
  297. if (corkscrew_debug > 1)
  298. printf("Initial media type %s.\n",
  299. media_tbl[if_port].name);
  300. } else
  301. if_port = vp->default_media;
  302. config.u.xcvr = if_port;
  303. outl(config.i, ioaddr + Wn3_Config);
  304. if (corkscrew_debug > 1) {
  305. printf("corkscrew_open() InternalConfig 0x%hX.\n",
  306. config.i);
  307. }
  308. outw(TxReset, ioaddr + EL3_CMD);
  309. for (i = 20; i >= 0; i--)
  310. if (!(inw(ioaddr + EL3_STATUS) & CmdInProgress))
  311. break;
  312. outw(RxReset, ioaddr + EL3_CMD);
  313. /* Wait a few ticks for the RxReset command to complete. */
  314. for (i = 20; i >= 0; i--)
  315. if (!(inw(ioaddr + EL3_STATUS) & CmdInProgress))
  316. break;
  317. outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
  318. if (corkscrew_debug > 1) {
  319. EL3WINDOW(4);
  320. printf("FIXME: fix print for irq, not 9");
  321. printf("corkscrew_open() irq %d media status 0x%hX.\n",
  322. 9, inw(ioaddr + Wn4_Media));
  323. }
  324. /* Set the station address and mask in window 2 each time opened. */
  325. EL3WINDOW(2);
  326. for (i = 0; i < 6; i++)
  327. outb(nic->node_addr[i], ioaddr + i);
  328. for (; i < 12; i += 2)
  329. outw(0, ioaddr + i);
  330. if (if_port == 3)
  331. /* Start the thinnet transceiver. We should really wait 50ms... */
  332. outw(StartCoax, ioaddr + EL3_CMD);
  333. EL3WINDOW(4);
  334. outw((inw(ioaddr + Wn4_Media) & ~(Media_10TP | Media_SQE)) |
  335. media_tbl[if_port].media_bits, ioaddr + Wn4_Media);
  336. /* Switch to the stats window, and clear all stats by reading. */
  337. /* outw(StatsDisable, ioaddr + EL3_CMD);*/
  338. EL3WINDOW(6);
  339. for (i = 0; i < 10; i++)
  340. inb(ioaddr + i);
  341. inw(ioaddr + 10);
  342. inw(ioaddr + 12);
  343. /* New: On the Vortex we must also clear the BadSSD counter. */
  344. EL3WINDOW(4);
  345. inb(ioaddr + 12);
  346. /* ..and on the Boomerang we enable the extra statistics bits. */
  347. outw(0x0040, ioaddr + Wn4_NetDiag);
  348. /* Switch to register set 7 for normal use. */
  349. EL3WINDOW(7);
  350. /* Temporarily left in place. If these FIXMEs are printed
  351. it meand that special logic for that card may need to be added
  352. see Becker's 3c515.c driver */
  353. if (vp->full_bus_master_rx) { /* Boomerang bus master. */
  354. printf("FIXME: Is this if necessary");
  355. vp->cur_rx = vp->dirty_rx = 0;
  356. if (corkscrew_debug > 2)
  357. printf(" Filling in the Rx ring.\n");
  358. for (i = 0; i < RX_RING_SIZE; i++) {
  359. printf("FIXME: Is this if necessary");
  360. }
  361. }
  362. if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
  363. vp->cur_tx = vp->dirty_tx = 0;
  364. outb(PKT_BUF_SZ >> 8, ioaddr + TxFreeThreshold); /* Room for a packet. */
  365. /* Clear the Tx ring. */
  366. for (i = 0; i < TX_RING_SIZE; i++)
  367. vp->tx_skbuff[i] = 0;
  368. outl(0, ioaddr + DownListPtr);
  369. }
  370. /* Set receiver mode: presumably accept b-case and phys addr only. */
  371. outw(SetRxFilter | RxStation | RxMulticast | RxBroadcast | RxProm,
  372. ioaddr + EL3_CMD);
  373. outw(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
  374. outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
  375. /* Allow status bits to be seen. */
  376. outw(SetStatusEnb | AdapterFailure | IntReq | StatsFull |
  377. (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
  378. (vp->full_bus_master_rx ? UpComplete : RxComplete) |
  379. (vp->bus_master ? DMADone : 0), ioaddr + EL3_CMD);
  380. /* Ack all pending events, and set active indicator mask. */
  381. outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
  382. ioaddr + EL3_CMD);
  383. outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete | StatsFull
  384. | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete,
  385. ioaddr + EL3_CMD);
  386. }
  387. /**************************************************************************
  388. POLL - Wait for a frame
  389. ***************************************************************************/
  390. static int t515_poll(struct nic *nic, int retrieve)
  391. {
  392. short status, cst;
  393. register short rx_fifo;
  394. cst = inw(BASE + EL3_STATUS);
  395. if ((cst & RxComplete) == 0) {
  396. /* Ack all pending events, and set active indicator mask. */
  397. outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
  398. BASE + EL3_CMD);
  399. outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete |
  400. StatsFull | (vp->
  401. bus_master ? DMADone : 0) | UpComplete |
  402. DownComplete, BASE + EL3_CMD);
  403. return 0;
  404. }
  405. status = inw(BASE + RxStatus);
  406. if (status & RxDError) {
  407. printf("RxDError\n");
  408. outw(RxDiscard, BASE + EL3_CMD);
  409. return 0;
  410. }
  411. rx_fifo = status & RX_BYTES_MASK;
  412. if (rx_fifo == 0)
  413. return 0;
  414. if ( ! retrieve ) return 1;
  415. #ifdef EDEBUG
  416. printf("[l=%d", rx_fifo);
  417. #endif
  418. insw(BASE + RX_FIFO, nic->packet, rx_fifo / 2);
  419. if (rx_fifo & 1)
  420. nic->packet[rx_fifo - 1] = inb(BASE + RX_FIFO);
  421. nic->packetlen = rx_fifo;
  422. while (1) {
  423. status = inw(BASE + RxStatus);
  424. #ifdef EDEBUG
  425. printf("0x%hX*", status);
  426. #endif
  427. rx_fifo = status & RX_BYTES_MASK;
  428. if (rx_fifo > 0) {
  429. insw(BASE + RX_FIFO, nic->packet + nic->packetlen,
  430. rx_fifo / 2);
  431. if (rx_fifo & 1)
  432. nic->packet[nic->packetlen + rx_fifo - 1] =
  433. inb(BASE + RX_FIFO);
  434. nic->packetlen += rx_fifo;
  435. #ifdef EDEBUG
  436. printf("+%d", rx_fifo);
  437. #endif
  438. }
  439. if ((status & RxComplete) == 0) {
  440. #ifdef EDEBUG
  441. printf("=%d", nic->packetlen);
  442. #endif
  443. break;
  444. }
  445. udelay(1000);
  446. }
  447. /* acknowledge reception of packet */
  448. outw(RxDiscard, BASE + EL3_CMD);
  449. while (inw(BASE + EL3_STATUS) & CmdInProgress);
  450. #ifdef EDEBUG
  451. {
  452. unsigned short type = 0;
  453. type = (nic->packet[12] << 8) | nic->packet[13];
  454. if (nic->packet[0] + nic->packet[1] + nic->packet[2] +
  455. nic->packet[3] + nic->packet[4] + nic->packet[5] ==
  456. 0xFF * ETH_ALEN)
  457. printf(",t=0x%hX,b]", type);
  458. else
  459. printf(",t=0x%hX]", type);
  460. }
  461. #endif
  462. return 1;
  463. }
  464. /*************************************************************************
  465. 3Com 515 - specific routines
  466. **************************************************************************/
  467. static char padmap[] = {
  468. 0, 3, 2, 1
  469. };
  470. /**************************************************************************
  471. TRANSMIT - Transmit a frame
  472. ***************************************************************************/
  473. static void t515_transmit(struct nic *nic, const char *d, /* Destination */
  474. unsigned int t, /* Type */
  475. unsigned int s, /* size */
  476. const char *p)
  477. { /* Packet */
  478. register int len;
  479. int pad;
  480. int status;
  481. #ifdef EDEBUG
  482. printf("{l=%d,t=0x%hX}", s + ETH_HLEN, t);
  483. #endif
  484. /* swap bytes of type */
  485. t = htons(t);
  486. len = s + ETH_HLEN; /* actual length of packet */
  487. pad = padmap[len & 3];
  488. /*
  489. * The 3c515 automatically pads short packets to minimum ethernet length,
  490. * but we drop packets that are too large. Perhaps we should truncate
  491. * them instead?
  492. Copied from 3c595. Is this true for the 3c515?
  493. */
  494. if (len + pad > ETH_FRAME_LEN) {
  495. return;
  496. }
  497. /* drop acknowledgements */
  498. while ((status = inb(BASE + TxStatus)) & TxComplete) {
  499. /*if(status & (TXS_UNDERRUN|0x88|TXS_STATUS_OVERFLOW)) { */
  500. outw(TxReset, BASE + EL3_CMD);
  501. outw(TxEnable, BASE + EL3_CMD);
  502. /* } */
  503. outb(0x0, BASE + TxStatus);
  504. }
  505. while (inw(BASE + TxFree) < len + pad + 4) {
  506. /* no room in FIFO */
  507. }
  508. outw(len, BASE + TX_FIFO);
  509. outw(0x0, BASE + TX_FIFO); /* Second dword meaningless */
  510. /* write packet */
  511. outsw(BASE + TX_FIFO, d, ETH_ALEN / 2);
  512. outsw(BASE + TX_FIFO, nic->node_addr, ETH_ALEN / 2);
  513. outw(t, BASE + TX_FIFO);
  514. outsw(BASE + TX_FIFO, p, s / 2);
  515. if (s & 1)
  516. outb(*(p + s - 1), BASE + TX_FIFO);
  517. while (pad--)
  518. outb(0, BASE + TX_FIFO); /* Padding */
  519. /* wait for Tx complete */
  520. while ((inw(BASE + EL3_STATUS) & CmdInProgress) != 0);
  521. }
  522. /**************************************************************************
  523. DISABLE - Turn off ethernet interface
  524. ***************************************************************************/
  525. static void t515_disable(struct dev *dev)
  526. {
  527. struct nic *nic = (struct nic *) dev;
  528. /* merge reset an disable */
  529. t515_reset(nic);
  530. /* This is a hack. Since ltsp worked on my
  531. system without any disable functionality I
  532. have no way to determine if this works */
  533. /* Disable the receiver and transmitter. */
  534. outw(RxDisable, BASE + EL3_CMD);
  535. outw(TxDisable, BASE + EL3_CMD);
  536. if (if_port == XCVR_10base2)
  537. /* Turn off thinnet power. Green! */
  538. outw(StopCoax, BASE + EL3_CMD);
  539. outw(SetIntrEnb | 0x0000, BASE + EL3_CMD);
  540. #ifdef ISA_PNP
  541. /*Deactivate */
  542. /* ACTIVATE;
  543. WRITE_DATA(0);
  544. */
  545. #endif
  546. return;
  547. }
  548. static void t515_irq(struct nic *nic __unused, irq_action_t action __unused)
  549. {
  550. switch ( action ) {
  551. case DISABLE :
  552. break;
  553. case ENABLE :
  554. break;
  555. case FORCE :
  556. break;
  557. }
  558. }
  559. /**************************************************************************
  560. PROBE - Look for an adapter, this routine's visible to the outside
  561. You should omit the last argument struct pci_device * for a non-PCI NIC
  562. ***************************************************************************/
  563. void config_pnp_device(void);
  564. static int t515_probe(struct dev *dev,
  565. unsigned short *probe_addrs __unused)
  566. {
  567. struct nic *nic = (struct nic *) dev;
  568. /* Direct copy from Beckers 3c515.c removing any ISAPNP sections */
  569. int cards_found = 0;
  570. static int ioaddr;
  571. #ifdef ISA_PNP
  572. config_pnp_device();
  573. #endif
  574. /* Check all locations on the ISA bus -- evil! */
  575. for (ioaddr = 0x100; ioaddr < 0x400; ioaddr += 0x20) {
  576. int irq;
  577. /* Check the resource configuration for a matching ioaddr. */
  578. if ((inw(ioaddr + 0x2002) & 0x1f0) != (ioaddr & 0x1f0))
  579. continue;
  580. /* Verify by reading the device ID from the EEPROM. */
  581. {
  582. int timer;
  583. outw(EEPROM_Read + 7, ioaddr + Wn0EepromCmd);
  584. /* Pause for at least 162 us. for the read to take place. */
  585. for (timer = 4; timer >= 0; timer--) {
  586. t3c515_wait(1);
  587. if ((inw(ioaddr + Wn0EepromCmd) & 0x0200)
  588. == 0)
  589. break;
  590. }
  591. if (inw(ioaddr + Wn0EepromData) != 0x6d50)
  592. continue;
  593. }
  594. printf
  595. ("3c515 Resource configuration register 0x%hX, DCR 0x%hX.\n",
  596. inl(ioaddr + 0x2002), inw(ioaddr + 0x2000));
  597. irq = inw(ioaddr + 0x2002) & 15;
  598. BASE = ioaddr;
  599. corkscrew_found_device(BASE, irq, CORKSCREW_ID,
  600. options[cards_found], nic);
  601. cards_found++;
  602. }
  603. if (corkscrew_debug)
  604. printf("%d 3c515 cards found.\n", cards_found);
  605. if (cards_found > 0) {
  606. t515_reset(nic);
  607. nic->irqno = 0;
  608. nic->ioaddr = BASE;
  609. dev->disable = t515_disable;
  610. nic->poll = t515_poll;
  611. nic->transmit = t515_transmit;
  612. nic->irq = t515_irq;
  613. /* Based on PnP ISA map */
  614. dev->devid.vendor_id = htons(ISAPNP_VENDOR('T', 'C', 'M'));
  615. dev->devid.device_id = htons(0x5051);
  616. return 1;
  617. } else
  618. return 0;
  619. }
  620. static int
  621. corkscrew_found_device(int ioaddr, int irq,
  622. int product_index, int options, struct nic *nic)
  623. {
  624. /* Direct copy from Becker 3c515.c with unecessary parts removed */
  625. vp->product_name = "3c515";
  626. vp->options = options;
  627. if (options >= 0) {
  628. vp->media_override =
  629. ((options & 7) == 2) ? 0 : options & 7;
  630. vp->full_duplex = (options & 8) ? 1 : 0;
  631. vp->bus_master = (options & 16) ? 1 : 0;
  632. } else {
  633. vp->media_override = 7;
  634. vp->full_duplex = 0;
  635. vp->bus_master = 0;
  636. }
  637. corkscrew_probe1(ioaddr, irq, product_index, nic);
  638. return 0;
  639. }
  640. static int
  641. corkscrew_probe1(int ioaddr, int irq, int product_index __unused,
  642. struct nic *nic)
  643. {
  644. unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
  645. int i;
  646. ioaddr = BASE;
  647. printf("3Com %s at 0x%hX, ", vp->product_name, ioaddr);
  648. /* Read the station address from the EEPROM. */
  649. EL3WINDOW(0);
  650. for (i = 0; i < 0x18; i++) {
  651. short *phys_addr = (short *) nic->node_addr;
  652. int timer;
  653. outw(EEPROM_Read + i, ioaddr + Wn0EepromCmd);
  654. /* Pause for at least 162 us. for the read to take place. */
  655. for (timer = 4; timer >= 0; timer--) {
  656. t3c515_wait(1);
  657. if ((inw(ioaddr + Wn0EepromCmd) & 0x0200) == 0)
  658. break;
  659. }
  660. eeprom[i] = inw(ioaddr + Wn0EepromData);
  661. #ifdef EDEBUG1
  662. printf("Value %d: %hX ", i, eeprom[i]);
  663. #endif
  664. checksum ^= eeprom[i];
  665. if (i < 3)
  666. phys_addr[i] = htons(eeprom[i]);
  667. }
  668. checksum = (checksum ^ (checksum >> 8)) & 0xff;
  669. if (checksum != 0x00)
  670. printf(" ***INVALID CHECKSUM 0x%hX*** ", checksum);
  671. printf("%!", nic->node_addr);
  672. if (eeprom[16] == 0x11c7) { /* Corkscrew */
  673. }
  674. printf(", IRQ %d\n", irq);
  675. /* Tell them about an invalid IRQ. */
  676. if (corkscrew_debug && (irq <= 0 || irq > 15))
  677. printf
  678. (" *** Warning: this IRQ is unlikely to work! ***\n");
  679. {
  680. char *ram_split[] = { "5:3", "3:1", "1:1", "3:5" };
  681. union wn3_config config;
  682. EL3WINDOW(3);
  683. vp->available_media = inw(ioaddr + Wn3_Options);
  684. config.i = inl(ioaddr + Wn3_Config);
  685. if (corkscrew_debug > 1)
  686. printf
  687. (" Internal config register is %4.4x, transceivers 0x%hX.\n",
  688. config.i, inw(ioaddr + Wn3_Options));
  689. printf
  690. (" %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
  691. 8 << config.u.ram_size,
  692. config.u.ram_width ? "word" : "byte",
  693. ram_split[config.u.ram_split],
  694. config.u.autoselect ? "autoselect/" : "",
  695. media_tbl[config.u.xcvr].name);
  696. if_port = config.u.xcvr;
  697. vp->default_media = config.u.xcvr;
  698. vp->autoselect = config.u.autoselect;
  699. }
  700. if (vp->media_override != 7) {
  701. printf(" Media override to transceiver type %d (%s).\n",
  702. vp->media_override,
  703. media_tbl[vp->media_override].name);
  704. if_port = vp->media_override;
  705. }
  706. vp->capabilities = eeprom[16];
  707. vp->full_bus_master_tx = (vp->capabilities & 0x20) ? 1 : 0;
  708. /* Rx is broken at 10mbps, so we always disable it. */
  709. /* vp->full_bus_master_rx = 0; */
  710. vp->full_bus_master_rx = (vp->capabilities & 0x20) ? 1 : 0;
  711. return 0;
  712. }
  713. static struct isa_driver t515_driver __isa_driver = {
  714. .type = NIC_DRIVER,
  715. .name = "3C515",
  716. .probe = t515_probe,
  717. .ioaddrs = 0,
  718. };
  719. ISA_ROM("3c515","3c515, Fast EtherLink ISA");