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  1. /*
  2. * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
  3. * Copyright (C) 2008 Mellanox Technologies Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of the
  8. * License, or any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. FILE_LICENCE ( GPL2_OR_LATER );
  20. #include <stdint.h>
  21. #include <stdlib.h>
  22. #include <stdio.h>
  23. #include <string.h>
  24. #include <strings.h>
  25. #include <unistd.h>
  26. #include <errno.h>
  27. #include <byteswap.h>
  28. #include <gpxe/io.h>
  29. #include <gpxe/pci.h>
  30. #include <gpxe/malloc.h>
  31. #include <gpxe/umalloc.h>
  32. #include <gpxe/iobuf.h>
  33. #include <gpxe/netdevice.h>
  34. #include <gpxe/infiniband.h>
  35. #include <gpxe/ib_smc.h>
  36. #include "hermon.h"
  37. /**
  38. * @file
  39. *
  40. * Mellanox Hermon Infiniband HCA
  41. *
  42. */
  43. /***************************************************************************
  44. *
  45. * Queue number allocation
  46. *
  47. ***************************************************************************
  48. */
  49. /**
  50. * Allocate offsets within usage bitmask
  51. *
  52. * @v bits Usage bitmask
  53. * @v bits_len Length of usage bitmask
  54. * @v num_bits Number of contiguous bits to allocate within bitmask
  55. * @ret bit First free bit within bitmask, or negative error
  56. */
  57. static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
  58. unsigned int bits_len,
  59. unsigned int num_bits ) {
  60. unsigned int bit = 0;
  61. hermon_bitmask_t mask = 1;
  62. unsigned int found = 0;
  63. /* Search bits for num_bits contiguous free bits */
  64. while ( bit < bits_len ) {
  65. if ( ( mask & *bits ) == 0 ) {
  66. if ( ++found == num_bits )
  67. goto found;
  68. } else {
  69. found = 0;
  70. }
  71. bit++;
  72. mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
  73. if ( mask == 1 )
  74. bits++;
  75. }
  76. return -ENFILE;
  77. found:
  78. /* Mark bits as in-use */
  79. do {
  80. *bits |= mask;
  81. if ( mask == 1 )
  82. bits--;
  83. mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
  84. } while ( --found );
  85. return ( bit - num_bits + 1 );
  86. }
  87. /**
  88. * Free offsets within usage bitmask
  89. *
  90. * @v bits Usage bitmask
  91. * @v bit Starting bit within bitmask
  92. * @v num_bits Number of contiguous bits to free within bitmask
  93. */
  94. static void hermon_bitmask_free ( hermon_bitmask_t *bits,
  95. int bit, unsigned int num_bits ) {
  96. hermon_bitmask_t mask;
  97. for ( ; num_bits ; bit++, num_bits-- ) {
  98. mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
  99. bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
  100. }
  101. }
  102. /***************************************************************************
  103. *
  104. * HCA commands
  105. *
  106. ***************************************************************************
  107. */
  108. /**
  109. * Wait for Hermon command completion
  110. *
  111. * @v hermon Hermon device
  112. * @v hcr HCA command registers
  113. * @ret rc Return status code
  114. */
  115. static int hermon_cmd_wait ( struct hermon *hermon,
  116. struct hermonprm_hca_command_register *hcr ) {
  117. unsigned int wait;
  118. for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
  119. hcr->u.dwords[6] =
  120. readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
  121. if ( ( MLX_GET ( hcr, go ) == 0 ) &&
  122. ( MLX_GET ( hcr, t ) == hermon->toggle ) )
  123. return 0;
  124. mdelay ( 1 );
  125. }
  126. return -EBUSY;
  127. }
  128. /**
  129. * Issue HCA command
  130. *
  131. * @v hermon Hermon device
  132. * @v command Command opcode, flags and input/output lengths
  133. * @v op_mod Opcode modifier (0 if no modifier applicable)
  134. * @v in Input parameters
  135. * @v in_mod Input modifier (0 if no modifier applicable)
  136. * @v out Output parameters
  137. * @ret rc Return status code
  138. */
  139. static int hermon_cmd ( struct hermon *hermon, unsigned long command,
  140. unsigned int op_mod, const void *in,
  141. unsigned int in_mod, void *out ) {
  142. struct hermonprm_hca_command_register hcr;
  143. unsigned int opcode = HERMON_HCR_OPCODE ( command );
  144. size_t in_len = HERMON_HCR_IN_LEN ( command );
  145. size_t out_len = HERMON_HCR_OUT_LEN ( command );
  146. void *in_buffer;
  147. void *out_buffer;
  148. unsigned int status;
  149. unsigned int i;
  150. int rc;
  151. assert ( in_len <= HERMON_MBOX_SIZE );
  152. assert ( out_len <= HERMON_MBOX_SIZE );
  153. DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
  154. hermon, opcode, in_len,
  155. ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
  156. ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
  157. /* Check that HCR is free */
  158. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  159. DBGC ( hermon, "Hermon %p command interface locked\n",
  160. hermon );
  161. return rc;
  162. }
  163. /* Flip HCR toggle */
  164. hermon->toggle = ( 1 - hermon->toggle );
  165. /* Prepare HCR */
  166. memset ( &hcr, 0, sizeof ( hcr ) );
  167. in_buffer = &hcr.u.dwords[0];
  168. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  169. in_buffer = hermon->mailbox_in;
  170. MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
  171. }
  172. memcpy ( in_buffer, in, in_len );
  173. MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
  174. out_buffer = &hcr.u.dwords[3];
  175. if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
  176. out_buffer = hermon->mailbox_out;
  177. MLX_FILL_1 ( &hcr, 4, out_param_l,
  178. virt_to_bus ( out_buffer ) );
  179. }
  180. MLX_FILL_4 ( &hcr, 6,
  181. opcode, opcode,
  182. opcode_modifier, op_mod,
  183. go, 1,
  184. t, hermon->toggle );
  185. DBGC ( hermon, "Hermon %p issuing command %04x\n",
  186. hermon, opcode );
  187. DBGC2_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  188. &hcr, sizeof ( hcr ) );
  189. if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
  190. DBGC2 ( hermon, "Input mailbox:\n" );
  191. DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
  192. ( ( in_len < 512 ) ? in_len : 512 ) );
  193. }
  194. /* Issue command */
  195. for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
  196. i++ ) {
  197. writel ( hcr.u.dwords[i],
  198. hermon->config + HERMON_HCR_REG ( i ) );
  199. barrier();
  200. }
  201. /* Wait for command completion */
  202. if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
  203. DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
  204. hermon );
  205. DBGC_HDA ( hermon,
  206. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  207. &hcr, sizeof ( hcr ) );
  208. return rc;
  209. }
  210. /* Check command status */
  211. status = MLX_GET ( &hcr, status );
  212. if ( status != 0 ) {
  213. DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
  214. hermon, status );
  215. DBGC_HDA ( hermon,
  216. virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
  217. &hcr, sizeof ( hcr ) );
  218. return -EIO;
  219. }
  220. /* Read output parameters, if any */
  221. hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
  222. hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
  223. memcpy ( out, out_buffer, out_len );
  224. if ( out_len ) {
  225. DBGC2 ( hermon, "Output%s:\n",
  226. ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
  227. DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
  228. ( ( out_len < 512 ) ? out_len : 512 ) );
  229. }
  230. return 0;
  231. }
  232. static inline int
  233. hermon_cmd_query_dev_cap ( struct hermon *hermon,
  234. struct hermonprm_query_dev_cap *dev_cap ) {
  235. return hermon_cmd ( hermon,
  236. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
  237. 1, sizeof ( *dev_cap ) ),
  238. 0, NULL, 0, dev_cap );
  239. }
  240. static inline int
  241. hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
  242. return hermon_cmd ( hermon,
  243. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
  244. 1, sizeof ( *fw ) ),
  245. 0, NULL, 0, fw );
  246. }
  247. static inline int
  248. hermon_cmd_init_hca ( struct hermon *hermon,
  249. const struct hermonprm_init_hca *init_hca ) {
  250. return hermon_cmd ( hermon,
  251. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
  252. 1, sizeof ( *init_hca ) ),
  253. 0, init_hca, 0, NULL );
  254. }
  255. static inline int
  256. hermon_cmd_close_hca ( struct hermon *hermon ) {
  257. return hermon_cmd ( hermon,
  258. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
  259. 0, NULL, 0, NULL );
  260. }
  261. static inline int
  262. hermon_cmd_init_port ( struct hermon *hermon, unsigned int port,
  263. const struct hermonprm_init_port *init_port ) {
  264. return hermon_cmd ( hermon,
  265. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_PORT,
  266. 1, sizeof ( *init_port ) ),
  267. 0, init_port, port, NULL );
  268. }
  269. static inline int
  270. hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
  271. return hermon_cmd ( hermon,
  272. HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
  273. 0, NULL, port, NULL );
  274. }
  275. static inline int
  276. hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
  277. const struct hermonprm_mpt *mpt ) {
  278. return hermon_cmd ( hermon,
  279. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
  280. 1, sizeof ( *mpt ) ),
  281. 0, mpt, index, NULL );
  282. }
  283. static inline int
  284. hermon_cmd_write_mtt ( struct hermon *hermon,
  285. const struct hermonprm_write_mtt *write_mtt ) {
  286. return hermon_cmd ( hermon,
  287. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
  288. 1, sizeof ( *write_mtt ) ),
  289. 0, write_mtt, 1, NULL );
  290. }
  291. static inline int
  292. hermon_cmd_map_eq ( struct hermon *hermon, unsigned long index_map,
  293. const struct hermonprm_event_mask *mask ) {
  294. return hermon_cmd ( hermon,
  295. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_EQ,
  296. 0, sizeof ( *mask ) ),
  297. 0, mask, index_map, NULL );
  298. }
  299. static inline int
  300. hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
  301. const struct hermonprm_eqc *eqctx ) {
  302. return hermon_cmd ( hermon,
  303. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
  304. 1, sizeof ( *eqctx ) ),
  305. 0, eqctx, index, NULL );
  306. }
  307. static inline int
  308. hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index,
  309. struct hermonprm_eqc *eqctx ) {
  310. return hermon_cmd ( hermon,
  311. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_EQ,
  312. 1, sizeof ( *eqctx ) ),
  313. 1, NULL, index, eqctx );
  314. }
  315. static inline int
  316. hermon_cmd_query_eq ( struct hermon *hermon, unsigned int index,
  317. struct hermonprm_eqc *eqctx ) {
  318. return hermon_cmd ( hermon,
  319. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_EQ,
  320. 1, sizeof ( *eqctx ) ),
  321. 0, NULL, index, eqctx );
  322. }
  323. static inline int
  324. hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
  325. const struct hermonprm_completion_queue_context *cqctx ){
  326. return hermon_cmd ( hermon,
  327. HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
  328. 1, sizeof ( *cqctx ) ),
  329. 0, cqctx, cqn, NULL );
  330. }
  331. static inline int
  332. hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
  333. struct hermonprm_completion_queue_context *cqctx) {
  334. return hermon_cmd ( hermon,
  335. HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
  336. 1, sizeof ( *cqctx ) ),
  337. 0, NULL, cqn, cqctx );
  338. }
  339. static inline int
  340. hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
  341. const struct hermonprm_qp_ee_state_transitions *ctx ){
  342. return hermon_cmd ( hermon,
  343. HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
  344. 1, sizeof ( *ctx ) ),
  345. 0, ctx, qpn, NULL );
  346. }
  347. static inline int
  348. hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
  349. const struct hermonprm_qp_ee_state_transitions *ctx ){
  350. return hermon_cmd ( hermon,
  351. HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
  352. 1, sizeof ( *ctx ) ),
  353. 0, ctx, qpn, NULL );
  354. }
  355. static inline int
  356. hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
  357. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  358. return hermon_cmd ( hermon,
  359. HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
  360. 1, sizeof ( *ctx ) ),
  361. 0, ctx, qpn, NULL );
  362. }
  363. static inline int
  364. hermon_cmd_rts2rts_qp ( struct hermon *hermon, unsigned long qpn,
  365. const struct hermonprm_qp_ee_state_transitions *ctx ) {
  366. return hermon_cmd ( hermon,
  367. HERMON_HCR_IN_CMD ( HERMON_HCR_RTS2RTS_QP,
  368. 1, sizeof ( *ctx ) ),
  369. 0, ctx, qpn, NULL );
  370. }
  371. static inline int
  372. hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
  373. return hermon_cmd ( hermon,
  374. HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
  375. 0x03, NULL, qpn, NULL );
  376. }
  377. static inline int
  378. hermon_cmd_query_qp ( struct hermon *hermon, unsigned long qpn,
  379. struct hermonprm_qp_ee_state_transitions *ctx ) {
  380. return hermon_cmd ( hermon,
  381. HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_QP,
  382. 1, sizeof ( *ctx ) ),
  383. 0, NULL, qpn, ctx );
  384. }
  385. static inline int
  386. hermon_cmd_conf_special_qp ( struct hermon *hermon, unsigned int internal_qps,
  387. unsigned long base_qpn ) {
  388. return hermon_cmd ( hermon,
  389. HERMON_HCR_VOID_CMD ( HERMON_HCR_CONF_SPECIAL_QP ),
  390. internal_qps, NULL, base_qpn, NULL );
  391. }
  392. static inline int
  393. hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
  394. union hermonprm_mad *mad ) {
  395. return hermon_cmd ( hermon,
  396. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
  397. 1, sizeof ( *mad ),
  398. 1, sizeof ( *mad ) ),
  399. 0x03, mad, port, mad );
  400. }
  401. static inline int
  402. hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
  403. struct hermonprm_mcg_entry *mcg ) {
  404. return hermon_cmd ( hermon,
  405. HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
  406. 1, sizeof ( *mcg ) ),
  407. 0, NULL, index, mcg );
  408. }
  409. static inline int
  410. hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
  411. const struct hermonprm_mcg_entry *mcg ) {
  412. return hermon_cmd ( hermon,
  413. HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
  414. 1, sizeof ( *mcg ) ),
  415. 0, mcg, index, NULL );
  416. }
  417. static inline int
  418. hermon_cmd_mgid_hash ( struct hermon *hermon, const struct ib_gid *gid,
  419. struct hermonprm_mgm_hash *hash ) {
  420. return hermon_cmd ( hermon,
  421. HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
  422. 1, sizeof ( *gid ),
  423. 0, sizeof ( *hash ) ),
  424. 0, gid, 0, hash );
  425. }
  426. static inline int
  427. hermon_cmd_run_fw ( struct hermon *hermon ) {
  428. return hermon_cmd ( hermon,
  429. HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
  430. 0, NULL, 0, NULL );
  431. }
  432. static inline int
  433. hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
  434. const struct hermonprm_scalar_parameter *offset ) {
  435. return hermon_cmd ( hermon,
  436. HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
  437. 0, sizeof ( *offset ) ),
  438. 0, offset, page_count, NULL );
  439. }
  440. static inline int
  441. hermon_cmd_map_icm ( struct hermon *hermon,
  442. const struct hermonprm_virtual_physical_mapping *map ) {
  443. return hermon_cmd ( hermon,
  444. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
  445. 1, sizeof ( *map ) ),
  446. 0, map, 1, NULL );
  447. }
  448. static inline int
  449. hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
  450. return hermon_cmd ( hermon,
  451. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
  452. 0, NULL, 0, NULL );
  453. }
  454. static inline int
  455. hermon_cmd_map_icm_aux ( struct hermon *hermon,
  456. const struct hermonprm_virtual_physical_mapping *map ) {
  457. return hermon_cmd ( hermon,
  458. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
  459. 1, sizeof ( *map ) ),
  460. 0, map, 1, NULL );
  461. }
  462. static inline int
  463. hermon_cmd_set_icm_size ( struct hermon *hermon,
  464. const struct hermonprm_scalar_parameter *icm_size,
  465. struct hermonprm_scalar_parameter *icm_aux_size ) {
  466. return hermon_cmd ( hermon,
  467. HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
  468. 0, sizeof ( *icm_size ),
  469. 0, sizeof (*icm_aux_size) ),
  470. 0, icm_size, 0, icm_aux_size );
  471. }
  472. static inline int
  473. hermon_cmd_unmap_fa ( struct hermon *hermon ) {
  474. return hermon_cmd ( hermon,
  475. HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
  476. 0, NULL, 0, NULL );
  477. }
  478. static inline int
  479. hermon_cmd_map_fa ( struct hermon *hermon,
  480. const struct hermonprm_virtual_physical_mapping *map ) {
  481. return hermon_cmd ( hermon,
  482. HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
  483. 1, sizeof ( *map ) ),
  484. 0, map, 1, NULL );
  485. }
  486. static inline int
  487. hermon_cmd_sense_port ( struct hermon *hermon, unsigned int port,
  488. struct hermonprm_sense_port *port_type ) {
  489. return hermon_cmd ( hermon,
  490. HERMON_HCR_OUT_CMD ( HERMON_HCR_SENSE_PORT,
  491. 1, sizeof ( *port_type ) ),
  492. 0, NULL, port, port_type );
  493. }
  494. /***************************************************************************
  495. *
  496. * Memory translation table operations
  497. *
  498. ***************************************************************************
  499. */
  500. /**
  501. * Allocate MTT entries
  502. *
  503. * @v hermon Hermon device
  504. * @v memory Memory to map into MTT
  505. * @v len Length of memory to map
  506. * @v mtt MTT descriptor to fill in
  507. * @ret rc Return status code
  508. */
  509. static int hermon_alloc_mtt ( struct hermon *hermon,
  510. const void *memory, size_t len,
  511. struct hermon_mtt *mtt ) {
  512. struct hermonprm_write_mtt write_mtt;
  513. physaddr_t start;
  514. unsigned int page_offset;
  515. unsigned int num_pages;
  516. int mtt_offset;
  517. unsigned int mtt_base_addr;
  518. unsigned int i;
  519. int rc;
  520. /* Find available MTT entries */
  521. start = virt_to_phys ( memory );
  522. page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
  523. start -= page_offset;
  524. len += page_offset;
  525. num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
  526. mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
  527. num_pages );
  528. if ( mtt_offset < 0 ) {
  529. DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
  530. hermon, num_pages );
  531. rc = mtt_offset;
  532. goto err_mtt_offset;
  533. }
  534. mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
  535. hermon->cap.mtt_entry_size );
  536. /* Fill in MTT structure */
  537. mtt->mtt_offset = mtt_offset;
  538. mtt->num_pages = num_pages;
  539. mtt->mtt_base_addr = mtt_base_addr;
  540. mtt->page_offset = page_offset;
  541. /* Construct and issue WRITE_MTT commands */
  542. for ( i = 0 ; i < num_pages ; i++ ) {
  543. memset ( &write_mtt, 0, sizeof ( write_mtt ) );
  544. MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
  545. value, mtt_base_addr );
  546. MLX_FILL_2 ( &write_mtt.mtt, 1,
  547. p, 1,
  548. ptag_l, ( start >> 3 ) );
  549. if ( ( rc = hermon_cmd_write_mtt ( hermon,
  550. &write_mtt ) ) != 0 ) {
  551. DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
  552. hermon, mtt_base_addr );
  553. goto err_write_mtt;
  554. }
  555. start += HERMON_PAGE_SIZE;
  556. mtt_base_addr += hermon->cap.mtt_entry_size;
  557. }
  558. return 0;
  559. err_write_mtt:
  560. hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
  561. err_mtt_offset:
  562. return rc;
  563. }
  564. /**
  565. * Free MTT entries
  566. *
  567. * @v hermon Hermon device
  568. * @v mtt MTT descriptor
  569. */
  570. static void hermon_free_mtt ( struct hermon *hermon,
  571. struct hermon_mtt *mtt ) {
  572. hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
  573. mtt->num_pages );
  574. }
  575. /***************************************************************************
  576. *
  577. * MAD operations
  578. *
  579. ***************************************************************************
  580. */
  581. /**
  582. * Issue management datagram
  583. *
  584. * @v ibdev Infiniband device
  585. * @v mad Management datagram
  586. * @ret rc Return status code
  587. */
  588. static int hermon_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
  589. struct hermon *hermon = ib_get_drvdata ( ibdev );
  590. union hermonprm_mad mad_ifc;
  591. int rc;
  592. linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
  593. mad_size_mismatch );
  594. /* Copy in request packet */
  595. memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
  596. /* Issue MAD */
  597. if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
  598. &mad_ifc ) ) != 0 ) {
  599. DBGC ( hermon, "Hermon %p could not issue MAD IFC: %s\n",
  600. hermon, strerror ( rc ) );
  601. return rc;
  602. }
  603. /* Copy out reply packet */
  604. memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
  605. if ( mad->hdr.status != 0 ) {
  606. DBGC ( hermon, "Hermon %p MAD IFC status %04x\n",
  607. hermon, ntohs ( mad->hdr.status ) );
  608. return -EIO;
  609. }
  610. return 0;
  611. }
  612. /***************************************************************************
  613. *
  614. * Completion queue operations
  615. *
  616. ***************************************************************************
  617. */
  618. /**
  619. * Create completion queue
  620. *
  621. * @v ibdev Infiniband device
  622. * @v cq Completion queue
  623. * @ret rc Return status code
  624. */
  625. static int hermon_create_cq ( struct ib_device *ibdev,
  626. struct ib_completion_queue *cq ) {
  627. struct hermon *hermon = ib_get_drvdata ( ibdev );
  628. struct hermon_completion_queue *hermon_cq;
  629. struct hermonprm_completion_queue_context cqctx;
  630. int cqn_offset;
  631. unsigned int i;
  632. int rc;
  633. /* Find a free completion queue number */
  634. cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
  635. HERMON_MAX_CQS, 1 );
  636. if ( cqn_offset < 0 ) {
  637. DBGC ( hermon, "Hermon %p out of completion queues\n",
  638. hermon );
  639. rc = cqn_offset;
  640. goto err_cqn_offset;
  641. }
  642. cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
  643. /* Allocate control structures */
  644. hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
  645. if ( ! hermon_cq ) {
  646. rc = -ENOMEM;
  647. goto err_hermon_cq;
  648. }
  649. /* Allocate completion queue itself */
  650. hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
  651. hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
  652. sizeof ( hermon_cq->cqe[0] ) );
  653. if ( ! hermon_cq->cqe ) {
  654. rc = -ENOMEM;
  655. goto err_cqe;
  656. }
  657. memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
  658. for ( i = 0 ; i < cq->num_cqes ; i++ ) {
  659. MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
  660. }
  661. barrier();
  662. /* Allocate MTT entries */
  663. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
  664. hermon_cq->cqe_size,
  665. &hermon_cq->mtt ) ) != 0 )
  666. goto err_alloc_mtt;
  667. /* Hand queue over to hardware */
  668. memset ( &cqctx, 0, sizeof ( cqctx ) );
  669. MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
  670. MLX_FILL_1 ( &cqctx, 2,
  671. page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
  672. MLX_FILL_2 ( &cqctx, 3,
  673. usr_page, HERMON_UAR_NON_EQ_PAGE,
  674. log_cq_size, fls ( cq->num_cqes - 1 ) );
  675. MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
  676. ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
  677. MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
  678. ( virt_to_phys ( &hermon_cq->doorbell ) >> 3 ) );
  679. if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  680. DBGC ( hermon, "Hermon %p SW2HW_CQ failed: %s\n",
  681. hermon, strerror ( rc ) );
  682. goto err_sw2hw_cq;
  683. }
  684. DBGC ( hermon, "Hermon %p CQN %#lx ring at [%p,%p)\n",
  685. hermon, cq->cqn, hermon_cq->cqe,
  686. ( ( ( void * ) hermon_cq->cqe ) + hermon_cq->cqe_size ) );
  687. ib_cq_set_drvdata ( cq, hermon_cq );
  688. return 0;
  689. err_sw2hw_cq:
  690. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  691. err_alloc_mtt:
  692. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  693. err_cqe:
  694. free ( hermon_cq );
  695. err_hermon_cq:
  696. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  697. err_cqn_offset:
  698. return rc;
  699. }
  700. /**
  701. * Destroy completion queue
  702. *
  703. * @v ibdev Infiniband device
  704. * @v cq Completion queue
  705. */
  706. static void hermon_destroy_cq ( struct ib_device *ibdev,
  707. struct ib_completion_queue *cq ) {
  708. struct hermon *hermon = ib_get_drvdata ( ibdev );
  709. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  710. struct hermonprm_completion_queue_context cqctx;
  711. int cqn_offset;
  712. int rc;
  713. /* Take ownership back from hardware */
  714. if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
  715. DBGC ( hermon, "Hermon %p FATAL HW2SW_CQ failed on CQN %#lx: "
  716. "%s\n", hermon, cq->cqn, strerror ( rc ) );
  717. /* Leak memory and return; at least we avoid corruption */
  718. return;
  719. }
  720. /* Free MTT entries */
  721. hermon_free_mtt ( hermon, &hermon_cq->mtt );
  722. /* Free memory */
  723. free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
  724. free ( hermon_cq );
  725. /* Mark queue number as free */
  726. cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
  727. hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
  728. ib_cq_set_drvdata ( cq, NULL );
  729. }
  730. /***************************************************************************
  731. *
  732. * Queue pair operations
  733. *
  734. ***************************************************************************
  735. */
  736. /**
  737. * Assign queue pair number
  738. *
  739. * @v ibdev Infiniband device
  740. * @v qp Queue pair
  741. * @ret rc Return status code
  742. */
  743. static int hermon_alloc_qpn ( struct ib_device *ibdev,
  744. struct ib_queue_pair *qp ) {
  745. struct hermon *hermon = ib_get_drvdata ( ibdev );
  746. unsigned int port_offset;
  747. int qpn_offset;
  748. /* Calculate queue pair number */
  749. port_offset = ( ibdev->port - HERMON_PORT_BASE );
  750. switch ( qp->type ) {
  751. case IB_QPT_SMI:
  752. qp->qpn = ( hermon->special_qpn_base + port_offset );
  753. return 0;
  754. case IB_QPT_GSI:
  755. qp->qpn = ( hermon->special_qpn_base + 2 + port_offset );
  756. return 0;
  757. case IB_QPT_UD:
  758. case IB_QPT_RC:
  759. /* Find a free queue pair number */
  760. qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
  761. HERMON_MAX_QPS, 1 );
  762. if ( qpn_offset < 0 ) {
  763. DBGC ( hermon, "Hermon %p out of queue pairs\n",
  764. hermon );
  765. return qpn_offset;
  766. }
  767. qp->qpn = ( ( random() & HERMON_QPN_RANDOM_MASK ) |
  768. ( hermon->qpn_base + qpn_offset ) );
  769. return 0;
  770. default:
  771. DBGC ( hermon, "Hermon %p unsupported QP type %d\n",
  772. hermon, qp->type );
  773. return -ENOTSUP;
  774. }
  775. }
  776. /**
  777. * Free queue pair number
  778. *
  779. * @v ibdev Infiniband device
  780. * @v qp Queue pair
  781. */
  782. static void hermon_free_qpn ( struct ib_device *ibdev,
  783. struct ib_queue_pair *qp ) {
  784. struct hermon *hermon = ib_get_drvdata ( ibdev );
  785. int qpn_offset;
  786. qpn_offset = ( ( qp->qpn & ~HERMON_QPN_RANDOM_MASK )
  787. - hermon->qpn_base );
  788. if ( qpn_offset >= 0 )
  789. hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
  790. }
  791. /**
  792. * Calculate transmission rate
  793. *
  794. * @v av Address vector
  795. * @ret hermon_rate Hermon rate
  796. */
  797. static unsigned int hermon_rate ( struct ib_address_vector *av ) {
  798. return ( ( ( av->rate >= IB_RATE_2_5 ) && ( av->rate <= IB_RATE_120 ) )
  799. ? ( av->rate + 5 ) : 0 );
  800. }
  801. /**
  802. * Calculate schedule queue
  803. *
  804. * @v ibdev Infiniband device
  805. * @v qp Queue pair
  806. * @ret sched_queue Schedule queue
  807. */
  808. static unsigned int hermon_sched_queue ( struct ib_device *ibdev,
  809. struct ib_queue_pair *qp ) {
  810. return ( ( ( qp->type == IB_QPT_SMI ) ?
  811. HERMON_SCHED_QP0 : HERMON_SCHED_DEFAULT ) |
  812. ( ( ibdev->port - 1 ) << 6 ) );
  813. }
  814. /** Queue pair transport service type map */
  815. static uint8_t hermon_qp_st[] = {
  816. [IB_QPT_SMI] = HERMON_ST_MLX,
  817. [IB_QPT_GSI] = HERMON_ST_MLX,
  818. [IB_QPT_UD] = HERMON_ST_UD,
  819. [IB_QPT_RC] = HERMON_ST_RC,
  820. };
  821. /**
  822. * Dump queue pair context (for debugging only)
  823. *
  824. * @v hermon Hermon device
  825. * @v qp Queue pair
  826. * @ret rc Return status code
  827. */
  828. static inline int hermon_dump_qpctx ( struct hermon *hermon,
  829. struct ib_queue_pair *qp ) {
  830. struct hermonprm_qp_ee_state_transitions qpctx;
  831. int rc;
  832. memset ( &qpctx, 0, sizeof ( qpctx ) );
  833. if ( ( rc = hermon_cmd_query_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ) {
  834. DBGC ( hermon, "Hermon %p QUERY_QP failed: %s\n",
  835. hermon, strerror ( rc ) );
  836. return rc;
  837. }
  838. DBGC ( hermon, "Hermon %p QPN %lx context:\n", hermon, qp->qpn );
  839. DBGC_HDA ( hermon, 0, &qpctx.u.dwords[2],
  840. ( sizeof ( qpctx ) - 8 ) );
  841. return 0;
  842. }
  843. /**
  844. * Create queue pair
  845. *
  846. * @v ibdev Infiniband device
  847. * @v qp Queue pair
  848. * @ret rc Return status code
  849. */
  850. static int hermon_create_qp ( struct ib_device *ibdev,
  851. struct ib_queue_pair *qp ) {
  852. struct hermon *hermon = ib_get_drvdata ( ibdev );
  853. struct hermon_queue_pair *hermon_qp;
  854. struct hermonprm_qp_ee_state_transitions qpctx;
  855. int rc;
  856. /* Calculate queue pair number */
  857. if ( ( rc = hermon_alloc_qpn ( ibdev, qp ) ) != 0 )
  858. goto err_alloc_qpn;
  859. /* Allocate control structures */
  860. hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
  861. if ( ! hermon_qp ) {
  862. rc = -ENOMEM;
  863. goto err_hermon_qp;
  864. }
  865. /* Calculate doorbell address */
  866. hermon_qp->send.doorbell =
  867. ( hermon->uar + HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE +
  868. HERMON_DB_POST_SND_OFFSET );
  869. /* Allocate work queue buffer */
  870. hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
  871. ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
  872. hermon_qp->send.num_wqes =
  873. ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
  874. hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
  875. sizeof ( hermon_qp->send.wqe[0] ) );
  876. hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
  877. sizeof ( hermon_qp->recv.wqe[0] ) );
  878. hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
  879. hermon_qp->recv.wqe_size );
  880. hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
  881. sizeof ( hermon_qp->send.wqe[0] ) );
  882. if ( ! hermon_qp->wqe ) {
  883. rc = -ENOMEM;
  884. goto err_alloc_wqe;
  885. }
  886. hermon_qp->send.wqe = hermon_qp->wqe;
  887. memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
  888. hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
  889. memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
  890. /* Allocate MTT entries */
  891. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
  892. hermon_qp->wqe_size,
  893. &hermon_qp->mtt ) ) != 0 ) {
  894. goto err_alloc_mtt;
  895. }
  896. /* Transition queue to INIT state */
  897. memset ( &qpctx, 0, sizeof ( qpctx ) );
  898. MLX_FILL_2 ( &qpctx, 2,
  899. qpc_eec_data.pm_state, HERMON_PM_STATE_MIGRATED,
  900. qpc_eec_data.st, hermon_qp_st[qp->type] );
  901. MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
  902. MLX_FILL_4 ( &qpctx, 4,
  903. qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
  904. qpc_eec_data.log_rq_stride,
  905. ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
  906. qpc_eec_data.log_sq_size,
  907. fls ( hermon_qp->send.num_wqes - 1 ),
  908. qpc_eec_data.log_sq_stride,
  909. ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
  910. MLX_FILL_1 ( &qpctx, 5,
  911. qpc_eec_data.usr_page, HERMON_UAR_NON_EQ_PAGE );
  912. MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
  913. MLX_FILL_4 ( &qpctx, 38,
  914. qpc_eec_data.rre, 1,
  915. qpc_eec_data.rwe, 1,
  916. qpc_eec_data.rae, 1,
  917. qpc_eec_data.page_offset,
  918. ( hermon_qp->mtt.page_offset >> 6 ) );
  919. MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
  920. MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
  921. ( virt_to_phys ( &hermon_qp->recv.doorbell ) >> 2 ) );
  922. MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
  923. ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
  924. if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
  925. &qpctx ) ) != 0 ) {
  926. DBGC ( hermon, "Hermon %p RST2INIT_QP failed: %s\n",
  927. hermon, strerror ( rc ) );
  928. goto err_rst2init_qp;
  929. }
  930. hermon_qp->state = HERMON_QP_ST_INIT;
  931. DBGC ( hermon, "Hermon %p QPN %#lx send ring at [%p,%p)\n",
  932. hermon, qp->qpn, hermon_qp->send.wqe,
  933. ( ((void *)hermon_qp->send.wqe ) + hermon_qp->send.wqe_size ) );
  934. DBGC ( hermon, "Hermon %p QPN %#lx receive ring at [%p,%p)\n",
  935. hermon, qp->qpn, hermon_qp->recv.wqe,
  936. ( ((void *)hermon_qp->recv.wqe ) + hermon_qp->recv.wqe_size ) );
  937. ib_qp_set_drvdata ( qp, hermon_qp );
  938. return 0;
  939. hermon_cmd_2rst_qp ( hermon, qp->qpn );
  940. err_rst2init_qp:
  941. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  942. err_alloc_mtt:
  943. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  944. err_alloc_wqe:
  945. free ( hermon_qp );
  946. err_hermon_qp:
  947. hermon_free_qpn ( ibdev, qp );
  948. err_alloc_qpn:
  949. return rc;
  950. }
  951. /**
  952. * Modify queue pair
  953. *
  954. * @v ibdev Infiniband device
  955. * @v qp Queue pair
  956. * @ret rc Return status code
  957. */
  958. static int hermon_modify_qp ( struct ib_device *ibdev,
  959. struct ib_queue_pair *qp ) {
  960. struct hermon *hermon = ib_get_drvdata ( ibdev );
  961. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  962. struct hermonprm_qp_ee_state_transitions qpctx;
  963. int rc;
  964. /* Transition queue to RTR state, if applicable */
  965. if ( hermon_qp->state < HERMON_QP_ST_RTR ) {
  966. memset ( &qpctx, 0, sizeof ( qpctx ) );
  967. MLX_FILL_2 ( &qpctx, 4,
  968. qpc_eec_data.mtu, HERMON_MTU_2048,
  969. qpc_eec_data.msg_max, 31 );
  970. MLX_FILL_1 ( &qpctx, 7,
  971. qpc_eec_data.remote_qpn_een, qp->av.qpn );
  972. MLX_FILL_1 ( &qpctx, 9,
  973. qpc_eec_data.primary_address_path.rlid,
  974. qp->av.lid );
  975. MLX_FILL_1 ( &qpctx, 10,
  976. qpc_eec_data.primary_address_path.max_stat_rate,
  977. hermon_rate ( &qp->av ) );
  978. memcpy ( &qpctx.u.dwords[12], &qp->av.gid,
  979. sizeof ( qp->av.gid ) );
  980. MLX_FILL_1 ( &qpctx, 16,
  981. qpc_eec_data.primary_address_path.sched_queue,
  982. hermon_sched_queue ( ibdev, qp ) );
  983. MLX_FILL_1 ( &qpctx, 39,
  984. qpc_eec_data.next_rcv_psn, qp->recv.psn );
  985. if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
  986. &qpctx ) ) != 0 ) {
  987. DBGC ( hermon, "Hermon %p INIT2RTR_QP failed: %s\n",
  988. hermon, strerror ( rc ) );
  989. return rc;
  990. }
  991. hermon_qp->state = HERMON_QP_ST_RTR;
  992. }
  993. /* Transition queue to RTS state */
  994. if ( hermon_qp->state < HERMON_QP_ST_RTS ) {
  995. memset ( &qpctx, 0, sizeof ( qpctx ) );
  996. MLX_FILL_1 ( &qpctx, 10,
  997. qpc_eec_data.primary_address_path.ack_timeout,
  998. 0x13 );
  999. MLX_FILL_2 ( &qpctx, 30,
  1000. qpc_eec_data.retry_count, HERMON_RETRY_MAX,
  1001. qpc_eec_data.rnr_retry, HERMON_RETRY_MAX );
  1002. MLX_FILL_1 ( &qpctx, 32,
  1003. qpc_eec_data.next_send_psn, qp->send.psn );
  1004. if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn,
  1005. &qpctx ) ) != 0 ) {
  1006. DBGC ( hermon, "Hermon %p RTR2RTS_QP failed: %s\n",
  1007. hermon, strerror ( rc ) );
  1008. return rc;
  1009. }
  1010. hermon_qp->state = HERMON_QP_ST_RTS;
  1011. }
  1012. /* Update parameters in RTS state */
  1013. memset ( &qpctx, 0, sizeof ( qpctx ) );
  1014. MLX_FILL_1 ( &qpctx, 0, opt_param_mask, HERMON_QP_OPT_PARAM_QKEY );
  1015. MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
  1016. if ( ( rc = hermon_cmd_rts2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
  1017. DBGC ( hermon, "Hermon %p RTS2RTS_QP failed: %s\n",
  1018. hermon, strerror ( rc ) );
  1019. return rc;
  1020. }
  1021. return 0;
  1022. }
  1023. /**
  1024. * Destroy queue pair
  1025. *
  1026. * @v ibdev Infiniband device
  1027. * @v qp Queue pair
  1028. */
  1029. static void hermon_destroy_qp ( struct ib_device *ibdev,
  1030. struct ib_queue_pair *qp ) {
  1031. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1032. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1033. int rc;
  1034. /* Take ownership back from hardware */
  1035. if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
  1036. DBGC ( hermon, "Hermon %p FATAL 2RST_QP failed on QPN %#lx: "
  1037. "%s\n", hermon, qp->qpn, strerror ( rc ) );
  1038. /* Leak memory and return; at least we avoid corruption */
  1039. return;
  1040. }
  1041. /* Free MTT entries */
  1042. hermon_free_mtt ( hermon, &hermon_qp->mtt );
  1043. /* Free memory */
  1044. free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
  1045. free ( hermon_qp );
  1046. /* Mark queue number as free */
  1047. hermon_free_qpn ( ibdev, qp );
  1048. ib_qp_set_drvdata ( qp, NULL );
  1049. }
  1050. /***************************************************************************
  1051. *
  1052. * Work request operations
  1053. *
  1054. ***************************************************************************
  1055. */
  1056. /**
  1057. * Construct UD send work queue entry
  1058. *
  1059. * @v ibdev Infiniband device
  1060. * @v qp Queue pair
  1061. * @v av Address vector
  1062. * @v iobuf I/O buffer
  1063. * @v wqe Send work queue entry
  1064. * @ret opcode Control opcode
  1065. */
  1066. static unsigned int
  1067. hermon_fill_ud_send_wqe ( struct ib_device *ibdev,
  1068. struct ib_queue_pair *qp __unused,
  1069. struct ib_address_vector *av,
  1070. struct io_buffer *iobuf,
  1071. union hermon_send_wqe *wqe ) {
  1072. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1073. MLX_FILL_1 ( &wqe->ud.ctrl, 1, ds,
  1074. ( ( offsetof ( typeof ( wqe->ud ), data[1] ) / 16 ) ) );
  1075. MLX_FILL_1 ( &wqe->ud.ctrl, 2, c, 0x03 /* generate completion */ );
  1076. MLX_FILL_2 ( &wqe->ud.ud, 0,
  1077. ud_address_vector.pd, HERMON_GLOBAL_PD,
  1078. ud_address_vector.port_number, ibdev->port );
  1079. MLX_FILL_2 ( &wqe->ud.ud, 1,
  1080. ud_address_vector.rlid, av->lid,
  1081. ud_address_vector.g, av->gid_present );
  1082. MLX_FILL_1 ( &wqe->ud.ud, 2,
  1083. ud_address_vector.max_stat_rate, hermon_rate ( av ) );
  1084. MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, av->sl );
  1085. memcpy ( &wqe->ud.ud.u.dwords[4], &av->gid, sizeof ( av->gid ) );
  1086. MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, av->qpn );
  1087. MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, av->qkey );
  1088. MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
  1089. MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, hermon->lkey );
  1090. MLX_FILL_1 ( &wqe->ud.data[0], 3,
  1091. local_address_l, virt_to_bus ( iobuf->data ) );
  1092. return HERMON_OPCODE_SEND;
  1093. }
  1094. /**
  1095. * Construct MLX send work queue entry
  1096. *
  1097. * @v ibdev Infiniband device
  1098. * @v qp Queue pair
  1099. * @v av Address vector
  1100. * @v iobuf I/O buffer
  1101. * @v wqe Send work queue entry
  1102. * @ret opcode Control opcode
  1103. */
  1104. static unsigned int
  1105. hermon_fill_mlx_send_wqe ( struct ib_device *ibdev,
  1106. struct ib_queue_pair *qp,
  1107. struct ib_address_vector *av,
  1108. struct io_buffer *iobuf,
  1109. union hermon_send_wqe *wqe ) {
  1110. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1111. struct io_buffer headers;
  1112. /* Construct IB headers */
  1113. iob_populate ( &headers, &wqe->mlx.headers, 0,
  1114. sizeof ( wqe->mlx.headers ) );
  1115. iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
  1116. ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
  1117. /* Fill work queue entry */
  1118. MLX_FILL_1 ( &wqe->mlx.ctrl, 1, ds,
  1119. ( ( offsetof ( typeof ( wqe->mlx ), data[2] ) / 16 ) ) );
  1120. MLX_FILL_5 ( &wqe->mlx.ctrl, 2,
  1121. c, 0x03 /* generate completion */,
  1122. icrc, 0 /* generate ICRC */,
  1123. max_statrate, hermon_rate ( av ),
  1124. slr, 0,
  1125. v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
  1126. MLX_FILL_1 ( &wqe->mlx.ctrl, 3, rlid, av->lid );
  1127. MLX_FILL_1 ( &wqe->mlx.data[0], 0,
  1128. byte_count, iob_len ( &headers ) );
  1129. MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, hermon->lkey );
  1130. MLX_FILL_1 ( &wqe->mlx.data[0], 3,
  1131. local_address_l, virt_to_bus ( headers.data ) );
  1132. MLX_FILL_1 ( &wqe->mlx.data[1], 0,
  1133. byte_count, ( iob_len ( iobuf ) + 4 /* ICRC */ ) );
  1134. MLX_FILL_1 ( &wqe->mlx.data[1], 1, l_key, hermon->lkey );
  1135. MLX_FILL_1 ( &wqe->mlx.data[1], 3,
  1136. local_address_l, virt_to_bus ( iobuf->data ) );
  1137. return HERMON_OPCODE_SEND;
  1138. }
  1139. /**
  1140. * Construct RC send work queue entry
  1141. *
  1142. * @v ibdev Infiniband device
  1143. * @v qp Queue pair
  1144. * @v av Address vector
  1145. * @v iobuf I/O buffer
  1146. * @v wqe Send work queue entry
  1147. * @ret opcode Control opcode
  1148. */
  1149. static unsigned int
  1150. hermon_fill_rc_send_wqe ( struct ib_device *ibdev,
  1151. struct ib_queue_pair *qp __unused,
  1152. struct ib_address_vector *av __unused,
  1153. struct io_buffer *iobuf,
  1154. union hermon_send_wqe *wqe ) {
  1155. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1156. MLX_FILL_1 ( &wqe->rc.ctrl, 1, ds,
  1157. ( ( offsetof ( typeof ( wqe->rc ), data[1] ) / 16 ) ) );
  1158. MLX_FILL_1 ( &wqe->rc.ctrl, 2, c, 0x03 /* generate completion */ );
  1159. MLX_FILL_1 ( &wqe->rc.data[0], 0, byte_count, iob_len ( iobuf ) );
  1160. MLX_FILL_1 ( &wqe->rc.data[0], 1, l_key, hermon->lkey );
  1161. MLX_FILL_1 ( &wqe->rc.data[0], 3,
  1162. local_address_l, virt_to_bus ( iobuf->data ) );
  1163. return HERMON_OPCODE_SEND;
  1164. }
  1165. /** Work queue entry constructors */
  1166. static unsigned int
  1167. ( * hermon_fill_send_wqe[] ) ( struct ib_device *ibdev,
  1168. struct ib_queue_pair *qp,
  1169. struct ib_address_vector *av,
  1170. struct io_buffer *iobuf,
  1171. union hermon_send_wqe *wqe ) = {
  1172. [IB_QPT_SMI] = hermon_fill_mlx_send_wqe,
  1173. [IB_QPT_GSI] = hermon_fill_mlx_send_wqe,
  1174. [IB_QPT_UD] = hermon_fill_ud_send_wqe,
  1175. [IB_QPT_RC] = hermon_fill_rc_send_wqe,
  1176. };
  1177. /**
  1178. * Post send work queue entry
  1179. *
  1180. * @v ibdev Infiniband device
  1181. * @v qp Queue pair
  1182. * @v av Address vector
  1183. * @v iobuf I/O buffer
  1184. * @ret rc Return status code
  1185. */
  1186. static int hermon_post_send ( struct ib_device *ibdev,
  1187. struct ib_queue_pair *qp,
  1188. struct ib_address_vector *av,
  1189. struct io_buffer *iobuf ) {
  1190. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1191. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1192. struct ib_work_queue *wq = &qp->send;
  1193. struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
  1194. union hermon_send_wqe *wqe;
  1195. union hermonprm_doorbell_register db_reg;
  1196. unsigned int wqe_idx_mask;
  1197. unsigned int opcode;
  1198. /* Allocate work queue entry */
  1199. wqe_idx_mask = ( wq->num_wqes - 1 );
  1200. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1201. DBGC ( hermon, "Hermon %p send queue full", hermon );
  1202. return -ENOBUFS;
  1203. }
  1204. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1205. wqe = &hermon_send_wq->wqe[ wq->next_idx &
  1206. ( hermon_send_wq->num_wqes - 1 ) ];
  1207. /* Construct work queue entry */
  1208. memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
  1209. ( sizeof ( *wqe ) - 4 ) );
  1210. assert ( qp->type < ( sizeof ( hermon_fill_send_wqe ) /
  1211. sizeof ( hermon_fill_send_wqe[0] ) ) );
  1212. assert ( hermon_fill_send_wqe[qp->type] != NULL );
  1213. opcode = hermon_fill_send_wqe[qp->type] ( ibdev, qp, av, iobuf, wqe );
  1214. barrier();
  1215. MLX_FILL_2 ( &wqe->ctrl, 0,
  1216. opcode, opcode,
  1217. owner,
  1218. ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 ) );
  1219. DBGCP ( hermon, "Hermon %p posting send WQE:\n", hermon );
  1220. DBGCP_HD ( hermon, wqe, sizeof ( *wqe ) );
  1221. barrier();
  1222. /* Ring doorbell register */
  1223. MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
  1224. DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
  1225. virt_to_phys ( hermon_send_wq->doorbell ), db_reg.dword[0] );
  1226. writel ( db_reg.dword[0], ( hermon_send_wq->doorbell ) );
  1227. /* Update work queue's index */
  1228. wq->next_idx++;
  1229. return 0;
  1230. }
  1231. /**
  1232. * Post receive work queue entry
  1233. *
  1234. * @v ibdev Infiniband device
  1235. * @v qp Queue pair
  1236. * @v iobuf I/O buffer
  1237. * @ret rc Return status code
  1238. */
  1239. static int hermon_post_recv ( struct ib_device *ibdev,
  1240. struct ib_queue_pair *qp,
  1241. struct io_buffer *iobuf ) {
  1242. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1243. struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
  1244. struct ib_work_queue *wq = &qp->recv;
  1245. struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
  1246. struct hermonprm_recv_wqe *wqe;
  1247. unsigned int wqe_idx_mask;
  1248. /* Allocate work queue entry */
  1249. wqe_idx_mask = ( wq->num_wqes - 1 );
  1250. if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
  1251. DBGC ( hermon, "Hermon %p receive queue full", hermon );
  1252. return -ENOBUFS;
  1253. }
  1254. wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
  1255. wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
  1256. /* Construct work queue entry */
  1257. MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
  1258. MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->lkey );
  1259. MLX_FILL_1 ( &wqe->data[0], 3,
  1260. local_address_l, virt_to_bus ( iobuf->data ) );
  1261. /* Update work queue's index */
  1262. wq->next_idx++;
  1263. /* Update doorbell record */
  1264. barrier();
  1265. MLX_FILL_1 ( &hermon_recv_wq->doorbell, 0, receive_wqe_counter,
  1266. ( wq->next_idx & 0xffff ) );
  1267. return 0;
  1268. }
  1269. /**
  1270. * Handle completion
  1271. *
  1272. * @v ibdev Infiniband device
  1273. * @v cq Completion queue
  1274. * @v cqe Hardware completion queue entry
  1275. * @ret rc Return status code
  1276. */
  1277. static int hermon_complete ( struct ib_device *ibdev,
  1278. struct ib_completion_queue *cq,
  1279. union hermonprm_completion_entry *cqe ) {
  1280. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1281. struct ib_work_queue *wq;
  1282. struct ib_queue_pair *qp;
  1283. struct hermon_queue_pair *hermon_qp;
  1284. struct io_buffer *iobuf;
  1285. struct ib_address_vector recv_av;
  1286. struct ib_global_route_header *grh;
  1287. struct ib_address_vector *av;
  1288. unsigned int opcode;
  1289. unsigned long qpn;
  1290. int is_send;
  1291. unsigned int wqe_idx;
  1292. size_t len;
  1293. int rc = 0;
  1294. /* Parse completion */
  1295. qpn = MLX_GET ( &cqe->normal, qpn );
  1296. is_send = MLX_GET ( &cqe->normal, s_r );
  1297. opcode = MLX_GET ( &cqe->normal, opcode );
  1298. if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
  1299. /* "s" field is not valid for error opcodes */
  1300. is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
  1301. DBGC ( hermon, "Hermon %p CQN %lx syndrome %x vendor %x\n",
  1302. hermon, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
  1303. MLX_GET ( &cqe->error, vendor_error_syndrome ) );
  1304. rc = -EIO;
  1305. /* Don't return immediately; propagate error to completer */
  1306. }
  1307. /* Identify work queue */
  1308. wq = ib_find_wq ( cq, qpn, is_send );
  1309. if ( ! wq ) {
  1310. DBGC ( hermon, "Hermon %p CQN %lx unknown %s QPN %lx\n",
  1311. hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
  1312. return -EIO;
  1313. }
  1314. qp = wq->qp;
  1315. hermon_qp = ib_qp_get_drvdata ( qp );
  1316. /* Identify I/O buffer */
  1317. wqe_idx = ( MLX_GET ( &cqe->normal, wqe_counter ) &
  1318. ( wq->num_wqes - 1 ) );
  1319. iobuf = wq->iobufs[wqe_idx];
  1320. if ( ! iobuf ) {
  1321. DBGC ( hermon, "Hermon %p CQN %lx QPN %lx empty WQE %x\n",
  1322. hermon, cq->cqn, qp->qpn, wqe_idx );
  1323. return -EIO;
  1324. }
  1325. wq->iobufs[wqe_idx] = NULL;
  1326. if ( is_send ) {
  1327. /* Hand off to completion handler */
  1328. ib_complete_send ( ibdev, qp, iobuf, rc );
  1329. } else {
  1330. /* Set received length */
  1331. len = MLX_GET ( &cqe->normal, byte_cnt );
  1332. assert ( len <= iob_tailroom ( iobuf ) );
  1333. iob_put ( iobuf, len );
  1334. switch ( qp->type ) {
  1335. case IB_QPT_SMI:
  1336. case IB_QPT_GSI:
  1337. case IB_QPT_UD:
  1338. assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
  1339. grh = iobuf->data;
  1340. iob_pull ( iobuf, sizeof ( *grh ) );
  1341. /* Construct address vector */
  1342. av = &recv_av;
  1343. memset ( av, 0, sizeof ( *av ) );
  1344. av->qpn = MLX_GET ( &cqe->normal, srq_rqpn );
  1345. av->lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
  1346. av->sl = MLX_GET ( &cqe->normal, sl );
  1347. av->gid_present = MLX_GET ( &cqe->normal, g );
  1348. memcpy ( &av->gid, &grh->sgid, sizeof ( av->gid ) );
  1349. break;
  1350. case IB_QPT_RC:
  1351. av = &qp->av;
  1352. break;
  1353. default:
  1354. assert ( 0 );
  1355. return -EINVAL;
  1356. }
  1357. /* Hand off to completion handler */
  1358. ib_complete_recv ( ibdev, qp, av, iobuf, rc );
  1359. }
  1360. return rc;
  1361. }
  1362. /**
  1363. * Poll completion queue
  1364. *
  1365. * @v ibdev Infiniband device
  1366. * @v cq Completion queue
  1367. */
  1368. static void hermon_poll_cq ( struct ib_device *ibdev,
  1369. struct ib_completion_queue *cq ) {
  1370. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1371. struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
  1372. union hermonprm_completion_entry *cqe;
  1373. unsigned int cqe_idx_mask;
  1374. int rc;
  1375. while ( 1 ) {
  1376. /* Look for completion entry */
  1377. cqe_idx_mask = ( cq->num_cqes - 1 );
  1378. cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
  1379. if ( MLX_GET ( &cqe->normal, owner ) ^
  1380. ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
  1381. /* Entry still owned by hardware; end of poll */
  1382. break;
  1383. }
  1384. DBGCP ( hermon, "Hermon %p completion:\n", hermon );
  1385. DBGCP_HD ( hermon, cqe, sizeof ( *cqe ) );
  1386. /* Handle completion */
  1387. if ( ( rc = hermon_complete ( ibdev, cq, cqe ) ) != 0 ) {
  1388. DBGC ( hermon, "Hermon %p failed to complete: %s\n",
  1389. hermon, strerror ( rc ) );
  1390. DBGC_HD ( hermon, cqe, sizeof ( *cqe ) );
  1391. }
  1392. /* Update completion queue's index */
  1393. cq->next_idx++;
  1394. /* Update doorbell record */
  1395. MLX_FILL_1 ( &hermon_cq->doorbell, 0, update_ci,
  1396. ( cq->next_idx & 0x00ffffffUL ) );
  1397. }
  1398. }
  1399. /***************************************************************************
  1400. *
  1401. * Event queues
  1402. *
  1403. ***************************************************************************
  1404. */
  1405. /**
  1406. * Create event queue
  1407. *
  1408. * @v hermon Hermon device
  1409. * @ret rc Return status code
  1410. */
  1411. static int hermon_create_eq ( struct hermon *hermon ) {
  1412. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1413. struct hermonprm_eqc eqctx;
  1414. struct hermonprm_event_mask mask;
  1415. unsigned int i;
  1416. int rc;
  1417. /* Select event queue number */
  1418. hermon_eq->eqn = ( 4 * hermon->cap.reserved_uars );
  1419. if ( hermon_eq->eqn < hermon->cap.reserved_eqs )
  1420. hermon_eq->eqn = hermon->cap.reserved_eqs;
  1421. /* Calculate doorbell address */
  1422. hermon_eq->doorbell =
  1423. ( hermon->uar + HERMON_DB_EQ_OFFSET ( hermon_eq->eqn ) );
  1424. /* Allocate event queue itself */
  1425. hermon_eq->eqe_size =
  1426. ( HERMON_NUM_EQES * sizeof ( hermon_eq->eqe[0] ) );
  1427. hermon_eq->eqe = malloc_dma ( hermon_eq->eqe_size,
  1428. sizeof ( hermon_eq->eqe[0] ) );
  1429. if ( ! hermon_eq->eqe ) {
  1430. rc = -ENOMEM;
  1431. goto err_eqe;
  1432. }
  1433. memset ( hermon_eq->eqe, 0, hermon_eq->eqe_size );
  1434. for ( i = 0 ; i < HERMON_NUM_EQES ; i++ ) {
  1435. MLX_FILL_1 ( &hermon_eq->eqe[i].generic, 7, owner, 1 );
  1436. }
  1437. barrier();
  1438. /* Allocate MTT entries */
  1439. if ( ( rc = hermon_alloc_mtt ( hermon, hermon_eq->eqe,
  1440. hermon_eq->eqe_size,
  1441. &hermon_eq->mtt ) ) != 0 )
  1442. goto err_alloc_mtt;
  1443. /* Hand queue over to hardware */
  1444. memset ( &eqctx, 0, sizeof ( eqctx ) );
  1445. MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
  1446. MLX_FILL_1 ( &eqctx, 2,
  1447. page_offset, ( hermon_eq->mtt.page_offset >> 5 ) );
  1448. MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( HERMON_NUM_EQES - 1 ) );
  1449. MLX_FILL_1 ( &eqctx, 7, mtt_base_addr_l,
  1450. ( hermon_eq->mtt.mtt_base_addr >> 3 ) );
  1451. if ( ( rc = hermon_cmd_sw2hw_eq ( hermon, hermon_eq->eqn,
  1452. &eqctx ) ) != 0 ) {
  1453. DBGC ( hermon, "Hermon %p SW2HW_EQ failed: %s\n",
  1454. hermon, strerror ( rc ) );
  1455. goto err_sw2hw_eq;
  1456. }
  1457. /* Map events to this event queue */
  1458. memset ( &mask, 0, sizeof ( mask ) );
  1459. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1460. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1461. ( HERMON_MAP_EQ | hermon_eq->eqn ),
  1462. &mask ) ) != 0 ) {
  1463. DBGC ( hermon, "Hermon %p MAP_EQ failed: %s\n",
  1464. hermon, strerror ( rc ) );
  1465. goto err_map_eq;
  1466. }
  1467. DBGC ( hermon, "Hermon %p EQN %#lx ring at [%p,%p])\n",
  1468. hermon, hermon_eq->eqn, hermon_eq->eqe,
  1469. ( ( ( void * ) hermon_eq->eqe ) + hermon_eq->eqe_size ) );
  1470. return 0;
  1471. err_map_eq:
  1472. hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn, &eqctx );
  1473. err_sw2hw_eq:
  1474. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1475. err_alloc_mtt:
  1476. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1477. err_eqe:
  1478. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1479. return rc;
  1480. }
  1481. /**
  1482. * Destroy event queue
  1483. *
  1484. * @v hermon Hermon device
  1485. */
  1486. static void hermon_destroy_eq ( struct hermon *hermon ) {
  1487. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1488. struct hermonprm_eqc eqctx;
  1489. struct hermonprm_event_mask mask;
  1490. int rc;
  1491. /* Unmap events from event queue */
  1492. memset ( &mask, 0, sizeof ( mask ) );
  1493. MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
  1494. if ( ( rc = hermon_cmd_map_eq ( hermon,
  1495. ( HERMON_UNMAP_EQ | hermon_eq->eqn ),
  1496. &mask ) ) != 0 ) {
  1497. DBGC ( hermon, "Hermon %p FATAL MAP_EQ failed to unmap: %s\n",
  1498. hermon, strerror ( rc ) );
  1499. /* Continue; HCA may die but system should survive */
  1500. }
  1501. /* Take ownership back from hardware */
  1502. if ( ( rc = hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn,
  1503. &eqctx ) ) != 0 ) {
  1504. DBGC ( hermon, "Hermon %p FATAL HW2SW_EQ failed: %s\n",
  1505. hermon, strerror ( rc ) );
  1506. /* Leak memory and return; at least we avoid corruption */
  1507. return;
  1508. }
  1509. /* Free MTT entries */
  1510. hermon_free_mtt ( hermon, &hermon_eq->mtt );
  1511. /* Free memory */
  1512. free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
  1513. memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
  1514. }
  1515. /**
  1516. * Handle port state event
  1517. *
  1518. * @v hermon Hermon device
  1519. * @v eqe Port state change event queue entry
  1520. */
  1521. static void hermon_event_port_state_change ( struct hermon *hermon,
  1522. union hermonprm_event_entry *eqe){
  1523. unsigned int port;
  1524. int link_up;
  1525. /* Get port and link status */
  1526. port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
  1527. link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
  1528. DBGC ( hermon, "Hermon %p port %d link %s\n", hermon, ( port + 1 ),
  1529. ( link_up ? "up" : "down" ) );
  1530. /* Sanity check */
  1531. if ( port >= hermon->cap.num_ports ) {
  1532. DBGC ( hermon, "Hermon %p port %d does not exist!\n",
  1533. hermon, ( port + 1 ) );
  1534. return;
  1535. }
  1536. /* Update MAD parameters */
  1537. ib_smc_update ( hermon->ibdev[port], hermon_mad );
  1538. /* Notify Infiniband core of link state change */
  1539. ib_link_state_changed ( hermon->ibdev[port] );
  1540. }
  1541. /**
  1542. * Poll event queue
  1543. *
  1544. * @v ibdev Infiniband device
  1545. */
  1546. static void hermon_poll_eq ( struct ib_device *ibdev ) {
  1547. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1548. struct hermon_event_queue *hermon_eq = &hermon->eq;
  1549. union hermonprm_event_entry *eqe;
  1550. union hermonprm_doorbell_register db_reg;
  1551. unsigned int eqe_idx_mask;
  1552. unsigned int event_type;
  1553. while ( 1 ) {
  1554. /* Look for event entry */
  1555. eqe_idx_mask = ( HERMON_NUM_EQES - 1 );
  1556. eqe = &hermon_eq->eqe[hermon_eq->next_idx & eqe_idx_mask];
  1557. if ( MLX_GET ( &eqe->generic, owner ) ^
  1558. ( ( hermon_eq->next_idx & HERMON_NUM_EQES ) ? 1 : 0 ) ) {
  1559. /* Entry still owned by hardware; end of poll */
  1560. break;
  1561. }
  1562. DBGCP ( hermon, "Hermon %p event:\n", hermon );
  1563. DBGCP_HD ( hermon, eqe, sizeof ( *eqe ) );
  1564. /* Handle event */
  1565. event_type = MLX_GET ( &eqe->generic, event_type );
  1566. switch ( event_type ) {
  1567. case HERMON_EV_PORT_STATE_CHANGE:
  1568. hermon_event_port_state_change ( hermon, eqe );
  1569. break;
  1570. default:
  1571. DBGC ( hermon, "Hermon %p unrecognised event type "
  1572. "%#x:\n", hermon, event_type );
  1573. DBGC_HD ( hermon, eqe, sizeof ( *eqe ) );
  1574. break;
  1575. }
  1576. /* Update event queue's index */
  1577. hermon_eq->next_idx++;
  1578. /* Ring doorbell */
  1579. MLX_FILL_1 ( &db_reg.event, 0,
  1580. ci, ( hermon_eq->next_idx & 0x00ffffffUL ) );
  1581. DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
  1582. virt_to_phys ( hermon_eq->doorbell ),
  1583. db_reg.dword[0] );
  1584. writel ( db_reg.dword[0], hermon_eq->doorbell );
  1585. }
  1586. }
  1587. /***************************************************************************
  1588. *
  1589. * Infiniband link-layer operations
  1590. *
  1591. ***************************************************************************
  1592. */
  1593. /**
  1594. * Sense port type
  1595. *
  1596. * @v ibdev Infiniband device
  1597. * @ret port_type Port type, or negative error
  1598. */
  1599. static int hermon_sense_port_type ( struct ib_device *ibdev ) {
  1600. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1601. struct hermonprm_sense_port sense_port;
  1602. int port_type;
  1603. int rc;
  1604. /* If DPDP is not supported, always assume Infiniband */
  1605. if ( ! hermon->cap.dpdp )
  1606. return HERMON_PORT_TYPE_IB;
  1607. /* Sense the port type */
  1608. if ( ( rc = hermon_cmd_sense_port ( hermon, ibdev->port,
  1609. &sense_port ) ) != 0 ) {
  1610. DBGC ( hermon, "Hermon %p port %d sense failed: %s\n",
  1611. hermon, ibdev->port, strerror ( rc ) );
  1612. return rc;
  1613. }
  1614. port_type = MLX_GET ( &sense_port, port_type );
  1615. DBGC ( hermon, "Hermon %p port %d type %d\n",
  1616. hermon, ibdev->port, port_type );
  1617. return port_type;
  1618. }
  1619. /**
  1620. * Initialise Infiniband link
  1621. *
  1622. * @v ibdev Infiniband device
  1623. * @ret rc Return status code
  1624. */
  1625. static int hermon_open ( struct ib_device *ibdev ) {
  1626. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1627. struct hermonprm_init_port init_port;
  1628. int port_type;
  1629. int rc;
  1630. /* Check we are connected to an Infiniband network */
  1631. if ( ( rc = port_type = hermon_sense_port_type ( ibdev ) ) < 0 )
  1632. return rc;
  1633. if ( port_type != HERMON_PORT_TYPE_IB ) {
  1634. DBGC ( hermon, "Hermon %p port %d not connected to an "
  1635. "Infiniband network", hermon, ibdev->port );
  1636. return -ENOTCONN;
  1637. }
  1638. /* Init Port */
  1639. memset ( &init_port, 0, sizeof ( init_port ) );
  1640. MLX_FILL_2 ( &init_port, 0,
  1641. port_width_cap, 3,
  1642. vl_cap, 1 );
  1643. MLX_FILL_2 ( &init_port, 1,
  1644. mtu, HERMON_MTU_2048,
  1645. max_gid, 1 );
  1646. MLX_FILL_1 ( &init_port, 2, max_pkey, 64 );
  1647. if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port,
  1648. &init_port ) ) != 0 ) {
  1649. DBGC ( hermon, "Hermon %p could not intialise port: %s\n",
  1650. hermon, strerror ( rc ) );
  1651. return rc;
  1652. }
  1653. /* Update MAD parameters */
  1654. ib_smc_update ( ibdev, hermon_mad );
  1655. return 0;
  1656. }
  1657. /**
  1658. * Close Infiniband link
  1659. *
  1660. * @v ibdev Infiniband device
  1661. */
  1662. static void hermon_close ( struct ib_device *ibdev ) {
  1663. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1664. int rc;
  1665. if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
  1666. DBGC ( hermon, "Hermon %p could not close port: %s\n",
  1667. hermon, strerror ( rc ) );
  1668. /* Nothing we can do about this */
  1669. }
  1670. }
  1671. /**
  1672. * Inform embedded subnet management agent of a received MAD
  1673. *
  1674. * @v ibdev Infiniband device
  1675. * @v mad MAD
  1676. * @ret rc Return status code
  1677. */
  1678. static int hermon_inform_sma ( struct ib_device *ibdev,
  1679. union ib_mad *mad ) {
  1680. int rc;
  1681. /* Send the MAD to the embedded SMA */
  1682. if ( ( rc = hermon_mad ( ibdev, mad ) ) != 0 )
  1683. return rc;
  1684. /* Update parameters held in software */
  1685. ib_smc_update ( ibdev, hermon_mad );
  1686. return 0;
  1687. }
  1688. /***************************************************************************
  1689. *
  1690. * Multicast group operations
  1691. *
  1692. ***************************************************************************
  1693. */
  1694. /**
  1695. * Attach to multicast group
  1696. *
  1697. * @v ibdev Infiniband device
  1698. * @v qp Queue pair
  1699. * @v gid Multicast GID
  1700. * @ret rc Return status code
  1701. */
  1702. static int hermon_mcast_attach ( struct ib_device *ibdev,
  1703. struct ib_queue_pair *qp,
  1704. struct ib_gid *gid ) {
  1705. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1706. struct hermonprm_mgm_hash hash;
  1707. struct hermonprm_mcg_entry mcg;
  1708. unsigned int index;
  1709. int rc;
  1710. /* Generate hash table index */
  1711. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  1712. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  1713. hermon, strerror ( rc ) );
  1714. return rc;
  1715. }
  1716. index = MLX_GET ( &hash, hash );
  1717. /* Check for existing hash table entry */
  1718. if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1719. DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
  1720. hermon, index, strerror ( rc ) );
  1721. return rc;
  1722. }
  1723. if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
  1724. /* FIXME: this implementation allows only a single QP
  1725. * per multicast group, and doesn't handle hash
  1726. * collisions. Sufficient for IPoIB but may need to
  1727. * be extended in future.
  1728. */
  1729. DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
  1730. hermon, index );
  1731. return -EBUSY;
  1732. }
  1733. /* Update hash table entry */
  1734. MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
  1735. MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
  1736. memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
  1737. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1738. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  1739. hermon, index, strerror ( rc ) );
  1740. return rc;
  1741. }
  1742. return 0;
  1743. }
  1744. /**
  1745. * Detach from multicast group
  1746. *
  1747. * @v ibdev Infiniband device
  1748. * @v qp Queue pair
  1749. * @v gid Multicast GID
  1750. */
  1751. static void hermon_mcast_detach ( struct ib_device *ibdev,
  1752. struct ib_queue_pair *qp __unused,
  1753. struct ib_gid *gid ) {
  1754. struct hermon *hermon = ib_get_drvdata ( ibdev );
  1755. struct hermonprm_mgm_hash hash;
  1756. struct hermonprm_mcg_entry mcg;
  1757. unsigned int index;
  1758. int rc;
  1759. /* Generate hash table index */
  1760. if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
  1761. DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
  1762. hermon, strerror ( rc ) );
  1763. return;
  1764. }
  1765. index = MLX_GET ( &hash, hash );
  1766. /* Clear hash table entry */
  1767. memset ( &mcg, 0, sizeof ( mcg ) );
  1768. if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
  1769. DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
  1770. hermon, index, strerror ( rc ) );
  1771. return;
  1772. }
  1773. }
  1774. /** Hermon Infiniband operations */
  1775. static struct ib_device_operations hermon_ib_operations = {
  1776. .create_cq = hermon_create_cq,
  1777. .destroy_cq = hermon_destroy_cq,
  1778. .create_qp = hermon_create_qp,
  1779. .modify_qp = hermon_modify_qp,
  1780. .destroy_qp = hermon_destroy_qp,
  1781. .post_send = hermon_post_send,
  1782. .post_recv = hermon_post_recv,
  1783. .poll_cq = hermon_poll_cq,
  1784. .poll_eq = hermon_poll_eq,
  1785. .open = hermon_open,
  1786. .close = hermon_close,
  1787. .mcast_attach = hermon_mcast_attach,
  1788. .mcast_detach = hermon_mcast_detach,
  1789. .set_port_info = hermon_inform_sma,
  1790. .set_pkey_table = hermon_inform_sma,
  1791. };
  1792. /***************************************************************************
  1793. *
  1794. * Firmware control
  1795. *
  1796. ***************************************************************************
  1797. */
  1798. /**
  1799. * Map virtual to physical address for firmware usage
  1800. *
  1801. * @v hermon Hermon device
  1802. * @v map Mapping function
  1803. * @v va Virtual address
  1804. * @v pa Physical address
  1805. * @v len Length of region
  1806. * @ret rc Return status code
  1807. */
  1808. static int hermon_map_vpm ( struct hermon *hermon,
  1809. int ( *map ) ( struct hermon *hermon,
  1810. const struct hermonprm_virtual_physical_mapping* ),
  1811. uint64_t va, physaddr_t pa, size_t len ) {
  1812. struct hermonprm_virtual_physical_mapping mapping;
  1813. int rc;
  1814. assert ( ( va & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1815. assert ( ( pa & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1816. assert ( ( len & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
  1817. /* These mappings tend to generate huge volumes of
  1818. * uninteresting debug data, which basically makes it
  1819. * impossible to use debugging otherwise.
  1820. */
  1821. DBG_DISABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1822. while ( len ) {
  1823. memset ( &mapping, 0, sizeof ( mapping ) );
  1824. MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
  1825. MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
  1826. MLX_FILL_2 ( &mapping, 3,
  1827. log2size, 0,
  1828. pa_l, ( pa >> 12 ) );
  1829. if ( ( rc = map ( hermon, &mapping ) ) != 0 ) {
  1830. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1831. DBGC ( hermon, "Hermon %p could not map %llx => %lx: "
  1832. "%s\n", hermon, va, pa, strerror ( rc ) );
  1833. return rc;
  1834. }
  1835. pa += HERMON_PAGE_SIZE;
  1836. va += HERMON_PAGE_SIZE;
  1837. len -= HERMON_PAGE_SIZE;
  1838. }
  1839. DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
  1840. return 0;
  1841. }
  1842. /**
  1843. * Start firmware running
  1844. *
  1845. * @v hermon Hermon device
  1846. * @ret rc Return status code
  1847. */
  1848. static int hermon_start_firmware ( struct hermon *hermon ) {
  1849. struct hermonprm_query_fw fw;
  1850. unsigned int fw_pages;
  1851. size_t fw_size;
  1852. physaddr_t fw_base;
  1853. int rc;
  1854. /* Get firmware parameters */
  1855. if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
  1856. DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
  1857. hermon, strerror ( rc ) );
  1858. goto err_query_fw;
  1859. }
  1860. DBGC ( hermon, "Hermon %p firmware version %d.%d.%d\n", hermon,
  1861. MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
  1862. MLX_GET ( &fw, fw_rev_subminor ) );
  1863. fw_pages = MLX_GET ( &fw, fw_pages );
  1864. DBGC ( hermon, "Hermon %p requires %d pages (%d kB) for firmware\n",
  1865. hermon, fw_pages, ( fw_pages * ( HERMON_PAGE_SIZE / 1024 ) ) );
  1866. /* Allocate firmware pages and map firmware area */
  1867. fw_size = ( fw_pages * HERMON_PAGE_SIZE );
  1868. hermon->firmware_area = umalloc ( fw_size );
  1869. if ( ! hermon->firmware_area ) {
  1870. rc = -ENOMEM;
  1871. goto err_alloc_fa;
  1872. }
  1873. fw_base = user_to_phys ( hermon->firmware_area, 0 );
  1874. DBGC ( hermon, "Hermon %p firmware area at physical [%lx,%lx)\n",
  1875. hermon, fw_base, ( fw_base + fw_size ) );
  1876. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_fa,
  1877. 0, fw_base, fw_size ) ) != 0 ) {
  1878. DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
  1879. hermon, strerror ( rc ) );
  1880. goto err_map_fa;
  1881. }
  1882. /* Start firmware */
  1883. if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
  1884. DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
  1885. hermon, strerror ( rc ) );
  1886. goto err_run_fw;
  1887. }
  1888. DBGC ( hermon, "Hermon %p firmware started\n", hermon );
  1889. return 0;
  1890. err_run_fw:
  1891. err_map_fa:
  1892. hermon_cmd_unmap_fa ( hermon );
  1893. ufree ( hermon->firmware_area );
  1894. hermon->firmware_area = UNULL;
  1895. err_alloc_fa:
  1896. err_query_fw:
  1897. return rc;
  1898. }
  1899. /**
  1900. * Stop firmware running
  1901. *
  1902. * @v hermon Hermon device
  1903. */
  1904. static void hermon_stop_firmware ( struct hermon *hermon ) {
  1905. int rc;
  1906. if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
  1907. DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
  1908. hermon, strerror ( rc ) );
  1909. /* Leak memory and return; at least we avoid corruption */
  1910. return;
  1911. }
  1912. ufree ( hermon->firmware_area );
  1913. hermon->firmware_area = UNULL;
  1914. }
  1915. /***************************************************************************
  1916. *
  1917. * Infinihost Context Memory management
  1918. *
  1919. ***************************************************************************
  1920. */
  1921. /**
  1922. * Get device limits
  1923. *
  1924. * @v hermon Hermon device
  1925. * @ret rc Return status code
  1926. */
  1927. static int hermon_get_cap ( struct hermon *hermon ) {
  1928. struct hermonprm_query_dev_cap dev_cap;
  1929. int rc;
  1930. if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
  1931. DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
  1932. hermon, strerror ( rc ) );
  1933. return rc;
  1934. }
  1935. hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
  1936. hermon->cap.reserved_qps =
  1937. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
  1938. hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
  1939. hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
  1940. hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
  1941. hermon->cap.reserved_srqs =
  1942. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
  1943. hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
  1944. hermon->cap.reserved_cqs =
  1945. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
  1946. hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
  1947. hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
  1948. hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
  1949. hermon->cap.reserved_mtts =
  1950. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
  1951. hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
  1952. hermon->cap.reserved_mrws =
  1953. ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
  1954. hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
  1955. hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
  1956. hermon->cap.num_ports = MLX_GET ( &dev_cap, num_ports );
  1957. hermon->cap.dpdp = MLX_GET ( &dev_cap, dpdp );
  1958. /* Sanity check */
  1959. if ( hermon->cap.num_ports > HERMON_MAX_PORTS ) {
  1960. DBGC ( hermon, "Hermon %p has %d ports (only %d supported)\n",
  1961. hermon, hermon->cap.num_ports, HERMON_MAX_PORTS );
  1962. hermon->cap.num_ports = HERMON_MAX_PORTS;
  1963. }
  1964. return 0;
  1965. }
  1966. /**
  1967. * Get ICM usage
  1968. *
  1969. * @v log_num_entries Log2 of the number of entries
  1970. * @v entry_size Entry size
  1971. * @ret usage Usage size in ICM
  1972. */
  1973. static size_t icm_usage ( unsigned int log_num_entries, size_t entry_size ) {
  1974. size_t usage;
  1975. usage = ( ( 1 << log_num_entries ) * entry_size );
  1976. usage = ( ( usage + HERMON_PAGE_SIZE - 1 ) &
  1977. ~( HERMON_PAGE_SIZE - 1 ) );
  1978. return usage;
  1979. }
  1980. /**
  1981. * Allocate ICM
  1982. *
  1983. * @v hermon Hermon device
  1984. * @v init_hca INIT_HCA structure to fill in
  1985. * @ret rc Return status code
  1986. */
  1987. static int hermon_alloc_icm ( struct hermon *hermon,
  1988. struct hermonprm_init_hca *init_hca ) {
  1989. struct hermonprm_scalar_parameter icm_size;
  1990. struct hermonprm_scalar_parameter icm_aux_size;
  1991. uint64_t icm_offset = 0;
  1992. unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
  1993. unsigned int log_num_mtts, log_num_mpts;
  1994. size_t cmpt_max_len;
  1995. size_t qp_cmpt_len, srq_cmpt_len, cq_cmpt_len, eq_cmpt_len;
  1996. size_t icm_len, icm_aux_len;
  1997. physaddr_t icm_phys;
  1998. int i;
  1999. int rc;
  2000. /*
  2001. * Start by carving up the ICM virtual address space
  2002. *
  2003. */
  2004. /* Calculate number of each object type within ICM */
  2005. log_num_qps = fls ( hermon->cap.reserved_qps +
  2006. HERMON_RSVD_SPECIAL_QPS + HERMON_MAX_QPS - 1 );
  2007. log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
  2008. log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
  2009. log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
  2010. log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
  2011. /* ICM starts with the cMPT tables, which are sparse */
  2012. cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
  2013. ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
  2014. qp_cmpt_len = icm_usage ( log_num_qps, hermon->cap.cmpt_entry_size );
  2015. hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
  2016. hermon->icm_map[HERMON_ICM_QP_CMPT].len = qp_cmpt_len;
  2017. icm_offset += cmpt_max_len;
  2018. srq_cmpt_len = icm_usage ( log_num_srqs, hermon->cap.cmpt_entry_size );
  2019. hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
  2020. hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = srq_cmpt_len;
  2021. icm_offset += cmpt_max_len;
  2022. cq_cmpt_len = icm_usage ( log_num_cqs, hermon->cap.cmpt_entry_size );
  2023. hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
  2024. hermon->icm_map[HERMON_ICM_CQ_CMPT].len = cq_cmpt_len;
  2025. icm_offset += cmpt_max_len;
  2026. eq_cmpt_len = icm_usage ( log_num_eqs, hermon->cap.cmpt_entry_size );
  2027. hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
  2028. hermon->icm_map[HERMON_ICM_EQ_CMPT].len = eq_cmpt_len;
  2029. icm_offset += cmpt_max_len;
  2030. hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
  2031. /* Queue pair contexts */
  2032. MLX_FILL_1 ( init_hca, 12,
  2033. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
  2034. ( icm_offset >> 32 ) );
  2035. MLX_FILL_2 ( init_hca, 13,
  2036. qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
  2037. ( icm_offset >> 5 ),
  2038. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
  2039. log_num_qps );
  2040. DBGC ( hermon, "Hermon %p ICM QPC base = %llx\n", hermon, icm_offset );
  2041. icm_offset += icm_usage ( log_num_qps, hermon->cap.qpc_entry_size );
  2042. /* Extended alternate path contexts */
  2043. MLX_FILL_1 ( init_hca, 24,
  2044. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
  2045. ( icm_offset >> 32 ) );
  2046. MLX_FILL_1 ( init_hca, 25,
  2047. qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
  2048. icm_offset );
  2049. DBGC ( hermon, "Hermon %p ICM ALTC base = %llx\n", hermon, icm_offset);
  2050. icm_offset += icm_usage ( log_num_qps,
  2051. hermon->cap.altc_entry_size );
  2052. /* Extended auxiliary contexts */
  2053. MLX_FILL_1 ( init_hca, 28,
  2054. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
  2055. ( icm_offset >> 32 ) );
  2056. MLX_FILL_1 ( init_hca, 29,
  2057. qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
  2058. icm_offset );
  2059. DBGC ( hermon, "Hermon %p ICM AUXC base = %llx\n", hermon, icm_offset);
  2060. icm_offset += icm_usage ( log_num_qps,
  2061. hermon->cap.auxc_entry_size );
  2062. /* Shared receive queue contexts */
  2063. MLX_FILL_1 ( init_hca, 18,
  2064. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
  2065. ( icm_offset >> 32 ) );
  2066. MLX_FILL_2 ( init_hca, 19,
  2067. qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
  2068. ( icm_offset >> 5 ),
  2069. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
  2070. log_num_srqs );
  2071. DBGC ( hermon, "Hermon %p ICM SRQC base = %llx\n", hermon, icm_offset);
  2072. icm_offset += icm_usage ( log_num_srqs,
  2073. hermon->cap.srqc_entry_size );
  2074. /* Completion queue contexts */
  2075. MLX_FILL_1 ( init_hca, 20,
  2076. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
  2077. ( icm_offset >> 32 ) );
  2078. MLX_FILL_2 ( init_hca, 21,
  2079. qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
  2080. ( icm_offset >> 5 ),
  2081. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
  2082. log_num_cqs );
  2083. DBGC ( hermon, "Hermon %p ICM CQC base = %llx\n", hermon, icm_offset );
  2084. icm_offset += icm_usage ( log_num_cqs, hermon->cap.cqc_entry_size );
  2085. /* Event queue contexts */
  2086. MLX_FILL_1 ( init_hca, 32,
  2087. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
  2088. ( icm_offset >> 32 ) );
  2089. MLX_FILL_2 ( init_hca, 33,
  2090. qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
  2091. ( icm_offset >> 5 ),
  2092. qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
  2093. log_num_eqs );
  2094. DBGC ( hermon, "Hermon %p ICM EQC base = %llx\n", hermon, icm_offset );
  2095. icm_offset += icm_usage ( log_num_eqs, hermon->cap.eqc_entry_size );
  2096. /* Memory translation table */
  2097. MLX_FILL_1 ( init_hca, 64,
  2098. tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
  2099. MLX_FILL_1 ( init_hca, 65,
  2100. tpt_parameters.mtt_base_addr_l, icm_offset );
  2101. DBGC ( hermon, "Hermon %p ICM MTT base = %llx\n", hermon, icm_offset );
  2102. icm_offset += icm_usage ( log_num_mtts,
  2103. hermon->cap.mtt_entry_size );
  2104. /* Memory protection table */
  2105. log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
  2106. MLX_FILL_1 ( init_hca, 60,
  2107. tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
  2108. MLX_FILL_1 ( init_hca, 61,
  2109. tpt_parameters.dmpt_base_adr_l, icm_offset );
  2110. MLX_FILL_1 ( init_hca, 62,
  2111. tpt_parameters.log_dmpt_sz, log_num_mpts );
  2112. DBGC ( hermon, "Hermon %p ICM DMPT base = %llx\n", hermon, icm_offset);
  2113. icm_offset += icm_usage ( log_num_mpts,
  2114. hermon->cap.dmpt_entry_size );
  2115. /* Multicast table */
  2116. MLX_FILL_1 ( init_hca, 48,
  2117. multicast_parameters.mc_base_addr_h,
  2118. ( icm_offset >> 32 ) );
  2119. MLX_FILL_1 ( init_hca, 49,
  2120. multicast_parameters.mc_base_addr_l, icm_offset );
  2121. MLX_FILL_1 ( init_hca, 52,
  2122. multicast_parameters.log_mc_table_entry_sz,
  2123. fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
  2124. MLX_FILL_1 ( init_hca, 53,
  2125. multicast_parameters.log_mc_table_hash_sz, 3 );
  2126. MLX_FILL_1 ( init_hca, 54,
  2127. multicast_parameters.log_mc_table_sz, 3 );
  2128. DBGC ( hermon, "Hermon %p ICM MC base = %llx\n", hermon, icm_offset );
  2129. icm_offset += ( ( 8 * sizeof ( struct hermonprm_mcg_entry ) +
  2130. HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
  2131. hermon->icm_map[HERMON_ICM_OTHER].len =
  2132. ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
  2133. /*
  2134. * Allocate and map physical memory for (portions of) ICM
  2135. *
  2136. * Map is:
  2137. * ICM AUX area (aligned to its own size)
  2138. * cMPT areas
  2139. * Other areas
  2140. */
  2141. /* Calculate physical memory required for ICM */
  2142. icm_len = 0;
  2143. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2144. icm_len += hermon->icm_map[i].len;
  2145. }
  2146. /* Get ICM auxiliary area size */
  2147. memset ( &icm_size, 0, sizeof ( icm_size ) );
  2148. MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
  2149. MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
  2150. if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
  2151. &icm_aux_size ) ) != 0 ) {
  2152. DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
  2153. hermon, strerror ( rc ) );
  2154. goto err_set_icm_size;
  2155. }
  2156. icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
  2157. /* Allocate ICM data and auxiliary area */
  2158. DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
  2159. hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
  2160. hermon->icm = umalloc ( icm_aux_len + icm_len );
  2161. if ( ! hermon->icm ) {
  2162. rc = -ENOMEM;
  2163. goto err_alloc;
  2164. }
  2165. icm_phys = user_to_phys ( hermon->icm, 0 );
  2166. /* Map ICM auxiliary area */
  2167. DBGC ( hermon, "Hermon %p mapping ICM AUX => %08lx\n",
  2168. hermon, icm_phys );
  2169. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm_aux,
  2170. 0, icm_phys, icm_aux_len ) ) != 0 ) {
  2171. DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
  2172. hermon, strerror ( rc ) );
  2173. goto err_map_icm_aux;
  2174. }
  2175. icm_phys += icm_aux_len;
  2176. /* MAP ICM area */
  2177. for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
  2178. DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx => %08lx\n",
  2179. hermon, hermon->icm_map[i].offset,
  2180. hermon->icm_map[i].len, icm_phys );
  2181. if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm,
  2182. hermon->icm_map[i].offset,
  2183. icm_phys,
  2184. hermon->icm_map[i].len ) ) != 0 ){
  2185. DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
  2186. hermon, strerror ( rc ) );
  2187. goto err_map_icm;
  2188. }
  2189. icm_phys += hermon->icm_map[i].len;
  2190. }
  2191. return 0;
  2192. err_map_icm:
  2193. assert ( i == 0 ); /* We don't handle partial failure at present */
  2194. err_map_icm_aux:
  2195. hermon_cmd_unmap_icm_aux ( hermon );
  2196. ufree ( hermon->icm );
  2197. hermon->icm = UNULL;
  2198. err_alloc:
  2199. err_set_icm_size:
  2200. return rc;
  2201. }
  2202. /**
  2203. * Free ICM
  2204. *
  2205. * @v hermon Hermon device
  2206. */
  2207. static void hermon_free_icm ( struct hermon *hermon ) {
  2208. struct hermonprm_scalar_parameter unmap_icm;
  2209. int i;
  2210. for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
  2211. memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
  2212. MLX_FILL_1 ( &unmap_icm, 0, value_hi,
  2213. ( hermon->icm_map[i].offset >> 32 ) );
  2214. MLX_FILL_1 ( &unmap_icm, 1, value,
  2215. hermon->icm_map[i].offset );
  2216. hermon_cmd_unmap_icm ( hermon,
  2217. ( 1 << fls ( ( hermon->icm_map[i].len /
  2218. HERMON_PAGE_SIZE ) - 1)),
  2219. &unmap_icm );
  2220. }
  2221. hermon_cmd_unmap_icm_aux ( hermon );
  2222. ufree ( hermon->icm );
  2223. hermon->icm = UNULL;
  2224. }
  2225. /***************************************************************************
  2226. *
  2227. * PCI interface
  2228. *
  2229. ***************************************************************************
  2230. */
  2231. /**
  2232. * Set up memory protection table
  2233. *
  2234. * @v hermon Hermon device
  2235. * @ret rc Return status code
  2236. */
  2237. static int hermon_setup_mpt ( struct hermon *hermon ) {
  2238. struct hermonprm_mpt mpt;
  2239. uint32_t key;
  2240. int rc;
  2241. /* Derive key */
  2242. key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
  2243. hermon->lkey = ( ( key << 8 ) | ( key >> 24 ) );
  2244. /* Initialise memory protection table */
  2245. memset ( &mpt, 0, sizeof ( mpt ) );
  2246. MLX_FILL_7 ( &mpt, 0,
  2247. atomic, 1,
  2248. rw, 1,
  2249. rr, 1,
  2250. lw, 1,
  2251. lr, 1,
  2252. pa, 1,
  2253. r_w, 1 );
  2254. MLX_FILL_1 ( &mpt, 2, mem_key, key );
  2255. MLX_FILL_1 ( &mpt, 3,
  2256. pd, HERMON_GLOBAL_PD );
  2257. MLX_FILL_1 ( &mpt, 10, len64, 1 );
  2258. if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
  2259. hermon->cap.reserved_mrws,
  2260. &mpt ) ) != 0 ) {
  2261. DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
  2262. hermon, strerror ( rc ) );
  2263. return rc;
  2264. }
  2265. return 0;
  2266. }
  2267. /**
  2268. * Configure special queue pairs
  2269. *
  2270. * @v hermon Hermon device
  2271. * @ret rc Return status code
  2272. */
  2273. static int hermon_configure_special_qps ( struct hermon *hermon ) {
  2274. int rc;
  2275. /* Special QP block must be aligned on its own size */
  2276. hermon->special_qpn_base = ( ( hermon->cap.reserved_qps +
  2277. HERMON_NUM_SPECIAL_QPS - 1 )
  2278. & ~( HERMON_NUM_SPECIAL_QPS - 1 ) );
  2279. hermon->qpn_base = ( hermon->special_qpn_base +
  2280. HERMON_NUM_SPECIAL_QPS );
  2281. DBGC ( hermon, "Hermon %p special QPs at [%lx,%lx]\n", hermon,
  2282. hermon->special_qpn_base, ( hermon->qpn_base - 1 ) );
  2283. /* Issue command to configure special QPs */
  2284. if ( ( rc = hermon_cmd_conf_special_qp ( hermon, 0x00,
  2285. hermon->special_qpn_base ) ) != 0 ) {
  2286. DBGC ( hermon, "Hermon %p could not configure special QPs: "
  2287. "%s\n", hermon, strerror ( rc ) );
  2288. return rc;
  2289. }
  2290. return 0;
  2291. }
  2292. /**
  2293. * Probe PCI device
  2294. *
  2295. * @v pci PCI device
  2296. * @v id PCI ID
  2297. * @ret rc Return status code
  2298. */
  2299. static int hermon_probe ( struct pci_device *pci,
  2300. const struct pci_device_id *id __unused ) {
  2301. struct hermon *hermon;
  2302. struct ib_device *ibdev;
  2303. struct hermonprm_init_hca init_hca;
  2304. unsigned int i;
  2305. int rc;
  2306. /* Allocate Hermon device */
  2307. hermon = zalloc ( sizeof ( *hermon ) );
  2308. if ( ! hermon ) {
  2309. rc = -ENOMEM;
  2310. goto err_alloc_hermon;
  2311. }
  2312. pci_set_drvdata ( pci, hermon );
  2313. /* Fix up PCI device */
  2314. adjust_pci_device ( pci );
  2315. /* Get PCI BARs */
  2316. hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR),
  2317. HERMON_PCI_CONFIG_BAR_SIZE );
  2318. hermon->uar = ioremap ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ),
  2319. HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE );
  2320. /* Allocate space for mailboxes */
  2321. hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
  2322. HERMON_MBOX_ALIGN );
  2323. if ( ! hermon->mailbox_in ) {
  2324. rc = -ENOMEM;
  2325. goto err_mailbox_in;
  2326. }
  2327. hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
  2328. HERMON_MBOX_ALIGN );
  2329. if ( ! hermon->mailbox_out ) {
  2330. rc = -ENOMEM;
  2331. goto err_mailbox_out;
  2332. }
  2333. /* Start firmware */
  2334. if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
  2335. goto err_start_firmware;
  2336. /* Get device limits */
  2337. if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
  2338. goto err_get_cap;
  2339. /* Allocate Infiniband devices */
  2340. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  2341. ibdev = alloc_ibdev ( 0 );
  2342. if ( ! ibdev ) {
  2343. rc = -ENOMEM;
  2344. goto err_alloc_ibdev;
  2345. }
  2346. hermon->ibdev[i] = ibdev;
  2347. ibdev->op = &hermon_ib_operations;
  2348. ibdev->dev = &pci->dev;
  2349. ibdev->port = ( HERMON_PORT_BASE + i );
  2350. ib_set_drvdata ( ibdev, hermon );
  2351. }
  2352. /* Allocate ICM */
  2353. memset ( &init_hca, 0, sizeof ( init_hca ) );
  2354. if ( ( rc = hermon_alloc_icm ( hermon, &init_hca ) ) != 0 )
  2355. goto err_alloc_icm;
  2356. /* Initialise HCA */
  2357. MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
  2358. MLX_FILL_1 ( &init_hca, 5, udp, 1 );
  2359. MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
  2360. if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
  2361. DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
  2362. hermon, strerror ( rc ) );
  2363. goto err_init_hca;
  2364. }
  2365. /* Set up memory protection */
  2366. if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
  2367. goto err_setup_mpt;
  2368. for ( i = 0 ; i < hermon->cap.num_ports ; i++ )
  2369. hermon->ibdev[i]->rdma_key = hermon->lkey;
  2370. /* Set up event queue */
  2371. if ( ( rc = hermon_create_eq ( hermon ) ) != 0 )
  2372. goto err_create_eq;
  2373. /* Configure special QPs */
  2374. if ( ( rc = hermon_configure_special_qps ( hermon ) ) != 0 )
  2375. goto err_conf_special_qps;
  2376. /* Update IPoIB MAC address */
  2377. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  2378. ib_smc_update ( hermon->ibdev[i], hermon_mad );
  2379. }
  2380. /* Register Infiniband devices */
  2381. for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
  2382. if ( ( rc = register_ibdev ( hermon->ibdev[i] ) ) != 0 ) {
  2383. DBGC ( hermon, "Hermon %p could not register IB "
  2384. "device: %s\n", hermon, strerror ( rc ) );
  2385. goto err_register_ibdev;
  2386. }
  2387. }
  2388. return 0;
  2389. i = hermon->cap.num_ports;
  2390. err_register_ibdev:
  2391. for ( i-- ; ( signed int ) i >= 0 ; i-- )
  2392. unregister_ibdev ( hermon->ibdev[i] );
  2393. err_conf_special_qps:
  2394. hermon_destroy_eq ( hermon );
  2395. err_create_eq:
  2396. err_setup_mpt:
  2397. hermon_cmd_close_hca ( hermon );
  2398. err_init_hca:
  2399. hermon_free_icm ( hermon );
  2400. err_alloc_icm:
  2401. i = hermon->cap.num_ports;
  2402. err_alloc_ibdev:
  2403. for ( i-- ; ( signed int ) i >= 0 ; i-- )
  2404. ibdev_put ( hermon->ibdev[i] );
  2405. err_get_cap:
  2406. hermon_stop_firmware ( hermon );
  2407. err_start_firmware:
  2408. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  2409. err_mailbox_out:
  2410. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  2411. err_mailbox_in:
  2412. free ( hermon );
  2413. err_alloc_hermon:
  2414. return rc;
  2415. }
  2416. /**
  2417. * Remove PCI device
  2418. *
  2419. * @v pci PCI device
  2420. */
  2421. static void hermon_remove ( struct pci_device *pci ) {
  2422. struct hermon *hermon = pci_get_drvdata ( pci );
  2423. int i;
  2424. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
  2425. unregister_ibdev ( hermon->ibdev[i] );
  2426. hermon_destroy_eq ( hermon );
  2427. hermon_cmd_close_hca ( hermon );
  2428. hermon_free_icm ( hermon );
  2429. hermon_stop_firmware ( hermon );
  2430. hermon_stop_firmware ( hermon );
  2431. free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
  2432. free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
  2433. for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
  2434. ibdev_put ( hermon->ibdev[i] );
  2435. free ( hermon );
  2436. }
  2437. static struct pci_device_id hermon_nics[] = {
  2438. PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver", 0 ),
  2439. PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver", 0 ),
  2440. PCI_ROM ( 0x15b3, 0x6732, "mt26418", "MT26418 HCA driver", 0 ),
  2441. PCI_ROM ( 0x15b3, 0x673c, "mt26428", "MT26428 HCA driver", 0 ),
  2442. };
  2443. struct pci_driver hermon_driver __pci_driver = {
  2444. .ids = hermon_nics,
  2445. .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
  2446. .probe = hermon_probe,
  2447. .remove = hermon_remove,
  2448. };