You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

i2c.h 4.0KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169
  1. #ifndef _GPXE_I2C_H
  2. #define _GPXE_I2C_H
  3. /** @file
  4. *
  5. * I2C interface
  6. *
  7. */
  8. #include <stdint.h>
  9. #include <gpxe/bitbash.h>
  10. /** An I2C device
  11. *
  12. * An I2C device represents a specific slave device on an I2C bus. It
  13. * is accessed via an I2C interface.
  14. */
  15. struct i2c_device {
  16. /** Address of this device
  17. *
  18. * The actual address sent on the bus will look like
  19. *
  20. * <start> <device address> <word address overflow> <r/w>
  21. *
  22. * The "word address overflow" is any excess bits from the
  23. * word address, i.e. any portion that does not fit within the
  24. * defined word address length.
  25. */
  26. unsigned int dev_addr;
  27. /** Device address length, in bytes
  28. *
  29. * This is the number of bytes that comprise the device
  30. * address, defined to be the portion that terminates with the
  31. * read/write bit.
  32. */
  33. unsigned int dev_addr_len;
  34. /** Word adddress length, in bytes
  35. *
  36. * This is the number of bytes that comprise the word address,
  37. * defined to be the portion that starts after the read/write
  38. * bit and ends before the first data byte.
  39. *
  40. * For some devices, this length will be zero (i.e. the word
  41. * address is contained entirely within the "word address
  42. * overflow").
  43. */
  44. unsigned int word_addr_len;
  45. };
  46. /** An I2C interface
  47. *
  48. * An I2C interface provides access to an I2C bus, via which I2C
  49. * devices may be reached.
  50. */
  51. struct i2c_interface {
  52. /**
  53. * Read data from I2C device
  54. *
  55. * @v i2c I2C interface
  56. * @v i2cdev I2C device
  57. * @v offset Starting offset within the device
  58. * @v data Data buffer
  59. * @v len Length of data buffer
  60. * @ret rc Return status code
  61. */
  62. int ( * read ) ( struct i2c_interface *i2c, struct i2c_device *i2cdev,
  63. unsigned int offset, uint8_t *data,
  64. unsigned int len );
  65. /**
  66. * Write data to I2C device
  67. *
  68. * @v i2c I2C interface
  69. * @v i2cdev I2C device
  70. * @v offset Starting offset within the device
  71. * @v data Data buffer
  72. * @v len Length of data buffer
  73. * @ret rc Return status code
  74. */
  75. int ( * write ) ( struct i2c_interface *i2c, struct i2c_device *i2cdev,
  76. unsigned int offset, const uint8_t *data,
  77. unsigned int len );
  78. };
  79. /** A bit-bashing I2C interface
  80. *
  81. * This provides a standardised way to construct I2C buses via a
  82. * bit-bashing interface.
  83. */
  84. struct i2c_bit_basher {
  85. /** I2C interface */
  86. struct i2c_interface i2c;
  87. /** Bit-bashing interface */
  88. struct bit_basher basher;
  89. };
  90. /** Ten-bit address marker
  91. *
  92. * This value is ORed with the I2C device address to indicate a
  93. * ten-bit address format on the bus.
  94. */
  95. #define I2C_TENBIT_ADDRESS 0x7800
  96. /** An I2C write command */
  97. #define I2C_WRITE 0
  98. /** An I2C read command */
  99. #define I2C_READ 1
  100. /** Bit indices used for I2C bit-bashing interface */
  101. enum {
  102. /** Serial clock */
  103. I2C_BIT_SCL = 0,
  104. /** Serial data */
  105. I2C_BIT_SDA,
  106. };
  107. /** Delay required for bit-bashing operation */
  108. #define I2C_UDELAY 5
  109. /** Maximum number of cycles to use when attempting a bus reset */
  110. #define I2C_RESET_MAX_CYCLES 32
  111. /**
  112. * Check presence of I2C device
  113. *
  114. * @v i2c I2C interface
  115. * @v i2cdev I2C device
  116. * @ret rc Return status code
  117. *
  118. * Checks for the presence of the device on the I2C bus by attempting
  119. * a zero-length write.
  120. */
  121. static inline int i2c_check_presence ( struct i2c_interface *i2c,
  122. struct i2c_device *i2cdev ) {
  123. return i2c->write ( i2c, i2cdev, 0, NULL, 0 );
  124. }
  125. extern int init_i2c_bit_basher ( struct i2c_bit_basher *i2cbit,
  126. struct bit_basher_operations *bash_op );
  127. /**
  128. * Initialise generic I2C EEPROM device
  129. *
  130. * @v i2cdev I2C device
  131. */
  132. static inline __always_inline void
  133. init_i2c_eeprom ( struct i2c_device *i2cdev, unsigned int dev_addr ) {
  134. i2cdev->dev_addr = dev_addr;
  135. i2cdev->dev_addr_len = 1;
  136. i2cdev->word_addr_len = 1;
  137. }
  138. /**
  139. * Initialise Atmel AT24C11
  140. *
  141. * @v i2cdev I2C device
  142. */
  143. static inline __always_inline void
  144. init_at24c11 ( struct i2c_device *i2cdev ) {
  145. /* This chip has no device address; it must be the only chip
  146. * on the bus. The word address is contained entirely within
  147. * the device address field.
  148. */
  149. i2cdev->dev_addr = 0;
  150. i2cdev->dev_addr_len = 1;
  151. i2cdev->word_addr_len = 0;
  152. }
  153. #endif /* _GPXE_I2C_H */