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  1. /*
  2. * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
  3. *
  4. * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
  5. * Munro, in turn based on the Linux kernel's PCI implementation.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of the
  10. * License, or any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20. * 02110-1301, USA.
  21. */
  22. FILE_LICENCE ( GPL2_OR_LATER );
  23. #include <stdint.h>
  24. #include <stdlib.h>
  25. #include <stdio.h>
  26. #include <string.h>
  27. #include <errno.h>
  28. #include <ipxe/tables.h>
  29. #include <ipxe/device.h>
  30. #include <ipxe/pci.h>
  31. /** @file
  32. *
  33. * PCI bus
  34. *
  35. */
  36. static void pcibus_remove ( struct root_device *rootdev );
  37. /**
  38. * Read PCI BAR
  39. *
  40. * @v pci PCI device
  41. * @v reg PCI register number
  42. * @ret bar Base address register
  43. *
  44. * Reads the specified PCI base address register, including the flags
  45. * portion. 64-bit BARs will be handled automatically. If the value
  46. * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
  47. * high dword is non-zero on a 32-bit platform), then the value
  48. * returned will be zero plus the flags for a 64-bit BAR. Unreachable
  49. * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
  50. */
  51. static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
  52. uint32_t low;
  53. uint32_t high;
  54. pci_read_config_dword ( pci, reg, &low );
  55. if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) )
  56. == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){
  57. pci_read_config_dword ( pci, reg + 4, &high );
  58. if ( high ) {
  59. if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
  60. return ( ( ( uint64_t ) high << 32 ) | low );
  61. } else {
  62. DBGC ( pci, PCI_FMT " unhandled 64-bit BAR "
  63. "%08x%08x\n",
  64. PCI_ARGS ( pci ), high, low );
  65. return PCI_BASE_ADDRESS_MEM_TYPE_64;
  66. }
  67. }
  68. }
  69. return low;
  70. }
  71. /**
  72. * Find the start of a PCI BAR
  73. *
  74. * @v pci PCI device
  75. * @v reg PCI register number
  76. * @ret start BAR start address
  77. *
  78. * Reads the specified PCI base address register, and returns the
  79. * address portion of the BAR (i.e. without the flags).
  80. *
  81. * If the address exceeds the size of an unsigned long (i.e. if a
  82. * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
  83. * return value will be zero.
  84. */
  85. unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
  86. unsigned long bar;
  87. bar = pci_bar ( pci, reg );
  88. if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){
  89. return ( bar & PCI_BASE_ADDRESS_MEM_MASK );
  90. } else {
  91. return ( bar & PCI_BASE_ADDRESS_IO_MASK );
  92. }
  93. }
  94. /**
  95. * Read membase and ioaddr for a PCI device
  96. *
  97. * @v pci PCI device
  98. *
  99. * This scans through all PCI BARs on the specified device. The first
  100. * valid memory BAR is recorded as pci_device::membase, and the first
  101. * valid IO BAR is recorded as pci_device::ioaddr.
  102. *
  103. * 64-bit BARs are handled automatically. On a 32-bit platform, if a
  104. * 64-bit BAR has a non-zero high dword, it will be regarded as
  105. * invalid.
  106. */
  107. static void pci_read_bases ( struct pci_device *pci ) {
  108. unsigned long bar;
  109. int reg;
  110. for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
  111. bar = pci_bar ( pci, reg );
  112. if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
  113. if ( ! pci->ioaddr )
  114. pci->ioaddr =
  115. ( bar & PCI_BASE_ADDRESS_IO_MASK );
  116. } else {
  117. if ( ! pci->membase )
  118. pci->membase =
  119. ( bar & PCI_BASE_ADDRESS_MEM_MASK );
  120. /* Skip next BAR if 64-bit */
  121. if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
  122. reg += 4;
  123. }
  124. }
  125. }
  126. /**
  127. * Enable PCI device
  128. *
  129. * @v pci PCI device
  130. *
  131. * Set device to be a busmaster in case BIOS neglected to do so. Also
  132. * adjust PCI latency timer to a reasonable value, 32.
  133. */
  134. void adjust_pci_device ( struct pci_device *pci ) {
  135. unsigned short new_command, pci_command;
  136. unsigned char pci_latency;
  137. pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
  138. new_command = ( pci_command | PCI_COMMAND_MASTER |
  139. PCI_COMMAND_MEM | PCI_COMMAND_IO );
  140. if ( pci_command != new_command ) {
  141. DBGC ( pci, PCI_FMT " device not enabled by BIOS! Updating "
  142. "PCI command %04x->%04x\n",
  143. PCI_ARGS ( pci ), pci_command, new_command );
  144. pci_write_config_word ( pci, PCI_COMMAND, new_command );
  145. }
  146. pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
  147. if ( pci_latency < 32 ) {
  148. DBGC ( pci, PCI_FMT " latency timer is unreasonably low at "
  149. "%d. Setting to 32.\n", PCI_ARGS ( pci ), pci_latency );
  150. pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
  151. }
  152. }
  153. /**
  154. * Read PCI device configuration
  155. *
  156. * @v pci PCI device
  157. * @ret rc Return status code
  158. */
  159. int pci_read_config ( struct pci_device *pci ) {
  160. uint16_t busdevfn;
  161. uint8_t hdrtype;
  162. uint32_t tmp;
  163. /* Ignore all but the first function on non-multifunction devices */
  164. if ( PCI_FUNC ( pci->busdevfn ) != 0 ) {
  165. busdevfn = pci->busdevfn;
  166. pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
  167. pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
  168. pci->busdevfn = busdevfn;
  169. if ( ! ( hdrtype & 0x80 ) )
  170. return -ENODEV;
  171. }
  172. /* Check for physical device presence */
  173. pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
  174. if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
  175. return -ENODEV;
  176. /* Populate struct pci_device */
  177. pci->vendor = ( tmp & 0xffff );
  178. pci->device = ( tmp >> 16 );
  179. pci_read_config_dword ( pci, PCI_REVISION, &tmp );
  180. pci->class = ( tmp >> 8 );
  181. pci_read_config_byte ( pci, PCI_INTERRUPT_LINE, &pci->irq );
  182. pci_read_bases ( pci );
  183. /* Initialise generic device component */
  184. snprintf ( pci->dev.name, sizeof ( pci->dev.name ),
  185. "PCI%02x:%02x.%x", PCI_BUS ( pci->busdevfn ),
  186. PCI_SLOT ( pci->busdevfn ), PCI_FUNC ( pci->busdevfn ) );
  187. pci->dev.desc.bus_type = BUS_TYPE_PCI;
  188. pci->dev.desc.location = pci->busdevfn;
  189. pci->dev.desc.vendor = pci->vendor;
  190. pci->dev.desc.device = pci->device;
  191. pci->dev.desc.class = pci->class;
  192. pci->dev.desc.ioaddr = pci->ioaddr;
  193. pci->dev.desc.irq = pci->irq;
  194. INIT_LIST_HEAD ( &pci->dev.siblings );
  195. INIT_LIST_HEAD ( &pci->dev.children );
  196. return 0;
  197. }
  198. /**
  199. * Find next device on PCI bus
  200. *
  201. * @v pci PCI device to fill in
  202. * @v busdevfn Starting bus:dev.fn address
  203. * @ret busdevfn Bus:dev.fn address of next PCI device, or negative error
  204. */
  205. int pci_find_next ( struct pci_device *pci, unsigned int busdevfn ) {
  206. static unsigned int end;
  207. int rc;
  208. /* Determine number of PCI buses */
  209. if ( ! end )
  210. end = PCI_BUSDEVFN ( pci_num_bus(), 0, 0 );
  211. /* Find next PCI device, if any */
  212. for ( ; busdevfn < end ; busdevfn++ ) {
  213. memset ( pci, 0, sizeof ( *pci ) );
  214. pci_init ( pci, busdevfn );
  215. if ( ( rc = pci_read_config ( pci ) ) == 0 )
  216. return busdevfn;
  217. }
  218. return -ENODEV;
  219. }
  220. /**
  221. * Find driver for PCI device
  222. *
  223. * @v pci PCI device
  224. * @ret rc Return status code
  225. */
  226. int pci_find_driver ( struct pci_device *pci ) {
  227. struct pci_driver *driver;
  228. struct pci_device_id *id;
  229. unsigned int i;
  230. for_each_table_entry ( driver, PCI_DRIVERS ) {
  231. if ( ( driver->class.class ^ pci->class ) & driver->class.mask )
  232. continue;
  233. for ( i = 0 ; i < driver->id_count ; i++ ) {
  234. id = &driver->ids[i];
  235. if ( ( id->vendor != PCI_ANY_ID ) &&
  236. ( id->vendor != pci->vendor ) )
  237. continue;
  238. if ( ( id->device != PCI_ANY_ID ) &&
  239. ( id->device != pci->device ) )
  240. continue;
  241. pci_set_driver ( pci, driver, id );
  242. return 0;
  243. }
  244. }
  245. return -ENOENT;
  246. }
  247. /**
  248. * Probe a PCI device
  249. *
  250. * @v pci PCI device
  251. * @ret rc Return status code
  252. *
  253. * Searches for a driver for the PCI device. If a driver is found,
  254. * its probe() routine is called.
  255. */
  256. int pci_probe ( struct pci_device *pci ) {
  257. int rc;
  258. DBGC ( pci, PCI_FMT " (%04x:%04x) has driver \"%s\"\n",
  259. PCI_ARGS ( pci ), pci->vendor, pci->device, pci->id->name );
  260. DBGC ( pci, PCI_FMT " has mem %lx io %lx irq %d\n",
  261. PCI_ARGS ( pci ), pci->membase, pci->ioaddr, pci->irq );
  262. if ( ( rc = pci->driver->probe ( pci ) ) != 0 ) {
  263. DBGC ( pci, PCI_FMT " probe failed: %s\n",
  264. PCI_ARGS ( pci ), strerror ( rc ) );
  265. return rc;
  266. }
  267. return 0;
  268. }
  269. /**
  270. * Remove a PCI device
  271. *
  272. * @v pci PCI device
  273. */
  274. void pci_remove ( struct pci_device *pci ) {
  275. pci->driver->remove ( pci );
  276. DBGC ( pci, PCI_FMT " removed\n", PCI_ARGS ( pci ) );
  277. }
  278. /**
  279. * Probe PCI root bus
  280. *
  281. * @v rootdev PCI bus root device
  282. *
  283. * Scans the PCI bus for devices and registers all devices it can
  284. * find.
  285. */
  286. static int pcibus_probe ( struct root_device *rootdev ) {
  287. struct pci_device *pci = NULL;
  288. int busdevfn = 0;
  289. int rc;
  290. for ( busdevfn = 0 ; 1 ; busdevfn++ ) {
  291. /* Allocate struct pci_device */
  292. if ( ! pci )
  293. pci = malloc ( sizeof ( *pci ) );
  294. if ( ! pci ) {
  295. rc = -ENOMEM;
  296. goto err;
  297. }
  298. /* Find next PCI device, if any */
  299. busdevfn = pci_find_next ( pci, busdevfn );
  300. if ( busdevfn < 0 )
  301. break;
  302. /* Look for a driver */
  303. if ( ( rc = pci_find_driver ( pci ) ) != 0 ) {
  304. DBGC ( pci, PCI_FMT " (%04x:%04x class %06x) has no "
  305. "driver\n", PCI_ARGS ( pci ), pci->vendor,
  306. pci->device, pci->class );
  307. continue;
  308. }
  309. /* Add to device hierarchy */
  310. pci->dev.parent = &rootdev->dev;
  311. list_add ( &pci->dev.siblings, &rootdev->dev.children );
  312. /* Look for a driver */
  313. if ( ( rc = pci_probe ( pci ) ) == 0 ) {
  314. /* pcidev registered, we can drop our ref */
  315. pci = NULL;
  316. } else {
  317. /* Not registered; re-use struct pci_device */
  318. list_del ( &pci->dev.siblings );
  319. }
  320. }
  321. free ( pci );
  322. return 0;
  323. err:
  324. free ( pci );
  325. pcibus_remove ( rootdev );
  326. return rc;
  327. }
  328. /**
  329. * Remove PCI root bus
  330. *
  331. * @v rootdev PCI bus root device
  332. */
  333. static void pcibus_remove ( struct root_device *rootdev ) {
  334. struct pci_device *pci;
  335. struct pci_device *tmp;
  336. list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
  337. dev.siblings ) {
  338. pci_remove ( pci );
  339. list_del ( &pci->dev.siblings );
  340. free ( pci );
  341. }
  342. }
  343. /** PCI bus root device driver */
  344. static struct root_driver pci_root_driver = {
  345. .probe = pcibus_probe,
  346. .remove = pcibus_remove,
  347. };
  348. /** PCI bus root device */
  349. struct root_device pci_root_device __root_device = {
  350. .dev = { .name = "PCI" },
  351. .driver = &pci_root_driver,
  352. };