The Intel 40 Gigabit Ethernet virtual functions support only MSI-X
interrupts, and will write back completed interrupt descriptors only
when the device attempts to raise an interrupt (or when a complete
cacheline of receive descriptors has been completed).

We cannot actually use MSI-X interrupts within iPXE, since we never
have ownership of the APIC.  However, an MSI-X interrupt is
fundamentally just a DMA write of a single dword to an arbitrary
address.  We can therefore configure the device to "raise" an
interrupt by writing a meaningless value to an otherwise unused memory
location: this is sufficient to trigger the receive descriptor
writeback logic.

Signed-off-by: Michael Brown <mcb30@ipxe.org>